MIPS: Split I & D cache line size config

Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
diff --git a/board/dbau1x00/Kconfig b/board/dbau1x00/Kconfig
index 1715a28..448176d 100644
--- a/board/dbau1x00/Kconfig
+++ b/board/dbau1x00/Kconfig
@@ -15,10 +15,13 @@
 config SYS_DCACHE_SIZE
 	default 16384
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 16384
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 menu "dbau1x00 board options"
diff --git a/board/micronas/vct/Kconfig b/board/micronas/vct/Kconfig
index 5bb6f03..df7c029 100644
--- a/board/micronas/vct/Kconfig
+++ b/board/micronas/vct/Kconfig
@@ -15,10 +15,13 @@
 config SYS_DCACHE_SIZE
 	default 16384
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 16384
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 menu "vct board options"
diff --git a/board/pb1x00/Kconfig b/board/pb1x00/Kconfig
index 27b2ef0..ef8905d 100644
--- a/board/pb1x00/Kconfig
+++ b/board/pb1x00/Kconfig
@@ -15,10 +15,13 @@
 config SYS_DCACHE_SIZE
 	default 16384
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 16384
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 endif
diff --git a/board/qca/ap121/Kconfig b/board/qca/ap121/Kconfig
index f28ea1c..4fd6a71 100644
--- a/board/qca/ap121/Kconfig
+++ b/board/qca/ap121/Kconfig
@@ -15,10 +15,13 @@
 config SYS_DCACHE_SIZE
 	default 32768
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 65536
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 endif
diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig
index ff02236..74c632a 100644
--- a/board/qca/ap143/Kconfig
+++ b/board/qca/ap143/Kconfig
@@ -15,10 +15,13 @@
 config SYS_DCACHE_SIZE
 	default 32768
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 65536
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 endif
diff --git a/board/qemu-mips/Kconfig b/board/qemu-mips/Kconfig
index 66957e7..e696a12 100644
--- a/board/qemu-mips/Kconfig
+++ b/board/qemu-mips/Kconfig
@@ -14,10 +14,13 @@
 config SYS_DCACHE_SIZE
 	default 16384
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 16384
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 endif
diff --git a/board/tplink/wdr4300/Kconfig b/board/tplink/wdr4300/Kconfig
index ded7f9b..67a0228 100644
--- a/board/tplink/wdr4300/Kconfig
+++ b/board/tplink/wdr4300/Kconfig
@@ -18,10 +18,13 @@
 config SYS_DCACHE_SIZE
 	default 32768
 
+config SYS_DCACHE_LINE_SIZE
+	default 32
+
 config SYS_ICACHE_SIZE
 	default 65536
 
-config SYS_CACHELINE_SIZE
+config SYS_ICACHE_LINE_SIZE
 	default 32
 
 endif