| commit | 39ba474698bb4bc3dc48fd0c024f7cf06b08077a | [log] [tgz] |
|---|---|---|
| author | Andre Przywara <andre.przywara@arm.com> | Fri Dec 02 20:30:40 2022 +0000 |
| committer | Andre Przywara <andre.przywara@arm.com> | Sun Oct 22 23:41:51 2023 +0100 |
| tree | 9388def037d809f9fd4cc60eb8e467a1fb0b8421 | |
| parent | b9a91b98e8d81d2f7fdbc0d59c544a7bbb5e3679 [diff] |
sunxi: clock: D1/R528: Enable PLL LDO during PLL1 setup The D1/R528/T113s SoCs introduce a new "LDO enable" bit in the CPUX_PLL. Just enable that when we program that PLL. Signed-off-by: Andre Przywara <andre.przywara@arm.com>