commit 3af709092c6d92cf7e4e19a45fbb96e2e4d1c8f5
author Michal Simek <michal.simek@xilinx.com> Thu Dec 10 15:24:23 2015 +0100
committer Michal Simek <michal.simek@xilinx.com> Wed Jan 27 15:55:51 2016 +0100
tree 13d51dfd399e496f0c905783da6319c0e0539165
parent a0b2bfb0bfb91c17038ce2555a0e1038802b997e

net: emaclite: Use indirect register access for rx_ping/pong

Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

drivers/net/xilinx_emaclite.c

diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 654ad58..724b61e 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -364,11 +364,10 @@
  * RX - RX_PING & RX_PONG initialization
  */
 	/* Write out the value to flush the RX buffer */
-	out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
+	out_be32(&regs->rx_ping_rsr, XEL_RSR_RECV_IE_MASK);
 
 	if (emaclite->rxpp)
-		out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
-			XEL_RSR_RECV_IE_MASK);
+		out_be32(&regs->rx_pong_rsr, XEL_RSR_RECV_IE_MASK);
 
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
 	out_be32(&regs->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK);