Revert "e1000: fix sw fw sync on igb i210/i211"

This reverts commit 17da7120249bfdef877f46be5bbcb3cc01212eb9.

The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should
be used when acquiring the semaphore.

I believe the issue that this patch was trying to resolve is now resolved
by properly releasing the semaphore once no longer needed.

Cc: Marcel Ziswiler <marcel@ziswiler.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index b49980a..739d24b 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -1120,10 +1120,7 @@
 		if (e1000_get_hw_eeprom_semaphore(hw))
 			return -E1000_ERR_SWFW_SYNC;
 
-		if (hw->mac_type == e1000_igb)
-			swfw_sync = E1000_READ_REG(hw, I210_SW_FW_SYNC);
-		else
-			swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
+		swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
 		if (!(swfw_sync & (fwmask | swmask)))
 			break;
 
@@ -4458,6 +4455,7 @@
 
 		if (hw->mac_type >= e1000_82571)
 			mdelay(10);
+
 	} else {
 		/* Read the Extended Device Control Register, assert the PHY_RESET_DIR
 		 * bit to put the PHY into reset. Then, take it out of reset.
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index f3b77b1..232c95d 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -2496,7 +2496,6 @@
 #define ICH_GFPREG_BASE_MASK       0x1FFF
 #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
 
-#define E1000_I210_SW_FW_SYNC 0x5B50 /* Software-Firmware Synchronization - RW */
 #define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
 
 /* SPI EEPROM Status Register */