arm: dts: enable MTK SPI NOR controller driver
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts
index ef7d0f0..c2f1ad2 100644
--- a/arch/arm/dts/mt7622-rfb.dts
+++ b/arch/arm/dts/mt7622-rfb.dts
@@ -19,7 +19,7 @@
};
aliases {
- spi0 = &snfi;
+ spi0 = &snor;
};
memory@40000000 {
@@ -165,11 +165,25 @@
pinctrl-names = "default", "snfi";
pinctrl-0 = <&snor_pins>;
pinctrl-1 = <&snfi_pins>;
+ status = "disabled";
+
+ spi-flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&snor {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snor_pins>;
status = "okay";
spi-flash@0{
compatible = "jedec,spi-nor";
reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi
index 5c2e025..0127474 100644
--- a/arch/arm/dts/mt7622.dtsi
+++ b/arch/arm/dts/mt7622.dtsi
@@ -53,6 +53,17 @@
#size-cells = <0>;
};
+ snor: snor@11014000 {
+ compatible = "mediatek,mtk-snor";
+ reg = <0x11014000 0x1000>;
+ clocks = <&pericfg CLK_PERI_FLASH_PD>,
+ <&topckgen CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts
index 5cc7294..df43cc4 100644
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -14,7 +14,7 @@
compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
aliases {
- spi0 = &snfi;
+ spi0 = &snor;
};
chosen {
@@ -69,11 +69,25 @@
pinctrl-names = "default", "snfi";
pinctrl-0 = <&snor_pins>;
pinctrl-1 = <&snfi_pins>;
+ status = "disabled";
+
+ spi-flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&snor {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snor_pins>;
status = "okay";
spi-flash@0{
compatible = "jedec,spi-nor";
reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
u-boot,dm-pre-reloc;
};
};
diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi
index 6850e00..0539426 100644
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -223,6 +223,17 @@
#size-cells = <0>;
};
+ snor: snor@11014000 {
+ compatible = "mediatek,mtk-snor";
+ reg = <0x11014000 0x1000>;
+ clocks = <&pericfg CLK_PERI_FLASH_PD>,
+ <&topckgen CLK_TOP_FLASH_SEL>;
+ clock-names = "spi", "sf";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ssusbsys: ssusbsys@1a000000 {
compatible = "mediatek,mt7629-ssusbsys", "syscon";
reg = <0x1a000000 0x1000>;