Merge git://git.denx.de/u-boot-spi
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 1fededd..dc48eef 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -847,4 +847,12 @@
default 0x2fe00000 if MACH_SUN9I
default 0x4fe00000 if MACH_SUN50I
+config SPL_SPI_SUNXI
+ bool "Support for SPI Flash on Allwinner SoCs in SPL"
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+ help
+ Enable support for SPI Flash. This option allows SPL to read from
+ sunxi SPI Flash. It uses the same method as the boot ROM, so does
+ not need any extra configuration.
+
endif
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index 2a3c379..6ddf682 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -48,6 +48,7 @@
obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o
obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o
obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o
+obj-$(CONFIG_SPL_SPI_SUNXI) += spl_spi_sunxi.o
obj-$(CONFIG_SUNXI_DRAM_DW) += dram_sunxi_dw.o
obj-$(CONFIG_SUNXI_DRAM_DW) += dram_timings/
obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o
diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
similarity index 100%
rename from drivers/mtd/spi/sunxi_spi_spl.c
rename to arch/arm/mach-sunxi/spl_spi_sunxi.c
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index c3e999e..519b2a0 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -47,6 +47,7 @@
CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 6ba255d..4484cf8 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -135,17 +135,4 @@
If unsure, say N
-if SPL
-
-config SPL_SPI_SUNXI
- bool "Support for SPI Flash on Allwinner SoCs in SPL"
- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
- select SPL_SPI_FLASH_SUPPORT
- ---help---
- Enable support for SPI Flash. This option allows SPL to read from
- sunxi SPI Flash. It uses the same method as the boot ROM, so does
- not need any extra configuration.
-
-endif
-
endmenu # menu "SPI Flash Support"
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index fcda023..4be6e9b 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -9,7 +9,6 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
-obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o
endif
obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 235a8c7..a3b4a0b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -23,6 +23,13 @@
IP core. Please find details on the "Embedded Peripherals IP
User Guide" of Altera.
+config ATCSPI200_SPI
+ bool "Andestech ATCSPI200 SPI driver"
+ help
+ Enable the Andestech ATCSPI200 SPI driver. This driver can be
+ used to access the SPI flash on AE3XX and AE250 platforms embedding
+ this Andestech IP core.
+
config ATH79_SPI
bool "Atheros SPI driver"
depends on ARCH_ATH79
@@ -232,13 +239,6 @@
used to access the SPI NOR flash on platforms embedding this
Freescale IP core.
-config ATCSPI200_SPI
- bool "Andestech ATCSPI200 SPI driver"
- help
- Enable the Andestech ATCSPI200 SPI driver. This driver can be
- used to access the SPI flash on AE3XX and AE250 platforms embedding
- this Andestech IP core.
-
config DAVINCI_SPI
bool "Davinci & Keystone SPI driver"
depends on ARCH_DAVINCI || ARCH_KEYSTONE
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index 5b2e9d6..bc08914 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -75,9 +75,6 @@
};
struct nds_spi_slave {
-#ifndef CONFIG_DM_SPI
- struct spi_slave slave;
-#endif
volatile struct atcspi200_spi_regs *regs;
int to;
unsigned int freq;
@@ -286,89 +283,6 @@
return ret;
}
-#ifndef CONFIG_DM_SPI
-#define to_nds_spi_slave(s) container_of(s, struct nds_spi_slave, slave)
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct nds_spi_slave *ns;
-
- if (!spi_cs_is_valid(bus, cs))
- return NULL;
-
- ns = spi_alloc_slave(struct nds_spi_slave, bus, cs);
- if (!ns)
- return NULL;
-
- switch (bus) {
- case SPI0_BUS:
- ns->regs = (struct atcspi200_spi_regs *)SPI0_BASE;
- break;
-
- case SPI1_BUS:
- ns->regs = (struct atcspi200_spi_regs *)SPI1_BASE;
- break;
-
- default:
- return NULL;
- }
-
- ns->freq= max_hz;
- ns->mode = mode;
- ns->to = SPI_TIMEOUT;
- ns->max_transfer_length = MAX_TRANSFER_LEN;
- ns->slave.max_write_size = MAX_TRANSFER_LEN;
-
- return &ns->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- free(ns);
-}
-
-void spi_init(void)
-{
- /* do nothing */
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- return __atcspi200_spi_claim_bus(ns);
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- __atcspi200_spi_release_bus(ns);
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
- void *data_in, unsigned long flags)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- return __atcspi200_spi_xfer(ns, bitlen, data_out, data_in, flags);
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs < NSPI_MAX_CS_NUM;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- __atcspi200_spi_start(ns);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- struct nds_spi_slave *ns = to_nds_spi_slave(slave);
- __atcspi200_spi_stop(ns);
-}
-#else
static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)
{
struct nds_spi_slave *ns = dev_get_priv(bus);
@@ -496,4 +410,3 @@
.priv_auto_alloc_size = sizeof(struct nds_spi_slave),
.probe = atcspi200_spi_probe,
};
-#endif
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 1da4542..053a67b 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -456,9 +456,6 @@
conf |= OMAP3_MCSPI_MODULCTRL_SINGLE;
writel(conf, &priv->regs->modulctrl);
-
- _omap3_spi_set_mode(priv);
- _omap3_spi_set_speed(priv);
}
#ifndef CONFIG_DM_SPI
@@ -594,8 +591,6 @@
struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
priv->cs = slave_plat->cs;
- priv->mode = slave_plat->mode;
- priv->freq = slave_plat->max_hz;
_omap3_spi_claim_bus(priv);
return 0;
@@ -650,13 +645,29 @@
return _spi_xfer(priv, bitlen, dout, din, flags);
}
-static int omap3_spi_set_speed(struct udevice *bus, unsigned int speed)
+static int omap3_spi_set_speed(struct udevice *dev, unsigned int speed)
{
+ struct udevice *bus = dev->parent;
+ struct omap3_spi_priv *priv = dev_get_priv(bus);
+ struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+
+ priv->cs = slave_plat->cs;
+ priv->freq = slave_plat->max_hz;
+ _omap3_spi_set_speed(priv);
+
return 0;
}
-static int omap3_spi_set_mode(struct udevice *bus, uint mode)
+static int omap3_spi_set_mode(struct udevice *dev, uint mode)
{
+ struct udevice *bus = dev->parent;
+ struct omap3_spi_priv *priv = dev_get_priv(bus);
+ struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+
+ priv->cs = slave_plat->cs;
+ priv->mode = slave_plat->mode;
+ _omap3_spi_set_mode(priv);
+
return 0;
}