Correct SPL uses of SANDBOX_CLK_CCF

This converts 12 usages of this option to the non-SPL form, since there is
no SPL_SANDBOX_CLK_CCF defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 7e8e62f..6ab137a 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -81,7 +81,7 @@
 	unsigned long parent_rate = clk_get_parent_rate(clk);
 	unsigned int val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = divider->io_divider_val;
 #else
 	val = readl(divider->reg);
@@ -210,7 +210,7 @@
 	div->width = width;
 	div->flags = clk_divider_flags;
 	div->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	div->io_divider_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index aa40daf..a8775c7 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -62,7 +62,7 @@
 		if (set)
 			reg |= BIT(gate->bit_idx);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = gate->io_gate_val;
 #else
 		reg = readl(gate->reg);
@@ -96,7 +96,7 @@
 	struct clk_gate *gate = to_clk_gate(clk);
 	u32 reg;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	reg = gate->io_gate_val;
 #else
 	reg = readl(gate->reg);
@@ -142,7 +142,7 @@
 	gate->reg = reg;
 	gate->bit_idx = bit_idx;
 	gate->flags = clk_gate_flags;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	gate->io_gate_val = *(u32 *)reg;
 #endif
 
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index b49946f..184d426 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -90,7 +90,7 @@
 	struct clk_mux *mux = to_clk_mux(clk);
 	u32 val;
 
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	val = mux->io_mux_val;
 #else
 	val = readl(mux->reg);
@@ -137,7 +137,7 @@
 	if (mux->flags & CLK_MUX_HIWORD_MASK) {
 		reg = mux->mask << (mux->shift + 16);
 	} else {
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 		reg = mux->io_mux_val;
 #else
 		reg = readl(mux->reg);
@@ -146,7 +146,7 @@
 	}
 	val = val << mux->shift;
 	reg |= val;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = reg;
 #else
 	writel(reg, mux->reg);
@@ -194,7 +194,7 @@
 	mux->mask = mask;
 	mux->flags = clk_mux_flags;
 	mux->table = table;
-#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)
 	mux->io_mux_val = *(u32 *)reg;
 #endif