net: sun8i_emac: Fix DMA alignment issues with the rx / tx buffers
This fixes the following CACHE warnings when using sun8i_emac:
=> dhcp
BOOTP broadcast 1
BOOTP broadcast 2
CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
BOOTP broadcast 3
CACHE: Misaligned operation at range [7bf59c90, 7bf59e10]
CACHE: Misaligned operation at range [7bf5a478, 7bf5a5f8]
DHCP client bound to address 10.42.43.80 (1009 ms)
Note this commit also changes the max rx size from 2024 to 2044,
matching what the kernel driver uses.
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 7c088c3..4c149e1 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -32,7 +32,14 @@
#define CONFIG_TX_DESCR_NUM 32
#define CONFIG_RX_DESCR_NUM 32
-#define CONFIG_ETH_BUFSIZE 2024
+#define CONFIG_ETH_BUFSIZE 2048 /* Note must be dma aligned */
+
+/*
+ * The datasheet says that each descriptor can transfers up to 4096 bytes
+ * But later, the register documentation reduces that value to 2048,
+ * using 2048 cause strange behaviours and even BSP driver use 2047
+ */
+#define CONFIG_ETH_RXSIZE 2044 /* Note must fit in ETH_BUFSIZE */
#define TX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_TX_DESCR_NUM)
#define RX_TOTAL_BUFSIZE (CONFIG_ETH_BUFSIZE * CONFIG_RX_DESCR_NUM)
@@ -324,7 +331,7 @@
desc_p->buf_addr = (uintptr_t)&rxbuffs[idx * CONFIG_ETH_BUFSIZE]
;
desc_p->next = (uintptr_t)&desc_table_p[idx + 1];
- desc_p->st |= CONFIG_ETH_BUFSIZE;
+ desc_p->st |= CONFIG_ETH_RXSIZE;
desc_p->status = BIT(31);
}
@@ -506,7 +513,7 @@
roundup(data_end,
ARCH_DMA_MINALIGN));
if (good_packet) {
- if (length > CONFIG_ETH_BUFSIZE) {
+ if (length > CONFIG_ETH_RXSIZE) {
printf("Received packet is too big (len=%d)\n",
length);
return -EMSGSIZE;