Blackfin: split out async setup
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.
This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 18dbdf7..6a0bcca 100644
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -19,6 +19,7 @@
#include "cpu.h"
#include "serial.h"
+#include "initcode.h"
ulong bfin_poweron_retx;
@@ -44,13 +45,16 @@
extern char _sdata_l1[], _data_l1_lma[], _data_l1_len[];
memcpy(&_sdata_l1, &_data_l1_lma, (unsigned long)_data_l1_len);
}
-#if defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
- /* The BF537 bootrom will reset the EBIU_AMGCTL register on us
- * after it has finished loading the LDR. So configure it again.
+
+ /*
+ * Make sure our async settings are committed. Some bootroms
+ * (like the BF537) will reset some registers on us after it
+ * has finished loading the LDR. Or if we're booting over
+ * JTAG, the initcode never got a chance to run. Or if we
+ * aren't booting from parallel flash, the initcode skipped
+ * this step completely.
*/
- else
- bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL);
-#endif
+ program_async_controller(NULL);
/* Save RETX so we can pass it while booting Linux */
bfin_poweron_retx = bootflag;