commit | 7a25a63c134f9fdc1e977ca7d6c8f1ddda6103e5 | [log] [tgz] |
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author | Xu Ziyuan <xzy.xu@rock-chips.com> | Sun Apr 16 17:44:44 2017 +0800 |
committer | Simon Glass <sjg@chromium.org> | Wed May 10 13:37:21 2017 -0600 |
tree | d725342d9a59d1706de59a18ae00ef4e35075319 | |
parent | 7f0cfe478bd817d2bb373522222cf06630fea3cd [diff] |
rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>