armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index a07cd0a..694b28b 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -208,6 +208,15 @@
else
config_board_mux(MUX_TYPE_SDHC);
+#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
+
+ if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
+ QIXIS_WRITE(brdcfg[9],
+ (QIXIS_READ(brdcfg[9]) & 0xf8) |
+ FSL_QIXIS_BRDCFG9_QSPI);
+#endif
+
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif