xpl: Rename spl_phase() to xpl_phase()
Rename this function to indicate that it refers to any xPL phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index 11c9867..c21c412 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -37,7 +37,7 @@
{
struct dw_i2c *priv = dev_get_priv(dev);
- if (spl_phase() < PHASE_SPL) {
+ if (xpl_phase() < PHASE_SPL) {
u32 base;
int ret;
@@ -53,7 +53,7 @@
PCI_COMMAND_MASTER);
}
- if (spl_phase() < PHASE_BOARD_F) {
+ if (xpl_phase() < PHASE_BOARD_F) {
/* Handle early, fixed mapping into a different address space */
priv->regs = (struct i2c_regs *)dm_pci_read_bar32(dev, 0);
} else {
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index 016c807..d7ce038 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -198,7 +198,7 @@
static int p2sb_post_bind(struct udevice *dev)
{
- if (spl_phase() > PHASE_TPL && !CONFIG_IS_ENABLED(OF_PLATDATA))
+ if (xpl_phase() > PHASE_TPL && !CONFIG_IS_ENABLED(OF_PLATDATA))
return dm_scan_fdt_dev(dev);
return 0;
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 6571e65..59894d2 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -722,7 +722,7 @@
u32 vendev;
int index;
- if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(PCI_PNP))
+ if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(PCI_PNP))
return true;
for (index = 0;
@@ -798,7 +798,7 @@
if (!(gd->flags & GD_FLG_RELOC) &&
!(drv->flags & DM_FLAG_PRE_RELOC) &&
(!CONFIG_IS_ENABLED(PCI_PNP) ||
- spl_phase() != PHASE_SPL))
+ xpl_phase() != PHASE_SPL))
return log_msg_ret("pre", -EPERM);
/*
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 78e5de9..2753df2 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -379,7 +379,7 @@
}
/* In U-Boot proper, collect the information added by SPL (see below) */
- if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
+ if (IS_ENABLED(CONFIG_SPL_VIDEO) && xpl_phase() > PHASE_SPL &&
CONFIG_IS_ENABLED(BLOBLIST)) {
struct video_handoff *ho;
@@ -425,7 +425,7 @@
mode_info.vesa.bits_per_pixel);
/* In SPL, store the information for use by U-Boot proper */
- if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
+ if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
struct video_handoff *ho;
ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c
index 6cfe83a..19525f8 100644
--- a/drivers/pinctrl/intel/pinctrl.c
+++ b/drivers/pinctrl/intel/pinctrl.c
@@ -273,7 +273,7 @@
irq = pcr_read32(dev, PAD_CFG1_OFFSET(pad_cfg_offset));
irq &= PAD_CFG1_IRQ_MASK;
if (!irq) {
- if (spl_phase() > PHASE_TPL)
+ if (xpl_phase() > PHASE_TPL)
log_err("GPIO %u doesn't support APIC routing\n",
cfg->pad);
@@ -315,7 +315,7 @@
return config_value;
}
}
- if (spl_phase() > PHASE_TPL)
+ if (xpl_phase() > PHASE_TPL)
log_err("Logical-to-Chipset mapping not found\n");
return -ENOENT;
@@ -622,7 +622,7 @@
struct intel_pinctrl_priv *priv = dev_get_priv(dev);
if (!comm) {
- if (spl_phase() > PHASE_TPL)
+ if (xpl_phase() > PHASE_TPL)
log_err("Cannot find community for pid %d\n",
pplat->pid);
return -EDOM;
diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
index c289ced..1e94104 100644
--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
+++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
@@ -60,7 +60,7 @@
* are different and if they aren't, use the reset values.
*/
if (dw[0] == dw[1] || dw[1] == dw[2]) {
- if (spl_phase() > PHASE_TPL)
+ if (xpl_phase() > PHASE_TPL)
log_info("PMC: Using default GPE route");
gpio_cfg = readl(upriv->gpe_cfg);
for (i = 0; i < upriv->gpe0_count; i++)
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 45270e2..7f8a6ba 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -193,7 +193,7 @@
*/
static bool phase_sdram_init(void)
{
- return spl_phase() == PHASE_TPL ||
+ return xpl_phase() == PHASE_TPL ||
(!IS_ENABLED(CONFIG_TPL) &&
!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) &&
!spl_in_proper());
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index e48ca65..2264ca8 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -779,7 +779,7 @@
struct ich_spi_plat *plat,
struct ich_spi_priv *ctlr)
{
- if (spl_phase() == PHASE_TPL) {
+ if (xpl_phase() == PHASE_TPL) {
struct ich_spi_plat *plat = dev_get_plat(dev);
int ret;
@@ -867,7 +867,7 @@
if (ret)
return ret;
- if (spl_phase() == PHASE_TPL) {
+ if (xpl_phase() == PHASE_TPL) {
/* Cache the BIOS to speed things up */
ret = ich_cache_bios_region(dev);
if (ret)
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index d30b008..536ac72 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -102,7 +102,7 @@
mdelay(100);
/* Still no reset? Give up */
- if (spl_phase() <= PHASE_SPL)
+ if (xpl_phase() <= PHASE_SPL)
log_err("no sysreset\n");
else
log_err("System reset not supported on this platform\n");
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
index c435162..17a2981 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
@@ -802,7 +802,7 @@
struct console_tt_store store;
const uint size = sizeof(store);
- if (spl_phase() <= PHASE_SPL)
+ if (xpl_phase() <= PHASE_SPL)
return -ENOSYS;
/*
@@ -826,7 +826,7 @@
struct console_tt_priv *priv = dev_get_priv(dev);
struct console_tt_store store;
- if (spl_phase() <= PHASE_SPL)
+ if (xpl_phase() <= PHASE_SPL)
return -ENOSYS;
memcpy(&store, abuf_data(buf), sizeof(store));
@@ -853,7 +853,7 @@
uint out, val;
int ret;
- if (spl_phase() <= PHASE_SPL)
+ if (xpl_phase() <= PHASE_SPL)
return -ENOSYS;
if (!visible)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 41bb764..9823673 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -128,7 +128,7 @@
struct udevice *dev;
ulong size;
- if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() == PHASE_BOARD_F)
+ if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() == PHASE_BOARD_F)
return 0;
gd->video_top = *addrp;
@@ -421,7 +421,7 @@
struct udevice *dev;
/* Assume video to be active if SPL passed video hand-off to U-boot */
- if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL)
+ if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() > PHASE_SPL)
return true;
for (uclass_find_first_device(UCLASS_VIDEO, &dev);
@@ -573,7 +573,7 @@
* NOTE:
* This assumes that reserved video memory only uses a single framebuffer
*/
- if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
+ if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
struct video_handoff *ho;
ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);