Merge git://www.denx.de/git/u-boot-imx
Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/.travis.yml b/.travis.yml
index 7b9ec1e..ea560b9 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -264,6 +264,15 @@
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
- env:
+ - TEST_PY_BD="sandbox_spl"
+ TEST_PY_TEST_SPEC="test_ofplatdata"
+ BUILDMAN="^sandbox$"
+ TOOLCHAIN="x86_64"
+ - env:
+ - TEST_PY_BD="sandbox_flattree"
+ BUILDMAN="^sandbox_flattree$"
+ TOOLCHAIN="x86_64"
+ - env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
diff --git a/Documentation/devicetree/bindings/phy/no-op.txt b/Documentation/devicetree/bindings/phy/no-op.txt
new file mode 100644
index 0000000..a338112
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/no-op.txt
@@ -0,0 +1,16 @@
+NOP PHY driver
+
+This driver is used to stub PHY operations in a driver (USB, SATA).
+This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
+and there is no actual PHY harwdare to drive.
+
+Required properties:
+- compatible : must contain "nop-phy"
+- #phy-cells : must contain <0>
+
+Example:
+
+nop_phy {
+ compatible = "nop-phy";
+ #phy-cells = <0>;
+};
diff --git a/Kconfig b/Kconfig
index bb80ada..c48f00e 100644
--- a/Kconfig
+++ b/Kconfig
@@ -95,6 +95,26 @@
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
+config SPL_SYS_MALLOC_F_LEN
+ hex "Size of malloc() pool in SPL before relocation"
+ depends on SYS_MALLOC_F
+ default SYS_MALLOC_F_LEN
+ help
+ Before relocation, memory is very limited on many platforms. Still,
+ we can provide a small malloc() pool if needed. Driver model in
+ particular needs this to operate, so that it can allocate the
+ initial serial device and any others that are needed.
+
+config TPL_SYS_MALLOC_F_LEN
+ hex "Size of malloc() pool in TPL before relocation"
+ depends on SYS_MALLOC_F
+ default SYS_MALLOC_F_LEN
+ help
+ Before relocation, memory is very limited on many platforms. Still,
+ we can provide a small malloc() pool if needed. Driver model in
+ particular needs this to operate, so that it can allocate the
+ initial serial device and any others that are needed.
+
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
@@ -325,12 +345,14 @@
config SYS_TEXT_BASE
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
- ARCH_ZYNQ || ARCH_KEYSTONE
+ ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
depends on !EFI_APP
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
+ default 0x80800000 if ARCH_OMAP2PLUS
+
config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
@@ -358,6 +380,8 @@
source "dts/Kconfig"
+source "env/Kconfig"
+
source "net/Kconfig"
source "drivers/Kconfig"
diff --git a/Makefile b/Makefile
index 3d2b66a..2fc4616 100644
--- a/Makefile
+++ b/Makefile
@@ -3,9 +3,9 @@
#
VERSION = 2017
-PATCHLEVEL = 07
+PATCHLEVEL = 09
SUBLEVEL =
-EXTRAVERSION =
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
@@ -690,6 +690,7 @@
libs-y += drivers/usb/ulpi/
libs-y += cmd/
libs-y += common/
+libs-y += env/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
@@ -1358,6 +1359,7 @@
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
+ LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
else \
return 42; \
fi; \
@@ -1366,6 +1368,7 @@
LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
LC_ALL=C date +'#define U_BOOT_TZ "%z"'; \
LC_ALL=C date +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
+ LC_ALL=C date +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; \
fi)
endef
@@ -1398,7 +1401,8 @@
spl/u-boot-spl.bin: spl/u-boot-spl
@:
spl/u-boot-spl: tools prepare \
- $(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
+ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
+ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
spl/sunxi-spl.bin: spl/u-boot-spl
@@ -1461,14 +1465,14 @@
false; \
fi
-env: scripts_basic
+environ: scripts_basic
$(Q)$(MAKE) $(build)=tools/$@
tools-only: scripts_basic $(version_h) $(timestamp_h)
$(Q)$(MAKE) $(build)=tools
tools-all: export HOST_TOOLS_ALL=y
-tools-all: env tools ;
+tools-all: environ tools ;
cross_tools: export CROSS_BUILD_TOOLS=y
cross_tools: tools ;
diff --git a/README b/README
index 1527dee..1a7a788 100644
--- a/README
+++ b/README
@@ -699,11 +699,6 @@
when no character is read on the console interface
within "Boot Delay" after reset.
- CONFIG_BOOTARGS
- This can be used to pass arguments to the bootm
- command. The value of CONFIG_BOOTARGS goes into the
- environment value "bootargs".
-
CONFIG_RAMBOOT and CONFIG_NFSBOOT
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
@@ -756,112 +751,6 @@
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
-- Monitor Functions:
- Monitor commands can be included or excluded
- from the build by using the #include files
- <config_cmd_all.h> and #undef'ing unwanted
- commands, or adding #define's for wanted commands.
-
- The default command configuration includes all commands
- except those marked below with a "*".
-
- CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
- CONFIG_CMD_ASKENV * ask for env variable
- CONFIG_CMD_BDI bdinfo
- CONFIG_CMD_BOOTD bootd
- CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
- CONFIG_CMD_CACHE * icache, dcache
- CONFIG_CMD_CONSOLE coninfo
- CONFIG_CMD_DHCP * DHCP support
- CONFIG_CMD_DIAG * Diagnostics
- CONFIG_CMD_ECHO echo arguments
- CONFIG_CMD_EDITENV edit env variable
- CONFIG_CMD_ELF * bootelf, bootvx
- CONFIG_CMD_ENV_EXISTS * check existence of env variable
- CONFIG_CMD_EXPORTENV * export the environment
- CONFIG_CMD_EXT2 * ext2 command support
- CONFIG_CMD_EXT4 * ext4 command support
- CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
- that work for multiple fs types
- CONFIG_CMD_FS_UUID * Look up a filesystem UUID
- CONFIG_CMD_SAVEENV saveenv
- CONFIG_CMD_FLASH flinfo, erase, protect
- CONFIG_CMD_FPGA FPGA device initialization support
- CONFIG_CMD_GO * the 'go' command (exec code)
- CONFIG_CMD_GREPENV * search environment
- CONFIG_CMD_I2C * I2C serial bus support
- CONFIG_CMD_IMI iminfo
- CONFIG_CMD_IMLS List all images found in NOR flash
- CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
- CONFIG_CMD_IMPORTENV * import an environment
- CONFIG_CMD_INI * import data from an ini file into the env
- CONFIG_CMD_ITEST Integer/string test of 2 values
- CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
- CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
- (169.254.*.*)
- CONFIG_CMD_LOADB loadb
- CONFIG_CMD_LOADS loads
- CONFIG_CMD_MD5SUM * print md5 message digest
- (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
- CONFIG_CMD_MEMINFO * Display detailed memory information
- CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
- loop, loopw
- CONFIG_CMD_MEMTEST * mtest
- CONFIG_CMD_MISC Misc functions like sleep etc
- CONFIG_CMD_MMC * MMC memory mapped support
- CONFIG_CMD_MII * MII utility commands
- CONFIG_CMD_NAND * NAND support
- CONFIG_CMD_NET bootp, tftpboot, rarpboot
- CONFIG_CMD_NFS NFS support
- CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
- CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
- CONFIG_CMD_PCI * pciinfo
- CONFIG_CMD_PCMCIA * PCMCIA support
- CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
- host
- CONFIG_CMD_PORTIO * Port I/O
- CONFIG_CMD_READ * Read raw data from partition
- CONFIG_CMD_REGINFO * Register dump
- CONFIG_CMD_RUN run command in env variable
- CONFIG_CMD_SANDBOX * sb command to access sandbox features
- CONFIG_CMD_SAVES * save S record dump
- CONFIG_CMD_SDRAM * print SDRAM configuration information
- (requires CONFIG_CMD_I2C)
- CONFIG_CMD_SF * Read/write/erase SPI NOR flash
- CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
- CONFIG_CMD_SOURCE "source" command Support
- CONFIG_CMD_SPI * SPI serial bus support
- CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
- CONFIG_CMD_TFTPPUT * TFTP put command (upload)
- CONFIG_CMD_TIME * run command and report execution time (ARM specific)
- CONFIG_CMD_TIMER * access to the system tick timer
- CONFIG_CMD_USB * USB support
- CONFIG_CMD_CDP * Cisco Discover Protocol support
- CONFIG_CMD_MFSL * Microblaze FSL support
- CONFIG_CMD_XIMG Load part of Multi Image
- CONFIG_CMD_UUID * Generate random UUID or GUID string
-
- EXAMPLE: If you want all functions except of network
- support you can write:
-
- #include "config_cmd_all.h"
- #undef CONFIG_CMD_NET
-
- Other Commands:
- fdt (flattened device tree) command: CONFIG_OF_LIBFDT
-
- Note: Don't enable the "icache" and "dcache" commands
- (configuration option CONFIG_CMD_CACHE) unless you know
- what you (and your U-Boot users) are doing. Data
- cache cannot be enabled on systems like the
- 8xx (where accesses to the IMMR region must be
- uncached), and it cannot be disabled on all other
- systems where we (mis-) use the data cache to hold an
- initial stack and some data.
-
-
- XXX - this list needs to get updated!
-
- Removal of commands
If no commands are needed to boot, you can disable
CONFIG_CMDLINE to remove them. In this case, the command line
@@ -1063,10 +952,6 @@
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.
- CONFIG_CMD_E1000
- Management command for E1000 devices. When used on devices
- with SPI support you can reprogram the EEPROM from U-Boot.
-
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
@@ -1201,11 +1086,6 @@
to. Contemporary x86 systems usually map it at
0xfed40000.
- CONFIG_CMD_TPM
- Add tpm monitor functions.
- Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
- provides monitor access to authorized functions.
-
CONFIG_TPM
Define this to enable the TPM support library which provides
functional interfaces to some TPM commands.
@@ -1333,12 +1213,6 @@
CONFIG_USB_FUNCTION_DFU
This enables the USB portion of the DFU USB class
- CONFIG_CMD_DFU
- This enables the command "dfu" which is used to have
- U-Boot create a DFU class device via USB. This command
- requires that the "dfu_alt_info" environment variable be
- set and define the alt settings to expose to the host.
-
CONFIG_DFU_MMC
This enables support for exposing (e)MMC devices via DFU.
@@ -1378,13 +1252,6 @@
CONFIG_USB_FUNCTION_FASTBOOT
This enables the USB part of the fastboot gadget
- CONFIG_CMD_FASTBOOT
- This enables the command "fastboot" which enables the Android
- fastboot mode for the platform's USB device. Fastboot is a USB
- protocol for downloading images, flashing and device control
- used on Android devices.
- See doc/README.android-fastboot for more information.
-
CONFIG_ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.
@@ -1628,11 +1495,6 @@
The clock frequency of the MII bus
- CONFIG_PHY_GIGE
-
- If this option is set, support for speed/duplex
- detection of gigabit PHY is included.
-
CONFIG_PHY_RESET_DELAY
Some PHY like Intel LXT971A need extra delay after
@@ -2495,12 +2357,7 @@
commands cp, md...
- Serial Flash support
- CONFIG_CMD_SF
-
- Defining this option enables SPI flash commands
- 'sf probe/read/write/erase/update'.
-
- Usage requires an initial 'probe' to define the serial
+ Usage requires an initial 'sf probe' to define the serial
flash parameters, followed by read/write/erase/update
commands.
@@ -2513,12 +2370,6 @@
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
- CONFIG_CMD_SF_TEST
-
- Define this option to include a destructive SPI flash
- test ('sf test').
-
-- SystemACE Support:
CONFIG_SYSTEMACE
Adding this option adds support for Xilinx SystemACE
@@ -3435,7 +3286,7 @@
Please note that the environment is read-only until the monitor
has been relocated to RAM and a RAM copy of the environment has been
-created; also, when using EEPROM you will have to use getenv_f()
+created; also, when using EEPROM you will have to use env_get_f()
until then to read environment variables.
The environment is protected by a CRC32 checksum. Before the monitor
@@ -3699,7 +3550,7 @@
- CONFIG_LOOPW
Add the "loopw" memory command. This only takes effect if
- the memory commands are activated globally (CONFIG_CMD_MEM).
+ the memory commands are activated globally (CONFIG_CMD_MEMORY).
- CONFIG_MX_CYCLIC
Add the "mdc" and "mwc" memory commands. These are cyclic
@@ -3713,7 +3564,7 @@
This command will write 12345678 to address 100 all 10 ms.
This only takes effect if the memory commands are activated
- globally (CONFIG_CMD_MEM).
+ globally (CONFIG_CMD_MEMORY).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM, NDS32, MIPS only] If this variable is defined, then certain
diff --git a/api/api.c b/api/api.c
index c368511..7eee2fc 100644
--- a/api/api.c
+++ b/api/api.c
@@ -458,7 +458,7 @@
if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
- *value = getenv(name);
+ *value = env_get(name);
return 0;
}
@@ -481,7 +481,7 @@
if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
- setenv(name, value);
+ env_set(name, value);
return 0;
}
@@ -625,7 +625,7 @@
void api_init(void)
{
- struct api_signature *sig = NULL;
+ struct api_signature *sig;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
@@ -663,7 +663,7 @@
return;
}
- setenv_hex("api_address", (unsigned long)sig);
+ env_set_hex("api_address", (unsigned long)sig);
debugf("API sig @ 0x%lX\n", (unsigned long)sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;
diff --git a/arch/Kconfig b/arch/Kconfig
index d8e3263..78532f5 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -78,6 +78,7 @@
imply LZMA
imply SCSI
imply CMD_SATA
+ imply CMD_SF_TEST
config SH
bool "SuperH architecture"
@@ -87,18 +88,32 @@
bool "x86 architecture"
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC
+ select USE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
+ select OF_CONTROL
select DM
- select DM_KEYBOARD
- select DM_SERIAL
- select DM_GPIO
- select DM_SPI
- select DM_SPI_FLASH
- select USB_EHCI_HCD
+ select DM_PCI
+ select PCI
+ select TIMER
+ select X86_TSC_TIMER
+ imply BLK
+ imply DM_ETH
+ imply DM_GPIO
+ imply DM_KEYBOARD
+ imply DM_MMC
+ imply DM_RTC
+ imply DM_SERIAL
+ imply DM_SCSI
+ imply DM_SPI
+ imply DM_SPI_FLASH
+ imply DM_USB
+ imply DM_VIDEO
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
imply CMD_IRQ
+ imply CMD_SF_TEST
+ imply CMD_ZBOOT
config XTENSA
bool "Xtensa architecture"
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 5798149..a498ce5 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -85,7 +85,7 @@
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
- r2 = (unsigned int)getenv("bootargs");
+ r2 = (unsigned int)env_get("bootargs");
}
smp_set_core_boot_addr((unsigned long)kernel_entry, -1);
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 787f2b1..da9324b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -311,6 +311,7 @@
config ARCH_DAVINCI
bool "TI DaVinci"
select CPU_ARM926EJS
+ imply CMD_SAVES
help
Support for TI's DaVinci platform.
@@ -412,21 +413,25 @@
bool "Support spear300"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR310
bool "Support spear310"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR320
bool "Support spear320"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_SPEAR600
bool "Support spear600"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
+ imply CMD_SAVES
config TARGET_STV0991
bool "Support stv0991"
@@ -491,7 +496,6 @@
select DM_GPIO
select OF_CONTROL
imply FAT_WRITE
- imply ENV_IS_IN_FAT
config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
@@ -526,6 +530,9 @@
imply CMD_HASH
imply FAT_WRITE
imply HASH_VERIFY
+ imply NETDEVICES
+ imply BCM_SF2_ETH
+ imply BCM_SF2_ETH_GMAC
config TARGET_BCMNSP
bool "Support bcmnsp"
@@ -575,6 +582,7 @@
select CMD_POWEROFF
imply CMD_MTDPARTS
imply FIT
+ imply CMD_SAVES
config ARCH_OMAP2PLUS
bool "TI OMAP2+"
@@ -612,6 +620,11 @@
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
+if ARCH_MX6
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+endif
+
config ARCH_MX5
bool "Freescale MX5"
select CPU_V7
@@ -700,6 +713,7 @@
select CPU_V7
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
+ imply NAND
config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
@@ -726,6 +740,7 @@
select CLK_ZYNQ
imply CMD_CLK
imply FAT_WRITE
+ imply CMD_SPL
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
@@ -1026,7 +1041,6 @@
select SPL_PINCTRL if SPL
select SUPPORT_SPL
imply FAT_WRITE
- imply ENV_IS_IN_MMC
help
Support for UniPhier SoC family developed by Socionext Inc.
(formerly, System LSI Business Division of Panasonic Corporation)
@@ -1225,3 +1239,10 @@
source "arch/arm/Kconfig.debug"
endmenu
+
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3
+ default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
+ default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
+
+
diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c
index a60f583..ba1e559 100644
--- a/arch/arm/cpu/arm926ejs/spear/spl.c
+++ b/arch/arm/cpu/arm926ejs/spear/spl.c
@@ -222,7 +222,7 @@
u32 spl_boot_device(void)
{
- u32 mode;
+ u32 mode = 0;
/* Currently only SNOR is supported as the only */
if (snor_boot_selected()) {
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
index 79fafa0..89e367b 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
@@ -479,9 +479,9 @@
{
unsigned long rate;
- debug("%s: %s\n", __func__, c->name);
if (!c || !c->ops || !c->ops->get_rate)
return 0;
+ debug("%s: %s\n", __func__, c->name);
rate = c->ops->get_rate(c);
debug("%s: rate = %ld\n", __func__, rate);
@@ -493,9 +493,9 @@
{
int ret;
- debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (!c || !c->ops || !c->ops->set_rate)
return -EINVAL;
+ debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (c->use_cnt)
return -EINVAL;
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
index cdc1264..b061c20 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
@@ -479,9 +479,9 @@
{
unsigned long rate;
- debug("%s: %s\n", __func__, c->name);
if (!c || !c->ops || !c->ops->get_rate)
return 0;
+ debug("%s: %s\n", __func__, c->name);
rate = c->ops->get_rate(c);
debug("%s: rate = %ld\n", __func__, rate);
@@ -493,9 +493,9 @@
{
int ret;
- debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (!c || !c->ops || !c->ops->set_rate)
return -EINVAL;
+ debug("%s: %s rate=%ld\n", __func__, c->name, rate);
if (c->use_cnt)
return -EINVAL;
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 6a013b2..fadfce4 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -15,6 +15,7 @@
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
imply SCSI
+ imply CMD_PCI
menu "LS102xA architecture"
depends on ARCH_LS1021A
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index ac2d8d1..88f3f4d 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -329,7 +329,7 @@
strcpy(soc, "vf");
strcat(soc, soc_type);
- setenv("soc", soc);
+ env_set("soc", soc);
return 0;
}
diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c
index 31a243b..4622aa4 100644
--- a/arch/arm/cpu/armv7m/mpu.c
+++ b/arch/arm/cpu/armv7m/mpu.c
@@ -68,6 +68,7 @@
break;
case DEVICE_NON_SHARED:
attr = (2 << TEX_SHIFT) | BUFFERABLE;
+ break;
default:
attr = 0; /* strongly ordered */
break;
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index c447085..1249547 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -8,7 +8,9 @@
extra-y := start.o
obj-y += cpu.o
+ifndef CONFIG_$(SPL_TPL_)TIMER
obj-y += generic_timer.o
+endif
obj-y += cache_v8.o
obj-y += exceptions.o
obj-y += cache.o
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index 7cba308..ea845d1 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -22,6 +22,7 @@
* x1: 0 clean & invalidate, 1 invalidate only
* x2~x9: clobbered
*/
+.pushsection .text.__asm_dcache_level, "ax"
ENTRY(__asm_dcache_level)
lsl x12, x0, #1
msr csselr_el1, x12 /* select cache level */
@@ -58,6 +59,7 @@
ret
ENDPROC(__asm_dcache_level)
+.popsection
/*
* void __asm_flush_dcache_all(int invalidate_only)
@@ -66,6 +68,7 @@
*
* flush or invalidate all data cache by SET/WAY.
*/
+.pushsection .text.__asm_dcache_all, "ax"
ENTRY(__asm_dcache_all)
mov x1, x0
dsb sy
@@ -102,16 +105,21 @@
finished:
ret
ENDPROC(__asm_dcache_all)
+.popsection
+.pushsection .text.__asm_flush_dcache_all, "ax"
ENTRY(__asm_flush_dcache_all)
mov x0, #0
b __asm_dcache_all
ENDPROC(__asm_flush_dcache_all)
+.popsection
+.pushsection .text.__asm_invalidate_dcache_all, "ax"
ENTRY(__asm_invalidate_dcache_all)
mov x0, #0x1
b __asm_dcache_all
ENDPROC(__asm_invalidate_dcache_all)
+.popsection
/*
* void __asm_flush_dcache_range(start, end)
@@ -121,6 +129,7 @@
* x0: start address
* x1: end address
*/
+.pushsection .text.__asm_flush_dcache_range, "ax"
ENTRY(__asm_flush_dcache_range)
mrs x3, ctr_el0
lsr x3, x3, #16
@@ -138,6 +147,7 @@
dsb sy
ret
ENDPROC(__asm_flush_dcache_range)
+.popsection
/*
* void __asm_invalidate_dcache_range(start, end)
*
@@ -146,6 +156,7 @@
* x0: start address
* x1: end address
*/
+.pushsection .text.__asm_invalidate_dcache_range, "ax"
ENTRY(__asm_invalidate_dcache_range)
mrs x3, ctr_el0
ubfm x3, x3, #16, #19
@@ -162,41 +173,51 @@
dsb sy
ret
ENDPROC(__asm_invalidate_dcache_range)
+.popsection
/*
* void __asm_invalidate_icache_all(void)
*
* invalidate all tlb entries.
*/
+.pushsection .text.__asm_invalidate_icache_all, "ax"
ENTRY(__asm_invalidate_icache_all)
ic ialluis
isb sy
ret
ENDPROC(__asm_invalidate_icache_all)
+.popsection
+.pushsection .text.__asm_invalidate_l3_dcache, "ax"
ENTRY(__asm_invalidate_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_dcache)
.weak __asm_invalidate_l3_dcache
+.popsection
+.pushsection .text.__asm_flush_l3_dcache, "ax"
ENTRY(__asm_flush_l3_dcache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_flush_l3_dcache)
.weak __asm_flush_l3_dcache
+.popsection
+.pushsection .text.__asm_invalidate_l3_icache, "ax"
ENTRY(__asm_invalidate_l3_icache)
mov x0, #0 /* return status as success */
ret
ENDPROC(__asm_invalidate_l3_icache)
.weak __asm_invalidate_l3_icache
+.popsection
/*
* void __asm_switch_ttbr(ulong new_ttbr)
*
* Safely switches to a new page table.
*/
+.pushsection .text.__asm_switch_ttbr, "ax"
ENTRY(__asm_switch_ttbr)
/* x2 = SCTLR (alive throghout the function) */
switch_el x4, 3f, 2f, 1f
@@ -244,3 +265,4 @@
ret x3
ENDPROC(__asm_switch_ttbr)
+.popsection
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 5825f9b..cdeef26 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -27,6 +27,7 @@
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
imply SCSI
+ imply CMD_PCI
config ARCH_LS1046A
bool
@@ -307,7 +308,7 @@
default 2
help
This is the divider that is used to derive DSPI clock from Platform
- PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider.
+ clock, in another word DSPI_clk = Platform_clk / this_divider.
config SYS_FSL_DUART_CLK_DIV
int "DUART clock divider"
@@ -392,3 +393,6 @@
help
Reserved memory needs to be aligned for MC to use. Default value
is 512MB.
+
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index 619d9b7..3136e3f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -497,9 +497,7 @@
rev x0, x0 /* BE to LE conversion */
cpu_is_le:
ldr x5, [x11, #24]
- ldr x6, =IH_ARCH_DEFAULT
- cmp x6, x5
- b.eq 1f
+ cbz x5, 1f
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x4, secondary_switch_to_el1
@@ -541,9 +539,7 @@
ldr x4, [x11]
ldr x5, [x11, #24]
- ldr x6, =IH_ARCH_DEFAULT
- cmp x6, x5
- b.eq 2f
+ cbz x5, 2f
ldr x5, =ES_TO_AARCH32
bl switch_to_el1
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index 80fe1ad..ab61ac3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -29,9 +29,14 @@
u64 *table = get_spin_tbl_addr();
int i;
- for (i = 1; i < CONFIG_MAX_CPUS; i++)
- table[i * WORDS_PER_SPIN_TABLE_ENTRY +
- SPIN_TABLE_ELEM_OS_ARCH_IDX] = os_arch;
+ for (i = 1; i < CONFIG_MAX_CPUS; i++) {
+ if (os_arch == IH_ARCH_DEFAULT)
+ table[i * WORDS_PER_SPIN_TABLE_ENTRY +
+ SPIN_TABLE_ELEM_ARCH_COMP_IDX] = OS_ARCH_SAME;
+ else
+ table[i * WORDS_PER_SPIN_TABLE_ENTRY +
+ SPIN_TABLE_ELEM_ARCH_COMP_IDX] = OS_ARCH_DIFF;
+ }
}
#ifdef CONFIG_FSL_LSCH3
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index aee1ffa..639e9d2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -95,7 +95,7 @@
static unsigned long get_internval_val_mhz(void)
{
- char *interval = getenv(PLATFORM_CYCLE_ENV_VAR);
+ char *interval = env_get(PLATFORM_CYCLE_ENV_VAR);
/*
* interval is the number of platform cycles(MHz) between
* wake up events generated by EPU.
diff --git a/arch/arm/cpu/armv8/tlb.S b/arch/arm/cpu/armv8/tlb.S
index 945445b..6743111 100644
--- a/arch/arm/cpu/armv8/tlb.S
+++ b/arch/arm/cpu/armv8/tlb.S
@@ -14,7 +14,8 @@
* void __asm_invalidate_tlb_all(void)
*
* invalidate all tlb entries.
- */
+*/
+.pushsection .text.__asm_invalidate_tlb_all, "ax"
ENTRY(__asm_invalidate_tlb_all)
switch_el x9, 3f, 2f, 1f
3: tlbi alle3
@@ -31,3 +32,4 @@
0:
ret
ENDPROC(__asm_invalidate_tlb_all)
+.popsection
diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S
index ca07465..7aa6935 100644
--- a/arch/arm/cpu/armv8/transition.S
+++ b/arch/arm/cpu/armv8/transition.S
@@ -10,6 +10,7 @@
#include <linux/linkage.h>
#include <asm/macro.h>
+.pushsection .text.armv8_switch_to_el2, "ax"
ENTRY(armv8_switch_to_el2)
switch_el x6, 1f, 0f, 0f
0:
@@ -30,7 +31,9 @@
br x4
1: armv8_switch_to_el2_m x4, x5, x6
ENDPROC(armv8_switch_to_el2)
+.popsection
+.pushsection .text.armv8_switch_to_el1, "ax"
ENTRY(armv8_switch_to_el1)
switch_el x6, 0f, 1f, 0f
0:
@@ -40,7 +43,10 @@
br x4
1: armv8_switch_to_el1_m x4, x5, x6
ENDPROC(armv8_switch_to_el1)
+.popsection
+.pushsection .text.armv8_el2_to_aarch32, "ax"
WEAK(armv8_el2_to_aarch32)
ret
ENDPROC(armv8_el2_to_aarch32)
+.popsection
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index 5ac48eb..5ffc9f6 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -56,6 +56,17 @@
config SYS_MALLOC_F_LEN
default 0x600
+config DEFINE_TCM_OCM_MMAP
+ bool "Define TCM and OCM memory in MMU Table"
+ help
+ This option if enabled defines the TCM and OCM memory and its
+ memory attributes in MMU table entry.
+
+config ZYNQMP_PSU_INIT_ENABLED
+ bool "Include psu_init"
+ help
+ Include psu_init to full u-boot. SPL include psu_init by default.
+
config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
bool "Overwrite SPL bootmode"
depends on SPL
diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c
index 94ecf90..1b5066a 100644
--- a/arch/arm/cpu/armv8/zynqmp/cpu.c
+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c
@@ -38,6 +38,14 @@
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
+#if defined(CONFIG_DEFINE_TCM_OCM_MMAP)
+ .virt = 0xffe00000UL,
+ .phys = 0xffe00000UL,
+ .size = 0x00200000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+#endif
.virt = 0x400000000UL,
.phys = 0x400000000UL,
.size = 0x200000000UL,
@@ -102,9 +110,8 @@
#define ZYNQMP_MMIO_READ 0xC2000014
#define ZYNQMP_MMIO_WRITE 0xC2000013
-#ifndef CONFIG_SPL_BUILD
-int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
- u32 *ret_payload)
+int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
+ u32 arg3, u32 *ret_payload)
{
/*
* Added SIP service call Function Identifier
@@ -164,28 +171,7 @@
}
#endif
-int zynqmp_mmio_write(const u32 address,
- const u32 mask,
- const u32 value)
-{
- return invoke_smc(ZYNQMP_MMIO_WRITE, address, mask, value, 0, NULL);
-}
-
-int zynqmp_mmio_read(const u32 address, u32 *value)
-{
- u32 ret_payload[PAYLOAD_ARG_CNT];
- u32 ret;
-
- if (!value)
- return -EINVAL;
-
- ret = invoke_smc(ZYNQMP_MMIO_READ, address, 0, 0, 0, ret_payload);
- *value = ret_payload[1];
-
- return ret;
-}
-#else
-int zynqmp_mmio_write(const u32 address,
+static int zynqmp_mmio_rawwrite(const u32 address,
const u32 mask,
const u32 value)
{
@@ -200,9 +186,40 @@
return 0;
}
-int zynqmp_mmio_read(const u32 address, u32 *value)
+static int zynqmp_mmio_rawread(const u32 address, u32 *value)
{
*value = readl((ulong)address);
return 0;
}
-#endif
+
+int zynqmp_mmio_write(const u32 address,
+ const u32 mask,
+ const u32 value)
+{
+ if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3)
+ return zynqmp_mmio_rawwrite(address, mask, value);
+ else if (!IS_ENABLED(CONFIG_SPL_BUILD))
+ return invoke_smc(ZYNQMP_MMIO_WRITE, address, mask,
+ value, 0, NULL);
+
+ return -EINVAL;
+}
+
+int zynqmp_mmio_read(const u32 address, u32 *value)
+{
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ u32 ret;
+
+ if (!value)
+ return -EINVAL;
+
+ if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) {
+ ret = zynqmp_mmio_rawread(address, value);
+ } else if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
+ ret = invoke_smc(ZYNQMP_MMIO_READ, address, 0, 0,
+ 0, ret_payload);
+ *value = ret_payload[1];
+ }
+
+ return ret;
+}
diff --git a/arch/arm/cpu/armv8/zynqmp/mp.c b/arch/arm/cpu/armv8/zynqmp/mp.c
index e10fc31..76f889b 100644
--- a/arch/arm/cpu/armv8/zynqmp/mp.c
+++ b/arch/arm/cpu/armv8/zynqmp/mp.c
@@ -206,6 +206,21 @@
}
}
+void initialize_tcm(bool mode)
+{
+ if (!mode) {
+ set_r5_tcm_mode(LOCK);
+ set_r5_halt_mode(HALT, LOCK);
+ enable_clock_r5();
+ release_r5_reset(LOCK);
+ } else {
+ set_r5_tcm_mode(SPLIT);
+ set_r5_halt_mode(HALT, SPLIT);
+ enable_clock_r5();
+ release_r5_reset(SPLIT);
+ }
+}
+
int cpu_release(int nr, int argc, char * const argv[])
{
if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) {
diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 26bf80e..468dc1d 100644
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -17,7 +17,7 @@
void board_init_f(ulong dummy)
{
- psu_init();
+ board_early_init_f();
board_early_init_r();
#ifdef CONFIG_DEBUG_UART
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 132fa69..2cbdb17 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -42,6 +42,7 @@
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3328-evb.dtb \
+ rk3368-lion.dtb \
rk3368-sheep.dtb \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
@@ -132,13 +133,14 @@
zynq-topic-miami.dtb \
zynq-topic-miamilite.dtb \
zynq-topic-miamiplus.dtb \
+ zynq-zturn-myir.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm011.dtb \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-ep108.dtb \
- zynqmp-zcu102.dtb \
+ zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
zynqmp-zc1751-xm015-dc1.dtb \
zynqmp-zc1751-xm016-dc2.dtb \
@@ -370,6 +372,12 @@
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
+dtb-$(CONFIG_RCAR_GEN3) += \
+ r8a7795-h3ulcb.dtb \
+ r8a7795-salvator-x.dtb \
+ r8a7796-m3ulcb.dtb \
+ r8a7796-salvator-x.dtb
+
dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
keystone-k2e-evm.dtb \
@@ -377,6 +385,10 @@
keystone-k2g-generic.dtb \
keystone-k2g-ice.dtb
+dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
+
+dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb
+
dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi
index 0f25e33..69d9cea 100644
--- a/arch/arm/dts/at91sam9260.dtsi
+++ b/arch/arm/dts/at91sam9260.dtsi
@@ -34,6 +34,7 @@
tcb1 = &tcb1;
i2c0 = &i2c0;
ssc0 = &ssc0;
+ spi0 = &spi0;
};
cpus {
#address-cells = <0>;
diff --git a/arch/arm/dts/at91sam9260ek.dts b/arch/arm/dts/at91sam9260ek.dts
index 086c8ea..67a2660 100644
--- a/arch/arm/dts/at91sam9260ek.dts
+++ b/arch/arm/dts/at91sam9260ek.dts
@@ -118,7 +118,7 @@
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
- spi-max-frequency = <50000000>;
+ spi-max-frequency = <15000000>;
reg = <1>;
};
};
diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi
index 5e09de4..69c2d6e 100644
--- a/arch/arm/dts/at91sam9261.dtsi
+++ b/arch/arm/dts/at91sam9261.dtsi
@@ -30,6 +30,7 @@
ssc0 = &ssc0;
ssc1 = &ssc1;
ssc2 = &ssc2;
+ spi0 = &spi0;
};
cpus {
@@ -70,6 +71,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ u-boot,dm-pre-reloc;
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@@ -112,6 +114,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ u-boot,dm-pre-reloc;
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
@@ -286,20 +289,61 @@
status = "disabled";
};
+ pioA: gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
+ pioB: gpio@fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
+ pioC: gpio@fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ u-boot,dm-pre-reloc;
+ };
+
pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
ranges = <0xfffff400 0xfffff400 0x600>;
-
+ reg = <0xfffff400 0x200 /* pioA */
+ 0xfffff600 0x200 /* pioB */
+ 0xfffff800 0x200 /* pioC */
+ >;
atmel,mux-mask =
/* A B */
<0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */
+ u-boot,dm-pre-reloc;
/* shared pinctrl settings */
dbgu {
+ u-boot,dm-pre-reloc;
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
@@ -532,39 +576,6 @@
<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
-
- pioA: gpio@fffff400 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff400 0x200>;
- interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioA_clk>;
- };
-
- pioB: gpio@fffff600 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff600 0x200>;
- interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioB_clk>;
- };
-
- pioC: gpio@fffff800 {
- compatible = "atmel,at91rm9200-gpio";
- reg = <0xfffff800 0x200>;
- interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioC_clk>;
- };
};
pmc: pmc@fffffc00 {
@@ -575,6 +586,7 @@
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
+ u-boot,dm-pre-reloc;
main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc";
@@ -589,7 +601,7 @@
clocks = <&main_osc>;
};
- plla: pllack {
+ plla: pllack@0 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@@ -601,7 +613,7 @@
<190000000 240000000 2 1>;
};
- pllb: pllbck {
+ pllb: pllbck@1 {
compatible = "atmel,at91rm9200-clk-pll";
#clock-cells = <0>;
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
@@ -619,6 +631,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>;
+ u-boot,dm-pre-reloc;
};
usb: usbck {
@@ -635,25 +648,25 @@
interrupt-parent = <&pmc>;
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
- prog0: prog0 {
+ prog0: progi@0 {
#clock-cells = <0>;
reg = <0>;
interrupts = <AT91_PMC_PCKRDY(0)>;
};
- prog1: prog1 {
+ prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
interrupts = <AT91_PMC_PCKRDY(1)>;
};
- prog2: prog2 {
+ prog2: prog@2 {
#clock-cells = <0>;
reg = <2>;
interrupts = <AT91_PMC_PCKRDY(2)>;
};
- prog3: prog3 {
+ prog3: prog@3 {
#clock-cells = <0>;
reg = <3>;
interrupts = <AT91_PMC_PCKRDY(3)>;
@@ -665,49 +678,49 @@
#address-cells = <1>;
#size-cells = <0>;
- uhpck: uhpck {
+ uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
- udpck: udpck {
+ udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
- pck0: pck0 {
+ pck0: pck@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
- pck1: pck1 {
+ pck1: pck@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
- pck2: pck2 {
+ pck2: pck@10 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
- pck3: pck3 {
+ pck3: pck@11 {
#clock-cells = <0>;
reg = <11>;
clocks = <&prog3>;
};
- hclk0: hclk0 {
+ hclk0: hclk@16 {
#clock-cells = <0>;
reg = <16>;
clocks = <&mck>;
};
- hclk1: hclk1 {
+ hclk1: hclk@17 {
#clock-cells = <0>;
reg = <17>;
clocks = <&mck>;
@@ -719,98 +732,102 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&mck>;
+ u-boot,dm-pre-reloc;
- pioA_clk: pioA_clk {
+ pioA_clk: pioA_clk@2 {
#clock-cells = <0>;
reg = <2>;
+ u-boot,dm-pre-reloc;
};
- pioB_clk: pioB_clk {
+ pioB_clk: pioB_clk@3 {
#clock-cells = <0>;
reg = <3>;
+ u-boot,dm-pre-reloc;
};
- pioC_clk: pioC_clk {
+ pioC_clk: pioC_clk@4 {
#clock-cells = <0>;
reg = <4>;
+ u-boot,dm-pre-reloc;
};
- usart0_clk: usart0_clk {
+ usart0_clk: usart0_clk@6 {
#clock-cells = <0>;
reg = <6>;
};
- usart1_clk: usart1_clk {
+ usart1_clk: usart1_clk@7 {
#clock-cells = <0>;
reg = <7>;
};
- usart2_clk: usart2_clk {
+ usart2_clk: usart2_clk@8 {
#clock-cells = <0>;
reg = <8>;
};
- mci0_clk: mci0_clk {
+ mci0_clk: mci0_clk@9 {
#clock-cells = <0>;
reg = <9>;
};
- udc_clk: udc_clk {
+ udc_clk: udc_clk@10 {
#clock-cells = <0>;
reg = <10>;
};
- twi0_clk: twi0_clk {
+ twi0_clk: twi0_clk@11 {
reg = <11>;
#clock-cells = <0>;
};
- spi0_clk: spi0_clk {
+ spi0_clk: spi0_clk@12 {
#clock-cells = <0>;
reg = <12>;
};
- spi1_clk: spi1_clk {
+ spi1_clk: spi1_clk@13 {
#clock-cells = <0>;
reg = <13>;
};
- ssc0_clk: ssc0_clk {
+ ssc0_clk: ssc0_clk@14 {
#clock-cells = <0>;
reg = <14>;
};
- ssc1_clk: ssc1_clk {
+ ssc1_clk: ssc1_clk@15 {
#clock-cells = <0>;
reg = <15>;
};
- ssc2_clk: ssc2_clk {
+ ssc2_clk: ssc2_clk@16 {
#clock-cells = <0>;
reg = <16>;
};
- tc0_clk: tc0_clk {
+ tc0_clk: tc0_clk@17 {
#clock-cells = <0>;
reg = <17>;
};
- tc1_clk: tc1_clk {
+ tc1_clk: tc1_clk@18 {
#clock-cells = <0>;
reg = <18>;
};
- tc2_clk: tc2_clk {
+ tc2_clk: tc2_clk@19 {
#clock-cells = <0>;
reg = <19>;
};
- ohci_clk: ohci_clk {
+ ohci_clk: ohci_clk@20 {
#clock-cells = <0>;
reg = <20>;
};
- lcd_clk: lcd_clk {
+ lcd_clk: lcd_clk@21 {
#clock-cells = <0>;
reg = <21>;
};
diff --git a/arch/arm/dts/at91sam9261ek.dts b/arch/arm/dts/at91sam9261ek.dts
new file mode 100644
index 0000000..55bd51f
--- /dev/null
+++ b/arch/arm/dts/at91sam9261ek.dts
@@ -0,0 +1,211 @@
+/*
+ * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+/dts-v1/;
+#include "at91sam9261.dtsi"
+
+/ {
+ model = "Atmel at91sam9261ek";
+ compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ usb0: ohci@00500000 {
+ status = "okay";
+ };
+
+ fb0: fb@0x00600000 {
+ display = <&display0>;
+ atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ atmel,lcdcon-backlight;
+ atmel,dmacon = <0x1>;
+ atmel,lcdcon2 = <0x80008002>;
+ atmel,guard-time = <1>;
+ atmel,lcd-wiring-mode = "BRG";
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <4965000>;
+ hactive = <240>;
+ vactive = <320>;
+ hback-porch = <1>;
+ hfront-porch = <33>;
+ vback-porch = <1>;
+ vfront-porch = <0>;
+ hsync-len = <5>;
+ vsync-len = <1>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+ };
+
+ nand0: nand@40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+
+ at91bootstrap@0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x40000>;
+ };
+
+ bootloader@40000 {
+ label = "bootloader";
+ reg = <0x40000 0x80000>;
+ };
+
+ bootloaderenv@c0000 {
+ label = "bootloader env";
+ reg = <0xc0000 0xc0000>;
+ };
+
+ dtb@180000 {
+ label = "device tree";
+ reg = <0x180000 0x80000>;
+ };
+
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x600000>;
+ };
+
+ rootfs@800000 {
+ label = "rootfs";
+ reg = <0x800000 0x0f800000>;
+ };
+ };
+
+ apb {
+ usb1: gadget@fffa4000 {
+ atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ spi0: spi@fffc8000 {
+ cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
+ status = "okay";
+
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ reg = <0>;
+ spi-max-frequency = <15000000>;
+ };
+
+ tsc2046@0 {
+ reg = <2>;
+ compatible = "ti,ads7843";
+ interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
+ spi-max-frequency = <3000000>;
+ pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>;
+
+ ti,x-min = /bits/ 16 <150>;
+ ti,x-max = /bits/ 16 <3830>;
+ ti,y-min = /bits/ 16 <190>;
+ ti,y-max = /bits/ 16 <3830>;
+ ti,vref-delay-usecs = /bits/ 16 <450>;
+ ti,x-plate-ohms = /bits/ 16 <450>;
+ ti,y-plate-ohms = /bits/ 16 <250>;
+ ti,pressure-max = /bits/ 16 <15000>;
+ ti,debounce-rep = /bits/ 16 <0>;
+ ti,debounce-tol = /bits/ 16 <65535>;
+ ti,debounce-max = /bits/ 16 <1>;
+
+ wakeup-source;
+ };
+ };
+
+ dbgu: serial@fffff200 {
+ status = "okay";
+ };
+
+ watchdog@fffffd40 {
+ status = "okay";
+ };
+
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ ds8 {
+ label = "ds8";
+ gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+
+ ds7 {
+ label = "ds7";
+ gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "nand-disk";
+ };
+
+ ds1 {
+ label = "ds1";
+ gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ button_0 {
+ label = "button_0";
+ gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
+ linux,code = <256>;
+ wakeup-source;
+ };
+
+ button_1 {
+ label = "button_1";
+ gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+ linux,code = <257>;
+ wakeup-source;
+ };
+
+ button_2 {
+ label = "button_2";
+ gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
+ linux,code = <258>;
+ wakeup-source;
+ };
+
+ button_3 {
+ label = "button_3";
+ gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+ linux,code = <259>;
+ wakeup-source;
+ };
+ };
+};
diff --git a/arch/arm/dts/at91sam9263.dtsi b/arch/arm/dts/at91sam9263.dtsi
index e899fd3..0b594be 100644
--- a/arch/arm/dts/at91sam9263.dtsi
+++ b/arch/arm/dts/at91sam9263.dtsi
@@ -32,6 +32,7 @@
ssc0 = &ssc0;
ssc1 = &ssc1;
pwm0 = &pwm0;
+ spi0 = &spi0;
};
cpus {
diff --git a/arch/arm/dts/at91sam9263ek.dts b/arch/arm/dts/at91sam9263ek.dts
index 8cd7fad..35799b8 100644
--- a/arch/arm/dts/at91sam9263ek.dts
+++ b/arch/arm/dts/at91sam9263ek.dts
@@ -87,7 +87,7 @@
cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
- spi-max-frequency = <50000000>;
+ spi-max-frequency = <15000000>;
reg = <0>;
};
};
diff --git a/arch/arm/dts/at91sam9g20ek_common.dtsi b/arch/arm/dts/at91sam9g20ek_common.dtsi
index 65ae099..9db245e 100644
--- a/arch/arm/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/dts/at91sam9g20ek_common.dtsi
@@ -99,7 +99,7 @@
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
mtd_dataflash@0 {
compatible = "atmel,at45", "atmel,dataflash";
- spi-max-frequency = <50000000>;
+ spi-max-frequency = <15000000>;
reg = <1>;
};
};
diff --git a/arch/arm/dts/at91sam9rl.dtsi b/arch/arm/dts/at91sam9rl.dtsi
index 8249994..4602cd2 100644
--- a/arch/arm/dts/at91sam9rl.dtsi
+++ b/arch/arm/dts/at91sam9rl.dtsi
@@ -34,6 +34,7 @@
ssc0 = &ssc0;
ssc1 = &ssc1;
pwm0 = &pwm0;
+ spi0 = &spi0;
};
cpus {
diff --git a/arch/arm/dts/at91sam9xe.dtsi b/arch/arm/dts/at91sam9xe.dtsi
new file mode 100644
index 0000000..0278f63
--- /dev/null
+++ b/arch/arm/dts/at91sam9xe.dtsi
@@ -0,0 +1,60 @@
+/*
+ * at91sam9xe.dtsi - Device Tree Include file for AT91SAM9XE family SoC
+ *
+ * Copyright (C) 2015 Atmel,
+ * 2015 Alexandre Belloni <alexandre.Belloni@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "at91sam9260.dtsi"
+
+/ {
+ model = "Atmel AT91SAM9XE family SoC";
+ compatible = "atmel,at91sam9xe", "atmel,at91sam9260";
+
+ sram0: sram@002ff000 {
+ status = "disabled";
+ };
+
+ sram1: sram@00300000 {
+ compatible = "mmio-sram";
+ reg = <0x00300000 0x4000>;
+ };
+};
diff --git a/arch/arm/dts/ethernut5.dts b/arch/arm/dts/ethernut5.dts
new file mode 100644
index 0000000..e077152
--- /dev/null
+++ b/arch/arm/dts/ethernut5.dts
@@ -0,0 +1,94 @@
+/*
+ * ethernut5.dts - Device Tree file for Ethernut 5 board
+ *
+ * Copyright (C) 2012 egnite GmbH <info@egnite.de>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+#include "at91sam9xe.dtsi"
+
+/ {
+ model = "Ethernut 5";
+ compatible = "egnite,ethernut5", "atmel,at91sam9260", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 root=/dev/mtdblock0 rw rootfstype=jffs2";
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ apb {
+ dbgu: serial@fffff200 {
+ status = "okay";
+ };
+
+ usart0: serial@fffb0000 {
+ status = "okay";
+ };
+
+ usart1: serial@fffb4000 {
+ status = "okay";
+ };
+
+ macb0: ethernet@fffc4000 {
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
+ usb1: gadget@fffa4000 {
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+ };
+
+ nand0: nand@40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+
+ gpios = <0
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+
+ root@0 {
+ label = "root";
+ reg = <0x0 0x08000000>;
+ };
+
+ data@20000 {
+ label = "data";
+ reg = <0x08000000 0x38000000>;
+ };
+ };
+
+ usb0: ohci@00500000 {
+ num-ports = <2>;
+ status = "okay";
+ };
+ };
+
+ i2c-gpio-0 {
+ status = "okay";
+
+ pcf8563@50 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+ };
+};
diff --git a/arch/arm/dts/r8a7795-h3ulcb.dts b/arch/arm/dts/r8a7795-h3ulcb.dts
new file mode 100644
index 0000000..ab35215
--- /dev/null
+++ b/arch/arm/dts/r8a7795-h3ulcb.dts
@@ -0,0 +1,376 @@
+/*
+ * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7795.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Renesas H3ULCB board based on r8a7795";
+ compatible = "renesas,h3ulcb", "renesas,r8a7795";
+
+ aliases {
+ serial0 = &scif2;
+ ethernet0 = &avb;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+
+ memory@500000000 {
+ device_type = "memory";
+ reg = <0x5 0x00000000 0x0 0x40000000>;
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x40000000>;
+ };
+
+ memory@700000000 {
+ device_type = "memory";
+ reg = <0x7 0x00000000 0x0 0x40000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led5 {
+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
+ };
+ led6 {
+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ keyboard {
+ compatible = "gpio-keys";
+
+ key-1 {
+ linux,code = <KEY_1>;
+ label = "SW3";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ x12_clk: x12 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ reg_1p8v: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+
+ audio_clkout: audio-clkout {
+ /*
+ * This is same as <&rcar_sound 0>
+ * but needed to avoid cs2000/rcar_sound probe dead-lock
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <11289600>;
+ };
+
+ rsnd_ak4613: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "left_j";
+ simple-audio-card,bitclock-master = <&sndcpu>;
+ simple-audio-card,frame-master = <&sndcpu>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&ak4613>;
+ };
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
+
+ i2c2_pins: i2c2 {
+ groups = "i2c2_a";
+ function = "i2c2";
+ };
+
+ avb_pins: avb {
+ groups = "avb_mdc";
+ function = "avb";
+ };
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
+
+ sdhi2_pins_uhs: sd2_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <1800>;
+ };
+
+ sound_pins: sound {
+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+ };
+
+ sound_clk_pins: sound-clk {
+ groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
+ "audio_clkout_a", "audio_clkout3_a";
+ function = "audio_clk";
+ };
+
+ usb1_pins: usb1 {
+ groups = "usb1";
+ function = "usb1";
+ };
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
+
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ clock-frequency = <100000>;
+
+ ak4613: codec@10 {
+ compatible = "asahi-kasei,ak4613";
+ #sound-dai-cells = <0>;
+ reg = <0x10>;
+ clocks = <&rcar_sound 3>;
+
+ asahi-kasei,in1-single-end;
+ asahi-kasei,in2-single-end;
+ asahi-kasei,out1-single-end;
+ asahi-kasei,out2-single-end;
+ asahi-kasei,out3-single-end;
+ asahi-kasei,out4-single-end;
+ asahi-kasei,out5-single-end;
+ asahi-kasei,out6-single-end;
+ };
+
+ cs2000: clk-multiplier@4f {
+ #clock-cells = <0>;
+ compatible = "cirrus,cs2000-cp";
+ reg = <0x4f>;
+ clocks = <&audio_clkout>, <&x12_clk>;
+ clock-names = "clk_in", "ref_clk";
+
+ assigned-clocks = <&cs2000>;
+ assigned-clock-rates = <24576000>; /* 1/1 divide */
+ };
+};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_pins &sound_clk_pins>;
+ pinctrl-names = "default";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ /* audio_clkout0/1/2/3 */
+ #clock-cells = <1>;
+ clock-frequency = <11289600>;
+
+ status = "okay";
+
+ /* update <audio_clk_b> to <cs2000> */
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&cs2000>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi0 &src0 &dvc0>;
+ capture = <&ssi1 &src1 &dvc1>;
+ };
+ };
+};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&sdhi2 {
+ /* used for on-board 8bit eMMC */
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-1 = <&sdhi2_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&ssi1 {
+ shared-pin;
+};
+
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
+&audio_clk_a {
+ clock-frequency = <22579200>;
+};
+
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/r8a7795-salvator-x.dts b/arch/arm/dts/r8a7795-salvator-x.dts
new file mode 100644
index 0000000..639aa08
--- /dev/null
+++ b/arch/arm/dts/r8a7795-salvator-x.dts
@@ -0,0 +1,584 @@
+/*
+ * Device Tree Source for the Salvator-X board
+ *
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/*
+ * SSI-AK4613
+ *
+ * This command is required when Playback/Capture
+ *
+ * amixer set "DVC Out" 100%
+ * amixer set "DVC In" 100%
+ *
+ * You can use Mute
+ *
+ * amixer set "DVC Out Mute" on
+ * amixer set "DVC In Mute" on
+ *
+ * You can use Volume Ramp
+ *
+ * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
+ * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
+ * amixer set "DVC Out Ramp" on
+ * aplay xxx.wav &
+ * amixer set "DVC Out" 80% // Volume Down
+ * amixer set "DVC Out" 100% // Volume Up
+ */
+
+/dts-v1/;
+#include "r8a7795.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Renesas Salvator-X board based on r8a7795";
+ compatible = "renesas,salvator-x", "renesas,r8a7795";
+
+ aliases {
+ serial0 = &scif2;
+ serial1 = &scif1;
+ ethernet0 = &avb;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+
+ x12_clk: x12 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ reg_1p8v: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+
+ vcc_sdhi3: regulator-vcc-sdhi3 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI3 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi3: regulator-vccq-sdhi3 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI3 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+
+ vbus0_usb2: regulator-vbus0-usb2 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB20_VBUS0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ audio_clkout: audio_clkout {
+ /*
+ * This is same as <&rcar_sound 0>
+ * but needed to avoid cs2000/rcar_sound probe dead-lock
+ */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <11289600>;
+ };
+
+ rsnd_ak4613: sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,format = "left_j";
+ simple-audio-card,bitclock-master = <&sndcpu>;
+ simple-audio-card,frame-master = <&sndcpu>;
+
+ sndcpu: simple-audio-card,cpu {
+ sound-dai = <&rcar_sound>;
+ };
+
+ sndcodec: simple-audio-card,codec {
+ sound-dai = <&ak4613>;
+ };
+ };
+
+ vga-encoder {
+ compatible = "adi,adv7123";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7123_in: endpoint {
+ remote-endpoint = <&du_out_rgb>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ adv7123_out: endpoint {
+ remote-endpoint = <&vga_in>;
+ };
+ };
+ };
+ };
+
+ vga {
+ compatible = "vga-connector";
+
+ port {
+ vga_in: endpoint {
+ remote-endpoint = <&adv7123_out>;
+ };
+ };
+ };
+};
+
+&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ ports {
+ port@0 {
+ endpoint {
+ remote-endpoint = <&adv7123_in>;
+ };
+ };
+ port@3 {
+ lvds_connector: endpoint {
+ };
+ };
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ scif1_pins: scif1 {
+ groups = "scif1_data_a", "scif1_ctrl";
+ function = "scif1";
+ };
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
+
+ i2c2_pins: i2c2 {
+ groups = "i2c2_a";
+ function = "i2c2";
+ };
+
+ avb_pins: avb {
+ mux {
+ groups = "avb_link", "avb_phy_int", "avb_mdc",
+ "avb_mii";
+ function = "avb";
+ };
+
+ pins_mdc {
+ groups = "avb_mdc";
+ drive-strength = <24>;
+ };
+
+ pins_mii_tx {
+ pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
+ "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
+ drive-strength = <12>;
+ };
+ };
+
+ du_pins: du {
+ groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
+ function = "du";
+ };
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
+
+ sdhi2_pins_uhs: sd2_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <1800>;
+ };
+
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+ power-source = <3300>;
+ };
+
+ sdhi3_pins_uhs: sd3_uhs {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+ power-source = <1800>;
+ };
+
+ sound_pins: sound {
+ groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
+ function = "ssi";
+ };
+
+ sound_clk_pins: sound_clk {
+ groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
+ "audio_clkout_a", "audio_clkout3_a";
+ function = "audio_clk";
+ };
+
+ usb0_pins: usb0 {
+ groups = "usb0";
+ function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ mux {
+ groups = "usb1";
+ function = "usb1";
+ };
+
+ ovc {
+ pins = "GP_6_27";
+ bias-pull-up;
+ };
+
+ pwen {
+ pins = "GP_6_26";
+ bias-pull-down;
+ };
+ };
+
+ usb2_pins: usb2 {
+ groups = "usb2";
+ function = "usb2";
+ };
+};
+
+&scif1 {
+ pinctrl-0 = <&scif1_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
+
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ clock-frequency = <100000>;
+
+ ak4613: codec@10 {
+ compatible = "asahi-kasei,ak4613";
+ #sound-dai-cells = <0>;
+ reg = <0x10>;
+ clocks = <&rcar_sound 3>;
+
+ asahi-kasei,in1-single-end;
+ asahi-kasei,in2-single-end;
+ asahi-kasei,out1-single-end;
+ asahi-kasei,out2-single-end;
+ asahi-kasei,out3-single-end;
+ asahi-kasei,out4-single-end;
+ asahi-kasei,out5-single-end;
+ asahi-kasei,out6-single-end;
+ };
+
+ cs2000: clk_multiplier@4f {
+ #clock-cells = <0>;
+ compatible = "cirrus,cs2000-cp";
+ reg = <0x4f>;
+ clocks = <&audio_clkout>, <&x12_clk>;
+ clock-names = "clk_in", "ref_clk";
+
+ assigned-clocks = <&cs2000>;
+ assigned-clock-rates = <24576000>; /* 1/1 divide */
+ };
+};
+
+&rcar_sound {
+ pinctrl-0 = <&sound_pins &sound_clk_pins>;
+ pinctrl-names = "default";
+
+ /* Single DAI */
+ #sound-dai-cells = <0>;
+
+ /* audio_clkout0/1/2/3 */
+ #clock-cells = <1>;
+ clock-frequency = <11289600>;
+
+ status = "okay";
+
+ /* update <audio_clk_b> to <cs2000> */
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&cs2000>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+
+ rcar_sound,dai {
+ dai0 {
+ playback = <&ssi0 &src0 &dvc0>;
+ capture = <&ssi1 &src1 &dvc1>;
+ };
+ };
+};
+
+&sata {
+ status = "okay";
+};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&sdhi2 {
+ /* used for on-board 8bit eMMC */
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-1 = <&sdhi2_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+ pinctrl-1 = <&sdhi3_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi3>;
+ vqmmc-supply = <&vccq_sdhi3>;
+ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&ssi1 {
+ shared-pin;
+};
+
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
+&audio_clk_a {
+ clock-frequency = <22579200>;
+};
+
+&i2c_dvfs {
+ status = "okay";
+};
+
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&xhci0 {
+ status = "okay";
+};
+
+&usb2_phy0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ vbus-supply = <&vbus0_usb2>;
+ status = "okay";
+};
+
+&usb2_phy1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&usb2_phy2 {
+ pinctrl-0 = <&usb2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&hsusb {
+ status = "okay";
+};
+
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec0 {
+ status = "okay";
+};
+
+&pciec1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi
new file mode 100644
index 0000000..e99d644
--- /dev/null
+++ b/arch/arm/dts/r8a7795.dtsi
@@ -0,0 +1,1866 @@
+/*
+ * Device Tree Source for the r8a7795 SoC
+ *
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a7795-sysc.h>
+
+/ {
+ compatible = "renesas,r8a7795";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c_dvfs;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ a57_0: cpu@0 {
+ compatible = "arm,cortex-a57", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a57_1: cpu@1 {
+ compatible = "arm,cortex-a57","arm,armv8";
+ reg = <0x1>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a57_2: cpu@2 {
+ compatible = "arm,cortex-a57","arm,armv8";
+ reg = <0x2>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a57_3: cpu@3 {
+ compatible = "arm,cortex-a57","arm,armv8";
+ reg = <0x3>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a53_0: cpu@100 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x100>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_1: cpu@101 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x101>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_2: cpu@102 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x102>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_3: cpu@103 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x103>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA57: cache-controller-0 {
+ compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA57_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ L2_CA53: cache-controller-1 {
+ compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA53_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ extalr_clk: extalr {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock - to be overridden by boards that provide it */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ wdt0: watchdog@e6020000 {
+ compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6020000 0 0x0c>;
+ clocks = <&cpg CPG_MOD 402>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 402>;
+ status = "disabled";
+ };
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 28>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 15>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 18>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
+ };
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7795",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 4>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
+
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>,
+ <&a57_1>,
+ <&a57_2>,
+ <&a57_3>;
+ };
+
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>,
+ <&a53_1>,
+ <&a53_2>,
+ <&a53_3>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7795-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7795-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7795-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
+ pfc: pfc@e6060000 {
+ compatible = "renesas,pfc-r8a7795";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
+ intc_ex: interrupt-controller@e61c0000 {
+ compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
+
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x10000>;
+ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac1: dma-controller@e7300000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac2: dma-controller@e7310000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ audma0: dma-controller@ec700000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ audma1: dma-controller@ec720000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7795",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-txid";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ can0: can@e6c30000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+ can1: can@e6c38000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+ canfd: can@e66c0000 {
+ compatible = "renesas,r8a7795-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
+ hscif0: serial@e6540000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 520>;
+ status = "disabled";
+ };
+
+ hscif1: serial@e6550000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 519>;
+ status = "disabled";
+ };
+
+ hscif2: serial@e6560000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 96>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 518>;
+ status = "disabled";
+ };
+
+ hscif3: serial@e66a0000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66a0000 0 96>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 517>;
+ status = "disabled";
+ };
+
+ hscif4: serial@e66b0000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66b0000 0 96>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x38>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 516>;
+ status = "disabled";
+ };
+
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x13>, <&dmac1 0x12>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+
+ scif3: serial@e6c50000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x57>, <&dmac0 0x56>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+ scif4: serial@e6c40000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x59>, <&dmac0 0x58>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+ scif5: serial@e6f30000 {
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6f30000 0 64>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+ i2c_dvfs: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7795",
+ "renesas,rcar-gen3-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6500000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6510000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e66d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d0000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@e66d8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d8000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ dmas = <&dmac0 0x99>, <&dmac0 0x98>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@e66e0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e0000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
+ dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@e66e8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e8000 0 0x40>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 918>;
+ dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ pwm0: pwm@e6e30000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@e6e31000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e31000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@e6e32000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@e6e33000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@e6e34000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm5: pwm@e6e35000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm6: pwm@e6e36000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ rcar_sound: sound@ec500000 {
+ /*
+ * #sound-dai-cells is required
+ *
+ * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+ * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+ */
+ /*
+ * #clock-cells is required for audio_clkout0/1/2/3
+ *
+ * clkout : #clock-cells = <0>; <&rcar_sound>;
+ * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
+ */
+ compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+ <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+ <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+ <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+ <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+ <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+ <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+ <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+ <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+ <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+ <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+ <&audio_clk_a>, <&audio_clk_b>,
+ <&audio_clk_c>,
+ <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ dmas = <&audma1 0xbc>;
+ dma-names = "tx";
+ };
+ dvc1: dvc-1 {
+ dmas = <&audma1 0xbe>;
+ dma-names = "tx";
+ };
+ };
+
+ rcar_sound,mix {
+ mix0: mix-0 { };
+ mix1: mix-1 { };
+ };
+
+ rcar_sound,ctu {
+ ctu00: ctu-0 { };
+ ctu01: ctu-1 { };
+ ctu02: ctu-2 { };
+ ctu03: ctu-3 { };
+ ctu10: ctu-4 { };
+ ctu11: ctu-5 { };
+ ctu12: ctu-6 { };
+ ctu13: ctu-7 { };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x85>, <&audma1 0x9a>;
+ dma-names = "rx", "tx";
+ };
+ src1: src-1 {
+ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x87>, <&audma1 0x9c>;
+ dma-names = "rx", "tx";
+ };
+ src2: src-2 {
+ interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x89>, <&audma1 0x9e>;
+ dma-names = "rx", "tx";
+ };
+ src3: src-3 {
+ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8b>, <&audma1 0xa0>;
+ dma-names = "rx", "tx";
+ };
+ src4: src-4 {
+ interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8d>, <&audma1 0xb0>;
+ dma-names = "rx", "tx";
+ };
+ src5: src-5 {
+ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x8f>, <&audma1 0xb2>;
+ dma-names = "rx", "tx";
+ };
+ src6: src-6 {
+ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x91>, <&audma1 0xb4>;
+ dma-names = "rx", "tx";
+ };
+ src7: src-7 {
+ interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x93>, <&audma1 0xb6>;
+ dma-names = "rx", "tx";
+ };
+ src8: src-8 {
+ interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x95>, <&audma1 0xb8>;
+ dma-names = "rx", "tx";
+ };
+ src9: src-9 {
+ interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x97>, <&audma1 0xba>;
+ dma-names = "rx", "tx";
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ sata: sata@ee300000 {
+ compatible = "renesas,sata-r8a7795";
+ reg = <0 0xee300000 0 0x200000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 815>;
+ status = "disabled";
+ };
+
+ xhci0: usb@ee000000 {
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
+ xhci1: usb@ee0400000 {
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
+ reg = <0 0xee040000 0 0xc00>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 327>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 327>;
+ status = "disabled";
+ };
+
+ usb_dmac0: dma-controller@e65a0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller@e65b0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7795";
+ reg = <0 0xee100000 0 0x2000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7795";
+ reg = <0 0xee120000 0 0x2000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7795";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7795";
+ reg = <0 0xee160000 0 0x2000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy@ee080200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb2_phy1: usb-phy@ee0a0200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0a0200 0 0x700>;
+ clocks = <&cpg CPG_MOD 702>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb2_phy2: usb-phy@ee0c0200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0c0200 0 0x700>;
+ clocks = <&cpg CPG_MOD 701>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 701>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ ehci0: usb@ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ehci1: usb@ee0a0100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee0a0100 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
+ ehci2: usb@ee0c0100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee0c0100 0 0x100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 701>;
+ phys = <&usb2_phy2>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 701>;
+ status = "disabled";
+ };
+
+ ohci0: usb@ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ohci1: usb@ee0a0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0a0000 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
+ ohci2: usb@ee0c0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0c0000 0 0x100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 701>;
+ phys = <&usb2_phy2>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 701>;
+ status = "disabled";
+ };
+
+ hsusb: usb@e6590000 {
+ compatible = "renesas,usbhs-r8a7795",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
+ };
+
+ pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a7795",
+ "renesas,pcie-rcar-gen3";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 319>;
+ status = "disabled";
+ };
+
+ pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a7795",
+ "renesas,pcie-rcar-gen3";
+ reg = <0 0xee800000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 318>;
+ status = "disabled";
+ };
+
+ vspbc: vsp@fe920000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 624>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 624>;
+
+ renesas,fcp = <&fcpvb1>;
+ };
+
+ fcpvb1: fcp@fe92f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe92f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 606>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 606>;
+ };
+
+ fcpf0: fcp@fe950000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 615>;
+ };
+
+ fcpf1: fcp@fe951000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe951000 0 0x200>;
+ clocks = <&cpg CPG_MOD 614>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 614>;
+ };
+
+ fcpf2: fcp@fe952000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe952000 0 0x200>;
+ clocks = <&cpg CPG_MOD 613>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 613>;
+ };
+
+ vspbd: vsp@fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
+ fcpvb0: fcp@fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 607>;
+ };
+
+ vspi0: vsp@fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
+ };
+
+ fcpvi0: fcp@fe9af000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 611>;
+ };
+
+ vspi1: vsp@fe9b0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9b0000 0 0x8000>;
+ interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 630>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 630>;
+
+ renesas,fcp = <&fcpvi1>;
+ };
+
+ fcpvi1: fcp@fe9bf000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9bf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 610>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 610>;
+ };
+
+ vspi2: vsp@fe9c0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9c0000 0 0x8000>;
+ interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 629>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 629>;
+
+ renesas,fcp = <&fcpvi2>;
+ };
+
+ fcpvi2: fcp@fe9cf000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9cf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 609>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 609>;
+ };
+
+ vspd0: vsp@fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x4000>;
+ interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 623>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
+ fcpvd0: fcp@fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ };
+
+ vspd1: vsp@fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x4000>;
+ interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 622>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 622>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
+ fcpvd1: fcp@fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ };
+
+ vspd2: vsp@fea30000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea30000 0 0x4000>;
+ interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 621>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 621>;
+
+ renesas,fcp = <&fcpvd2>;
+ };
+
+ fcpvd2: fcp@fea37000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 601>;
+ };
+
+ vspd3: vsp@fea38000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea38000 0 0x4000>;
+ interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 620>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 620>;
+
+ renesas,fcp = <&fcpvd3>;
+ };
+
+ fcpvd3: fcp@fea3f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea3f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 600>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 600>;
+ };
+
+ fdp1@fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 119>;
+ renesas,fcp = <&fcpf0>;
+ };
+
+ fdp1@fe944000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe944000 0 0x2400>;
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 118>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 118>;
+ renesas,fcp = <&fcpf1>;
+ };
+
+ fdp1@fe948000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe948000 0 0x2400>;
+ interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 117>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 117>;
+ renesas,fcp = <&fcpf2>;
+ };
+
+ du: display@feb00000 {
+ compatible = "renesas,du-r8a7795";
+ reg = <0 0xfeb00000 0 0x80000>,
+ <0 0xfeb90000 0 0x14>;
+ reg-names = "du", "lvds.0";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&cpg CPG_MOD 721>,
+ <&cpg CPG_MOD 727>;
+ clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+ status = "disabled";
+
+ vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+ port@1 {
+ reg = <1>;
+ du_out_hdmi0: endpoint {
+ };
+ };
+ port@2 {
+ reg = <2>;
+ du_out_hdmi1: endpoint {
+ };
+ };
+ port@3 {
+ reg = <3>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
+
+ tsc: thermal@e6198000 {
+ compatible = "renesas,r8a7795-thermal";
+ reg = <0 0xe6198000 0 0x68>,
+ <0 0xe61a0000 0 0x5c>,
+ <0 0xe61a8000 0 0x5c>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/r8a7796-m3ulcb.dts b/arch/arm/dts/r8a7796-m3ulcb.dts
new file mode 100644
index 0000000..372b2a9
--- /dev/null
+++ b/arch/arm/dts/r8a7796-m3ulcb.dts
@@ -0,0 +1,188 @@
+/*
+ * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7796.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Renesas M3ULCB board based on r8a7796";
+ compatible = "renesas,m3ulcb", "renesas,r8a7796";
+
+ aliases {
+ serial0 = &scif2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led5 {
+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
+ };
+ led6 {
+ gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ keyboard {
+ compatible = "gpio-keys";
+
+ key-1 {
+ linux,code = <KEY_1>;
+ label = "SW3";
+ wakeup-source;
+ debounce-interval = <20>;
+ gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_1p8v: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
+
+ sdhi2_pins_uhs: sd2_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <1800>;
+ };
+};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&sdhi2 {
+ /* used for on-board 8bit eMMC */
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-1 = <&sdhi2_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
+
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/r8a7796-salvator-x.dts b/arch/arm/dts/r8a7796-salvator-x.dts
new file mode 100644
index 0000000..c9f59b6
--- /dev/null
+++ b/arch/arm/dts/r8a7796-salvator-x.dts
@@ -0,0 +1,269 @@
+/*
+ * Device Tree Source for the Salvator-X board
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7796.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Renesas Salvator-X board based on r8a7796";
+ compatible = "renesas,salvator-x", "renesas,r8a7796";
+
+ aliases {
+ serial0 = &scif2;
+ serial1 = &scif1;
+ ethernet0 = &avb;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x80000000>;
+ };
+
+ reg_1p8v: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_sdhi0: regulator-vcc-sdhi0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+
+ vcc_sdhi3: regulator-vcc-sdhi3 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI3 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vccq_sdhi3: regulator-vccq-sdhi3 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI3 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1
+ 1800000 0>;
+ };
+};
+
+&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ avb_pins: avb {
+ groups = "avb_mdc";
+ function = "avb";
+ };
+
+ scif1_pins: scif1 {
+ groups = "scif1_data_a", "scif1_ctrl";
+ function = "scif1";
+ };
+
+ scif2_pins: scif2 {
+ groups = "scif2_data_a";
+ function = "scif2";
+ };
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_a";
+ function = "scif_clk";
+ };
+
+ i2c2_pins: i2c2 {
+ groups = "i2c2_a";
+ function = "i2c2";
+ };
+
+ sdhi0_pins: sd0 {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <3300>;
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
+ power-source = <1800>;
+ };
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
+
+ sdhi2_pins_uhs: sd2_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <1800>;
+ };
+
+ sdhi3_pins: sd3 {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+ power-source = <3300>;
+ };
+
+ sdhi3_pins_uhs: sd3_uhs {
+ groups = "sdhi3_data4", "sdhi3_ctrl";
+ function = "sdhi3";
+ power-source = <1800>;
+ };
+};
+
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi0>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&sdhi2 {
+ /* used for on-board 8bit eMMC */
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-1 = <&sdhi2_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&sdhi3 {
+ pinctrl-0 = <&sdhi3_pins>;
+ pinctrl-1 = <&sdhi3_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi3>;
+ vqmmc-supply = <&vccq_sdhi3>;
+ cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
+
+&scif1 {
+ pinctrl-0 = <&scif1_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
+
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&wdt0 {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
+&i2c_dvfs {
+ status = "okay";
+};
diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi
new file mode 100644
index 0000000..2ec1ed5
--- /dev/null
+++ b/arch/arm/dts/r8a7796.dtsi
@@ -0,0 +1,1037 @@
+/*
+ * Device Tree Source for the r8a7796 SoC
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/clock/r8a7796-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a7796-sysc.h>
+
+/ {
+ compatible = "renesas,r8a7796";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ i2c7 = &i2c_dvfs;
+ };
+
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ a57_0: cpu@0 {
+ compatible = "arm,cortex-a57", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a57_1: cpu@1 {
+ compatible = "arm,cortex-a57","arm,armv8";
+ reg = <0x1>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
+ next-level-cache = <&L2_CA57>;
+ enable-method = "psci";
+ };
+
+ a53_0: cpu@100 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x100>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_1: cpu@101 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x101>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_2: cpu@102 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x102>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ a53_3: cpu@103 {
+ compatible = "arm,cortex-a53","arm,armv8";
+ reg = <0x103>;
+ device_type = "cpu";
+ power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA57: cache-controller-0 {
+ compatible = "cache";
+ power-domains = <&sysc R8A7796_PD_CA57_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ L2_CA53: cache-controller-1 {
+ compatible = "cache";
+ power-domains = <&sysc R8A7796_PD_CA53_SCU>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ extalr_clk: extalr {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External SCIF clock - to be overridden by boards that provide it */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ wdt0: watchdog@e6020000 {
+ compatible = "renesas,r8a7796-wdt",
+ "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6020000 0 0x0c>;
+ clocks = <&cpg CPG_MOD 402>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 402>;
+ status = "disabled";
+ };
+
+ gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 29>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 15>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 18>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
+ };
+
+ gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a7796",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 224 4>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
+ };
+
+ pfc: pin-controller@e6060000 {
+ compatible = "renesas,pfc-r8a7796";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>,
+ <&a57_1>;
+ };
+
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>,
+ <&a53_1>,
+ <&a53_2>,
+ <&a53_3>;
+ };
+
+ cpg: clock-controller@e6150000 {
+ compatible = "renesas,r8a7796-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7796-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+ prr: chipid@fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
+
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7796-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
+ i2c_dvfs: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7796",
+ "renesas,rcar-gen3-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
+ i2c0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6500000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+ <&dmac2 0x91>, <&dmac2 0x90>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+ <&dmac2 0x93>, <&dmac2 0x92>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6510000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+ <&dmac2 0x95>, <&dmac2 0x94>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@e66d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d0000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@e66d8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d8000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ dmas = <&dmac0 0x99>, <&dmac0 0x98>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@e66e0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e0000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
+ dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@e66e8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7796",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e8000 0 0x40>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 918>;
+ dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ can0: can@e6c30000 {
+ compatible = "renesas,can-r8a7796",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+ can1: can@e6c38000 {
+ compatible = "renesas,can-r8a7796",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+ canfd: can@e66c0000 {
+ compatible = "renesas,r8a7796-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
+ avb: ethernet@e6800000 {
+ compatible = "renesas,etheravb-r8a7796",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii-txid";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ hscif0: serial@e6540000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 0x60>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+ <&dmac2 0x31>, <&dmac2 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 520>;
+ status = "disabled";
+ };
+
+ hscif1: serial@e6550000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 0x60>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+ <&dmac2 0x33>, <&dmac2 0x32>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 519>;
+ status = "disabled";
+ };
+
+ hscif2: serial@e6560000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 0x60>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+ <&dmac2 0x35>, <&dmac2 0x34>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 518>;
+ status = "disabled";
+ };
+
+ hscif3: serial@e66a0000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66a0000 0 0x60>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 517>;
+ status = "disabled";
+ };
+
+ hscif4: serial@e66b0000 {
+ compatible = "renesas,hscif-r8a7796",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66b0000 0 0x60>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x38>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 516>;
+ status = "disabled";
+ };
+
+ scif0: serial@e6e60000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+ <&dmac2 0x51>, <&dmac2 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+ <&dmac2 0x53>, <&dmac2 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+
+ scif3: serial@e6c50000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x57>, <&dmac0 0x56>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 204>;
+ status = "disabled";
+ };
+
+ scif4: serial@e6c40000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x59>, <&dmac0 0x58>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 203>;
+ status = "disabled";
+ };
+
+ scif5: serial@e6f30000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6f30000 0 64>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
+ <&dmac2 0x5b>, <&dmac2 0x5a>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 202>;
+ status = "disabled";
+ };
+
+ msiof0: spi@e6e90000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 211>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6ea0000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6c00000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 209>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c10000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ dmac0: dma-controller@e6700000 {
+ compatible = "renesas,dmac-r8a7796",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x10000>;
+ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 219>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac1: dma-controller@e7300000 {
+ compatible = "renesas,dmac-r8a7796",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ dmac2: dma-controller@e7310000 {
+ compatible = "renesas,dmac-r8a7796",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7796";
+ reg = <0 0xee100000 0 0x2000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a7796";
+ reg = <0 0xee120000 0 0x2000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7796";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi3: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7796";
+ reg = <0 0xee160000 0 0x2000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ tsc: thermal@e6198000 {
+ compatible = "renesas,r8a7796-thermal";
+ reg = <0 0xe6198000 0 0x68>,
+ <0 0xe61a0000 0 0x5c>,
+ <0 0xe61a8000 0 0x5c>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
new file mode 100644
index 0000000..6f15f4a
--- /dev/null
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -0,0 +1,11 @@
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index ccdac1c..64f1c2d 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -72,6 +72,21 @@
status = "okay";
};
+&sdmmc {
+ status = "okay";
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp;
+ num-slots = <1>;
+ supports-sd;
+};
+
&uart2 {
status = "okay";
};
+
+&usb20_otg {
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 7237da4..22324f9 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -21,6 +21,8 @@
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
};
cpus {
@@ -383,12 +385,38 @@
status = "disabled";
};
+ sdmmc: dwmmc@30000000 {
+ compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x30000000 0x4000>;
+ max-frequency = <150000000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ status = "disabled";
+ };
+
+ sdio: dwmmc@30010000 {
+ compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x30010000 0x4000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+ <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+ fifo-depth = <0x100>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+ status = "disabled";
+ };
+
emmc: dwmmc@30020000 {
compatible = "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>;
+ max-frequency = <150000000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <37500000>;
- max-frequency = <37500000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -403,6 +431,16 @@
status = "disabled";
};
+ usb20_otg: usb@30040000 {
+ compatible = "rockchip,rk3229-usb", "rockchip,rk3288-usb",
+ "snps,dwc2";
+ reg = <0x30040000 0x40000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ hnp-srp-disable;
+ dr_mode = "otg";
+ status = "disabled";
+ };
+
gmac: ethernet@30200000 {
compatible = "rockchip,rk3228-gmac";
reg = <0x30200000 0x10000>;
@@ -510,6 +548,40 @@
drive-strength = <12>;
};
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 20 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <1 21 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+ };
+
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_cmd: sdio-cmd {
+ rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+
+ sdio_bus4: sdio-bus4 {
+ rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 4 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <3 5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+ };
+ };
+
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index fd463f4..02d1196 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -61,6 +61,7 @@
aliases {
rtc0 = &i2c_rtc;
rtc1 = &rk818;
+ eeprom0 = &i2c_eeprom_id;
};
ext_gmac: external-gmac-clock {
@@ -383,6 +384,13 @@
pagesize = <32>;
};
+ /* M24C32-D Identification page */
+ i2c_eeprom_id: eeprom@58 {
+ compatible = "atmel,24c32";
+ reg = <0x58>;
+ pagesize = <32>;
+ };
+
vdd_cpu: regulator@60 {
compatible = "fcs,fan53555";
reg = <0x60>;
diff --git a/arch/arm/dts/rk3368-geekbox-u-boot.dtsi b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi
new file mode 100644
index 0000000..764b3e4
--- /dev/null
+++ b/arch/arm/dts/rk3368-geekbox-u-boot.dtsi
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi
new file mode 100644
index 0000000..6052e8a
--- /dev/null
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/ {
+ config {
+ u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
+ u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ u-boot,spl-boot-order = &emmc, &sdmmc;
+ };
+
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+
+ /*
+ * Validation of throughput using SPEC2000 shows the following
+ * relative performance for the different memory schedules:
+ * - CBDR: 30.1
+ * - CBRD: 29.8
+ * - CRBD: 29.9
+ * Note that the best performance for any given application workload
+ * may vary from the default configured here (e.g. 164.gzip is fastest
+ * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD).
+ *
+ * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
+ * details on the 'rockchip,memory-schedule' property and how it
+ * affects the physical-address to device-address mapping.
+ */
+ rockchip,memory-schedule = <DMC_MSCH_CBDR>;
+ rockchip,ddr-frequency = <800000000>;
+ rockchip,ddr-speed-bin = <DDR3_1600K>;
+
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&sgrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+&emmc {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+ u-boot,dm-pre-reloc;
+};
+
+&spi1 {
+ u-boot,dm-pre-reloc;
+
+ spiflash: w25q32dw@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&timer0 {
+ u-boot,dm-pre-reloc;
+ clock-frequency = <24000000>;
+};
+
+
diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts
new file mode 100644
index 0000000..850db50
--- /dev/null
+++ b/arch/arm/dts/rk3368-lion.dts
@@ -0,0 +1,195 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include "rk3368-lion-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Theobroma Systems RK3368-uQ7 SoM";
+ compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368";
+
+ aliases {
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ ext_gmac: gmac-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ #clock-cells = <0>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ clock-frequency = <150000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ num-slots = <1>;
+ vmmc-supply = <&vcc33_io>;
+ vqmmc-supply = <&vcc18_io>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+};
+
+&sdmmc {
+ status = "okay";
+};
+
+&gmac {
+ status = "okay";
+ phy-supply = <&vcc33_io>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <2 10000 50000>;
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x10>;
+ rx_delay = <0x10>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_sys>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_sys>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ #clock-cells = <1>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_cpu";
+ };
+
+ vdd_log: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_log";
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ };
+
+ vcc33_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_io";
+ };
+
+ vcc33_video: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_video";
+ };
+
+ vdd10_pll: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_pll";
+ };
+
+ vcc18_io: LDO_REG4 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_io";
+ };
+
+ vdd10_video: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_video";
+ };
+
+ vcc18_video: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_video";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spiflash: w25q32dw@0 {
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <49500000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
new file mode 100644
index 0000000..3a5e30e
--- /dev/null
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart4 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3368-sheep-u-boot.dtsi b/arch/arm/dts/rk3368-sheep-u-boot.dtsi
new file mode 100644
index 0000000..764b3e4
--- /dev/null
+++ b/arch/arm/dts/rk3368-sheep-u-boot.dtsi
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+ u-boot,dm-pre-reloc;
+};
+
+&dmc {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&pmugrf {
+ u-boot,dm-pre-reloc;
+};
+
+&cru {
+ u-boot,dm-pre-reloc;
+};
+
+&grf {
+ u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 9daf765..b4f4f61 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/memory/rk3368-dmc.h>
/ {
compatible = "rockchip,rk3368";
@@ -227,6 +228,21 @@
#clock-cells = <0>;
};
+ dmc: dmc@ff610000 {
+ compatible = "rockchip,rk3368-dmc", "syscon";
+ rockchip,cru = <&cru>;
+ rockchip,grf = <&grf>;
+ rockchip,msch = <&service_msch>;
+ reg = <0 0xff610000 0 0x400
+ 0 0xff620000 0 0x400>;
+ };
+
+ service_msch: syscon@ffac0000 {
+ compatible = "rockchip,rk3368-msch", "syscon";
+ reg = <0x0 0xffac0000 0x0 0x2000>;
+ status = "okay";
+ };
+
sdmmc: dwmmc@ff0c0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0c0000 0x0 0x4000>;
@@ -546,12 +562,6 @@
status = "disabled";
};
- dmc: dmc@ff610000 {
- u-boot,dm-pre-reloc;
- compatible = "rockchip,rk3368-dmc", "syscon";
- reg = <0x0 0xff610000 0x0 0x1000>;
- };
-
i2c0: i2c@ff650000 {
compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
reg = <0x0 0xff650000 0x0 0x1000>;
@@ -647,11 +657,15 @@
};
pmugrf: syscon@ff738000 {
- u-boot,dm-pre-reloc;
compatible = "rockchip,rk3368-pmugrf", "syscon";
reg = <0x0 0xff738000 0x0 0x1000>;
};
+ sgrf: syscon@ff740000 {
+ compatible = "rockchip,rk3368-sgrf", "syscon";
+ reg = <0x0 0xff740000 0x0 0x1000>;
+ };
+
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3368-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
@@ -673,7 +687,7 @@
status = "disabled";
};
- timer@ff810000 {
+ timer0: timer@ff810000 {
compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
reg = <0x0 0xff810000 0x0 0x20>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 91d3193..3d3f507 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -8,7 +8,7 @@
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3399.dtsi"
-#include "rk3399-sdram-ddr3-1333.dtsi"
+#include "rk3399-sdram-ddr3-1600.dtsi"
/ {
model = "Firefly-RK3399 Board";
@@ -157,8 +157,9 @@
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <800000>;
+ regulator-min-microvolt = <430000>;
regulator-max-microvolt = <1400000>;
+ regulator-init-microvolt = <950000>;
};
vccadc_ref: vccadc-ref {
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 1aad6c5..dd1baea 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -12,7 +12,9 @@
compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
config {
- u-boot,spl-payload-offset = <0x40000>; /* 256kbyte */
+ u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
+ u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
+ u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
u-boot,boot-led = "module_led";
};
diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts
index 1a8b39b..37b1e0e 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts
@@ -164,7 +164,7 @@
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>;
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
- cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
cd-inverted;
status = "okay";
};
diff --git a/arch/arm/dts/tegra124-nyan-big.dts b/arch/arm/dts/tegra124-nyan-big.dts
index 62f89d0..f1c9705 100644
--- a/arch/arm/dts/tegra124-nyan-big.dts
+++ b/arch/arm/dts/tegra124-nyan-big.dts
@@ -8,7 +8,6 @@
aliases {
console = &uarta;
- stdout-path = &uarta;
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
@@ -26,6 +25,10 @@
usb2 = "/usb@7d004000";
};
+ chosen {
+ stdout-path = &uarta;
+ };
+
host1x@50000000 {
dc@54200000 {
display-timings {
diff --git a/arch/arm/dts/usb_a9263.dts b/arch/arm/dts/usb_a9263.dts
new file mode 100644
index 0000000..bfc48a2
--- /dev/null
+++ b/arch/arm/dts/usb_a9263.dts
@@ -0,0 +1,144 @@
+/*
+ * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91sam9263.dtsi"
+
+/ {
+ model = "Calao USB A9263";
+ compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
+ };
+
+ ahb {
+ apb {
+ dbgu: serial@ffffee00 {
+ status = "okay";
+ };
+
+ macb0: ethernet@fffbc000 {
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
+ usb1: gadget@fff78000 {
+ atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ spi0: spi@fffa4000 {
+ cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ reg = <0>;
+ spi-max-frequency = <15000000>;
+ };
+ };
+
+ shdwc@fffffd10 {
+ atmel,wakeup-counter = <10>;
+ atmel,wakeup-rtt-timer;
+ };
+ };
+
+ nand0: nand@40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+
+ at91bootstrap@0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x20000>;
+ };
+
+ barebox@20000 {
+ label = "barebox";
+ reg = <0x20000 0x40000>;
+ };
+
+ bareboxenv@60000 {
+ label = "bareboxenv";
+ reg = <0x60000 0x20000>;
+ };
+
+ bareboxenv2@80000 {
+ label = "bareboxenv2";
+ reg = <0x80000 0x20000>;
+ };
+
+ oftree@80000 {
+ label = "oftree";
+ reg = <0xa0000 0x20000>;
+ };
+
+ kernel@a0000 {
+ label = "kernel";
+ reg = <0xc0000 0x400000>;
+ };
+
+ rootfs@4a0000 {
+ label = "rootfs";
+ reg = <0x4c0000 0x7800000>;
+ };
+
+ data@7ca0000 {
+ label = "data";
+ reg = <0x7cc0000 0x8340000>;
+ };
+ };
+
+ usb0: ohci@00a00000 {
+ num-ports = <2>;
+ status = "okay";
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user_led {
+ label = "user_led";
+ gpios = <&pioB 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ user_pb {
+ label = "user_pb";
+ gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
+ linux,code = <28>;
+ wakeup-source;
+ };
+ };
+
+ i2c-gpio-0 {
+ status = "okay";
+ };
+};
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 34fc6e5..f993e19 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -38,6 +38,14 @@
};
};
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&devcfg>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
diff --git a/arch/arm/dts/zynq-zturn-myir.dts b/arch/arm/dts/zynq-zturn-myir.dts
new file mode 100644
index 0000000..a5ecfcc
--- /dev/null
+++ b/arch/arm/dts/zynq-zturn-myir.dts
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
+ * Copyright (C) 2017 Alexander Graf <agraf@suse.de>
+ *
+ * Based on zynq-zed.dts which is:
+ * Copyright (C) 2011 - 2014 Xilinx
+ * Copyright (C) 2012 National Instruments Corp.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+ model = "Zynq Z-Turn MYIR Board";
+ compatible = "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ serial1 = &uart0;
+ spi0 = &qspi;
+ mmc0 = &sdhci0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ led_r {
+ label = "led_r";
+ gpios = <&gpio0 0x72 0x1>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led_g {
+ label = "led_g";
+ gpios = <&gpio0 0x73 0x1>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led_b {
+ label = "led_b";
+ gpios = <&gpio0 0x74 0x1>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+
+ usr_led1 {
+ label = "usr_led1";
+ gpios = <&gpio0 0x0 0x1>;
+ default-state = "off";
+ linux,default-trigger = "none";
+ };
+
+ usr_led2 {
+ label = "usr_led2";
+ gpios = <&gpio0 0x9 0x1>;
+ default-state = "off";
+ linux,default-trigger = "none";
+ };
+ };
+
+ gpio-beep {
+ compatible = "gpio-beeper";
+ label = "pl-beep";
+ gpios = <&gpio0 0x75 0x0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ autorepeat;
+ K1 {
+ label = "K1";
+ gpios = <&gpio0 0x32 0x1>;
+ linux,code = <0x66>;
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
+ fclk-enable = <0xf>;
+};
+
+&qspi {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðernet_phy>;
+
+ ethernet_phy: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&uart1 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&can0 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ stlm75@49 {
+ status = "okay";
+ compatible = "lm75";
+ reg = <0x49>;
+ };
+
+ adxl345@53 {
+ compatible = "adi,adxl34x", "adxl34x";
+ reg = <0x53>;
+ interrupt-parent = <&intc>;
+ interrupts = <0x0 0x1e 0x4>;
+ };
+};
diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
similarity index 98%
rename from arch/arm/dts/zynqmp-zcu102.dts
rename to arch/arm/dts/zynqmp-zcu102-revA.dts
index 0e9150e..d8ac008 100644
--- a/arch/arm/dts/zynqmp-zcu102.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -16,7 +16,7 @@
/ {
model = "ZynqMP ZCU102 RevA";
- compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
+ compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts
index 765108e..8233733 100644
--- a/arch/arm/dts/zynqmp-zcu102-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revB.dts
@@ -8,7 +8,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include "zynqmp-zcu102.dts"
+#include "zynqmp-zcu102-revA.dts"
/ {
model = "ZynqMP ZCU102 RevB";
diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h
index af7f3bf..92b1c5e 100644
--- a/arch/arm/include/asm/arch-bcmcygnus/configs.h
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2014 Broadcom Corporation.
+ * Copyright 2014-2017 Broadcom.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -23,10 +23,6 @@
#define CONFIG_SYS_NS16550_COM3 0x18023000
/* Ethernet */
-#define CONFIG_BCM_SF2_ETH
-#define CONFIG_BCM_SF2_ETH_GMAC
-
-#define CONFIG_PHYLIB
#define CONFIG_PHY_BROADCOM
#define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 8ad199f..4afc338 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -35,6 +35,7 @@
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000)
#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000)
#define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000)
+#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000)
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index fd3f851..88f40c0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -13,7 +13,7 @@
* uint64_t entry_addr;
* uint64_t status;
* uint64_t lpid;
-* uint64_t os_arch;
+* uint64_t arch_comp;
* };
* we pad this struct to 64 bytes so each entry is in its own cacheline
* the actual spin table is an array of these structures
@@ -21,10 +21,16 @@
#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
#define SPIN_TABLE_ELEM_STATUS_IDX 1
#define SPIN_TABLE_ELEM_LPID_IDX 2
-#define SPIN_TABLE_ELEM_OS_ARCH_IDX 3
+/* compare os arch and cpu arch */
+#define SPIN_TABLE_ELEM_ARCH_COMP_IDX 3
#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */
#define SPIN_TABLE_ELEM_SIZE 64
+/* os arch is same as cpu arch */
+#define OS_ARCH_SAME 0
+/* os arch is different from cpu arch */
+#define OS_ARCH_DIFF 1
+
#define id_to_core(x) ((x & 3) | (x >> 6))
#ifndef __ASSEMBLY__
extern u64 __spin_table[];
@@ -43,7 +49,4 @@
u32 cpu_pos_mask(void);
#endif
-#define IH_ARCH_ARM 2 /* ARM */
-#define IH_ARCH_ARM64 22 /* ARM64 */
-
#endif /* _FSL_LAYERSCAPE_MP_H */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 497afe7..aeb1273 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -65,8 +65,8 @@
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
-#define SVR_LS2081A 0x870919
-#define SVR_LS2041A 0x870915
+#define SVR_LS2081A 0x870918
+#define SVR_LS2041A 0x870914
#define SVR_DEV_LS2080A 0x8701
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 0c99bbd..dbe340d 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -236,8 +236,21 @@
#define VDD_MPU_ES2_HIGH 1250
#define VDD_MM_ES2_OD 1120
-#define VDD_MPU_ES2_LOW 880
-#define VDD_MM_ES2_LOW 880
+/* Efuse register offsets for OMAP5 platform */
+#define OMAP5_ES2_EFUSE_BASE 0x4A002000
+#define OMAP5_ES2_PROD_REGBITS 16
+
+/* CONTROL_STD_FUSE_OPP_VDD_CORE_3 */
+#define OMAP5_ES2_PROD_CORE_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1D8)
+
+/* CONTROL_STD_FUSE_OPP_VDD_MM_4 */
+#define OMAP5_ES2_PROD_MM_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1A4)
+/* CONTROL_STD_FUSE_OPP_VDD_MM_5 */
+#define OMAP5_ES2_PROD_MM_OPOD_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1A8)
+/* CONTROL_STD_FUSE_OPP_VDD_MPU_6 */
+#define OMAP5_ES2_PROD_MPU_OPNO_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1C4)
+/* CONTROL_STD_FUSE_OPP_VDD_MPU_7 */
+#define OMAP5_ES2_PROD_MPU_OPHI_VMIN (OMAP5_ES2_EFUSE_BASE + 0x1C8)
/* DRA74x/75x/72x voltage settings in mv for OPP_NOM per DM */
#define VDD_MPU_DRA7_NOM 1150
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 2f005dd..b047f0d 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -224,8 +224,8 @@
#define OMAP_ABB_GPU_TXDONE_MASK (0x1 << 28)
/* ABB efuse masks */
-#define OMAP5_ABB_FUSE_VSET_MASK (0x1F << 24)
-#define OMAP5_ABB_FUSE_ENABLE_MASK (0x1 << 29)
+#define OMAP5_PROD_ABB_FUSE_VSET_MASK (0x1F << 20)
+#define OMAP5_PROD_ABB_FUSE_ENABLE_MASK (0x1 << 25)
#define DRA7_ABB_FUSE_VSET_MASK (0x1F << 20)
#define DRA7_ABB_FUSE_ENABLE_MASK (0x1 << 25)
#define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK (0x1 << 10)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 7346876..72d264b 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -1,3 +1,4 @@
+
/*
* Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
@@ -13,7 +14,17 @@
*/
#ifdef CONFIG_SPL_BUILD
- .space 0x4 /* space for the 'RK33' */
+ /*
+ * We need to add 4 bytes of space for the 'RK33' at the
+ * beginning of the executable. However, as we want to keep
+ * this generic and make it applicable to builds that are like
+ * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
+ * TPL, but extra space needed in the SPL), we simply repeat
+ * the 'b reset' with the expectation that the first one will
+ * be overwritten, if this is the first stage contained in the
+ * final image created with mkimage)...
+ */
+ b reset /* may be overwritten --- should be 'nop' or a 'b reset' */
#endif
b reset
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index cb0a935..c7e21bd 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -85,7 +85,7 @@
EMMC_PLL_SELECT_24MHZ,
EMMC_DIV_SHIFT = 8,
- EMMC_DIV_MASK = 0x3f < EMMC_DIV_SHIFT,
+ EMMC_DIV_MASK = 0x3f << EMMC_DIV_SHIFT,
SDIO0_PLL_SHIFT = 6,
SDIO0_PLL_MASK = 3 << SDIO0_PLL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 4910ee7..2b1197f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -51,8 +51,6 @@
struct rk3368_clk_priv {
struct rk3368_cru *cru;
- ulong rate;
- bool has_bwadj;
};
enum {
@@ -91,19 +89,26 @@
MCU_CLK_DIV_SHIFT = 0,
MCU_CLK_DIV_MASK = GENMASK(4, 0),
+ /* CLKSEL43_CON */
+ GMAC_MUX_SEL_EXTCLK = BIT(8),
+
/* CLKSEL51_CON */
MMC_PLL_SEL_SHIFT = 8,
MMC_PLL_SEL_MASK = GENMASK(9, 8),
- MMC_PLL_SEL_CPLL = 0,
- MMC_PLL_SEL_GPLL,
- MMC_PLL_SEL_USBPHY_480M,
- MMC_PLL_SEL_24M,
+ MMC_PLL_SEL_CPLL = (0 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_GPLL = (1 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_USBPHY_480M = (2 << MMC_PLL_SEL_SHIFT),
+ MMC_PLL_SEL_24M = (3 << MMC_PLL_SEL_SHIFT),
MMC_CLK_DIV_SHIFT = 0,
MMC_CLK_DIV_MASK = GENMASK(6, 0),
/* SOFTRST1_CON */
MCU_PO_SRST_MASK = BIT(13),
MCU_SYS_SRST_MASK = BIT(12),
+ DMA1_SRST_REQ = BIT(2),
+
+ /* SOFTRST4_CON */
+ DMA2_SRST_REQ = BIT(0),
/* GLB_RST_CON */
PMU_GLB_SRST_CTRL_SHIFT = 2,
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index cf830d0..033f067 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -12,12 +12,10 @@
/* Private data for the clock driver - used by rockchip_get_cru() */
struct rk3399_clk_priv {
struct rk3399_cru *cru;
- ulong rate;
};
struct rk3399_pmuclk_priv {
struct rk3399_pmucru *pmucru;
- ulong rate;
};
struct rk3399_pmucru {
diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h b/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
new file mode 100644
index 0000000..4e2b233
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __ASM_ARCH_DDR_RK3368_H__
+#define __ASM_ARCH_DDR_RK3368_H__
+
+/*
+ * The RK3368 DDR PCTL differs from the incarnation in the RK3288 only
+ * in a few details. Most notably, it has an additional field to track
+ * tREFI in controller cycles (i.e. trefi_mem_ddr3).
+ */
+struct rk3368_ddr_pctl {
+ u32 scfg;
+ u32 sctl;
+ u32 stat;
+ u32 intrstat;
+ u32 reserved0[12];
+ u32 mcmd;
+ u32 powctl;
+ u32 powstat;
+ u32 cmdtstat;
+ u32 cmdtstaten;
+ u32 reserved1[3];
+ u32 mrrcfg0;
+ u32 mrrstat0;
+ u32 mrrstat1;
+ u32 reserved2[4];
+ u32 mcfg1;
+ u32 mcfg;
+ u32 ppcfg;
+ u32 mstat;
+ u32 lpddr2zqcfg;
+ u32 reserved3;
+ u32 dtupdes;
+ u32 dtuna;
+ u32 dtune;
+ u32 dtuprd0;
+ u32 dtuprd1;
+ u32 dtuprd2;
+ u32 dtuprd3;
+ u32 dtuawdt;
+ u32 reserved4[3];
+ u32 togcnt1u;
+ u32 tinit;
+ u32 trsth;
+ u32 togcnt100n;
+ u32 trefi;
+ u32 tmrd;
+ u32 trfc;
+ u32 trp;
+ u32 trtw;
+ u32 tal;
+ u32 tcl;
+ u32 tcwl;
+ u32 tras;
+ u32 trc;
+ u32 trcd;
+ u32 trrd;
+ u32 trtp;
+ u32 twr;
+ u32 twtr;
+ u32 texsr;
+ u32 txp;
+ u32 txpdll;
+ u32 tzqcs;
+ u32 tzqcsi;
+ u32 tdqs;
+ u32 tcksre;
+ u32 tcksrx;
+ u32 tcke;
+ u32 tmod;
+ u32 trstl;
+ u32 tzqcl;
+ u32 tmrr;
+ u32 tckesr;
+ u32 tdpd;
+ u32 trefi_mem_ddr3;
+ u32 reserved5[45];
+ u32 dtuwactl;
+ u32 dturactl;
+ u32 dtucfg;
+ u32 dtuectl;
+ u32 dtuwd0;
+ u32 dtuwd1;
+ u32 dtuwd2;
+ u32 dtuwd3;
+ u32 dtuwdm;
+ u32 dturd0;
+ u32 dturd1;
+ u32 dturd2;
+ u32 dturd3;
+ u32 dtulfsrwd;
+ u32 dtulfsrrd;
+ u32 dtueaf;
+ u32 dfitctrldelay;
+ u32 dfiodtcfg;
+ u32 dfiodtcfg1;
+ u32 dfiodtrankmap;
+ u32 dfitphywrdata;
+ u32 dfitphywrlat;
+ u32 reserved7[2];
+ u32 dfitrddataen;
+ u32 dfitphyrdlat;
+ u32 reserved8[2];
+ u32 dfitphyupdtype0;
+ u32 dfitphyupdtype1;
+ u32 dfitphyupdtype2;
+ u32 dfitphyupdtype3;
+ u32 dfitctrlupdmin;
+ u32 dfitctrlupdmax;
+ u32 dfitctrlupddly;
+ u32 reserved9;
+ u32 dfiupdcfg;
+ u32 dfitrefmski;
+ u32 dfitctrlupdi;
+ u32 reserved10[4];
+ u32 dfitrcfg0;
+ u32 dfitrstat0;
+ u32 dfitrwrlvlen;
+ u32 dfitrrdlvlen;
+ u32 dfitrrdlvlgateen;
+ u32 dfiststat0;
+ u32 dfistcfg0;
+ u32 dfistcfg1;
+ u32 reserved11;
+ u32 dfitdramclken;
+ u32 dfitdramclkdis;
+ u32 dfistcfg2;
+ u32 dfistparclr;
+ u32 dfistparlog;
+ u32 reserved12[3];
+ u32 dfilpcfg0;
+ u32 reserved13[3];
+ u32 dfitrwrlvlresp0;
+ u32 dfitrwrlvlresp1;
+ u32 dfitrwrlvlresp2;
+ u32 dfitrrdlvlresp0;
+ u32 dfitrrdlvlresp1;
+ u32 dfitrrdlvlresp2;
+ u32 dfitrwrlvldelay0;
+ u32 dfitrwrlvldelay1;
+ u32 dfitrwrlvldelay2;
+ u32 dfitrrdlvldelay0;
+ u32 dfitrrdlvldelay1;
+ u32 dfitrrdlvldelay2;
+ u32 dfitrrdlvlgatedelay0;
+ u32 dfitrrdlvlgatedelay1;
+ u32 dfitrrdlvlgatedelay2;
+ u32 dfitrcmd;
+ u32 reserved14[46];
+ u32 ipvr;
+ u32 iptr;
+};
+check_member(rk3368_ddr_pctl, iptr, 0x03fc);
+
+struct rk3368_ddrphy {
+ u32 reg[0x100];
+};
+check_member(rk3368_ddrphy, reg[0xff], 0x03fc);
+
+struct rk3368_msch {
+ u32 coreid;
+ u32 revisionid;
+ u32 ddrconf;
+ u32 ddrtiming;
+ u32 ddrmode;
+ u32 readlatency;
+ u32 reserved1[8];
+ u32 activate;
+ u32 devtodev;
+};
+check_member(rk3368_msch, devtodev, 0x003c);
+
+/* GRF_SOC_CON0 */
+enum {
+ NOC_RSP_ERR_STALL = BIT(9),
+ MOBILE_DDR_SEL = BIT(4),
+ DDR0_16BIT_EN = BIT(3),
+ MSCH0_MAINDDR3_DDR3 = BIT(2),
+ MSCH0_MAINPARTIALPOP = BIT(1),
+ UPCTL_C_ACTIVE = BIT(0),
+};
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
index 93c4e7d..6b6651a 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
@@ -1,4 +1,6 @@
-/* (C) Copyright 2016 Rockchip Electronics Co., Ltd
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -74,8 +76,11 @@
u32 soc_con15;
u32 soc_con16;
u32 soc_con17;
+ u32 reserved5[0x6e];
+ u32 ddrc0_con0;
};
check_member(rk3368_grf, soc_con17, 0x444);
+check_member(rk3368_grf, ddrc0_con0, 0x600);
struct rk3368_pmu_grf {
u32 gpio0a_iomux;
@@ -92,323 +97,11 @@
u32 gpio0d_drv;
u32 gpio0l_sr;
u32 gpio0h_sr;
- u32 reserved[(0x200 - 0x34) / 4 - 1];
+ u32 reserved[0x72];
u32 os_reg[4];
};
-check_member(rk3368_pmu_grf, os_reg[3], 0x20c);
-
-/*GRF_GPIO0C_IOMUX*/
-enum {
- GPIO0C7_SHIFT = 14,
- GPIO0C7_MASK = 3 << GPIO0C7_SHIFT,
- GPIO0C7_GPIO = 0,
- GPIO0C7_LCDC_D19,
- GPIO0C7_TRACE_D9,
- GPIO0C7_UART1_RTSN,
-
- GPIO0C6_SHIFT = 12,
- GPIO0C6_MASK = 3 << GPIO0C6_SHIFT,
- GPIO0C6_GPIO = 0,
- GPIO0C6_LCDC_D18,
- GPIO0C6_TRACE_D8,
- GPIO0C6_UART1_CTSN,
-
- GPIO0C5_SHIFT = 10,
- GPIO0C5_MASK = 3 << GPIO0C5_SHIFT,
- GPIO0C5_GPIO = 0,
- GPIO0C5_LCDC_D17,
- GPIO0C5_TRACE_D7,
- GPIO0C5_UART1_SOUT,
-
- GPIO0C4_SHIFT = 8,
- GPIO0C4_MASK = 3 << GPIO0C4_SHIFT,
- GPIO0C4_GPIO = 0,
- GPIO0C4_LCDC_D16,
- GPIO0C4_TRACE_D6,
- GPIO0C4_UART1_SIN,
-
- GPIO0C3_SHIFT = 6,
- GPIO0C3_MASK = 3 << GPIO0C3_SHIFT,
- GPIO0C3_GPIO = 0,
- GPIO0C3_LCDC_D15,
- GPIO0C3_TRACE_D5,
- GPIO0C3_MCU_JTAG_TDO,
-
- GPIO0C2_SHIFT = 4,
- GPIO0C2_MASK = 3 << GPIO0C2_SHIFT,
- GPIO0C2_GPIO = 0,
- GPIO0C2_LCDC_D14,
- GPIO0C2_TRACE_D4,
- GPIO0C2_MCU_JTAG_TDI,
-
- GPIO0C1_SHIFT = 2,
- GPIO0C1_MASK = 3 << GPIO0C1_SHIFT,
- GPIO0C1_GPIO = 0,
- GPIO0C1_LCDC_D13,
- GPIO0C1_TRACE_D3,
- GPIO0C1_MCU_JTAG_TRTSN,
-
- GPIO0C0_SHIFT = 0,
- GPIO0C0_MASK = 3 << GPIO0C0_SHIFT,
- GPIO0C0_GPIO = 0,
- GPIO0C0_LCDC_D12,
- GPIO0C0_TRACE_D2,
- GPIO0C0_MCU_JTAG_TDO,
-};
-
-/*GRF_GPIO0D_IOMUX*/
-enum {
- GPIO0D7_SHIFT = 14,
- GPIO0D7_MASK = 3 << GPIO0D7_SHIFT,
- GPIO0D7_GPIO = 0,
- GPIO0D7_LCDC_DCLK,
- GPIO0D7_TRACE_CTL,
- GPIO0D7_PMU_DEBUG5,
-
- GPIO0D6_SHIFT = 12,
- GPIO0D6_MASK = 3 << GPIO0D6_SHIFT,
- GPIO0D6_GPIO = 0,
- GPIO0D6_LCDC_DEN,
- GPIO0D6_TRACE_CLK,
- GPIO0D6_PMU_DEBUG4,
-
- GPIO0D5_SHIFT = 10,
- GPIO0D5_MASK = 3 << GPIO0D5_SHIFT,
- GPIO0D5_GPIO = 0,
- GPIO0D5_LCDC_VSYNC,
- GPIO0D5_TRACE_D15,
- GPIO0D5_PMU_DEBUG3,
-
- GPIO0D4_SHIFT = 8,
- GPIO0D4_MASK = 3 << GPIO0D4_SHIFT,
- GPIO0D4_GPIO = 0,
- GPIO0D4_LCDC_HSYNC,
- GPIO0D4_TRACE_D14,
- GPIO0D4_PMU_DEBUG2,
-
- GPIO0D3_SHIFT = 6,
- GPIO0D3_MASK = 3 << GPIO0D3_SHIFT,
- GPIO0D3_GPIO = 0,
- GPIO0D3_LCDC_D23,
- GPIO0D3_TRACE_D13,
- GPIO0D3_UART4_SIN,
-
- GPIO0D2_SHIFT = 4,
- GPIO0D2_MASK = 3 << GPIO0D2_SHIFT,
- GPIO0D2_GPIO = 0,
- GPIO0D2_LCDC_D22,
- GPIO0D2_TRACE_D12,
- GPIO0D2_UART4_SOUT,
-
- GPIO0D1_SHIFT = 2,
- GPIO0D1_MASK = 3 << GPIO0D1_SHIFT,
- GPIO0D1_GPIO = 0,
- GPIO0D1_LCDC_D21,
- GPIO0D1_TRACE_D11,
- GPIO0D1_UART4_RTSN,
-
- GPIO0D0_SHIFT = 0,
- GPIO0D0_MASK = 3 << GPIO0D0_SHIFT,
- GPIO0D0_GPIO = 0,
- GPIO0D0_LCDC_D20,
- GPIO0D0_TRACE_D10,
- GPIO0D0_UART4_CTSN,
-};
-
-/*GRF_GPIO2A_IOMUX*/
-enum {
- GPIO2A7_SHIFT = 14,
- GPIO2A7_MASK = 3 << GPIO2A7_SHIFT,
- GPIO2A7_GPIO = 0,
- GPIO2A7_SDMMC0_D2,
- GPIO2A7_JTAG_TCK,
-
- GPIO2A6_SHIFT = 12,
- GPIO2A6_MASK = 3 << GPIO2A6_SHIFT,
- GPIO2A6_GPIO = 0,
- GPIO2A6_SDMMC0_D1,
- GPIO2A6_UART2_SIN,
-
- GPIO2A5_SHIFT = 10,
- GPIO2A5_MASK = 3 << GPIO2A5_SHIFT,
- GPIO2A5_GPIO = 0,
- GPIO2A5_SDMMC0_D0,
- GPIO2A5_UART2_SOUT,
-
- GPIO2A4_SHIFT = 8,
- GPIO2A4_MASK = 3 << GPIO2A4_SHIFT,
- GPIO2A4_GPIO = 0,
- GPIO2A4_FLASH_DQS,
- GPIO2A4_EMMC_CLKO,
-
- GPIO2A3_SHIFT = 6,
- GPIO2A3_MASK = 3 << GPIO2A3_SHIFT,
- GPIO2A3_GPIO = 0,
- GPIO2A3_FLASH_CSN3,
- GPIO2A3_EMMC_RSTNO,
-
- GPIO2A2_SHIFT = 4,
- GPIO2A2_MASK = 3 << GPIO2A2_SHIFT,
- GPIO2A2_GPIO = 0,
- GPIO2A2_FLASH_CSN2,
-
- GPIO2A1_SHIFT = 2,
- GPIO2A1_MASK = 3 << GPIO2A1_SHIFT,
- GPIO2A1_GPIO = 0,
- GPIO2A1_FLASH_CSN1,
-
- GPIO2A0_SHIFT = 0,
- GPIO2A0_MASK = 3 << GPIO2A0_SHIFT,
- GPIO2A0_GPIO = 0,
- GPIO2A0_FLASH_CSN0,
-};
-
-/*GRF_GPIO2D_IOMUX*/
-enum {
- GPIO2D7_SHIFT = 14,
- GPIO2D7_MASK = 3 << GPIO2D7_SHIFT,
- GPIO2D7_GPIO = 0,
- GPIO2D7_SDIO0_D3,
-
- GPIO2D6_SHIFT = 12,
- GPIO2D6_MASK = 3 << GPIO2D6_SHIFT,
- GPIO2D6_GPIO = 0,
- GPIO2D6_SDIO0_D2,
-
- GPIO2D5_SHIFT = 10,
- GPIO2D5_MASK = 3 << GPIO2D5_SHIFT,
- GPIO2D5_GPIO = 0,
- GPIO2D5_SDIO0_D1,
-
- GPIO2D4_SHIFT = 8,
- GPIO2D4_MASK = 3 << GPIO2D4_SHIFT,
- GPIO2D4_GPIO = 0,
- GPIO2D4_SDIO0_D0,
-
- GPIO2D3_SHIFT = 6,
- GPIO2D3_MASK = 3 << GPIO2D3_SHIFT,
- GPIO2D3_GPIO = 0,
- GPIO2D3_UART0_RTS0,
-
- GPIO2D2_SHIFT = 4,
- GPIO2D2_MASK = 3 << GPIO2D2_SHIFT,
- GPIO2D2_GPIO = 0,
- GPIO2D2_UART0_CTS0,
-
- GPIO2D1_SHIFT = 2,
- GPIO2D1_MASK = 3 << GPIO2D1_SHIFT,
- GPIO2D1_GPIO = 0,
- GPIO2D1_UART0_SOUT,
-
- GPIO2D0_SHIFT = 0,
- GPIO2D0_MASK = 3 << GPIO2D0_SHIFT,
- GPIO2D0_GPIO = 0,
- GPIO2D0_UART0_SIN,
-};
-
-/*GRF_GPIO3C_IOMUX*/
-enum {
- GPIO3C7_SHIFT = 14,
- GPIO3C7_MASK = 3 << GPIO3C7_SHIFT,
- GPIO3C7_GPIO = 0,
- GPIO3C7_EDPHDMI_CECINOUT,
- GPIO3C7_ISP_FLASHTRIGIN,
-
- GPIO3C6_SHIFT = 12,
- GPIO3C6_MASK = 3 << GPIO3C6_SHIFT,
- GPIO3C6_GPIO = 0,
- GPIO3C6_MAC_CLK,
- GPIO3C6_ISP_SHUTTERTRIG,
-
- GPIO3C5_SHIFT = 10,
- GPIO3C5_MASK = 3 << GPIO3C5_SHIFT,
- GPIO3C5_GPIO = 0,
- GPIO3C5_MAC_RXER,
- GPIO3C5_ISP_PRELIGHTTRIG,
-
- GPIO3C4_SHIFT = 8,
- GPIO3C4_MASK = 3 << GPIO3C4_SHIFT,
- GPIO3C4_GPIO = 0,
- GPIO3C4_MAC_RXDV,
- GPIO3C4_ISP_FLASHTRIGOUT,
-
- GPIO3C3_SHIFT = 6,
- GPIO3C3_MASK = 3 << GPIO3C3_SHIFT,
- GPIO3C3_GPIO = 0,
- GPIO3C3_MAC_RXDV,
- GPIO3C3_EMMC_RSTNO,
-
- GPIO3C2_SHIFT = 4,
- GPIO3C2_MASK = 3 << GPIO3C2_SHIFT,
- GPIO3C2_MAC_MDC = 0,
- GPIO3C2_ISP_SHUTTEREN,
-
- GPIO3C1_SHIFT = 2,
- GPIO3C1_MASK = 3 << GPIO3C1_SHIFT,
- GPIO3C1_GPIO = 0,
- GPIO3C1_MAC_RXD2,
- GPIO3C1_UART3_RTSN,
-
- GPIO3C0_SHIFT = 0,
- GPIO3C0_MASK = 3 << GPIO3C0_SHIFT,
- GPIO3C0_GPIO = 0,
- GPIO3C0_MAC_RXD1,
- GPIO3C0_UART3_CTSN,
- GPIO3C0_GPS_RFCLK,
-};
-
-/*GRF_GPIO3D_IOMUX*/
-enum {
- GPIO3D7_SHIFT = 14,
- GPIO3D7_MASK = 3 << GPIO3D7_SHIFT,
- GPIO3D7_GPIO = 0,
- GPIO3D7_SC_VCC18V,
- GPIO3D7_I2C2_SDA,
- GPIO3D7_GPUJTAG_TCK,
-
- GPIO3D6_SHIFT = 12,
- GPIO3D6_MASK = 3 << GPIO3D6_SHIFT,
- GPIO3D6_GPIO = 0,
- GPIO3D6_IR_TX,
- GPIO3D6_UART3_SOUT,
- GPIO3D6_PWM3,
-
- GPIO3D5_SHIFT = 10,
- GPIO3D5_MASK = 3 << GPIO3D5_SHIFT,
- GPIO3D5_GPIO = 0,
- GPIO3D5_IR_RX,
- GPIO3D5_UART3_SIN,
-
- GPIO3D4_SHIFT = 8,
- GPIO3D4_MASK = 3 << GPIO3D4_SHIFT,
- GPIO3D4_GPIO = 0,
- GPIO3D4_MAC_TXCLKOUT,
- GPIO3D4_SPI1_CSN1,
-
- GPIO3D3_SHIFT = 6,
- GPIO3D3_MASK = 3 << GPIO3D3_SHIFT,
- GPIO3D3_GPIO = 0,
- GPIO3D3_HDMII2C_SCL,
- GPIO3D3_I2C5_SCL,
-
- GPIO3D2_SHIFT = 4,
- GPIO3D2_MASK = 3 << GPIO3D2_SHIFT,
- GPIO3D2_GPIO = 0,
- GPIO3D2_HDMII2C_SDA,
- GPIO3D2_I2C5_SDA,
-
- GPIO3D1_SHIFT = 2,
- GPIO3D1_MASK = 3 << GPIO3D1_SHIFT,
- GPIO3D1_GPIO = 0,
- GPIO3D1_MAC_RXCLKIN,
- GPIO3D1_I2C4_SCL,
-
- GPIO3D0_SHIFT = 0,
- GPIO3D0_MASK = 3 << GPIO3D0_SHIFT,
- GPIO3D0_GPIO = 0,
- GPIO3D0_MAC_MDIO,
- GPIO3D0_I2C4_SDA,
-};
+check_member(rk3368_pmu_grf, gpio0h_sr, 0x34);
+check_member(rk3368_pmu_grf, os_reg[0], 0x200);
/*GRF_SOC_CON11/12/13*/
enum {
@@ -439,4 +132,5 @@
MCU_CODE_BASE_BIT31_BIT28_SHIFT = 0,
MCU_CODE_BASE_BIT31_BIT28_MASK = GENMASK(3, 0),
};
+
#endif
diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h
index 08ff945..b1d8047 100644
--- a/arch/arm/include/asm/arch-rockchip/pwm.h
+++ b/arch/arm/include/asm/arch-rockchip/pwm.h
@@ -25,9 +25,11 @@
#define PWM_DUTY_POSTIVE (1 << 3)
#define PWM_DUTY_NEGATIVE (0 << 3)
+#define PWM_DUTY_MASK (1 << 3)
#define PWM_INACTIVE_POSTIVE (1 << 4)
#define PWM_INACTIVE_NEGATIVE (0 << 4)
+#define PWM_INACTIVE_MASK (1 << 4)
#define PWM_OUTPUT_LEFT (0 << 5)
#define PWM_OUTPUT_CENTER (1 << 5)
diff --git a/arch/arm/include/asm/arch-rockchip/timer.h b/arch/arm/include/asm/arch-rockchip/timer.h
index 1d044bb..c23c509 100644
--- a/arch/arm/include/asm/arch-rockchip/timer.h
+++ b/arch/arm/include/asm/arch-rockchip/timer.h
@@ -8,12 +8,12 @@
#define __ASM_ARCH_TIMER_H
struct rk_timer {
- unsigned int timer_load_count0;
- unsigned int timer_load_count1;
- unsigned int timer_curr_value0;
- unsigned int timer_curr_value1;
- unsigned int timer_ctrl_reg;
- unsigned int timer_int_status;
+ u32 timer_load_count0;
+ u32 timer_load_count1;
+ u32 timer_curr_value0;
+ u32 timer_curr_value1;
+ u32 timer_ctrl_reg;
+ u32 timer_int_status;
};
void rockchip_timer_init(void);
diff --git a/arch/arm/include/asm/arch-stm32f1/gpio.h b/arch/arm/include/asm/arch-stm32f1/gpio.h
deleted file mode 100644
index 8e8712f..0000000
--- a/arch/arm/include/asm/arch-stm32f1/gpio.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-enum stm32_gpio_port {
- STM32_GPIO_PORT_A = 0,
- STM32_GPIO_PORT_B,
- STM32_GPIO_PORT_C,
- STM32_GPIO_PORT_D,
- STM32_GPIO_PORT_E,
- STM32_GPIO_PORT_F,
- STM32_GPIO_PORT_G,
-};
-
-enum stm32_gpio_pin {
- STM32_GPIO_PIN_0 = 0,
- STM32_GPIO_PIN_1,
- STM32_GPIO_PIN_2,
- STM32_GPIO_PIN_3,
- STM32_GPIO_PIN_4,
- STM32_GPIO_PIN_5,
- STM32_GPIO_PIN_6,
- STM32_GPIO_PIN_7,
- STM32_GPIO_PIN_8,
- STM32_GPIO_PIN_9,
- STM32_GPIO_PIN_10,
- STM32_GPIO_PIN_11,
- STM32_GPIO_PIN_12,
- STM32_GPIO_PIN_13,
- STM32_GPIO_PIN_14,
- STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_icnf {
- STM32_GPIO_ICNF_AN = 0,
- STM32_GPIO_ICNF_IN_FLT,
- STM32_GPIO_ICNF_IN_PUD,
- STM32_GPIO_ICNF_RSVD
-};
-
-enum stm32_gpio_ocnf {
- STM32_GPIO_OCNF_GP_PP = 0,
- STM32_GPIO_OCNF_GP_OD,
- STM32_GPIO_OCNF_AF_PP,
- STM32_GPIO_OCNF_AF_OD
-};
-
-enum stm32_gpio_pupd {
- STM32_GPIO_PUPD_DOWN = 0,
- STM32_GPIO_PUPD_UP,
-};
-
-enum stm32_gpio_mode {
- STM32_GPIO_MODE_IN = 0,
- STM32_GPIO_MODE_OUT_10M,
- STM32_GPIO_MODE_OUT_2M,
- STM32_GPIO_MODE_OUT_50M
-};
-
-enum stm32_gpio_af {
- STM32_GPIO_AF0 = 0,
- STM32_GPIO_AF1,
- STM32_GPIO_AF2,
- STM32_GPIO_AF3,
- STM32_GPIO_AF4,
- STM32_GPIO_AF5,
- STM32_GPIO_AF6,
- STM32_GPIO_AF7,
- STM32_GPIO_AF8,
- STM32_GPIO_AF9,
- STM32_GPIO_AF10,
- STM32_GPIO_AF11,
- STM32_GPIO_AF12,
- STM32_GPIO_AF13,
- STM32_GPIO_AF14,
- STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
- enum stm32_gpio_port port;
- enum stm32_gpio_pin pin;
-};
-
-struct stm32_gpio_ctl {
- enum stm32_gpio_icnf icnf;
- enum stm32_gpio_ocnf ocnf;
- enum stm32_gpio_mode mode;
- enum stm32_gpio_pupd pupd;
- enum stm32_gpio_af af;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
- return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
- return gpio % 16;
-}
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
- const struct stm32_gpio_ctl *gpio_ctl);
-int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f1/stm32.h b/arch/arm/include/asm/arch-stm32f1/stm32.h
deleted file mode 100644
index 1af73c5..0000000
--- a/arch/arm/include/asm/arch-stm32f1/stm32.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _MACH_STM32_H_
-#define _MACH_STM32_H_
-
-/*
- * Peripheral memory map
- */
-#define STM32_PERIPH_BASE 0x40000000
-#define STM32_APB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000)
-#define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00010000)
-#define STM32_AHB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00018000)
-
-#define STM32_BUS_MASK 0xFFFF0000
-
-#define STM32_GPIOA_BASE (STM32_APB2PERIPH_BASE + 0x0800)
-#define STM32_GPIOB_BASE (STM32_APB2PERIPH_BASE + 0x0C00)
-#define STM32_GPIOC_BASE (STM32_APB2PERIPH_BASE + 0x1000)
-#define STM32_GPIOD_BASE (STM32_APB2PERIPH_BASE + 0x1400)
-#define STM32_GPIOE_BASE (STM32_APB2PERIPH_BASE + 0x1800)
-#define STM32_GPIOF_BASE (STM32_APB2PERIPH_BASE + 0x1C00)
-#define STM32_GPIOG_BASE (STM32_APB2PERIPH_BASE + 0x2000)
-
-/*
- * Register maps
- */
-struct stm32_des_regs {
- u16 flash_size;
- u16 pad1;
- u32 pad2;
- u32 uid0;
- u32 uid1;
- u32 uid2;
-};
-
-struct stm32_rcc_regs {
- u32 cr; /* RCC clock control */
- u32 cfgr; /* RCC clock configuration */
- u32 cir; /* RCC clock interrupt */
- u32 apb2rstr; /* RCC APB2 peripheral reset */
- u32 apb1rstr; /* RCC APB1 peripheral reset */
- u32 ahbenr; /* RCC AHB peripheral clock enable */
- u32 apb2enr; /* RCC APB2 peripheral clock enable */
- u32 apb1enr; /* RCC APB1 peripheral clock enable */
- u32 bdcr; /* RCC Backup domain control */
- u32 csr; /* RCC clock control & status */
-};
-
-struct stm32_pwr_regs {
- u32 cr;
- u32 csr;
-};
-
-struct stm32_flash_regs {
- u32 acr;
- u32 keyr;
- u32 optkeyr;
- u32 sr;
- u32 cr;
- u32 ar;
- u32 rsvd1; /* Reserved */
- u32 obr;
- u32 wrpr;
- u32 rsvd2[8]; /* Reserved */
- u32 keyr2;
- u32 rsvd3;
- u32 sr2;
- u32 cr2;
- u32 ar2;
-};
-
-/* Per bank register set for XL devices */
-struct stm32_flash_bank_regs {
- u32 keyr;
- u32 rsvd; /* Reserved */
- u32 sr;
- u32 cr;
- u32 ar;
-};
-
-/*
- * Registers access macros
- */
-#define STM32_DES_BASE (0x1ffff7e0)
-#define STM32_DES ((struct stm32_des_regs *)STM32_DES_BASE)
-
-#define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x9000)
-#define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE)
-
-#define STM32_PWR_BASE (STM32_APB1PERIPH_BASE + 0x7000)
-#define STM32_PWR ((struct stm32_pwr_regs *)STM32_PWR_BASE)
-
-#define STM32_FLASH_BASE (STM32_AHB1PERIPH_BASE + 0xa000)
-#define STM32_FLASH ((struct stm32_flash_regs *)STM32_FLASH_BASE)
-
-#define STM32_FLASH_SR_BSY (1 << 0)
-
-#define STM32_FLASH_CR_PG (1 << 0)
-#define STM32_FLASH_CR_PER (1 << 1)
-#define STM32_FLASH_CR_STRT (1 << 6)
-#define STM32_FLASH_CR_LOCK (1 << 7)
-
-enum clock {
- CLOCK_CORE,
- CLOCK_AHB,
- CLOCK_APB1,
- CLOCK_APB2
-};
-
-int configure_clocks(void);
-unsigned long clock_get(enum clock clck);
-
-#endif /* _MACH_STM32_H_ */
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index f62b2a4..92180db 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -266,7 +266,7 @@
* @param node Node to look at
* @return peripheral ID, or PERIPH_ID_NONE if none
*/
-enum periph_id clock_decode_periph_id(const void *blob, int node);
+int clock_decode_periph_id(struct udevice *dev);
/**
* Checks if the oscillator bypass is enabled (XOBP bit)
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 3add1b3..3b9711d 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -97,6 +97,11 @@
TEGRA_SOC_UNKNOWN = -1,
};
+/* Tegra system controller (SYSCON) devices */
+enum {
+ TEGRA_SYSCON_PMC,
+};
+
#else /* __ASSEMBLY__ */
#define PRM_RSTCTRL NV_PA_PMC_BASE
#endif
diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h
index b4b4c8b..deccdf4 100644
--- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h
+++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h
@@ -15,7 +15,7 @@
*/
struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type);
-void tegra_xusb_padctl_init(const void *fdt);
+void tegra_xusb_padctl_init(void);
int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy);
int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy);
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index cf187f3..cab29ba 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -48,18 +48,9 @@
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
#define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000
-#define ZYNQMP_IOU_SCNTR 0xFF250000
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1
#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2
-struct iou_scntr {
- u32 counter_control_register;
- u32 reserved0[7];
- u32 base_frequency_id_register;
-};
-
-#define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR)
-
struct iou_scntr_secure {
u32 counter_control_register;
u32 reserved0[7];
@@ -153,4 +144,7 @@
#define pmu_base ((struct pmu_regs *)ZYNQMP_PMU_BASEADDR)
+#define ZYNQMP_CSU_IDCODE_ADDR 0xFFCA0040
+#define ZYNQMP_CSU_VER_ADDR 0xFFCA0044
+
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index d91d98a..e52abd7 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -10,6 +10,25 @@
#define PAYLOAD_ARG_CNT 5
+#define ZYNQMP_CSU_SILICON_VER_MASK 0xF
+
+enum {
+ IDCODE,
+ VERSION,
+};
+
+enum {
+ ZYNQMP_SILICON_V1,
+ ZYNQMP_SILICON_V2,
+ ZYNQMP_SILICON_V3,
+ ZYNQMP_SILICON_V4,
+};
+
+enum {
+ TCM_LOCK,
+ TCM_SPLIT,
+};
+
int zynq_slcr_get_mio_pin_status(const char *periph);
unsigned int zynqmp_get_silicon_version(void);
@@ -24,4 +43,8 @@
int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
u32 *ret_payload);
+void initialize_tcm(bool mode);
+
+int chip_id(unsigned char id);
+
#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index 5a53e40..9dbb2c4 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -19,11 +19,7 @@
OMAP_EHCI_PORT_MODE_HSIC,
};
-#ifdef CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#define OMAP_HS_USB_PORTS CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
-#else
#define OMAP_HS_USB_PORTS 3
-#endif
#define is_ehci_phy_mode(x) ((x) == OMAP_EHCI_PORT_MODE_PHY)
#define is_ehci_tll_mode(x) ((x) == OMAP_EHCI_PORT_MODE_TLL)
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 0e67470..df45511 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -30,6 +30,7 @@
BOOT_DEVICE_BOARD,
BOOT_DEVICE_DFU,
BOOT_DEVICE_XIP,
+ BOOT_DEVICE_BOOTROM,
BOOT_DEVICE_NONE
};
#endif
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 704849b..5c62d9c 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -216,7 +216,7 @@
/* Subcommand: PREP */
static void boot_prep_linux(bootm_headers_t *images)
{
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
#ifdef CONFIG_OF_LIBFDT
@@ -273,7 +273,7 @@
#ifdef CONFIG_ARMV7_NONSEC
bool armv7_boot_nonsec(void)
{
- char *s = getenv("bootm_boot_mode");
+ char *s = env_get("bootm_boot_mode");
bool nonsec = armv7_boot_nonsec_default();
if (s && !strcmp(s, "sec"))
@@ -361,7 +361,7 @@
ulong addr = (ulong)kernel_entry | 1;
kernel_entry = (void *)addr;
#endif
- s = getenv("machid");
+ s = env_get("machid");
if (s) {
if (strict_strtoul(s, 16, &machid) < 0) {
debug("strict_strtoul failed!\n");
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 57e728f..62fad45 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -69,7 +69,9 @@
/*
* Set up initial C runtime environment and call board_init_f(0).
*/
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
+ ldr x0, =(CONFIG_TPL_STACK)
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr x0, =(CONFIG_SPL_STACK)
#else
ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 415ac89..bcd16ee 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -200,7 +200,7 @@
/* Optionally save returned end to the environment */
if (argc == 4) {
sprintf(end_str, "0x%08lx", end_addr);
- setenv(argv[3], end_str);
+ env_set(argv[3], end_str);
}
} else {
return CMD_RET_USAGE;
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 033c1ef..20f7eea 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -36,6 +36,7 @@
config TARGET_AT91SAM9261EK
bool "Atmel at91sam9261 reference board"
select CPU_ARM926EJS
+ select BOARD_EARLY_INIT_F
config TARGET_PM9261
bool "Ronetix pm9261 board"
@@ -198,4 +199,8 @@
source "board/siemens/taurus/Kconfig"
source "board/siemens/smartweb/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/mach-at91/arm926ejs/u-boot-spl.lds" if CPU_ARM926EJS
+ default "arch/arm/mach-at91/armv7/u-boot-spl.lds" if CPU_V7
+
endif
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 4757f24..35e4e9b 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -53,4 +53,8 @@
source "board/omicron/calimain/Kconfig"
source "board/lego/ev3/Kconfig"
+config SPL_LDSCRIPT
+ default "board/$(BOARDDIR)/u-boot-spl-ipam390.lds" if TARGET_IPAM390
+ default "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
+
endif
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index ec331ba..461ff77 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -90,7 +90,7 @@
uint8_t env_enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr);
+ ret = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
if (!ret) {
/*
* There is no MAC address in the environment, so we
@@ -99,7 +99,7 @@
debug("### Setting environment from EEPROM MAC address = "
"\"%pM\"\n",
env_enetaddr);
- ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr);
+ ret = !eth_env_set_enetaddr("ethaddr", rom_enetaddr);
}
if (!ret)
printf("Failed to set mac address from EEPROM: %d\n", ret);
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index d1aa68d..2fb84f9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -8,7 +8,6 @@
bool "Exynos4 SoC family"
select CPU_V7
select BOARD_EARLY_INIT_F
- imply ENV_IS_IN_MMC
help
Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
are multiple SoCs in this family including Exynos4210, Exynos4412,
@@ -161,4 +160,7 @@
source "board/samsung/smdk5420/Kconfig"
source "board/samsung/espresso7420/Kconfig"
+config SPL_LDSCRIPT
+ default "board/samsung/common/exynos-uboot-spl.lds" if ARCH_EXYNOS5 || ARCH_EXYNOS4
+
endif
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index d199060..a1aa36b 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -38,7 +38,6 @@
config MX6SX
select ROM_UNIFIED_SECTIONS
bool
- imply ENV_IS_IN_MMC
config MX6SLL
select ROM_UNIFIED_SECTIONS
@@ -153,6 +152,7 @@
bool "gw_ventana"
select SUPPORT_SPL
imply CMD_SATA
+ imply CMD_SPL
config TARGET_KOSAGI_NOVENA
bool "Kosagi Novena"
diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c
index 22b2440..f8d7e8e 100644
--- a/arch/arm/mach-imx/mx6/opos6ul.c
+++ b/arch/arm/mach-imx/mx6/opos6ul.c
@@ -132,7 +132,7 @@
/* In bootstrap don't use the env vars */
if (((reg & 0x3000000) >> 24) == 0x1) {
set_default_env(NULL);
- setenv("preboot", "");
+ env_set("preboot", "");
}
return opos6ul_board_late_init();
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 7053697f..aea8526 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -13,7 +13,6 @@
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
bool
- imply ENV_IS_IN_MMC
choice
prompt "MX7 board select"
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index ec74b4c..87bf105 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -257,9 +257,9 @@
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx7d())
- setenv("soc", "imx7d");
+ env_set("soc", "imx7d");
else
- setenv("soc", "imx7s");
+ env_set("soc", "imx7s");
#endif
return 0;
diff --git a/arch/arm/mach-imx/video.c b/arch/arm/mach-imx/video.c
index 55242f0..c670c5d 100644
--- a/arch/arm/mach-imx/video.c
+++ b/arch/arm/mach-imx/video.c
@@ -10,7 +10,7 @@
{
int i;
int ret;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
if (!panel) {
for (i = 0; i < display_count; i++) {
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 5146e51..d506ee5 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -11,13 +11,11 @@
config ARCH_INTEGRATOR_CP
bool "Support Integrator/CP platform"
select ARCH_CINTEGRATOR
- imply ENV_IS_IN_FLASH
endchoice
config ARCH_CINTEGRATOR
bool
- imply ENV_IS_IN_FLASH
choice
prompt "Integrator core module select"
diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c
index 4cad6a2..b2f5414 100644
--- a/arch/arm/mach-keystone/ddr3.c
+++ b/arch/arm/mach-keystone/ddr3.c
@@ -331,7 +331,7 @@
int ecc_test = 0;
u32 value = __raw_readl(base + KS2_DDR3_ECC_INT_STATUS_OFFSET);
- env = getenv("ecc_test");
+ env = env_get("ecc_test");
if (env)
ecc_test = simple_strtol(env, NULL, 0);
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index beb8a76..fcabfbd 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -46,7 +46,7 @@
char *env;
long ks2_debug = 0;
- env = getenv("ks2_debug");
+ env = env_get("ks2_debug");
if (env)
ks2_debug = simple_strtol(env, NULL, 0);
diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c
index 4c9d3fd..db2ff03 100644
--- a/arch/arm/mach-kirkwood/cpu.c
+++ b/arch/arm/mach-kirkwood/cpu.c
@@ -129,7 +129,7 @@
static void kw_sysrst_action(void)
{
int ret;
- char *s = getenv("sysrstcmd");
+ char *s = env_get("sysrstcmd");
if (!s) {
debug("Error.. %s failed, check sysrstcmd\n",
@@ -153,7 +153,7 @@
/*
* no action if sysrstdelay environment variable is not defined
*/
- s = getenv("sysrstdelay");
+ s = env_get("sysrstdelay");
if (s == NULL)
return;
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 1b12b33..01d700b 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -32,7 +32,6 @@
config ARMADA_XP
bool
select ARMADA_32BIT
- imply ENV_IS_IN_SPI_FLASH
# ARMv8 SoCs...
config ARMADA_3700
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 1b35e08..2dc9b1d 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -78,10 +78,8 @@
#define CONFIG_MII /* expose smi ove miiphy interface */
#if !defined(CONFIG_ARMADA_375)
#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
-#define CONFIG_PHYLIB
#endif
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
#endif /* CONFIG_CMD_NET */
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
index b0e193b..525576a 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
@@ -354,16 +354,16 @@
}
info = board_serdes_cfg_get(PEX_MODE_GET(satr11));
- DEBUG_INIT_FULL_S("info->line0_7= 0x");
- DEBUG_INIT_FULL_D(info->line0_7, 8);
- DEBUG_INIT_FULL_S(" info->line8_15= 0x");
- DEBUG_INIT_FULL_D(info->line8_15, 8);
- DEBUG_INIT_FULL_S("\n");
if (info == NULL) {
DEBUG_INIT_S("Hight speed PHY Error #1\n");
return MV_ERROR;
}
+ DEBUG_INIT_FULL_S("info->line0_7= 0x");
+ DEBUG_INIT_FULL_D(info->line0_7, 8);
+ DEBUG_INIT_FULL_S(" info->line8_15= 0x");
+ DEBUG_INIT_FULL_D(info->line8_15, 8);
+ DEBUG_INIT_FULL_S("\n");
if (config_module & ETM_MODULE_DETECT) { /* step 0.9 ETM */
DEBUG_INIT_FULL_S("ETM module detect Step 0.9:\n");
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 013586e..72832ad 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -22,6 +22,7 @@
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+ imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply TWL4030_POWER
@@ -40,6 +41,7 @@
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+ imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
config OMAP54XX
@@ -59,6 +61,7 @@
imply SPL_NAND_SUPPORT
imply SPL_POWER_SUPPORT
imply SPL_SERIAL_SUPPORT
+ imply SYS_I2C_OMAP24XX
config TI814X
bool "TI814X SoC"
@@ -82,6 +85,7 @@
imply SPL_OF_TRANSLATE
imply SPL_SEPARATE_BSS
imply SPL_SYS_MALLOC_SIMPLE
+ imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
help
Support for AM43xx SOC from Texas Instruments.
@@ -92,6 +96,7 @@
config AM33XX
bool "AM33XX SoC"
+ imply SYS_I2C_OMAP24XX
imply SYS_THUMB_BUILD
imply USE_TINY_PRINTF
help
@@ -165,4 +170,7 @@
source "board/compulab/cm_t335/Kconfig"
source "board/compulab/cm_t43/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
endif
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index d8abba9..7260d27 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -81,6 +81,7 @@
select DM
select DM_SERIAL
select DM_GPIO
+ imply CMD_SPL
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 700e6c2..26245aa 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <ahci.h>
+#include <environment.h>
#include <spl.h>
#include <asm/omap_common.h>
#include <asm/arch/omap.h>
@@ -240,8 +241,8 @@
int fb_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
- setenv("dofastboot", "1");
- saveenv();
+ env_set("dofastboot", "1");
+ env_save();
return 0;
}
#endif
diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c
index 006969e..3daae61 100644
--- a/arch/arm/mach-omap2/omap3/clock.c
+++ b/arch/arm/mach-omap2/omap3/clock.c
@@ -772,7 +772,7 @@
setbits_le32(&prcm_base->iclken_per, 0x00020000);
#endif
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#ifdef CONFIG_SYS_I2C_OMAP24XX
/* Turn on all 3 I2C clocks */
setbits_le32(&prcm_base->fclken1_core, 0x00038000);
setbits_le32(&prcm_base->iclken1_core, 0x00038000); /* I2C1,2,3 = on */
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index d540cf0..8197e7b 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -76,7 +76,7 @@
regval |= (1<<10);
writel(regval, &emif4_base->sdram_iodft_tlgc);
/*Wait till that bit clears*/
- while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1);
+ while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0);
/*Re-verify the DDR PHY status*/
while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0);
diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c
index 3bf8897..1882c49 100644
--- a/arch/arm/mach-omap2/omap5/abb.c
+++ b/arch/arm/mach-omap2/omap5/abb.c
@@ -28,8 +28,8 @@
s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
{
u32 vset;
- u32 fuse_enable_mask = OMAP5_ABB_FUSE_ENABLE_MASK;
- u32 fuse_vset_mask = OMAP5_ABB_FUSE_VSET_MASK;
+ u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK;
+ u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK;
if (!is_omap54xx()) {
/* DRA7 */
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index a8a6b8a..4ad6b53 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -329,6 +329,15 @@
.mm.addr = SMPS_REG_ADDR_45_IVA,
.mm.pmic = &palmas,
.mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
+
+ .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
+ .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
+
+ .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
+ .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
+
+ .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
+ .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
};
/*
diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c
index 030b36f..2d54a31 100644
--- a/arch/arm/mach-omap2/sec-common.c
+++ b/arch/arm/mach-omap2/sec-common.c
@@ -112,8 +112,8 @@
/* Perform cache writeback on input buffer */
flush_dcache_range(
- (u32)*image,
- (u32)*image + roundup(*size, ARCH_DMA_MINALIGN));
+ rounddown((u32)*image, ARCH_DMA_MINALIGN),
+ roundup((u32)*image + *size, ARCH_DMA_MINALIGN));
cert_addr = (uint32_t)*image;
sig_addr = find_sig_start((char *)*image, *size);
@@ -151,8 +151,8 @@
/* Perform cache writeback on output buffer */
flush_dcache_range(
- (u32)*image,
- (u32)*image + roundup(*size, ARCH_DMA_MINALIGN));
+ rounddown((u32)*image, ARCH_DMA_MINALIGN),
+ roundup((u32)*image + *size, ARCH_DMA_MINALIGN));
auth_exit:
if (result != 0) {
diff --git a/arch/arm/mach-omap2/sysinfo-common.c b/arch/arm/mach-omap2/sysinfo-common.c
index 1dc7051..4dab12a 100644
--- a/arch/arm/mach-omap2/sysinfo-common.c
+++ b/arch/arm/mach-omap2/sysinfo-common.c
@@ -16,6 +16,15 @@
*/
u32 get_device_type(void)
{
+#if defined(CONFIG_OMAP34XX)
+ /*
+ * On OMAP3 systems we call this early enough that we must just
+ * use the direct offset for safety.
+ */
+ return (readl(OMAP34XX_CTRL_BASE + 0x2f0) & DEVICE_TYPE_MASK) >>
+ DEVICE_TYPE_SHIFT;
+#else
return (readl((*ctrl)->control_status) & DEVICE_TYPE_MASK) >>
DEVICE_TYPE_SHIFT;
+#endif
}
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 1946641..0b0bf18 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -40,7 +40,7 @@
printf("Warning: fastboot.cpu: unknown CPU rev: %u\n", cpu_rev);
}
- setenv("fastboot.cpu", cpu);
+ env_set("fastboot.cpu", cpu);
}
static void omap_set_fastboot_secure(void)
@@ -63,18 +63,18 @@
printf("Warning: fastboot.secure: unknown CPU sec: %u\n", dev);
}
- setenv("fastboot.secure", secure);
+ env_set("fastboot.secure", secure);
}
static void omap_set_fastboot_board_rev(void)
{
const char *board_rev;
- board_rev = getenv("board_rev");
+ board_rev = env_get("board_rev");
if (board_rev == NULL)
printf("Warning: fastboot.board_rev: unknown board revision\n");
- setenv("fastboot.board_rev", board_rev);
+ env_set("fastboot.board_rev", board_rev);
}
#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
@@ -118,7 +118,7 @@
sprintf(buf, "%u", sz_kb);
}
- setenv("fastboot.userdata_size", buf);
+ env_set("fastboot.userdata_size", buf);
}
#else
static inline void omap_set_fastboot_userdata_size(void)
@@ -169,11 +169,11 @@
omap_die_id((unsigned int *)&die_id);
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
snprintf(serial_string, sizeof(serial_string),
"%08x%08x", die_id[0], die_id[3]);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
}
@@ -182,7 +182,7 @@
char *serial_string;
unsigned long long serial;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string) {
serial = simple_strtoull(serial_string, NULL, 16);
@@ -202,7 +202,7 @@
omap_die_id((unsigned int *)&die_id);
- if (!getenv("usbethaddr")) {
+ if (!env_get("usbethaddr")) {
/*
* Create a fake MAC address from the processor ID code.
* First byte is 0x02 to signify locally administered.
@@ -214,7 +214,7 @@
mac[4] = die_id[0] & 0xff;
mac[5] = (die_id[0] >> 8) & 0xff;
- eth_setenv_enetaddr("usbethaddr", mac);
+ eth_env_set_enetaddr("usbethaddr", mac);
}
}
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 7644b8d..2984a3e 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -15,4 +15,7 @@
source "board/LaCie/edminiv2/Kconfig"
+config SPL_LDSCRIPT
+ default "$(CPUDIR)/orion5x/u-boot-spl.lds" if ORION5X
+
endif
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 5db93ac..c79b39d 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -20,11 +20,17 @@
help
Support for Renesas R-Car Gen3 platform
+config TARGET_ULCB
+ bool "ULCB board"
+ help
+ Support for Renesas R-Car Gen3 ULCB platform
+
endchoice
config SYS_SOC
default "rmobile"
source "board/renesas/salvator-x/Kconfig"
+source "board/renesas/ulcb/Kconfig"
endif
diff --git a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
index c197642..3972635 100644
--- a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
+++ b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
@@ -75,6 +75,8 @@
#define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000
/* PFC */
+#define PFC_PUEN5 0xE6060414
+#define PUEN_SSI_SDATA4 BIT(17)
#define PFC_PUEN6 0xE6060418
#define PUEN_USB1_OVC (1 << 2)
#define PUEN_USB1_PWEN (1 << 1)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bb44c61..d9b25d5 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -67,14 +67,42 @@
config ROCKCHIP_RK3368
bool "Support Rockchip RK3368"
select ARM64
+ select SUPPORT_SPL
+ select SUPPORT_TPL
+ select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+ select TPL_NEEDS_SEPARATE_STACK if TPL
+ imply SPL_SEPARATE_BSS
+ imply SPL_SERIAL_SUPPORT
+ imply TPL_SERIAL_SUPPORT
+ select ENABLE_ARM_SOC_BOOT0_HOOK
+ select DEBUG_UART_BOARD_INIT
select SYS_NS16550
help
- The Rockchip RK3328 is a ARM-based SoC with a octa-core Cortex-A53.
- including NEON and GPU, 512KB L2 cache for big cluster and 256 KB
- L2 cache for little cluser, PowerVR G6110 based graphics, one video
- output processor supporting LVDS、HDMI、eDP, several DDR3 options
- and video codec support. Peripherals include Gigabit Ethernet,
- USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
+ The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
+ into a big and little cluster with 4 cores each) Cortex-A53 including
+ AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
+ (for the little cluster), PowerVR G6110 based graphics, one video
+ output processor supporting LVDS/HDMI/eDP, several DDR3 options and
+ video codec support.
+
+ On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
+ I2S, UARTs, SPI, I2C and PWMs.
+
+if ROCKCHIP_RK3368
+
+config TPL_LDSCRIPT
+ default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+ default 0xff8c1000
+
+config TPL_MAX_SIZE
+ default 28672
+
+config TPL_STACK
+ default 0xff8cffff
+
+endif
config ROCKCHIP_RK3399
bool "Support Rockchip RK3399"
@@ -82,6 +110,8 @@
select SUPPORT_SPL
select SPL
select SPL_SEPARATE_BSS
+ select SPL_SERIAL_SUPPORT
+ select SPL_DRIVERS_MISC_SUPPORT
select ENABLE_ARM_SOC_BOOT0_HOOK
select DEBUG_UART_BOARD_INIT
help
@@ -99,10 +129,21 @@
The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
and a DSP.
-config ROCKCHIP_SPL_BACK_TO_BROM
+config SPL_ROCKCHIP_BACK_TO_BROM
bool "SPL returns to bootrom"
default y if ROCKCHIP_RK3036
select ROCKCHIP_BROM_HELPER
+ depends on SPL
+ help
+ Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+ SPL will return to the boot rom, which will then load the U-Boot
+ binary to keep going on.
+
+config TPL_ROCKCHIP_BACK_TO_BROM
+ bool "TPL returns to bootrom"
+ default y if ROCKCHIP_RK3368
+ select ROCKCHIP_BROM_HELPER
+ depends on TPL
help
Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
SPL will return to the boot rom, which will then load the U-Boot
@@ -120,7 +161,7 @@
bool
config SPL_MMC_SUPPORT
- default y if !ROCKCHIP_SPL_BACK_TO_BROM
+ default y if !SPL_ROCKCHIP_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index cb8d3ef..79e9704 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -4,39 +4,50 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
+# We don't want the bootrom-helper present in a full U-Boot build, as
+# this may have entered from ATF with the stack-pointer pointing to
+# inaccessible/protected memory (and the bootrom-helper assumes that
+# the stack-pointer is valid before switching to the U-Boot stack).
+obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
-ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
-else ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
-obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
-obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
-else
+obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
+
+obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
-ifdef CONFIG_RAM
-obj-y += sdram_common.o
endif
-endif
+
+obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
+
ifndef CONFIG_ARM64
obj-y += rk_timer.o
endif
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
ifndef CONFIG_TPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
endif
-
obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
+
+# Clear out SPL objects, in case this is a TPL build
+obj-spl-$(CONFIG_TPL_BUILD) =
+
+# Now add SPL/TPL objects back into the main build
+obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
+obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index da36f92..8380e4e 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -9,8 +9,8 @@
void back_to_bootrom(void)
{
-#if defined(CONFIG_SPL_LIBGENERIC_SUPPORT) && !defined(CONFIG_TPL_BUILD)
- printf("Returning to boot ROM...");
+#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
+ puts("Returning to boot ROM...\n");
#endif
_back_to_bootrom_s();
}
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 7b8d0ee..9458201 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -53,9 +53,3 @@
while (1)
;
}
-
-void hang(void)
-{
- while (1)
- ;
-}
diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
index 26ea23b..a3457f3 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -34,11 +34,11 @@
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; ums mmc 0");
+ env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
}
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index c3e174d..d3866bf 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -167,8 +167,7 @@
}
setup_arm_clock();
-
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
@@ -229,7 +228,7 @@
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 3e76100..622e046 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -39,7 +39,7 @@
int board_init(void)
{
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
diff --git a/arch/arm/mach-rockchip/rk3188/Kconfig b/arch/arm/mach-rockchip/rk3188/Kconfig
index d129fcd..2bb3566 100644
--- a/arch/arm/mach-rockchip/rk3188/Kconfig
+++ b/arch/arm/mach-rockchip/rk3188/Kconfig
@@ -30,9 +30,6 @@
config TPL_LIBGENERIC_SUPPORT
default y
-config TPL_SERIAL_SUPPORT
- default y
-
source "board/radxa/rock/Kconfig"
endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index 15216c7..4ddb8ba 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -41,6 +41,8 @@
CON_IOMUX_UART2SEL_MASK,
CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
}
+
+#define SGRF_DDR_CON0 0x10150000
void board_init_f(ulong dummy)
{
struct udevice *dev;
@@ -71,6 +73,8 @@
return;
}
+ /* Disable the ddr secure region setting to make it non-secure */
+ rk_clrreg(SGRF_DDR_CON0, 0x4000);
#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index b6543a5..1e79c19 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -30,11 +30,11 @@
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; ums mmc 0");
+ env_set("preboot", "setenv preboot; ums mmc 0");
break;
}
}
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 5668fd2..6b7bf85 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -249,7 +249,7 @@
debug("DRAM init failed: %d\n", ret);
return;
}
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
@@ -316,7 +316,7 @@
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 613967c..74c6cc1 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -37,11 +37,11 @@
switch (boot_mode) {
case BOOT_FASTBOOT:
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
break;
case BOOT_UMS:
printf("enter UMS!\n");
- setenv("preboot", "setenv preboot; if mmc dev 0;"
+ env_set("preboot", "setenv preboot; if mmc dev 0;"
"then ums mmc 0; else ums mmc 1;fi");
break;
}
@@ -78,7 +78,7 @@
return rk_board_late_init();
}
-#ifndef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
static int veyron_init(void)
{
struct udevice *dev;
@@ -115,7 +115,7 @@
int board_init(void)
{
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
new file mode 100644
index 0000000..cabf344
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_debug_uart_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *pinctrl;
+ struct udevice *dev;
+ int ret;
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ /* Set up our preloader console */
+ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+ if (ret) {
+ error("%s: pinctrl init failed: %d\n", __func__, ret);
+ hang();
+ }
+
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
+ if (ret) {
+ error("%s: failed to set up console UART\n", __func__);
+ hang();
+ }
+
+ preloader_console_init();
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return;
+ }
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+ return MMCSD_MODE_RAW;
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+ /* Just empty function now - can't decide what to choose */
+ debug("%s: %s\n", __func__, name);
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
new file mode 100644
index 0000000..b3e6ffa
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/clock.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * The SPL (and also the full U-Boot stage on the RK3368) will run in
+ * secure mode (i.e. EL3) and an ATF will eventually be booted before
+ * starting up the operating system... so we can initialize the SGRF
+ * here and rely on the ATF installing the final (secure) policy
+ * later.
+ */
+static inline uintptr_t sgrf_soc_con_addr(unsigned no)
+{
+ const uintptr_t SGRF_BASE =
+ (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+
+ return SGRF_BASE + sizeof(u32) * no;
+}
+
+static inline uintptr_t sgrf_busdmac_addr(unsigned no)
+{
+ const uintptr_t SGRF_BASE =
+ (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+ const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
+ const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
+
+ return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
+}
+
+static void sgrf_init(void)
+{
+ struct rk3368_cru * const cru =
+ (struct rk3368_cru * const)rockchip_get_cru();
+ const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
+ const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
+ const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
+
+ /* Set all configurable IP to 'non secure'-mode */
+ rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
+ rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
+ rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
+
+ /*
+ * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
+ * Original comment: "ddr space set no secure mode"
+ */
+ rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
+ rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
+ rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
+
+ /* Set 'secure dma' to 'non secure'-mode */
+ rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
+ rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
+
+ dsb(); /* barrier */
+
+ rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+ rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+
+ dsb(); /* barrier */
+ udelay(10);
+
+ rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+ rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+}
+
+void board_debug_uart_init(void)
+{
+ /*
+ * N.B.: This is called before the device-model has been
+ * initialised. For this reason, we can not access
+ * the GRF address range using the syscon API.
+ */
+ struct rk3368_grf * const grf =
+ (struct rk3368_grf * const)0xff770000;
+
+ enum {
+ GPIO2D1_MASK = GENMASK(3, 2),
+ GPIO2D1_GPIO = 0,
+ GPIO2D1_UART0_SOUT = (1 << 2),
+
+ GPIO2D0_MASK = GENMASK(1, 0),
+ GPIO2D0_GPIO = 0,
+ GPIO2D0_UART0_SIN = (1 << 0),
+ };
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+ /* Enable early UART0 on the RK3368 */
+ rk_clrsetreg(&grf->gpio2d_iomux,
+ GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+ rk_clrsetreg(&grf->gpio2d_iomux,
+ GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *dev;
+ int ret;
+
+#define EARLY_UART
+#ifdef EARLY_UART
+ /*
+ * Debug UART can be used from here if required:
+ *
+ * debug_uart_init();
+ * printch('a');
+ * printhex8(0x1234);
+ * printascii("string");
+ */
+ debug_uart_init();
+ printascii("U-Boot TPL board init\n");
+#endif
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ /* Reset security, so we can use DMA in the MMC drivers */
+ sgrf_init();
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return;
+ }
+}
+
+void board_return_to_bootrom(void)
+{
+ back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig
index 6d32068..7c9b722 100644
--- a/arch/arm/mach-rockchip/rk3368/Kconfig
+++ b/arch/arm/mach-rockchip/rk3368/Kconfig
@@ -3,6 +3,26 @@
choice
prompt "RK3368 board"
+config TARGET_LION_RK3368
+ bool "Theobroma Systems RK3368-uQ7 (Lion) module"
+ help
+ The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm,
+ MXM-230 connector) system-on-module designed by Theobroma
+ Systems for industrial applications.
+
+ It provides the following features:
+ - 8x Cortex-A53 (in 2 clusters of 4 cores each)
+ - (on-module) up to 4GB of DDR3 memory
+ - (on-module) SPI-NOR flash
+ - (on-module) eMMC
+ - Gigabit Ethernet (with an on-module KSZ9031 PHY)
+ - USB
+ - HDMI
+ - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
+ - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)
+ - on-module STM32 providing CAN, RTC and fan-control
+ - (optional on-module) EAL4+-certified security module
+
config TARGET_SHEEP
bool "Sheep board"
help
@@ -25,8 +45,12 @@
config SYS_SOC
default "rockchip"
+source "board/theobroma-systems/lion_rk3368/Kconfig"
source "board/rockchip/sheep_rk3368/Kconfig"
source "board/geekbuying/geekbox/Kconfig"
source "board/rockchip/evb_px5/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv8/u-boot-spl.lds"
+
endif
diff --git a/arch/arm/mach-rockchip/rk3368/Makefile b/arch/arm/mach-rockchip/rk3368/Makefile
index 0390716..46798c2 100644
--- a/arch/arm/mach-rockchip/rk3368/Makefile
+++ b/arch/arm/mach-rockchip/rk3368/Makefile
@@ -5,5 +5,4 @@
#
obj-y += clk_rk3368.o
obj-y += rk3368.o
-obj-y += sdram_rk3368.o
obj-y += syscon_rk3368.o
diff --git a/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c b/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
deleted file mode 100644
index d0d0900..0000000
--- a/arch/arm/mach-rockchip/rk3368/sdram_rk3368.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier: GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-struct dram_info {
- struct ram_info info;
- struct rk3368_pmu_grf *pmugrf;
-};
-
-static int rk3368_dmc_probe(struct udevice *dev)
-{
- struct dram_info *priv = dev_get_priv(dev);
-
- priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
- debug("%s: grf=%p\n", __func__, priv->pmugrf);
- priv->info.base = CONFIG_SYS_SDRAM_BASE;
- priv->info.size = rockchip_sdram_size(
- (phys_addr_t)&priv->pmugrf->os_reg[2]);
-
- return 0;
-}
-
-static int rk3368_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
- struct dram_info *priv = dev_get_priv(dev);
-
- *info = priv->info;
-
- return 0;
-}
-
-static struct ram_ops rk3368_dmc_ops = {
- .get_info = rk3368_dmc_get_info,
-};
-
-
-static const struct udevice_id rk3368_dmc_ids[] = {
- { .compatible = "rockchip,rk3368-dmc" },
- { }
-};
-
-U_BOOT_DRIVER(dmc_rk3368) = {
- .name = "rockchip_rk3368_dmc",
- .id = UCLASS_RAM,
- .of_match = rk3368_dmc_ids,
- .ops = &rk3368_dmc_ops,
- .probe = rk3368_dmc_probe,
- .priv_auto_alloc_size = sizeof(struct dram_info),
-};
diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
index 03e97eb..99d51f0 100644
--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
@@ -1,6 +1,8 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -14,6 +16,10 @@
.data = ROCKCHIP_SYSCON_GRF },
{ .compatible = "rockchip,rk3368-pmugrf",
.data = ROCKCHIP_SYSCON_PMUGRF },
+ { .compatible = "rockchip,rk3368-msch",
+ .data = ROCKCHIP_SYSCON_MSCH },
+ { .compatible = "rockchip,rk3368-sgrf",
+ .data = ROCKCHIP_SYSCON_SGRF },
{ }
};
@@ -22,3 +28,41 @@
.id = UCLASS_SYSCON,
.of_match = rk3368_syscon_ids,
};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3368_syscon_bind_of_platdata(struct udevice *dev)
+{
+ dev->driver_data = dev->driver->of_match->data;
+ debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+ return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3368_grf) = {
+ .name = "rockchip_rk3368_grf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_pmugrf) = {
+ .name = "rockchip_rk3368_pmugrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 1,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_msch) = {
+ .name = "rockchip_rk3368_msch",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 2,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3368_sgrf) = {
+ .name = "rockchip_rk3368_sgrf",
+ .id = UCLASS_SYSCON,
+ .of_match = rk3368_syscon_ids + 3,
+ .bind = rk3368_syscon_bind_of_platdata,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds
new file mode 100644
index 0000000..cc59844
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+
+#undef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
+
+#include "../../cpu/armv8/u-boot-spl.lds"
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index e050aff..a13b717 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -8,9 +8,6 @@
#include <debug_uart.h>
#include <dm.h>
#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <mmc.h>
#include <ram.h>
#include <spl.h>
#include <asm/gpio.h>
@@ -21,111 +18,10 @@
#include <asm/arch/sdram.h>
#include <asm/arch/timer.h>
#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
#include <power/regulator.h>
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
-static int spl_node_to_boot_device(int node)
-{
- struct udevice *parent;
-
- /*
- * This should eventually move into the SPL code, once SPL becomes
- * aware of the block-device layer. Until then (and to avoid unneeded
- * delays in getting this feature out, it lives at the board-level).
- */
- if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
- struct udevice *dev;
- struct blk_desc *desc = NULL;
-
- for (device_find_first_child(parent, &dev);
- dev;
- device_find_next_child(&dev)) {
- if (device_get_uclass_id(dev) == UCLASS_BLK) {
- desc = dev_get_uclass_platdata(dev);
- break;
- }
- }
-
- if (!desc)
- return -ENOENT;
-
- switch (desc->devnum) {
- case 0:
- return BOOT_DEVICE_MMC1;
- case 1:
- return BOOT_DEVICE_MMC2;
- default:
- return -ENOSYS;
- }
- }
-
- /*
- * SPL doesn't differentiate SPI flashes, so we keep the detection
- * brief and inaccurate... hopefully, the common SPL layer can be
- * extended with awareness of the BLK layer (and matching OF_CONTROL)
- * soon.
- */
- if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
- return BOOT_DEVICE_SPI;
-
- return -1;
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
- const void *blob = gd->fdt_blob;
- int chosen_node = fdt_path_offset(blob, "/chosen");
- int idx = 0;
- int elem;
- int boot_device;
- int node;
- const char *conf;
-
- if (chosen_node < 0) {
- debug("%s: /chosen not found, using spl_boot_device()\n",
- __func__);
- spl_boot_list[0] = spl_boot_device();
- return;
- }
-
- for (elem = 0;
- (conf = fdt_stringlist_get(blob, chosen_node,
- "u-boot,spl-boot-order", elem, NULL));
- elem++) {
- /* First check if the list element is an alias */
- const char *alias = fdt_get_alias(blob, conf);
- if (alias)
- conf = alias;
-
- /* Try to resolve the config item (or alias) as a path */
- node = fdt_path_offset(blob, conf);
- if (node < 0) {
- debug("%s: could not find %s in FDT", __func__, conf);
- continue;
- }
-
- /* Try to map this back onto SPL boot devices */
- boot_device = spl_node_to_boot_device(node);
- if (boot_device < 0) {
- debug("%s: could not map node @%x to a boot-device\n",
- __func__, node);
- continue;
- }
-
- spl_boot_list[idx++] = boot_device;
- }
-
- /* If we had no matches, fall back to spl_boot_device */
- if (idx == 0)
- spl_boot_list[0] = spl_boot_device();
-}
-#endif
-
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
@@ -263,7 +159,7 @@
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
diff --git a/arch/arm/mach-rockchip/rk_timer.c b/arch/arm/mach-rockchip/rk_timer.c
index ae5123d..853b986 100644
--- a/arch/arm/mach-rockchip/rk_timer.c
+++ b/arch/arm/mach-rockchip/rk_timer.c
@@ -4,9 +4,9 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <common.h>
#include <asm/arch/timer.h>
#include <asm/io.h>
-#include <common.h>
#include <linux/types.h>
struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S
index 5e6c8db..50fce20 100644
--- a/arch/arm/mach-rockchip/save_boot_param.S
+++ b/arch/arm/mach-rockchip/save_boot_param.S
@@ -1,11 +1,47 @@
/*
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
+#if defined(CONFIG_ARM64)
+.globl SAVE_SP_ADDR
+SAVE_SP_ADDR:
+ .quad 0
+
+ENTRY(save_boot_params)
+ sub sp, sp, #0x60
+ stp x29, x30, [sp, #0x50]
+ stp x27, x28, [sp, #0x40]
+ stp x25, x26, [sp, #0x30]
+ stp x23, x24, [sp, #0x20]
+ stp x21, x22, [sp, #0x10]
+ stp x19, x20, [sp, #0]
+ ldr x8, =SAVE_SP_ADDR
+ mov x9, sp
+ str x9, [x8]
+ b save_boot_params_ret /* back to my caller */
+ENDPROC(save_boot_params)
+
+.globl _back_to_bootrom_s
+ENTRY(_back_to_bootrom_s)
+ ldr x0, =SAVE_SP_ADDR
+ ldr x0, [x0]
+ mov sp, x0
+ ldp x29, x30, [sp, #0x50]
+ ldp x27, x28, [sp, #0x40]
+ ldp x25, x26, [sp, #0x30]
+ ldp x23, x24, [sp, #0x20]
+ ldp x21, x22, [sp, #0x10]
+ ldp x19, x20, [sp]
+ add sp, sp, #0x60
+ mov x0, xzr
+ ret
+ENDPROC(_back_to_bootrom_s)
+#else
.globl SAVE_SP_ADDR
SAVE_SP_ADDR:
.word 0
@@ -30,3 +66,4 @@
mov r0, #0
pop {r1-r12, pc}
ENDPROC(_back_to_bootrom_s)
+#endif
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
new file mode 100644
index 0000000..4f78c72
--- /dev/null
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -0,0 +1,108 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <mmc.h>
+#include <spl.h>
+
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static int spl_node_to_boot_device(int node)
+{
+ struct udevice *parent;
+
+ /*
+ * This should eventually move into the SPL code, once SPL becomes
+ * aware of the block-device layer. Until then (and to avoid unneeded
+ * delays in getting this feature out, it lives at the board-level).
+ */
+ if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
+ struct udevice *dev;
+ struct blk_desc *desc = NULL;
+
+ for (device_find_first_child(parent, &dev);
+ dev;
+ device_find_next_child(&dev)) {
+ if (device_get_uclass_id(dev) == UCLASS_BLK) {
+ desc = dev_get_uclass_platdata(dev);
+ break;
+ }
+ }
+
+ if (!desc)
+ return -ENOENT;
+
+ switch (desc->devnum) {
+ case 0:
+ return BOOT_DEVICE_MMC1;
+ case 1:
+ return BOOT_DEVICE_MMC2;
+ default:
+ return -ENOSYS;
+ }
+ }
+
+ /*
+ * SPL doesn't differentiate SPI flashes, so we keep the detection
+ * brief and inaccurate... hopefully, the common SPL layer can be
+ * extended with awareness of the BLK layer (and matching OF_CONTROL)
+ * soon.
+ */
+ if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
+ return BOOT_DEVICE_SPI;
+
+ return -1;
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int idx = 0;
+ int elem;
+ int boot_device;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found, using spl_boot_device()\n",
+ __func__);
+ spl_boot_list[0] = spl_boot_device();
+ return;
+ }
+
+ for (elem = 0;
+ (conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem, NULL));
+ elem++) {
+ /* First check if the list element is an alias */
+ const char *alias = fdt_get_alias(blob, conf);
+ if (alias)
+ conf = alias;
+
+ /* Try to resolve the config item (or alias) as a path */
+ node = fdt_path_offset(blob, conf);
+ if (node < 0) {
+ debug("%s: could not find %s in FDT", __func__, conf);
+ continue;
+ }
+
+ /* Try to map this back onto SPL boot devices */
+ boot_device = spl_node_to_boot_device(node);
+ if (boot_device < 0) {
+ debug("%s: could not map node @%x to a boot-device\n",
+ __func__, node);
+ continue;
+ }
+
+ spl_boot_list[idx++] = boot_device;
+ }
+
+ /* If we had no matches, fall back to spl_boot_device */
+ if (idx == 0)
+ spl_boot_list[0] = spl_boot_device();
+}
+#endif
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 41b779c..286bfef 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -9,7 +9,6 @@
obj-y += board.o
obj-y += clock_manager.o
-obj-y += fpga_manager.o
obj-y += misc.o
obj-y += reset_manager.o
obj-y += timer.o
@@ -21,6 +20,7 @@
obj-y += scan_manager.o
obj-y += system_manager_gen5.o
obj-y += wrap_pll_config.o
+obj-y += fpga_manager.o
endif
ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
index a077e22..a21c716 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -10,58 +10,11 @@
#include <altera.h>
-struct socfpga_fpga_manager {
- /* FPGA Manager Module */
- u32 stat; /* 0x00 */
- u32 ctrl;
- u32 dclkcnt;
- u32 dclkstat;
- u32 gpo; /* 0x10 */
- u32 gpi;
- u32 misci; /* 0x18 */
- u32 _pad_0x1c_0x82c[517];
-
- /* Configuration Monitor (MON) Registers */
- u32 gpio_inten; /* 0x830 */
- u32 gpio_intmask;
- u32 gpio_inttype_level;
- u32 gpio_int_polarity;
- u32 gpio_intstatus; /* 0x840 */
- u32 gpio_raw_intstatus;
- u32 _pad_0x848;
- u32 gpio_porta_eoi;
- u32 gpio_ext_porta; /* 0x850 */
- u32 _pad_0x854_0x85c[3];
- u32 gpio_1s_sync; /* 0x860 */
- u32 _pad_0x864_0x868[2];
- u32 gpio_ver_id_code;
- u32 gpio_config_reg2; /* 0x870 */
- u32 gpio_config_reg1;
-};
-
-#define FPGAMGRREGS_STAT_MODE_MASK 0x7
-#define FPGAMGRREGS_STAT_MSEL_MASK 0xf8
-#define FPGAMGRREGS_STAT_MSEL_LSB 3
-
-#define FPGAMGRREGS_CTRL_CFGWDTH_MASK 0x200
-#define FPGAMGRREGS_CTRL_AXICFGEN_MASK 0x100
-#define FPGAMGRREGS_CTRL_NCONFIGPULL_MASK 0x4
-#define FPGAMGRREGS_CTRL_NCE_MASK 0x2
-#define FPGAMGRREGS_CTRL_EN_MASK 0x1
-#define FPGAMGRREGS_CTRL_CDRATIO_LSB 6
-
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CRC_MASK 0x8
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_ID_MASK 0x4
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK 0x2
-#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK 0x1
-
-/* FPGA Mode */
-#define FPGAMGRREGS_MODE_FPGAOFF 0x0
-#define FPGAMGRREGS_MODE_RESETPHASE 0x1
-#define FPGAMGRREGS_MODE_CFGPHASE 0x2
-#define FPGAMGRREGS_MODE_INITPHASE 0x3
-#define FPGAMGRREGS_MODE_USERMODE 0x4
-#define FPGAMGRREGS_MODE_UNKNOWN 0x5
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
+#include <asm/arch/fpga_manager_gen5.h>
+#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
+#include <asm/arch/fpga_manager_arria10.h>
+#endif
/* FPGA CD Ratio Value */
#define CDRATIO_x1 0x0
@@ -69,9 +22,14 @@
#define CDRATIO_x4 0x2
#define CDRATIO_x8 0x3
-/* SoCFPGA support functions */
-int fpgamgr_test_fpga_ready(void);
-int fpgamgr_poll_fpga_ready(void);
-int fpgamgr_get_mode(void);
+#ifndef __ASSEMBLY__
+/* Common prototypes */
+int fpgamgr_get_mode(void);
+int fpgamgr_poll_fpga_ready(void);
+void fpgamgr_program_write(const void *rbf_data, size_t rbf_size);
+int fpgamgr_test_fpga_ready(void);
+int fpgamgr_dclkcnt_set(unsigned long cnt);
+
+#endif /* __ASSEMBLY__ */
#endif /* _FPGA_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
new file mode 100644
index 0000000..9cbf696
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2017 Intel Corporation <www.intel.com>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _FPGA_MANAGER_ARRIA10_H_
+#define _FPGA_MANAGER_ARRIA10_H_
+
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK BIT(0)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK BIT(1)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK BIT(2)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_INITDONE_OE_SET_MSK BIT(3)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK BIT(4)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_OE_SET_MSK BIT(5)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK BIT(6)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_OE_SET_MSK BIT(7)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CVP_CONF_DONE_SET_MSK BIT(8)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_READY_SET_MSK BIT(9)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_DONE_SET_MSK BIT(10)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR_SET_MSK BIT(11)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK BIT(12)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCEO_OE_SET_MSK BIT(13)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK BIT(16)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK BIT(17)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK BIT(18)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SET_MSD (\
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK |\
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK |\
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOEMPTY_SET_MSK BIT(24)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOFULL_SET_MSK BIT(25)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_JTAGM_SET_MSK BIT(28)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EMR_SET_MSK BIT(29)
+#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_LSB 16
+
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG_SET_MSK BIT(0)
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS_SET_MSK BIT(1)
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE_SET_MSK BIT(2)
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK BIT(8)
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTATUS_OE_SET_MSK BIT(16)
+#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK BIT(24)
+
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG_SET_MSK BIT(0)
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST_SET_MSK BIT(16)
+#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSK BIT(24)
+
+#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSK BIT(0)
+#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSK BIT(8)
+#define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK 0x00030000
+#define ALT_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SET_MSK BIT(24)
+#define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_LSB 16
+
+#ifndef __ASSEMBLY__
+
+struct socfpga_fpga_manager {
+ u32 _pad_0x0_0x7[2];
+ u32 dclkcnt;
+ u32 dclkstat;
+ u32 gpo;
+ u32 gpi;
+ u32 misci;
+ u32 _pad_0x1c_0x2f[5];
+ u32 emr_data0;
+ u32 emr_data1;
+ u32 emr_data2;
+ u32 emr_data3;
+ u32 emr_data4;
+ u32 emr_data5;
+ u32 emr_valid;
+ u32 emr_en;
+ u32 jtag_config;
+ u32 jtag_status;
+ u32 jtag_kick;
+ u32 _pad_0x5c_0x5f;
+ u32 jtag_data_w;
+ u32 jtag_data_r;
+ u32 _pad_0x68_0x6f[2];
+ u32 imgcfg_ctrl_00;
+ u32 imgcfg_ctrl_01;
+ u32 imgcfg_ctrl_02;
+ u32 _pad_0x7c_0x7f;
+ u32 imgcfg_stat;
+ u32 intr_masked_status;
+ u32 intr_mask;
+ u32 intr_polarity;
+ u32 dma_config;
+ u32 imgcfg_fifo_status;
+};
+
+/* Functions */
+int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
+int fpgamgr_program_finish(void);
+int is_fpgamgr_user_mode(void);
+int fpgamgr_wait_early_user_mode(void);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _FPGA_MANAGER_ARRIA10_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
new file mode 100644
index 0000000..2de7a11
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _FPGA_MANAGER_GEN5_H_
+#define _FPGA_MANAGER_GEN5_H_
+
+#define FPGAMGRREGS_STAT_MODE_MASK 0x7
+#define FPGAMGRREGS_STAT_MSEL_MASK 0xf8
+#define FPGAMGRREGS_STAT_MSEL_LSB 3
+
+#define FPGAMGRREGS_CTRL_CFGWDTH_MASK BIT(9)
+#define FPGAMGRREGS_CTRL_AXICFGEN_MASK BIT(8)
+#define FPGAMGRREGS_CTRL_NCONFIGPULL_MASK BIT(2)
+#define FPGAMGRREGS_CTRL_NCE_MASK BIT(1)
+#define FPGAMGRREGS_CTRL_EN_MASK BIT(0)
+#define FPGAMGRREGS_CTRL_CDRATIO_LSB 6
+
+#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CRC_MASK BIT(3)
+#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_ID_MASK BIT(2)
+#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK BIT(1)
+#define FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK BIT(0)
+
+/* FPGA Mode */
+#define FPGAMGRREGS_MODE_FPGAOFF 0x0
+#define FPGAMGRREGS_MODE_RESETPHASE 0x1
+#define FPGAMGRREGS_MODE_CFGPHASE 0x2
+#define FPGAMGRREGS_MODE_INITPHASE 0x3
+#define FPGAMGRREGS_MODE_USERMODE 0x4
+#define FPGAMGRREGS_MODE_UNKNOWN 0x5
+
+#ifndef __ASSEMBLY__
+
+struct socfpga_fpga_manager {
+ /* FPGA Manager Module */
+ u32 stat; /* 0x00 */
+ u32 ctrl;
+ u32 dclkcnt;
+ u32 dclkstat;
+ u32 gpo; /* 0x10 */
+ u32 gpi;
+ u32 misci; /* 0x18 */
+ u32 _pad_0x1c_0x82c[517];
+
+ /* Configuration Monitor (MON) Registers */
+ u32 gpio_inten; /* 0x830 */
+ u32 gpio_intmask;
+ u32 gpio_inttype_level;
+ u32 gpio_int_polarity;
+ u32 gpio_intstatus; /* 0x840 */
+ u32 gpio_raw_intstatus;
+ u32 _pad_0x848;
+ u32 gpio_porta_eoi;
+ u32 gpio_ext_porta; /* 0x850 */
+ u32 _pad_0x854_0x85c[3];
+ u32 gpio_1s_sync; /* 0x860 */
+ u32 _pad_0x864_0x868[2];
+ u32 gpio_ver_id_code;
+ u32 gpio_config_reg2; /* 0x870 */
+ u32 gpio_config_reg1;
+};
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _FPGA_MANAGER_GEN5_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index 7922db8..b6d7f4f 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -17,7 +17,7 @@
void socfpga_reset_assert_fpga_connected_peripherals(void);
void socfpga_reset_deassert_osc1wd0(void);
void socfpga_reset_uart(int assert);
-int socfpga_bridges_reset(int enable);
+int socfpga_bridges_reset(void);
struct socfpga_reset_manager {
u32 stat;
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 49b26b3..2f1da74 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -219,9 +219,9 @@
{
const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
const int fpga_id = socfpga_fpga_id(0);
- setenv("bootmode", bsel_str[bsel].mode);
+ env_set("bootmode", bsel_str[bsel].mode);
if (fpga_id >= 0)
- setenv("fpgatype", socfpga_fpga_model[fpga_id].var);
+ env_set("fpgatype", socfpga_fpga_model[fpga_id].var);
return socfpga_eth_reset();
}
#endif
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index d8c858c..66f1ec2 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -318,13 +318,13 @@
}
#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
{
/* For SoCFPGA-VT, this is NOP. */
return 0;
}
#else
-int socfpga_bridges_reset(int enable)
+int socfpga_bridges_reset(void)
{
int ret;
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 8f43714..f70f5ec 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -3,9 +3,6 @@
config STM32F4
bool "stm32f4 family"
-config STM32F1
- bool "stm32f1 family"
-
config STM32F7
bool "stm32f7 family"
select SUPPORT_SPL
@@ -29,7 +26,6 @@
select SPL_XIP_SUPPORT
source "arch/arm/mach-stm32/stm32f4/Kconfig"
-source "arch/arm/mach-stm32/stm32f1/Kconfig"
source "arch/arm/mach-stm32/stm32f7/Kconfig"
endif
diff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile
index ffc537f..6b76944 100644
--- a/arch/arm/mach-stm32/Makefile
+++ b/arch/arm/mach-stm32/Makefile
@@ -5,6 +5,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_STM32F1) += stm32f1/
obj-$(CONFIG_STM32F4) += stm32f4/
obj-$(CONFIG_STM32F7) += stm32f7/
diff --git a/arch/arm/mach-stm32/stm32f1/Kconfig b/arch/arm/mach-stm32/stm32f1/Kconfig
deleted file mode 100644
index f627fd2..0000000
--- a/arch/arm/mach-stm32/stm32f1/Kconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-if STM32F1
-
-endif
diff --git a/arch/arm/mach-stm32/stm32f1/Makefile b/arch/arm/mach-stm32/stm32f1/Makefile
deleted file mode 100644
index e2081db..0000000
--- a/arch/arm/mach-stm32/stm32f1/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2015
-# Kamil Lulko, <kamil.lulko@gmail.com>
-#
-# Copyright 2015 ATS Advanced Telematics Systems GmbH
-# Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += soc.o clock.o timer.o flash.o
diff --git a/arch/arm/mach-stm32/stm32f1/clock.c b/arch/arm/mach-stm32/stm32f1/clock.c
deleted file mode 100644
index 2820848..0000000
--- a/arch/arm/mach-stm32/stm32f1/clock.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * (C) Copyright 2014
- * STMicroelectronics
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/stm32.h>
-
-#define RCC_CR_HSION (1 << 0)
-#define RCC_CR_HSEON (1 << 16)
-#define RCC_CR_HSERDY (1 << 17)
-#define RCC_CR_HSEBYP (1 << 18)
-#define RCC_CR_CSSON (1 << 19)
-#define RCC_CR_PLLON (1 << 24)
-#define RCC_CR_PLLRDY (1 << 25)
-
-#define RCC_CFGR_PLLMUL_MASK 0x3C0000
-#define RCC_CFGR_PLLMUL_SHIFT 18
-#define RCC_CFGR_PLLSRC_HSE (1 << 16)
-
-#define RCC_CFGR_AHB_PSC_MASK 0xF0
-#define RCC_CFGR_APB1_PSC_MASK 0x700
-#define RCC_CFGR_APB2_PSC_MASK 0x3800
-#define RCC_CFGR_SW0 (1 << 0)
-#define RCC_CFGR_SW1 (1 << 1)
-#define RCC_CFGR_SW_MASK 0x3
-#define RCC_CFGR_SW_HSI 0
-#define RCC_CFGR_SW_HSE RCC_CFGR_SW0
-#define RCC_CFGR_SW_PLL RCC_CFGR_SW1
-#define RCC_CFGR_SWS0 (1 << 2)
-#define RCC_CFGR_SWS1 (1 << 3)
-#define RCC_CFGR_SWS_MASK 0xC
-#define RCC_CFGR_SWS_HSI 0
-#define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
-#define RCC_CFGR_SWS_PLL RCC_CFGR_SWS1
-#define RCC_CFGR_HPRE_SHIFT 4
-#define RCC_CFGR_PPRE1_SHIFT 8
-#define RCC_CFGR_PPRE2_SHIFT 11
-
-#define RCC_APB1ENR_PWREN (1 << 28)
-
-#define PWR_CR_VOS0 (1 << 14)
-#define PWR_CR_VOS1 (1 << 15)
-#define PWR_CR_VOS_MASK 0xC000
-#define PWR_CR_VOS_SCALE_MODE_1 (PWR_CR_VOS0 | PWR_CR_VOS1)
-#define PWR_CR_VOS_SCALE_MODE_2 (PWR_CR_VOS1)
-#define PWR_CR_VOS_SCALE_MODE_3 (PWR_CR_VOS0)
-
-#define FLASH_ACR_WS(n) n
-#define FLASH_ACR_PRFTEN (1 << 8)
-#define FLASH_ACR_ICEN (1 << 9)
-#define FLASH_ACR_DCEN (1 << 10)
-
-struct psc {
- u8 ahb_psc;
- u8 apb1_psc;
- u8 apb2_psc;
-};
-
-#define AHB_PSC_1 0
-#define AHB_PSC_2 0x8
-#define AHB_PSC_4 0x9
-#define AHB_PSC_8 0xA
-#define AHB_PSC_16 0xB
-#define AHB_PSC_64 0xC
-#define AHB_PSC_128 0xD
-#define AHB_PSC_256 0xE
-#define AHB_PSC_512 0xF
-
-#define APB_PSC_1 0
-#define APB_PSC_2 0x4
-#define APB_PSC_4 0x5
-#define APB_PSC_8 0x6
-#define APB_PSC_16 0x7
-
-#if !defined(CONFIG_STM32_HSE_HZ)
-#error "CONFIG_STM32_HSE_HZ not defined!"
-#else
-#if (CONFIG_STM32_HSE_HZ == 8000000)
-#define RCC_CFGR_PLLMUL_CFG 0x7
-struct psc psc_hse = {
- .ahb_psc = AHB_PSC_1,
- .apb1_psc = APB_PSC_2,
- .apb2_psc = APB_PSC_1
-};
-#else
-#error "No PLL/Prescaler configuration for given CONFIG_STM32_HSE_HZ exists"
-#endif
-#endif
-
-int configure_clocks(void)
-{
- /* Reset RCC configuration */
- setbits_le32(&STM32_RCC->cr, RCC_CR_HSION);
- writel(0, &STM32_RCC->cfgr); /* Reset CFGR */
- clrbits_le32(&STM32_RCC->cr, (RCC_CR_HSEON | RCC_CR_CSSON
- | RCC_CR_PLLON));
- clrbits_le32(&STM32_RCC->cr, RCC_CR_HSEBYP);
- writel(0, &STM32_RCC->cir); /* Disable all interrupts */
-
- /* Configure for HSE+PLL operation */
- setbits_le32(&STM32_RCC->cr, RCC_CR_HSEON);
- while (!(readl(&STM32_RCC->cr) & RCC_CR_HSERDY))
- ;
-
- /* Enable high performance mode, System frequency up to 168 MHz */
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_PWREN);
- writel(PWR_CR_VOS_SCALE_MODE_1, &STM32_PWR->cr);
-
- setbits_le32(&STM32_RCC->cfgr,
- RCC_CFGR_PLLMUL_CFG << RCC_CFGR_PLLMUL_SHIFT);
- setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_PLLSRC_HSE);
- setbits_le32(&STM32_RCC->cfgr, ((
- psc_hse.ahb_psc << RCC_CFGR_HPRE_SHIFT)
- | (psc_hse.apb1_psc << RCC_CFGR_PPRE1_SHIFT)
- | (psc_hse.apb2_psc << RCC_CFGR_PPRE2_SHIFT)));
-
- setbits_le32(&STM32_RCC->cr, RCC_CR_PLLON);
-
- while (!(readl(&STM32_RCC->cr) & RCC_CR_PLLRDY))
- ;
-
- /* 5 wait states, Prefetch enabled, D-Cache enabled, I-Cache enabled */
- writel(FLASH_ACR_WS(5) | FLASH_ACR_PRFTEN | FLASH_ACR_ICEN
- | FLASH_ACR_DCEN, &STM32_FLASH->acr);
-
- clrbits_le32(&STM32_RCC->cfgr, (RCC_CFGR_SW0 | RCC_CFGR_SW1));
- setbits_le32(&STM32_RCC->cfgr, RCC_CFGR_SW_PLL);
-
- while ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) !=
- RCC_CFGR_SWS_PLL)
- ;
-
- return 0;
-}
-
-unsigned long clock_get(enum clock clck)
-{
- u32 sysclk = 0;
- u32 shift = 0;
- /* PLL table lookups for clock computation */
- u8 pll_mul_table[16] = {
- 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16
- };
- /* Prescaler table lookups for clock computation */
- u8 ahb_psc_table[16] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9
- };
- u8 apb_psc_table[8] = {
- 0, 0, 0, 0, 1, 2, 3, 4
- };
-
- if ((readl(&STM32_RCC->cfgr) & RCC_CFGR_SWS_MASK) ==
- RCC_CFGR_SWS_PLL) {
- u16 pll;
- pll = ((readl(&STM32_RCC->cfgr) & RCC_CFGR_PLLMUL_MASK)
- >> RCC_CFGR_PLLMUL_SHIFT);
- sysclk = CONFIG_STM32_HSE_HZ * pll_mul_table[pll];
- }
-
- switch (clck) {
- case CLOCK_CORE:
- return sysclk;
- break;
- case CLOCK_AHB:
- shift = ahb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_AHB_PSC_MASK)
- >> RCC_CFGR_HPRE_SHIFT)];
- return sysclk >>= shift;
- break;
- case CLOCK_APB1:
- shift = apb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB1_PSC_MASK)
- >> RCC_CFGR_PPRE1_SHIFT)];
- return sysclk >>= shift;
- break;
- case CLOCK_APB2:
- shift = apb_psc_table[(
- (readl(&STM32_RCC->cfgr) & RCC_CFGR_APB2_PSC_MASK)
- >> RCC_CFGR_PPRE2_SHIFT)];
- return sysclk >>= shift;
- break;
- default:
- return 0;
- break;
- }
-}
diff --git a/arch/arm/mach-stm32/stm32f1/flash.c b/arch/arm/mach-stm32/stm32f1/flash.c
deleted file mode 100644
index 7d41f63..0000000
--- a/arch/arm/mach-stm32/stm32f1/flash.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/stm32.h>
-
-#define STM32_FLASH_KEY1 0x45670123
-#define STM32_FLASH_KEY2 0xcdef89ab
-
-#define STM32_NUM_BANKS 2
-#define STM32_MAX_BANK 0x200
-
-flash_info_t flash_info[STM32_NUM_BANKS];
-static struct stm32_flash_bank_regs *flash_bank[STM32_NUM_BANKS];
-
-static void stm32f1_flash_lock(u8 bank, u8 lock)
-{
- if (lock) {
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_LOCK);
- } else {
- writel(STM32_FLASH_KEY1, &flash_bank[bank]->keyr);
- writel(STM32_FLASH_KEY2, &flash_bank[bank]->keyr);
- }
-}
-
-/* Only XL devices are supported (2 KiB sector size) */
-unsigned long flash_init(void)
-{
- u8 i, banks;
- u16 j, size;
-
- /* Set up accessors for XL devices with wonky register layout */
- flash_bank[0] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr;
- flash_bank[1] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr2;
-
- /*
- * Get total flash size (in KiB) and configure number of banks
- * present and sector count per bank.
- */
- size = readw(&STM32_DES->flash_size);
- if (size <= STM32_MAX_BANK) {
- banks = 1;
- flash_info[0].sector_count = size >> 1;
- } else if (size > STM32_MAX_BANK) {
- banks = 2;
- flash_info[0].sector_count = STM32_MAX_BANK >> 1;
- flash_info[1].sector_count = (size - STM32_MAX_BANK) >> 1;
- }
-
- /* Configure start/size for all sectors */
- for (i = 0; i < banks; i++) {
- flash_info[i].flash_id = FLASH_STM32F1;
- flash_info[i].start[0] = CONFIG_SYS_FLASH_BASE + (i << 19);
- flash_info[i].size = 2048;
- for (j = 1; (j < flash_info[i].sector_count); j++) {
- flash_info[i].start[j] = flash_info[i].start[j - 1]
- + 2048;
- flash_info[i].size += 2048;
- }
- }
-
- return size << 10;
-}
-
-void flash_print_info(flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf("Missing or unknown FLASH type\n");
- return;
- } else if (info->flash_id == FLASH_STM32F1) {
- printf("STM32F1 Embedded Flash\n");
- }
-
- printf(" Size: %ld MB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf("\n ");
- printf(" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf("\n");
- return;
-}
-
-int flash_erase(flash_info_t *info, int first, int last)
-{
- u8 bank = 0xff;
- int i;
-
- for (i = 0; i < STM32_NUM_BANKS; i++) {
- if (info == &flash_info[i]) {
- bank = i;
- break;
- }
- }
- if (bank == 0xff)
- return -1;
-
- stm32f1_flash_lock(bank, 0);
-
- for (i = first; i <= last; i++) {
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
-
- writel(info->start[i], &flash_bank[bank]->ar);
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_STRT);
-
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
- }
-
- clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
-
- stm32f1_flash_lock(bank, 1);
-
- return 0;
-}
-
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong i;
- u8 bank = 0xff;
-
- if (addr & 1) {
- printf("Flash address must be half word aligned\n");
- return -1;
- }
-
- if (cnt & 1) {
- printf("Flash length must be half word aligned\n");
- return -1;
- }
-
- for (i = 0; i < 2; i++) {
- if (info == &flash_info[i]) {
- bank = i;
- break;
- }
- }
-
- if (bank == 0xff)
- return -1;
-
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
-
- stm32f1_flash_lock(bank, 0);
-
- setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
-
- /* STM32F1 requires half word writes */
- for (i = 0; i < cnt >> 1; i++) {
- *(u16 *)(addr + i * 2) = ((u16 *)src)[i];
- while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
- ;
- }
-
- clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
-
- stm32f1_flash_lock(bank, 1);
-
- return 0;
-}
diff --git a/arch/arm/mach-stm32/stm32f1/soc.c b/arch/arm/mach-stm32/stm32f1/soc.c
deleted file mode 100644
index 4438621..0000000
--- a/arch/arm/mach-stm32/stm32f1/soc.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m.h>
-#include <asm/arch/stm32.h>
-
-u32 get_cpu_rev(void)
-{
- return 0;
-}
-
-int arch_cpu_init(void)
-{
- configure_clocks();
-
- /*
- * Configure the memory protection unit (MPU) to allow full access to
- * the whole 4GB address space.
- */
- writel(0, &V7M_MPU->rnr);
- writel(0, &V7M_MPU->rbar);
- writel((V7M_MPU_RASR_AP_RW_RW | V7M_MPU_RASR_SIZE_4GB
- | V7M_MPU_RASR_EN), &V7M_MPU->rasr);
- writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl);
-
- return 0;
-}
diff --git a/arch/arm/mach-stm32/stm32f1/timer.c b/arch/arm/mach-stm32/stm32f1/timer.c
deleted file mode 100644
index 6a26198..0000000
--- a/arch/arm/mach-stm32/stm32f1/timer.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/armv7m.h>
-#include <asm/arch/stm32.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define STM32_TIM2_BASE (STM32_APB1PERIPH_BASE + 0x0000)
-
-#define RCC_APB1ENR_TIM2EN (1 << 0)
-
-struct stm32_tim2_5 {
- u32 cr1;
- u32 cr2;
- u32 smcr;
- u32 dier;
- u32 sr;
- u32 egr;
- u32 ccmr1;
- u32 ccmr2;
- u32 ccer;
- u32 cnt;
- u32 psc;
- u32 arr;
- u32 reserved1;
- u32 ccr1;
- u32 ccr2;
- u32 ccr3;
- u32 ccr4;
- u32 reserved2;
- u32 dcr;
- u32 dmar;
- u32 or;
-};
-
-#define TIM_CR1_CEN (1 << 0)
-
-#define TIM_EGR_UG (1 << 0)
-
-int timer_init(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
-
- if (clock_get(CLOCK_AHB) == clock_get(CLOCK_APB1))
- writel((clock_get(CLOCK_APB1) / CONFIG_SYS_HZ_CLOCK) - 1,
- &tim->psc);
- else
- writel(((clock_get(CLOCK_APB1) * 2) / CONFIG_SYS_HZ_CLOCK) - 1,
- &tim->psc);
-
- writel(0xFFFFFFFF, &tim->arr);
- writel(TIM_CR1_CEN, &tim->cr1);
- setbits_le32(&tim->egr, TIM_EGR_UG);
-
- gd->arch.tbl = 0;
- gd->arch.tbu = 0;
- gd->arch.lastinc = 0;
-
- return 0;
-}
-
-ulong get_timer(ulong base)
-{
- return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
-}
-
-unsigned long long get_ticks(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
- u32 now;
-
- now = readl(&tim->cnt);
-
- if (now >= gd->arch.lastinc)
- gd->arch.tbl += (now - gd->arch.lastinc);
- else
- gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
-
- gd->arch.lastinc = now;
-
- return gd->arch.tbl;
-}
-
-void reset_timer(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- gd->arch.lastinc = readl(&tim->cnt);
- gd->arch.tbl = 0;
-}
-
-/* delay x useconds */
-void __udelay(ulong usec)
-{
- unsigned long long start;
-
- start = get_ticks(); /* get current timestamp */
- while ((get_ticks() - start) < usec)
- ; /* loop till time has passed */
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ_CLOCK;
-}
diff --git a/arch/arm/mach-stm32/stm32f4/soc.c b/arch/arm/mach-stm32/stm32f4/soc.c
index 3f45a25..9eb655a 100644
--- a/arch/arm/mach-stm32/stm32f4/soc.c
+++ b/arch/arm/mach-stm32/stm32f4/soc.c
@@ -21,13 +21,15 @@
{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
STRONG_ORDER, REGION_4GB },
};
+ int i;
+
configure_clocks();
/*
* Configure the memory protection unit (MPU) to allow full access to
* the whole 4GB address space.
*/
disable_mpu();
- for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+ for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
mpu_config(&stm32_region_config[i]);
enable_mpu();
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 94412ba..2cd7bae 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1,5 +1,8 @@
if ARCH_SUNXI
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
+
config IDENT_STRING
default " Allwinner Technology"
@@ -59,7 +62,6 @@
select SUNXI_DRAM_DW_32BIT
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
- imply ENV_IS_IN_MMC
choice
prompt "Sunxi SoC Variant"
@@ -71,7 +73,6 @@
select ARM_CORTEX_CPU_IS_UP
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
- imply ENV_IS_IN_MMC
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
@@ -89,7 +90,6 @@
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
@@ -100,7 +100,6 @@
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_A23
bool "sun8i (Allwinner A23)"
@@ -111,7 +110,6 @@
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_A33
bool "sun8i (Allwinner A33)"
@@ -137,7 +135,6 @@
select ARCH_SUPPORT_PSCI
select MACH_SUNXI_H3_H5
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
- imply ENV_IS_IN_MMC
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4838758..51e5090 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -60,7 +60,6 @@
bool "Tegra 64-bit common options"
select ARM64
select TEGRA_COMMON
- imply ENV_IS_IN_MMC
choice
prompt "Tegra SoC select"
@@ -78,7 +77,6 @@
select ARM_ERRATA_743622
select ARM_ERRATA_751472
select TEGRA_ARMV7_COMMON
- imply ENV_IS_IN_MMC
config TEGRA114
bool "Tegra114 family"
@@ -87,7 +85,8 @@
config TEGRA124
bool "Tegra124 family"
select TEGRA_ARMV7_COMMON
- imply ENV_IS_IN_MMC
+ imply REGMAP
+ imply SYSCON
config TEGRA210
bool "Tegra210 family"
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 6b5fa7d..0426b7a 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -29,7 +29,6 @@
#ifdef CONFIG_TEGRA_CLOCK_SCALING
#include <asm/arch/emc.h>
#endif
-#include <power/as3722.h>
#include "emc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -142,11 +141,6 @@
debug("Memory controller init failed: %d\n", err);
# endif
# endif /* CONFIG_TEGRA_PMU */
-#ifdef CONFIG_PMIC_AS3722
- err = as3722_init(NULL);
- if (err && err != -ENODEV)
- return err;
-#endif
#endif /* CONFIG_SYS_I2C_TEGRA */
#ifdef CONFIG_USB_EHCI_TEGRA
@@ -166,7 +160,7 @@
pin_mux_nand();
#endif
- tegra_xusb_padctl_init(gd->fdt_blob);
+ tegra_xusb_padctl_init();
#ifdef CONFIG_TEGRA_LP0
/* save Sdram params to PMC 2, 4, and 24 for WB0 */
@@ -220,9 +214,9 @@
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
if (tegra_cpu_is_non_secure()) {
printf("CPU is in NS mode\n");
- setenv("cpu_ns_mode", "1");
+ env_set("cpu_ns_mode", "1");
} else {
- setenv("cpu_ns_mode", "");
+ env_set("cpu_ns_mode", "");
}
#endif
start_cpu_fan();
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 668bbd2..dc58b30 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -655,14 +655,13 @@
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
-int clock_decode_periph_id(const void *blob, int node)
+int clock_decode_periph_id(struct udevice *dev)
{
enum periph_id id;
u32 cell[2];
int err;
- err = fdtdec_get_int_array(blob, node, "clocks", cell,
- ARRAY_SIZE(cell));
+ err = dev_read_u32_array(dev, "clocks", cell, ARRAY_SIZE(cell));
if (err)
return -1;
id = clk_id_to_periph_id(cell[1]);
diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c
index 41c88cb..189b3da 100644
--- a/arch/arm/mach-tegra/spl.c
+++ b/arch/arm/mach-tegra/spl.c
@@ -7,6 +7,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <debug_uart.h>
#include <spl.h>
#include <asm/io.h>
@@ -32,6 +33,9 @@
gpio_early_init_uart();
clock_early_init();
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
preloader_console_init();
}
diff --git a/arch/arm/mach-tegra/tegra124/Makefile b/arch/arm/mach-tegra/tegra124/Makefile
index c00de61..d275daf 100644
--- a/arch/arm/mach-tegra/tegra124/Makefile
+++ b/arch/arm/mach-tegra/tegra124/Makefile
@@ -10,6 +10,7 @@
obj-y += clock.o
obj-y += funcmux.o
obj-y += pinmux.o
+obj-y += pmc.o
obj-y += xusb-padctl.o
obj-y += ../xusb-padctl-common.o
diff --git a/arch/arm/mach-tegra/tegra124/pmc.c b/arch/arm/mach-tegra/tegra124/pmc.c
new file mode 100644
index 0000000..be82acf
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra124/pmc.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+
+static const struct udevice_id tegra124_syscon_ids[] = {
+ { .compatible = "nvidia,tegra124-pmc", .data = TEGRA_SYSCON_PMC },
+};
+
+U_BOOT_DRIVER(syscon_tegra124) = {
+ .name = "tegra124_syscon",
+ .id = UCLASS_SYSCON,
+ .of_match = tegra124_syscon_ids,
+};
diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
index 76af924..d326a6a 100644
--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
@@ -8,6 +8,8 @@
#include <common.h>
#include <errno.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
#include "../xusb-padctl-common.h"
@@ -317,13 +319,33 @@
.num_phys = ARRAY_SIZE(tegra124_phys),
};
-void tegra_xusb_padctl_init(const void *fdt)
+void tegra_xusb_padctl_init(void)
{
- int count, nodes[1];
+ ofnode nodes[1];
+ int count = 0;
+ int ret;
- count = fdtdec_find_aliases_for_id(fdt, "padctl",
- COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
- nodes, ARRAY_SIZE(nodes));
- if (tegra_xusb_process_nodes(fdt, nodes, count, &tegra124_socdata))
- return;
+ debug("%s: start\n", __func__);
+ if (of_live_active()) {
+ struct device_node *np = of_find_compatible_node(NULL, NULL,
+ "nvidia,tegra124-xusb-padctl");
+
+ debug("np=%p\n", np);
+ if (np) {
+ nodes[0] = np_to_ofnode(np);
+ count = 1;
+ }
+ } else {
+ int node_offsets[1];
+ int i;
+
+ count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",
+ COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
+ node_offsets, ARRAY_SIZE(node_offsets));
+ for (i = 0; i < count; i++)
+ nodes[i] = offset_to_ofnode(node_offsets[i]);
+ }
+
+ ret = tegra_xusb_process_nodes(nodes, count, &tegra124_socdata);
+ debug("%s: done, ret=%d\n", __func__, ret);
}
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/tegra186/nvtboot_board.c
index feb935f..b94eb42 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_board.c
@@ -15,7 +15,7 @@
{
int ret;
- ret = setenv_hex("fdt_addr", nvtboot_boot_x0);
+ ret = env_set_hex("fdt_addr", nvtboot_boot_x0);
if (ret) {
printf("Failed to set fdt_addr to point at DTB: %d\n", ret);
return ret;
@@ -35,7 +35,7 @@
const u32 *prop;
/* Already a valid address in the environment? If so, keep it */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return 0;
node = fdt_path_offset(nvtboot_blob, "/chosen");
@@ -49,7 +49,7 @@
return -ENOENT;
}
- ret = setenv("ethaddr", (void *)prop);
+ ret = env_set("ethaddr", (void *)prop);
if (ret) {
printf("Failed to set ethaddr from nvtboot DTB: %d\n", ret);
return ret;
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index 9ec93e7..bf85e07 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -8,6 +8,8 @@
#include <common.h>
#include <errno.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
#include "../xusb-padctl-common.h"
@@ -15,6 +17,8 @@
#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
+DECLARE_GLOBAL_DATA_PTR;
+
enum tegra210_function {
TEGRA210_FUNC_SNPS,
TEGRA210_FUNC_XUSB,
@@ -421,17 +425,33 @@
.num_phys = ARRAY_SIZE(tegra210_phys),
};
-void tegra_xusb_padctl_init(const void *fdt)
+void tegra_xusb_padctl_init(void)
{
- int count, nodes[1];
+ ofnode nodes[1];
+ int count = 0;
+ int ret;
- debug("> %s(fdt=%p)\n", __func__, fdt);
+ debug("%s: start\n", __func__);
+ if (of_live_active()) {
+ struct device_node *np = of_find_compatible_node(NULL, NULL,
+ "nvidia,tegra210-xusb-padctl");
- count = fdtdec_find_aliases_for_id(fdt, "padctl",
- COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
- nodes, ARRAY_SIZE(nodes));
- if (tegra_xusb_process_nodes(fdt, nodes, count, &tegra210_socdata))
- return;
+ debug("np=%p\n", np);
+ if (np) {
+ nodes[0] = np_to_ofnode(np);
+ count = 1;
+ }
+ } else {
+ int node_offsets[1];
+ int i;
- debug("< %s()\n", __func__);
+ count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",
+ COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
+ node_offsets, ARRAY_SIZE(node_offsets));
+ for (i = 0; i < count; i++)
+ nodes[i] = offset_to_ofnode(node_offsets[i]);
+ }
+
+ ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata);
+ debug("%s: done, ret=%d\n", __func__, ret);
}
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index 43f5bb7..37b5b8f 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -75,14 +75,14 @@
static int
tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
struct tegra_xusb_padctl_group *group,
- const void *fdt, int node)
+ ofnode node)
{
unsigned int i;
- int len;
+ int len, ret;
- group->name = fdt_get_name(fdt, node, &len);
+ group->name = ofnode_get_name(node);
- len = fdt_stringlist_count(fdt, node, "nvidia,lanes");
+ len = ofnode_read_string_count(node, "nvidia,lanes");
if (len < 0) {
error("failed to parse \"nvidia,lanes\" property");
return -EINVAL;
@@ -91,9 +91,9 @@
group->num_pins = len;
for (i = 0; i < group->num_pins; i++) {
- group->pins[i] = fdt_stringlist_get(fdt, node, "nvidia,lanes",
- i, NULL);
- if (!group->pins[i]) {
+ ret = ofnode_read_string_index(node, "nvidia,lanes", i,
+ &group->pins[i]);
+ if (ret) {
error("failed to read string from \"nvidia,lanes\" property");
return -EINVAL;
}
@@ -101,13 +101,14 @@
group->num_pins = len;
- group->func = fdt_stringlist_get(fdt, node, "nvidia,function", 0, NULL);
- if (!group->func) {
+ ret = ofnode_read_string_index(node, "nvidia,function", 0,
+ &group->func);
+ if (ret) {
error("failed to parse \"nvidia,func\" property");
return -EINVAL;
}
- group->iddq = fdtdec_get_int(fdt, node, "nvidia,iddq", -1);
+ group->iddq = ofnode_read_u32_default(node, "nvidia,iddq", -1);
return 0;
}
@@ -217,20 +218,21 @@
static int
tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
struct tegra_xusb_padctl_config *config,
- const void *fdt, int node)
+ ofnode node)
{
- int subnode;
+ ofnode subnode;
- config->name = fdt_get_name(fdt, node, NULL);
+ config->name = ofnode_get_name(node);
- fdt_for_each_subnode(subnode, fdt, node) {
+ for (subnode = ofnode_first_subnode(node);
+ ofnode_valid(subnode);
+ subnode = ofnode_next_subnode(subnode)) {
struct tegra_xusb_padctl_group *group;
int err;
group = &config->groups[config->num_groups];
- err = tegra_xusb_padctl_group_parse_dt(padctl, group, fdt,
- subnode);
+ err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode);
if (err < 0) {
error("failed to parse group %s", group->name);
return err;
@@ -243,20 +245,24 @@
}
static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
- const void *fdt, int node)
+ ofnode node)
{
- int subnode, err;
+ ofnode subnode;
+ int err;
- err = fdt_get_resource(fdt, node, "reg", 0, &padctl->regs);
+ err = ofnode_read_resource(node, 0, &padctl->regs);
if (err < 0) {
error("registers not found");
return err;
}
- fdt_for_each_subnode(subnode, fdt, node) {
+ for (subnode = ofnode_first_subnode(node);
+ ofnode_valid(subnode);
+ subnode = ofnode_next_subnode(subnode)) {
struct tegra_xusb_padctl_config *config = &padctl->config;
- err = tegra_xusb_padctl_config_parse_dt(padctl, config, fdt,
+ debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode));
+ err = tegra_xusb_padctl_config_parse_dt(padctl, config,
subnode);
if (err < 0) {
error("failed to parse entry %s: %d",
@@ -264,25 +270,28 @@
continue;
}
}
+ debug("%s: done\n", __func__);
return 0;
}
struct tegra_xusb_padctl padctl;
-int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
- const struct tegra_xusb_padctl_soc *socdata)
+int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
+ const struct tegra_xusb_padctl_soc *socdata)
{
unsigned int i;
int err;
+ debug("%s: count=%d\n", __func__, count);
for (i = 0; i < count; i++) {
- if (!fdtdec_get_is_enabled(fdt, nodes[i]))
+ debug("%s: i=%d, node=%p\n", __func__, i, nodes[i].np);
+ if (!ofnode_is_available(nodes[i]))
continue;
padctl.socdata = socdata;
- err = tegra_xusb_padctl_parse_dt(&padctl, fdt, nodes[i]);
+ err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]);
if (err < 0) {
error("failed to parse DT: %d", err);
continue;
@@ -300,6 +309,7 @@
/* only a single instance is supported */
break;
}
+ debug("%s: done\n", __func__);
return 0;
}
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.h b/arch/arm/mach-tegra/xusb-padctl-common.h
index f44790a..6836588 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.h
+++ b/arch/arm/mach-tegra/xusb-padctl-common.h
@@ -9,9 +9,11 @@
#include <common.h>
#include <fdtdec.h>
+#include <dm/ofnode.h>
#include <asm/io.h>
#include <asm/arch-tegra/xusb-padctl.h>
+#include <linux/ioport.h>
struct tegra_xusb_padctl_lane {
const char *name;
@@ -77,7 +79,7 @@
struct tegra_xusb_padctl {
const struct tegra_xusb_padctl_soc *socdata;
struct tegra_xusb_padctl_config config;
- struct fdt_resource regs;
+ struct resource regs;
unsigned int enable;
};
@@ -95,7 +97,7 @@
writel(value, padctl->regs.start + offset);
}
-int tegra_xusb_process_nodes(const void *fdt, int nodes[], unsigned int count,
- const struct tegra_xusb_padctl_soc *socdata);
+int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
+ const struct tegra_xusb_padctl_soc *socdata);
#endif
diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c
index 65f8d2e..856d712 100644
--- a/arch/arm/mach-tegra/xusb-padctl-dummy.c
+++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c
@@ -34,6 +34,6 @@
return -ENOSYS;
}
-void __weak tegra_xusb_padctl_init(const void *fdt)
+void __weak tegra_xusb_padctl_init(void)
{
}
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 1aed55a..3147db7 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -9,6 +9,7 @@
select CPU_V7_HAS_NONSEC
select ARMV7_NONSEC
select ARCH_SUPPORT_PSCI
+ imply NAND
choice
prompt "UniPhier SoC select"
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 4bfa10b..b9a2cbe 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -37,7 +37,7 @@
char dtb_name[256];
int buf_len = sizeof(dtb_name);
- if (getenv("fdt_file"))
+ if (env_get("fdt_file"))
return 0; /* do nothing if it is already set */
compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL);
@@ -55,7 +55,7 @@
strncat(dtb_name, ".dtb", buf_len);
- return setenv("fdt_file", dtb_name);
+ return env_set("fdt_file", dtb_name);
}
int board_late_init(void)
@@ -65,20 +65,20 @@
switch (uniphier_boot_device_raw()) {
case BOOT_DEVICE_MMC1:
printf("eMMC Boot");
- setenv("bootmode", "emmcboot");
+ env_set("bootmode", "emmcboot");
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot");
- setenv("bootmode", "nandboot");
+ env_set("bootmode", "nandboot");
nand_denali_wp_disable();
break;
case BOOT_DEVICE_NOR:
printf("NOR Boot");
- setenv("bootmode", "norboot");
+ env_set("bootmode", "norboot");
break;
case BOOT_DEVICE_USB:
printf("USB Boot");
- setenv("bootmode", "usbboot");
+ env_set("bootmode", "usbboot");
break;
default:
printf("Unknown");
diff --git a/arch/arm/mach-uniphier/mmc-first-dev.c b/arch/arm/mach-uniphier/mmc-first-dev.c
index 8c45229..acc859a 100644
--- a/arch/arm/mach-uniphier/mmc-first-dev.c
+++ b/arch/arm/mach-uniphier/mmc-first-dev.c
@@ -35,7 +35,7 @@
if (dev < 0)
return CMD_RET_FAILURE;
- setenv_ulong("mmc_first_dev", dev);
+ env_set_ulong("mmc_first_dev", dev);
return CMD_RET_SUCCESS;
}
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index c428ce5..b9cd45b 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -1,5 +1,8 @@
if ARCH_ZYNQ
+config SPL_LDSCRIPT
+ default "arch/arm/mach-zynq/u-boot-spl.lds"
+
config SPL_FAT_SUPPORT
default y
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds
index 4dc9bb0..86559cb 100644
--- a/arch/arm/mach-zynq/u-boot.lds
+++ b/arch/arm/mach-zynq/u-boot.lds
@@ -42,6 +42,35 @@
. = ALIGN(4);
+ .__efi_runtime_start : {
+ *(.__efi_runtime_start)
+ }
+
+ .efi_runtime : {
+ *(efi_runtime_text)
+ *(efi_runtime_data)
+ }
+
+ .__efi_runtime_stop : {
+ *(.__efi_runtime_stop)
+ }
+
+ .efi_runtime_rel_start :
+ {
+ *(.__efi_runtime_rel_start)
+ }
+
+ .efi_runtime_rel : {
+ *(.relefi_runtime_text)
+ *(.relefi_runtime_data)
+ }
+
+ .efi_runtime_rel_stop :
+ {
+ *(.__efi_runtime_rel_stop)
+ }
+
+ . = ALIGN(4);
.image_copy_end :
{
*(.__image_copy_end)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 88e7d6a..26509b7 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -10,7 +10,6 @@
config MCF52x2
bool
- imply ENV_IS_IN_FLASH
config MCF523x
bool
@@ -23,7 +22,6 @@
config MCF532x
bool
- imply ENV_IS_IN_FLASH
config MCF537x
bool
@@ -39,7 +37,6 @@
config MCF547x_8x
bool
- imply ENV_IS_IN_FLASH
# processor type
config M5208
@@ -73,7 +70,6 @@
config M5282
bool
select MCF52x2
- imply ENV_IS_IN_FLASH
config M5307
bool
@@ -111,12 +107,10 @@
config M547x
bool
select MCF547x_8x
- imply ENV_IS_IN_FLASH
config M548x
bool
select MCF547x_8x
- imply ENV_IS_IN_FLASH
choice
prompt "Target select"
@@ -197,12 +191,10 @@
config TARGET_M5475EVB
bool "Support M5475EVB"
select M547x
- imply ENV_IS_IN_FLASH
config TARGET_M5485EVB
bool "Support M5485EVB"
select M548x
- imply ENV_IS_IN_FLASH
config TARGET_AMCORE
bool "Support AMCORE"
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index fa9c493..c976904 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -113,7 +113,8 @@
{
char *s;
- if ((s = getenv("clocks_in_mhz")) != NULL) {
+ s = env_get("clocks_in_mhz");
+ if (s) {
/* convert all clock information to MHz */
kbd->bi_intfreq /= 1000000L;
kbd->bi_busfreq /= 1000000L;
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 20fa25b..f791c00 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -21,4 +21,7 @@
source "board/xilinx/microblaze-generic/Kconfig"
+config SPL_LDSCRIPT
+ default "arch/microblaze/cpu/u-boot-spl.lds"
+
endmenu
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 79dc0cf..baf4f51 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -31,8 +31,8 @@
mts rshr, r1
addi r1, r1, -4 /* Decrement SP to top of memory */
#else
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
- addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+ addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
#else
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
#endif
@@ -162,14 +162,14 @@
#ifndef CONFIG_SPL_BUILD
or r5, r0, r0 /* flags - empty */
addi r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
swi r6, r31, GD_MALLOC_BASE
#endif
brai board_init_f
#else
addi r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
addi r6, r0, CONFIG_SPL_STACK_ADDR
swi r6, r31, GD_MALLOC_BASE
#endif
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 2732203..0a286e8 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -27,7 +27,7 @@
{
/* First parameter is mapped to $r5 for kernel boot args */
void (*thekernel) (char *, ulong, ulong);
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
ulong rd_data_start, rd_data_end;
/*
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b53206b..d07b92d 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -21,7 +21,6 @@
select SUPPORTS_CPU_MIPS64_R1
select SUPPORTS_CPU_MIPS64_R2
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_MALTA
bool "Support malta"
@@ -43,7 +42,6 @@
select SWAP_IO_SPACE
select MIPS_L1_CACHE_SHIFT_6
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_VCT
bool "Support vct"
@@ -85,7 +83,6 @@
select CPU
select RAM
select SYSRESET
- imply ENV_IS_NOWHERE
config MACH_PIC32
bool "Support Microchip PIC32"
@@ -110,7 +107,6 @@
select SUPPORTS_CPU_MIPS64_R2
select SUPPORTS_CPU_MIPS64_R6
select ROM_EXCEPTION_VECTORS
- imply ENV_IS_IN_FLASH
config TARGET_XILFPGA
bool "Support Imagination Xilfpga"
@@ -200,7 +196,6 @@
bool "MIPS64 Release 2"
depends on SUPPORTS_CPU_MIPS64_R2
select 64BIT
- imply ENV_IS_IN_FLASH
help
Choose this option to build a kernel for release 2 through 5 of the
MIPS64 architecture.
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index 952c57a..42af9de 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -60,8 +60,8 @@
sp, sp, GD_SIZE # reserve space for gd
and sp, sp, t0 # force 16 byte alignment
move k0, sp # save gd pointer
-#ifdef CONFIG_SYS_MALLOC_F_LEN
- li t2, CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+ li t2, CONFIG_VAL(SYS_MALLOC_F_LEN)
PTR_SUBU \
sp, sp, t2 # reserve space for early malloc
and sp, sp, t0 # force 16 byte alignment
@@ -75,7 +75,7 @@
blt t0, t1, 1b
PTR_ADDIU t0, PTRSIZE
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
#endif
.endm
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 2b67905..5a9a281 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -80,7 +80,7 @@
linux_cmdline_init();
- bootargs = getenv("bootargs");
+ bootargs = env_get("bootargs");
if (!bootargs)
return;
@@ -202,11 +202,11 @@
sprintf(env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
linux_env_set("flash_size", env_buf);
- cp = getenv("ethaddr");
+ cp = env_get("ethaddr");
if (cp)
linux_env_set("ethaddr", cp);
- cp = getenv("eth1addr");
+ cp = env_get("eth1addr");
if (cp)
linux_env_set("eth1addr", cp);
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index 21aadf2..e834329 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -50,7 +50,7 @@
void (*theKernel)(int zero, int arch, uint params);
#ifdef CONFIG_CMDLINE_TAG
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
#endif
/*
@@ -64,7 +64,7 @@
theKernel = (void (*)(int, int, uint))images->ep;
- s = getenv("machid");
+ s = env_get("machid");
if (s) {
machid = simple_strtoul(s, NULL, 16);
printf("Using machid 0x%x from environment\n", machid);
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index 4e5c269..00ade2c 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -12,7 +12,7 @@
int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
{
void (*kernel)(int, int, int, char *) = (void *)images->ep;
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
ulong initrd_start = images->rd_start;
ulong initrd_end = images->rd_end;
char *of_flat_tree = NULL;
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8094416..e4b3043 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -28,10 +28,11 @@
bool "MPC86xx"
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
- imply ENV_IS_IN_FLASH
+ imply CMD_REGINFO
config 8xx
bool "MPC8xx"
+ imply CMD_REGINFO
endchoice
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index b5b26f9..a377973 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -13,7 +13,6 @@
config TARGET_SBC8349
bool "Support sbc8349"
- imply ENV_IS_IN_FLASH
config TARGET_VE8313
bool "Support ve8313"
@@ -40,7 +39,6 @@
config TARGET_MPC832XEMDS
bool "Support MPC832XEMDS"
select BOARD_EARLY_INIT_F
- imply ENV_IS_IN_FLASH
config TARGET_MPC8349EMDS
bool "Support MPC8349EMDS"
@@ -52,7 +50,6 @@
config TARGET_MPC8349ITX
bool "Support MPC8349ITX"
imply CMD_IRQ
- imply ENV_IS_IN_FLASH
config TARGET_MPC837XEMDS
bool "Support MPC837XEMDS"
@@ -77,13 +74,11 @@
bool "Support suvd3"
imply CMD_CRAMFS
imply FS_CRAMFS
- imply ENV_IS_IN_FLASH
config TARGET_TUXX1
bool "Support tuxx1"
imply CMD_CRAMFS
imply FS_CRAMFS
- imply ENV_IS_IN_FLASH
config TARGET_TQM834X
bool "Support TQM834x"
@@ -95,7 +90,7 @@
config TARGET_STRIDER
bool "Support strider"
select SYS_FSL_ERRATUM_ESDHC111
- imply ENV_IS_IN_FLASH
+ imply CMD_PCA953X
endchoice
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index d99ae27..d2fced8a 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -264,14 +264,14 @@
cmplw r3, r4
bne 1b
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
-#if CONFIG_SYS_MALLOC_F_LEN + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
-#error "CONFIG_SYS_MALLOC_F_LEN too large to fit into initial RAM."
+#if CONFIG_VAL(SYS_MALLOC_F_LEN) + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
+#error "SYS_MALLOC_F_LEN too large to fit into initial RAM."
#endif
/* r3 = new stack pointer / pre-reloc malloc area */
- subi r3, r3, CONFIG_SYS_MALLOC_F_LEN
+ subi r3, r3, CONFIG_VAL(SYS_MALLOC_F_LEN)
/* Set pointer to pre-reloc malloc area in GD */
stw r3, GD_MALLOC_BASE(r4)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 0c74f1d..92187d3 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -19,7 +19,6 @@
config TARGET_SBC8548
bool "Support sbc8548"
select ARCH_MPC8548
- imply ENV_IS_IN_FLASH
config TARGET_SOCRATES
bool "Support socrates"
@@ -105,7 +104,6 @@
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
select ARCH_MPC8548
- imply ENV_IS_IN_FLASH
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
@@ -426,6 +424,8 @@
select SYS_PPC64
select FSL_IFC
imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_B4860
bool
@@ -452,6 +452,8 @@
select SYS_PPC64
select FSL_IFC
imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9131
bool
@@ -466,6 +468,8 @@
select SYS_FSL_SEC_COMPAT_4
select FSL_IFC
imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_BSC9132
bool
@@ -485,6 +489,9 @@
select FSL_IFC
imply CMD_EEPROM
imply CMD_MTDPARTS
+ imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_C29X
bool
@@ -498,6 +505,9 @@
select SYS_FSL_SEC_COMPAT_6
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
+ imply CMD_NAND
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_MPC8536
bool
@@ -511,7 +521,9 @@
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_MPC8540
bool
@@ -551,7 +563,7 @@
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
- imply ENV_IS_IN_FLASH
+ imply CMD_REGINFO
config ARCH_MPC8555
bool
@@ -584,6 +596,7 @@
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_2
select FSL_ELBC
+ imply CMD_NAND
config ARCH_MPC8572
bool
@@ -599,7 +612,7 @@
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
- imply ENV_IS_IN_FLASH
+ imply CMD_NAND
config ARCH_P1010
bool
@@ -623,7 +636,10 @@
select FSL_IFC
imply CMD_EEPROM
imply CMD_MTDPARTS
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1011
bool
@@ -652,7 +668,10 @@
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1021
bool
@@ -667,7 +686,10 @@
select SYS_FSL_SEC_COMPAT_2
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
+ imply CMD_REGINFO
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P1022
bool
@@ -711,7 +733,10 @@
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
imply CMD_EEPROM
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_PCI
+ imply CMD_REGINFO
config ARCH_P1025
bool
@@ -727,6 +752,7 @@
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P2020
bool
@@ -743,6 +769,8 @@
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_ELBC
imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_P2041
bool
@@ -765,6 +793,7 @@
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
+ imply CMD_NAND
config ARCH_P3041
bool
@@ -789,7 +818,9 @@
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P4080
bool
@@ -826,6 +857,7 @@
select SYS_FSL_SEC_COMPAT_4
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P5020
bool
@@ -848,6 +880,7 @@
select SYS_PPC64
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_P5040
bool
@@ -870,6 +903,7 @@
select SYS_PPC64
select FSL_ELBC
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_QEMU_E500
bool
@@ -891,6 +925,8 @@
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
imply CMD_EEPROM
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T1024
bool
@@ -909,7 +945,9 @@
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
imply CMD_EEPROM
+ imply CMD_NAND
imply CMD_MTDPARTS
+ imply CMD_REGINFO
config ARCH_T1040
bool
@@ -929,7 +967,9 @@
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
imply CMD_MTDPARTS
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_T1042
bool
@@ -949,7 +989,9 @@
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
imply CMD_MTDPARTS
+ imply CMD_NAND
imply CMD_SATA
+ imply CMD_REGINFO
config ARCH_T2080
bool
@@ -973,6 +1015,8 @@
select SYS_PPC64
select FSL_IFC
imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T2081
bool
@@ -993,6 +1037,8 @@
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T4160
bool
@@ -1015,6 +1061,8 @@
select SYS_PPC64
select FSL_IFC
imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
config ARCH_T4240
bool
@@ -1040,6 +1088,8 @@
select SYS_PPC64
select FSL_IFC
imply CMD_SATA
+ imply CMD_NAND
+ imply CMD_REGINFO
config BOOKE
bool
@@ -1053,6 +1103,7 @@
config E500MC
bool
+ imply CMD_PCI
help
Enble PowerPC E500MC core
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index a3076d8..ea46e49 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -256,7 +256,7 @@
* is not setup properly yet. Search for tdm entry in
* hwconfig.
*/
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0) {
tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
/* If tdm is defined in hwconfig, set law for tdm workaround */
@@ -280,7 +280,7 @@
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
/* Extract hwconfig from environment */
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0) {
/*
* If "en_cpc" is not defined in hwconfig then by default all
@@ -754,7 +754,7 @@
char *buf = NULL;
int n, res;
- n = getenv_f("hwconfig", buffer, sizeof(buffer));
+ n = env_get_f("hwconfig", buffer, sizeof(buffer));
if (n > 0)
buf = buffer;
@@ -794,7 +794,7 @@
#endif
#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
- spin = getenv("spin_table_compat");
+ spin = env_get("spin_table_compat");
if (spin && (*spin == 'n'))
spin_table_compat = 0;
else
@@ -845,7 +845,7 @@
#ifdef CONFIG_SYS_SRIO
srio_init();
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
if (s) {
if (!strcmp(s, "SRIO1")) {
srio_boot_master(1);
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index a9ea947..297dc4a 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -92,7 +92,7 @@
* Extract hwconfig from environment.
* Search for tdm entry in hwconfig.
*/
- ret = getenv_f("hwconfig", buffer, sizeof(buffer));
+ ret = env_get_f("hwconfig", buffer, sizeof(buffer));
if (ret > 0)
tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
@@ -580,7 +580,7 @@
return;
/* Get MAC address for the l2switch from "l2switchaddr"*/
- if (!eth_getenv_enetaddr("l2switchaddr", l2swaddr)) {
+ if (!eth_env_get_enetaddr("l2switchaddr", l2swaddr)) {
printf("Warning: MAC address for l2switch not found\n");
memset(l2swaddr, 0, sizeof(l2swaddr));
}
@@ -770,8 +770,15 @@
/* First check the CCSR base address */
off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
- if (off > 0)
- addr = fdt_get_base_address(fdt, off);
+ if (off > 0) {
+ int size;
+ u32 naddr;
+ const fdt32_t *prop;
+
+ naddr = fdt_address_cells(fdt, off);
+ prop = fdt_getprop(fdt, off, "ranges", &size);
+ addr = fdt_translate_address(fdt, off, prop + naddr);
+ }
if (!addr) {
printf("Warning: could not determine base CCSR address in "
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 1bc0c64..79d6544 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -514,7 +514,7 @@
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#endif
if (serdes_prtcl_map & (1 << NONE))
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 0addf84..2ea9f5c 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -31,7 +31,7 @@
int hold_cores_in_reset(int verbose)
{
/* Default to no, overridden by 'y', 'yes', 'Y', 'Yes', or '1' */
- if (getenv_yesno("mp_holdoff") == 1) {
+ if (env_get_yesno("mp_holdoff") == 1) {
if (verbose) {
puts("Secondary cores are being held in reset.\n");
puts("See 'mp_holdoff' environment variable\n");
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index f03e1a0..0f016f0 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1183,14 +1183,13 @@
lis r3,(CONFIG_SYS_INIT_RAM_ADDR)@h
ori r3,r3,((CONFIG_SYS_INIT_SP_OFFSET-16)&~0xf)@l /* Align to 16 */
-#ifdef CONFIG_SYS_MALLOC_F_LEN
-
-#if CONFIG_SYS_MALLOC_F_LEN + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
-#error "CONFIG_SYS_MALLOC_F_LEN too large to fit into initial RAM."
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN) + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
+#error "SYS_MALLOC_F_LEN too large to fit into initial RAM."
#endif
/* Leave 16+ byte for back chain termination and NULL return address */
- subi r3,r3,((CONFIG_SYS_MALLOC_F_LEN+16+15)&~0xf)
+ subi r3,r3,((CONFIG_VAL(SYS_MALLOC_F_LEN)+16+15)&~0xf)
#endif
/* End of RAM */
@@ -1204,7 +1203,7 @@
cmplw r4,r3
bne 1b
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
lis r4,(CONFIG_SYS_INIT_RAM_ADDR)@h
ori r4,r4,(CONFIG_SYS_GBL_DATA_OFFSET)@l
diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index fe56efd..2cc180d 100644
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -40,7 +40,6 @@
select FSL_LAW
select SYS_FSL_HAS_DDR1
select SYS_FSL_HAS_DDR2
- imply ENV_IS_IN_FLASH
config FSL_LAW
bool
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index eaa23d2..6aec815 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -74,16 +74,11 @@
/* The TSEC driver uses the PHYLIB infrastructure */
#ifndef CONFIG_PHYLIB
#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_PHYLIB
-
#include <config_phylib_all_drivers.h>
#endif /* TSEC_ENET */
#endif /* !CONFIG_PHYLIB */
/* The FMAN driver uses the PHYLIB infrastructure */
-#if defined(CONFIG_FMAN_ENET)
-#define CONFIG_PHYLIB
-#endif
/* All PPC boards must swap IDE bytes */
#define CONFIG_IDE_SWAP_IO
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 0e20402..b9ae24d 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -86,7 +86,7 @@
debug (" Booting using OF flat tree...\n");
WATCHDOG_RESET ();
(*kernel) ((bd_t *)of_flat_tree, 0, 0, EPAPR_MAGIC,
- getenv_bootm_mapsize(), 0, 0);
+ env_get_bootm_mapsize(), 0, 0);
/* does not return */
} else
#endif
@@ -121,8 +121,8 @@
phys_size_t bootm_size;
ulong size, sp, bootmap_base;
- bootmap_base = getenv_bootm_low();
- bootm_size = getenv_bootm_size();
+ bootmap_base = env_get_bootm_low();
+ bootm_size = env_get_bootm_size();
#ifdef DEBUG
if (((u64)bootmap_base + bootm_size) >
@@ -275,7 +275,8 @@
{
char *s;
- if ((s = getenv ("clocks_in_mhz")) != NULL) {
+ s = env_get("clocks_in_mhz");
+ if (s) {
/* convert all clock information to MHz */
kbd->bi_intfreq /= 1000000L;
kbd->bi_busfreq /= 1000000L;
@@ -339,6 +340,6 @@
((void (*)(void *, ulong, ulong, ulong,
ulong, ulong, ulong))images->ep)(images->ft_addr,
- 0, 0, EPAPR_MAGIC, getenv_bootm_mapsize(), 0, 0);
+ 0, 0, EPAPR_MAGIC, env_get_bootm_mapsize(), 0, 0);
}
#endif
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index 7243bfc..22d6aab 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -413,17 +413,6 @@
return 0;
}
-void os_putc(int ch)
-{
- putchar(ch);
-}
-
-void os_puts(const char *str)
-{
- while (*str)
- os_putc(*str++);
-}
-
int os_write_ram_buf(const char *fname)
{
struct sandbox_state *state = state_get_current();
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index f605d4d..00742fd 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -310,7 +310,7 @@
memset(&data, '\0', sizeof(data));
gd = &data;
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
gd->malloc_base = CONFIG_MALLOC_F_ADDR;
#endif
setup_ram_buf(state);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 1d40fe6..d20761e 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -3,16 +3,13 @@
config CPU_SH2
bool
- imply ENV_IS_IN_FLASH
config CPU_SH2A
bool
select CPU_SH2
- imply ENV_IS_IN_FLASH
config CPU_SH3
bool
- imply ENV_IS_IN_FLASH
config CPU_SH4
bool
@@ -128,6 +125,8 @@
default "sh3" if CPU_SH3
default "sh4" if CPU_SH4
+source "arch/sh/lib/Kconfig"
+
source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig"
source "board/mpr2/Kconfig"
diff --git a/arch/sh/cpu/u-boot.lds b/arch/sh/cpu/u-boot.lds
index bbf9ff4..7fc91bc 100644
--- a/arch/sh/cpu/u-boot.lds
+++ b/arch/sh/cpu/u-boot.lds
@@ -33,9 +33,9 @@
KEEP(CONFIG_BOARDDIR/lowlevel_init.o (.text .spiboot1.text))
KEEP(*(.spiboot2.text))
. = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
+ env/embedded.o (.ppcenv)
. = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
+ env/embedded.o (.ppcenvr)
. = ALIGN(8192);
*(.text)
. = ALIGN(4);
diff --git a/arch/sh/lib/Kconfig b/arch/sh/lib/Kconfig
new file mode 100644
index 0000000..cec8d09
--- /dev/null
+++ b/arch/sh/lib/Kconfig
@@ -0,0 +1,6 @@
+config CMD_SH_ZIMAGEBOOT
+ bool "zimageboot - Boot a zImage on SH"
+ default y
+ help
+ This is special SH-specific command to boot a zImage (compressed
+ Linux image) on SH-architecture boards.
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index 8a0010b..09fbd5e 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -61,7 +61,7 @@
char *cmdline = (char *)param + COMMAND_LINE;
/* PAGE_SIZE */
unsigned long size = images->ep - (unsigned long)param;
- char *bootargs = getenv("bootargs");
+ char *bootargs = env_get("bootargs");
/*
* allow the PREP bootm subcommand, it is required for bootm to work
diff --git a/arch/sh/lib/zimageboot.c b/arch/sh/lib/zimageboot.c
index 3fea5f5..cd4abba 100644
--- a/arch/sh/lib/zimageboot.c
+++ b/arch/sh/lib/zimageboot.c
@@ -42,7 +42,7 @@
/* Linux kernel command line */
cmdline = (char *)param + COMMAND_LINE;
- bootargs = getenv("bootargs");
+ bootargs = env_get("bootargs");
/* Clear zero page */
/* cppcheck-suppress nullPointer */
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 0cd981e..c26710b 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -114,6 +114,7 @@
source "arch/x86/cpu/qemu/Kconfig"
source "arch/x86/cpu/quark/Kconfig"
source "arch/x86/cpu/queensbay/Kconfig"
+source "arch/x86/cpu/tangier/Kconfig"
# architecture-specific options below
@@ -541,6 +542,19 @@
address of 0xfff90000 indicates that the image will be put at offset
0x90000 from the beginning of a 1MB flash device.
+config ROM_TABLE_ADDR
+ hex
+ default 0xf0000
+ help
+ All x86 tables happen to like the address range from 0x0f0000
+ to 0x100000. We use 0xf0000 as the starting address to store
+ those tables, including PIRQ routing table, Multi-Processor
+ table and ACPI table.
+
+config ROM_TABLE_SIZE
+ hex
+ default 0x10000
+
menu "System tables"
depends on !EFI && !SYS_COREBOOT
diff --git a/arch/x86/config.mk b/arch/x86/config.mk
index 74b87ce..8835dcf 100644
--- a/arch/x86/config.mk
+++ b/arch/x86/config.mk
@@ -10,8 +10,7 @@
PLATFORM_CPPFLAGS += -fno-strict-aliasing
PLATFORM_CPPFLAGS += -fomit-frame-pointer
PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \
- $(call cc-option, -fno-unit-at-a-time)) \
- $(call cc-option, -mpreferred-stack-boundary=2)
+ $(call cc-option, -fno-unit-at-a-time))
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86)
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
@@ -27,7 +26,7 @@
ifeq ($(IS_32BIT),y)
PLATFORM_CPPFLAGS += -march=i386 -m32
else
-PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
+PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -m64
endif
PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index e1c84ce..999429e 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -34,6 +34,7 @@
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
+obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-y += lapic.o ioapic.o
obj-y += irq.o
ifndef CONFIG_$(SPL_)X86_64
diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig
index 4e7d4a4..75dbbc2 100644
--- a/arch/x86/cpu/baytrail/Kconfig
+++ b/arch/x86/cpu/baytrail/Kconfig
@@ -7,7 +7,23 @@
config INTEL_BAYTRAIL
bool
select HAVE_FSP if !EFI
- imply ENV_IS_IN_SPI_FLASH
+ select ARCH_MISC_INIT if !EFI
+ imply HAVE_INTEL_ME if !EFI
+ imply ENABLE_MRC_CACHE
+ imply AHCI_PCI
+ imply ICH_SPI
+ imply INTEL_ICH6_GPIO
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply SCSI
+ imply SPI_FLASH
+ imply SYS_NS16550
+ imply USB
+ imply USB_EHCI_HCD
+ imply USB_XHCI_HCD
+ imply VIDEO_VESA
if INTEL_BAYTRAIL
config INTERNAL_UART
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 55ed7de..cbefdf8 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -11,8 +11,6 @@
#include <asm/acpi_s3.h>
#include <asm/acpi_table.h>
#include <asm/io.h>
-#include <asm/ioapic.h>
-#include <asm/mpspec.h>
#include <asm/tables.h>
#include <asm/arch/global_nvs.h>
#include <asm/arch/iomap.h>
@@ -141,33 +139,6 @@
header->checksum = table_compute_checksum(fadt, header->length);
}
-static int acpi_create_madt_irq_overrides(u32 current)
-{
- struct acpi_madt_irqoverride *irqovr;
- u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
- int length = 0;
-
- irqovr = (void *)current;
- length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- irqovr = (void *)(current + length);
- length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
-
- return length;
-}
-
-u32 acpi_fill_madt(u32 current)
-{
- current += acpi_create_madt_lapics(current);
-
- current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
- io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
-
- current += acpi_create_madt_irq_overrides(current);
-
- return current;
-}
-
void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
{
struct udevice *dev;
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 87ba849..c58f6a8 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -11,18 +11,6 @@
#include <asm/mrccache.h>
#include <asm/post.h>
-static struct pci_device_id mmc_supported[] = {
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 },
- {},
-};
-
-int cpu_mmc_init(bd_t *bis)
-{
- return pci_mmc_init("ValleyView SDHCI", mmc_supported);
-}
-
#ifndef CONFIG_EFI_APP
int arch_cpu_init(void)
{
diff --git a/arch/x86/cpu/broadwell/Kconfig b/arch/x86/cpu/broadwell/Kconfig
index 1ce3848..bc2dba2 100644
--- a/arch/x86/cpu/broadwell/Kconfig
+++ b/arch/x86/cpu/broadwell/Kconfig
@@ -6,6 +6,17 @@
config INTEL_BROADWELL
bool
select CACHE_MRC_BIN
+ select ARCH_EARLY_INIT_R
+ imply HAVE_INTEL_ME
+ imply ENABLE_MRC_CACHE
+ imply AHCI_PCI
+ imply ICH_SPI
+ imply INTEL_BROADWELL_GPIO
+ imply SCSI
+ imply SPI_FLASH
+ imply USB
+ imply USB_EHCI_HCD
+ imply VIDEO_BROADWELL_IGD
if INTEL_BROADWELL
diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c
index 436c6c4..4fa4de3 100644
--- a/arch/x86/cpu/broadwell/refcode.c
+++ b/arch/x86/cpu/broadwell/refcode.c
@@ -56,7 +56,17 @@
uint32_t padding[4];
} __packed;
-int cpu_run_reference_code(void)
+/**
+ * cpu_run_reference_code() - Run the platform reference code
+ *
+ * Some platforms require a binary blob to be executed once SDRAM is
+ * available. This is used to set up various platform features, such as the
+ * platform controller hub (PCH). This function should be implemented by the
+ * CPU-specific code.
+ *
+ * @return 0 on success, -ve on failure
+ */
+static int cpu_run_reference_code(void)
{
struct pei_data _pei_data __aligned(8);
struct pei_data *pei_data = &_pei_data;
@@ -111,3 +121,8 @@
return 0;
}
+
+int arch_early_init_r(void)
+{
+ return cpu_run_reference_code();
+}
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 9820651..60eb45f 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -3,6 +3,19 @@
config SYS_COREBOOT
bool
default y
+ imply AHCI_PCI
+ imply E1000
+ imply ICH_SPI
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply SPI_FLASH
+ imply SYS_NS16550
+ imply USB
+ imply USB_EHCI_HCD
+ imply USB_XHCI_HCD
+ imply VIDEO_COREBOOT
imply CMD_CBFS
imply FS_CBFS
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 658b900..df5ad13 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -29,11 +29,6 @@
return x86_cpu_init_f();
}
-int board_early_init_f(void)
-{
- return 0;
-}
-
int checkcpu(void)
{
return 0;
@@ -90,8 +85,3 @@
{
return 0;
}
-
-int arch_misc_init(void)
-{
- return 0;
-}
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
index 741613f..d82147b 100644
--- a/arch/x86/cpu/efi/efi.c
+++ b/arch/x86/cpu/efi/efi.c
@@ -13,11 +13,6 @@
return 0;
}
-int board_early_init_f(void)
-{
- return 0;
-}
-
int checkcpu(void)
{
return 0;
@@ -36,8 +31,3 @@
{
return 0;
}
-
-int arch_misc_init(void)
-{
- return 0;
-}
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index e23d01a..c214ea0 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -8,6 +8,16 @@
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select CACHE_MRC_BIN if HAVE_MRC
+ imply HAVE_INTEL_ME
+ imply ENABLE_MRC_CACHE
+ imply AHCI_PCI
+ imply ICH_SPI
+ imply INTEL_ICH6_GPIO
+ imply SCSI
+ imply SPI_FLASH
+ imply USB
+ imply USB_EHCI_HCD
+ imply VIDEO_VESA
if NORTHBRIDGE_INTEL_IVYBRIDGE
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 462b7c0..7febb8c 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -236,7 +236,7 @@
bd82x6x_sata_enable(dev);
else {
bd82x6x_sata_init(dev, pch);
- ret = ahci_probe_scsi(dev);
+ ret = ahci_probe_scsi_pci(dev);
if (ret)
return ret;
}
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 643d804..1cdbe47 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -233,7 +233,6 @@
uint32_t tseg_base, uma_size, tolud;
uint64_t tom, me_base, touud;
uint64_t uma_memory_base = 0;
- uint64_t uma_memory_size;
unsigned long long tomk;
uint16_t ggc;
u32 val;
@@ -298,7 +297,6 @@
tolud += uma_size << 10;
/* UMA starts at old TOLUD */
uma_memory_base = tomk * 1024ULL;
- uma_memory_size = uma_size * 1024ULL;
debug("ME UMA base %llx size %uM\n", me_base, uma_size >> 10);
}
@@ -312,13 +310,11 @@
debug("%uM UMA", uma_size >> 10);
tomk -= uma_size;
uma_memory_base = tomk * 1024ULL;
- uma_memory_size += uma_size * 1024ULL;
/* GTT Graphics Stolen Memory Size (GGMS) */
uma_size = ((ggc >> 8) & 0x3) * 1024ULL;
tomk -= uma_size;
uma_memory_base = tomk * 1024ULL;
- uma_memory_size += uma_size * 1024ULL;
debug(" and %uM GTT\n", uma_size >> 10);
}
@@ -327,7 +323,6 @@
uma_size = (uma_memory_base - tseg_base) >> 10;
tomk -= uma_size;
uma_memory_base = tomk * 1024ULL;
- uma_memory_size += uma_size * 1024ULL;
debug("TSEG base 0x%08x size %uM\n", tseg_base, uma_size >> 10);
debug("Available memory below 4GB: %lluM\n", tomk >> 10);
diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig
index 6808c9a..da37812 100644
--- a/arch/x86/cpu/qemu/Kconfig
+++ b/arch/x86/cpu/qemu/Kconfig
@@ -6,6 +6,13 @@
config QEMU
bool
+ select ARCH_EARLY_INIT_R
+ imply AHCI_PCI
+ imply E1000
+ imply SYS_NS16550
+ imply USB
+ imply USB_EHCI_HCD
+ imply VIDEO_VESA
if QEMU
diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig
index 163caac..0ed7248 100644
--- a/arch/x86/cpu/quark/Kconfig
+++ b/arch/x86/cpu/quark/Kconfig
@@ -7,6 +7,20 @@
config INTEL_QUARK
bool
select HAVE_RMU
+ select ARCH_EARLY_INIT_R
+ select ARCH_MISC_INIT
+ imply ENABLE_MRC_CACHE
+ imply ETH_DESIGNWARE
+ imply ICH_SPI
+ imply INTEL_ICH6_GPIO
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply SPI_FLASH
+ imply SYS_NS16550
+ imply USB
+ imply USB_EHCI_HCD
if INTEL_QUARK
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 3968f7a..5717a62 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -6,8 +6,6 @@
#include <common.h>
#include <asm/acpi_table.h>
-#include <asm/ioapic.h>
-#include <asm/mpspec.h>
#include <asm/tables.h>
#include <asm/arch/global_nvs.h>
#include <asm/arch/iomap.h>
@@ -136,33 +134,6 @@
header->checksum = table_compute_checksum(fadt, header->length);
}
-static int acpi_create_madt_irq_overrides(u32 current)
-{
- struct acpi_madt_irqoverride *irqovr;
- u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
- int length = 0;
-
- irqovr = (void *)current;
- length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- irqovr = (void *)(current + length);
- length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
-
- return length;
-}
-
-u32 acpi_fill_madt(u32 current)
-{
- current += acpi_create_madt_lapics(current);
-
- current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
- io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
-
- current += acpi_create_madt_irq_overrides(current);
-
- return current;
-}
-
void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
{
/* quark is a uni-processor */
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 0c2cea4..c36a589 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -16,11 +16,6 @@
#include <asm/arch/msg_port.h>
#include <asm/arch/quark.h>
-static struct pci_device_id mmc_supported[] = {
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
- {},
-};
-
static void quark_setup_mtrr(void)
{
u32 base, mask;
@@ -328,11 +323,6 @@
return 0;
}
-int cpu_mmc_init(bd_t *bis)
-{
- return pci_mmc_init("Quark SDHCI", mmc_supported);
-}
-
int arch_misc_init(void)
{
#ifdef CONFIG_ENABLE_MRC_CACHE
diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
index 6136d75..835de85 100644
--- a/arch/x86/cpu/queensbay/Kconfig
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -8,6 +8,21 @@
bool
select HAVE_FSP
select HAVE_CMC
+ select ARCH_EARLY_INIT_R
+ imply AHCI_PCI
+ imply ICH_SPI
+ imply INTEL_ICH6_GPIO
+ imply MMC
+ imply MMC_PCI
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply PCH_GBE
+ imply SCSI
+ imply SPI_FLASH
+ imply SYS_NS16550
+ imply USB
+ imply USB_EHCI_HCD
+ imply VIDEO_VESA
if INTEL_QUEENSBAY
diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
index af3ffad..c068199 100644
--- a/arch/x86/cpu/queensbay/Makefile
+++ b/arch/x86/cpu/queensbay/Makefile
@@ -5,4 +5,4 @@
#
obj-y += fsp_configs.o irq.o
-obj-y += tnc.o topcliff.o
+obj-y += tnc.o
diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
deleted file mode 100644
index b76dd7d..0000000
--- a/arch/x86/cpu/queensbay/topcliff.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mmc.h>
-#include <pci_ids.h>
-
-static struct pci_device_id mmc_supported[] = {
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
- { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
- {},
-};
-
-int cpu_mmc_init(bd_t *bis)
-{
- return pci_mmc_init("Topcliff SDHCI", mmc_supported);
-}
diff --git a/arch/x86/cpu/tangier/Kconfig b/arch/x86/cpu/tangier/Kconfig
new file mode 100644
index 0000000..86a3340
--- /dev/null
+++ b/arch/x86/cpu/tangier/Kconfig
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config INTEL_TANGIER
+ bool
+ depends on INTEL_MID
+ imply INTEL_MID_SERIAL
+ imply MMC
+ imply MMC_SDHCI
+ imply MMC_SDHCI_SDMA
+ imply MMC_SDHCI_TANGIER
+ imply TANGIER_WATCHDOG
+ imply USB
+ imply USB_DWC3
+
+config SYS_CAR_ADDR
+ hex
+ default 0x19200000
+
+config SYS_CAR_SIZE
+ hex
+ default 0x4000
+ help
+ Space in bytes in eSRAM used as Cache-As-RAM (CAR).
+ Note this size must not exceed eSRAM's total size.
+
+config SYS_USB_OTG_BASE
+ hex
+ default 0xf9100000
diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile
new file mode 100644
index 0000000..d146b3f
--- /dev/null
+++ b/arch/x86/cpu/tangier/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += car.o tangier.o sdram.o
diff --git a/arch/x86/cpu/tangier/car.S b/arch/x86/cpu/tangier/car.S
new file mode 100644
index 0000000..6982106
--- /dev/null
+++ b/arch/x86/cpu/tangier/car.S
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010-2011
+ * Graeme Russ, <graeme.russ@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.section .text
+
+.globl car_init
+car_init:
+ jmp car_init_ret
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
new file mode 100644
index 0000000..5743077
--- /dev/null
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/e820.h>
+#include <asm/global_data.h>
+#include <asm/sfi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * SFI tables are part of the first stage bootloader.
+ *
+ * U-Boot finds the System Table by searching 16-byte boundaries between
+ * physical address 0x000E0000 and 0x000FFFFF. U-Boot shall search this region
+ * starting at the low address and shall stop searching when the 1st valid SFI
+ * System Table is found.
+ */
+#define SFI_BASE_ADDR 0x000E0000
+#define SFI_LENGTH 0x00020000
+#define SFI_TABLE_LENGTH 16
+
+static int sfi_table_check(struct sfi_table_header *sbh)
+{
+ char chksum = 0;
+ char *pos = (char *)sbh;
+ u32 i;
+
+ if (sbh->len < SFI_TABLE_LENGTH)
+ return -ENXIO;
+
+ if (sbh->len > SFI_LENGTH)
+ return -ENXIO;
+
+ for (i = 0; i < sbh->len; i++)
+ chksum += *pos++;
+
+ if (chksum)
+ error("sfi: Invalid checksum\n");
+
+ /* Checksum is OK if zero */
+ return chksum ? -EILSEQ : 0;
+}
+
+static int sfi_table_is_type(struct sfi_table_header *sbh, const char *signature)
+{
+ return !strncmp(sbh->sig, signature, SFI_SIGNATURE_SIZE) &&
+ !sfi_table_check(sbh);
+}
+
+static struct sfi_table_simple *sfi_get_table_by_sig(unsigned long addr,
+ const char *signature)
+{
+ struct sfi_table_simple *sb;
+ u32 i;
+
+ for (i = 0; i < SFI_LENGTH; i += SFI_TABLE_LENGTH) {
+ sb = (struct sfi_table_simple *)(addr + i);
+ if (sfi_table_is_type(&sb->header, signature))
+ return sb;
+ }
+
+ return NULL;
+}
+
+static struct sfi_table_simple *sfi_search_mmap(void)
+{
+ struct sfi_table_header *sbh;
+ struct sfi_table_simple *sb;
+ u32 sys_entry_cnt;
+ u32 i;
+
+ /* Find SYST table */
+ sb = sfi_get_table_by_sig(SFI_BASE_ADDR, SFI_SIG_SYST);
+ if (!sb) {
+ error("sfi: failed to locate SYST table\n");
+ return NULL;
+ }
+
+ sys_entry_cnt = (sb->header.len - sizeof(*sbh)) / 8;
+
+ /* Search through each SYST entry for MMAP table */
+ for (i = 0; i < sys_entry_cnt; i++) {
+ sbh = (struct sfi_table_header *)(unsigned long)sb->pentry[i];
+
+ if (sfi_table_is_type(sbh, SFI_SIG_MMAP))
+ return (struct sfi_table_simple *)sbh;
+ }
+
+ error("sfi: failed to locate SFI MMAP table\n");
+ return NULL;
+}
+
+#define sfi_for_each_mentry(i, sb, mentry) \
+ for (i = 0, mentry = (struct sfi_mem_entry *)sb->pentry; \
+ i < SFI_GET_NUM_ENTRIES(sb, struct sfi_mem_entry); \
+ i++, mentry++) \
+
+static unsigned sfi_setup_e820(unsigned max_entries, struct e820entry *entries)
+{
+ struct sfi_table_simple *sb;
+ struct sfi_mem_entry *mentry;
+ unsigned long long start, end, size;
+ int type, total = 0;
+ u32 i;
+
+ sb = sfi_search_mmap();
+ if (!sb)
+ return 0;
+
+ sfi_for_each_mentry(i, sb, mentry) {
+ start = mentry->phys_start;
+ size = mentry->pages << 12;
+ end = start + size;
+
+ if (start > end)
+ continue;
+
+ /* translate SFI mmap type to E820 map type */
+ switch (mentry->type) {
+ case SFI_MEM_CONV:
+ type = E820_RAM;
+ break;
+ case SFI_MEM_UNUSABLE:
+ case SFI_RUNTIME_SERVICE_DATA:
+ continue;
+ default:
+ type = E820_RESERVED;
+ }
+
+ if (total == E820MAX)
+ break;
+ entries[total].addr = start;
+ entries[total].size = size;
+ entries[total].type = type;
+
+ total++;
+ }
+
+ return total;
+}
+
+static int sfi_get_bank_size(void)
+{
+ struct sfi_table_simple *sb;
+ struct sfi_mem_entry *mentry;
+ int bank = 0;
+ u32 i;
+
+ sb = sfi_search_mmap();
+ if (!sb)
+ return 0;
+
+ sfi_for_each_mentry(i, sb, mentry) {
+ if (mentry->type != SFI_MEM_CONV)
+ continue;
+
+ gd->bd->bi_dram[bank].start = mentry->phys_start;
+ gd->bd->bi_dram[bank].size = mentry->pages << 12;
+ bank++;
+ }
+
+ return bank;
+}
+
+static phys_size_t sfi_get_ram_size(void)
+{
+ struct sfi_table_simple *sb;
+ struct sfi_mem_entry *mentry;
+ phys_size_t ram = 0;
+ u32 i;
+
+ sb = sfi_search_mmap();
+ if (!sb)
+ return 0;
+
+ sfi_for_each_mentry(i, sb, mentry) {
+ if (mentry->type != SFI_MEM_CONV)
+ continue;
+
+ ram += mentry->pages << 12;
+ }
+
+ debug("sfi: RAM size %llu\n", ram);
+ return ram;
+}
+
+unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+{
+ return sfi_setup_e820(max_entries, entries);
+}
+
+int dram_init_banksize(void)
+{
+ sfi_get_bank_size();
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = sfi_get_ram_size();
+ return 0;
+}
diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c
new file mode 100644
index 0000000..20d6c60
--- /dev/null
+++ b/arch/x86/cpu/tangier/tangier.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/scu.h>
+#include <asm/u-boot-x86.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+int arch_cpu_init(void)
+{
+ return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+ scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
+}
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 3f534ad..6589495 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -10,6 +10,7 @@
cougarcanyon2.dtb \
crownbay.dtb \
dfi-bt700-q7x-151.dtb \
+ edison.dtb \
efi.dtb \
galileo.dtb \
minnowmax.dtb \
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index ae11ccc..9c06870 100644
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -258,6 +258,9 @@
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+ fsp,enable-xhci;
+#endif
fsp,lpe-mode = <LPE_MODE_PCI>;
fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
fsp,enable-dma0;
diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
index 04aa95a..b62e00f 100644
--- a/arch/x86/dts/dfi-bt700.dtsi
+++ b/arch/x86/dts/dfi-bt700.dtsi
@@ -47,6 +47,15 @@
pad-offset = <0x3a0>;
mode-func = <1>;
};
+
+ xhci_hub_reset: usb_ulpi_stp@0 {
+ gpio-offset = <0xa0 10>;
+ pad-offset = <0x23b0>;
+ mode-func = <0>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+ };
};
chosen {
@@ -261,6 +270,9 @@
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+ fsp,enable-xhci;
+#endif
fsp,lpe-mode = <LPE_MODE_PCI>;
fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
fsp,enable-dma0;
diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
new file mode 100644
index 0000000..0b04984
--- /dev/null
+++ b/arch/x86/dts/edison.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/x86-gpio.h>
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+/include/ "skeleton.dtsi"
+/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
+
+/ {
+ model = "Intel Edison";
+ compatible = "intel,edison";
+
+ aliases {
+ serial0 = &serial0;
+ };
+
+ chosen {
+ stdout-path = &serial0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <0>;
+ intel,apic-id = <0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <1>;
+ intel,apic-id = <2>;
+ };
+ };
+
+ pci {
+ compatible = "pci-x86";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ u-boot,dm-pre-reloc;
+ ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
+ 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
+ 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+ };
+
+ serial0: serial@ff010180 {
+ compatible = "intel,mid-uart";
+ reg = <0xff010180 0x100>;
+ reg-shift = <0>;
+ clock-frequency = <29491200>;
+ current-speed = <115200>;
+ };
+
+ emmc: mmc@ff3fc000 {
+ compatible = "intel,sdhci-tangier";
+ reg = <0xff3fc000 0x1000>;
+ };
+
+/*
+ * FIXME: For now U-Boot DM model doesn't allow to power up this controller.
+ * Enabling it will make U-Boot hang.
+ *
+ sdcard: mmc@ff3fa000 {
+ compatible = "intel,sdhci-tangier";
+ reg = <0xff3fa000 0x1000>;
+ };
+ */
+
+ pmu: power@ff00b000 {
+ compatible = "intel,pmu-mid";
+ reg = <0xff00b000 0x1000>;
+ };
+
+ scu: ipc@ff009000 {
+ compatible = "intel,scu-ipc";
+ reg = <0xff009000 0x1000>;
+ };
+};
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4c0a8fe..a0ad03c 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -272,6 +272,9 @@
fsp,enable-spi;
fsp,enable-sata;
fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+ fsp,enable-xhci;
+#endif
fsp,lpe-mode = <LPE_MODE_PCI>;
fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
fsp,enable-dma0;
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index dd7a946..8003850 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -178,9 +178,8 @@
u32 flags;
struct acpi_gen_regaddr reset_reg;
u8 reset_value;
- u8 res3;
- u8 res4;
- u8 res5;
+ u16 arm_boot_arch;
+ u8 minor_revision;
u32 x_firmware_ctl_l;
u32 x_firmware_ctl_h;
u32 x_dsdt_l;
@@ -315,6 +314,9 @@
int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
u8 cpu, u16 flags, u8 lint);
u32 acpi_fill_madt(u32 current);
+int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
+ u16 seg_nr, u8 start, u8 end);
+u32 acpi_fill_mcfg(u32 current);
void acpi_create_gnvs(struct acpi_global_nvs *gnvs);
/**
* enter_acpi_mode() - enter into ACPI mode
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index c00687a..bc2c4ff 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -288,16 +288,4 @@
*/
u32 cpu_get_stepping(void);
-/**
- * cpu_run_reference_code() - Run the platform reference code
- *
- * Some platforms require a binary blob to be executed once SDRAM is
- * available. This is used to set up various platform features, such as the
- * platform controller hub (PCH). This function should be implemented by the
- * CPU-specific code.
- *
- * @return 0 on success, -ve on failure
- */
-int cpu_run_reference_code(void);
-
#endif
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
new file mode 100644
index 0000000..7de4c08
--- /dev/null
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop <stelian@popies.net>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#define dma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+ DMA_BIDIRECTIONAL = 0,
+ DMA_TO_DEVICE = 1,
+ DMA_FROM_DEVICE = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+ *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+ return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+ free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+ enum dma_data_direction dir)
+{
+ return (unsigned long)vaddr;
+}
+
+static inline void dma_unmap_single(volatile void *vaddr, size_t len,
+ unsigned long paddr)
+{
+}
+
+#endif /* __ASM_X86_DMA_MAPPING_H */
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 3156781..a72daf2 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -1,3 +1,10 @@
+/*
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
#ifndef _ASM_IO_H
#define _ASM_IO_H
@@ -118,71 +125,6 @@
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
-/*
- * ISA space is 'always mapped' on a typical x86 system, no need to
- * explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define isa_readb(a) readb((a))
-#define isa_readw(a) readw((a))
-#define isa_readl(a) readl((a))
-#define isa_writeb(b,a) writeb(b,(a))
-#define isa_writew(w,a) writew(w,(a))
-#define isa_writel(l,a) writel(l,(a))
-#define isa_memset_io(a,b,c) memset_io((a),(b),(c))
-#define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),(b),(c))
-#define isa_memcpy_toio(a,b,c) memcpy_toio((a),(b),(c))
-
-
-static inline int check_signature(unsigned long io_addr,
- const unsigned char *signature, int length)
-{
- int retval = 0;
- do {
- if (readb(io_addr) != *signature)
- goto out;
- io_addr++;
- signature++;
- length--;
- } while (length);
- retval = 1;
-out:
- return retval;
-}
-
-/**
- * isa_check_signature - find BIOS signatures
- * @io_addr: mmio address to check
- * @signature: signature block
- * @length: length of signature
- *
- * Perform a signature comparison with the ISA mmio address io_addr.
- * Returns 1 on a match.
- *
- * This function is deprecated. New drivers should use ioremap and
- * check_signature.
- */
-
-
-static inline int isa_check_signature(unsigned long io_addr,
- const unsigned char *signature, int length)
-{
- int retval = 0;
- do {
- if (isa_readb(io_addr) != *signature)
- goto out;
- io_addr++;
- signature++;
- length--;
- } while (length);
- retval = 1;
-out:
- return retval;
-}
-
#endif /* __KERNEL__ */
#ifdef SLOW_IO_BY_JUMPING
@@ -325,4 +267,4 @@
#define __iormb() dmb()
#define __iowmb() dmb()
-#endif
+#endif /* _ASM_IO_H */
diff --git a/arch/x86/include/asm/sfi.h b/arch/x86/include/asm/sfi.h
index d6c44c9..6c6ebea 100644
--- a/arch/x86/include/asm/sfi.h
+++ b/arch/x86/include/asm/sfi.h
@@ -60,6 +60,25 @@
u64 attrib;
};
+/* Memory type definitions */
+enum sfi_mem_type {
+ SFI_MEM_RESERVED,
+ SFI_LOADER_CODE,
+ SFI_LOADER_DATA,
+ SFI_BOOT_SERVICE_CODE,
+ SFI_BOOT_SERVICE_DATA,
+ SFI_RUNTIME_SERVICE_CODE,
+ SFI_RUNTIME_SERVICE_DATA,
+ SFI_MEM_CONV,
+ SFI_MEM_UNUSABLE,
+ SFI_ACPI_RECLAIM,
+ SFI_ACPI_NVS,
+ SFI_MEM_MMIO,
+ SFI_MEM_IOPORT,
+ SFI_PAL_CODE,
+ SFI_MEM_TYPEMAX,
+};
+
struct __packed sfi_cpu_table_entry {
u32 apic_id;
};
diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
index 9e8208b..c784a2a 100644
--- a/arch/x86/include/asm/tables.h
+++ b/arch/x86/include/asm/tables.h
@@ -9,13 +9,8 @@
#include <tables_csum.h>
-/*
- * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
- * We use 0xf0000 as the starting address to store those tables, including
- * PIRQ routing table, Multi-Processor table and ACPI table.
- */
-#define ROM_TABLE_ADDR 0xf0000
-#define ROM_TABLE_END 0xfffff
+#define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR
+#define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1)
#define ROM_TABLE_ALIGN 1024
diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c
index 3175da8..182379b 100644
--- a/arch/x86/lib/acpi_s3.c
+++ b/arch/x86/lib/acpi_s3.c
@@ -8,6 +8,7 @@
#include <asm/acpi_s3.h>
#include <asm/acpi_table.h>
#include <asm/post.h>
+#include <linux/linkage.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 01d5b6f..3eb1011 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -11,10 +11,13 @@
#include <cpu.h>
#include <dm.h>
#include <dm/uclass-internal.h>
+#include <version.h>
#include <asm/acpi/global_nvs.h>
#include <asm/acpi_table.h>
#include <asm/io.h>
+#include <asm/ioapic.h>
#include <asm/lapic.h>
+#include <asm/mpspec.h>
#include <asm/tables.h>
#include <asm/arch/global_nvs.h>
@@ -60,6 +63,7 @@
memcpy(header->signature, signature, 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
+ header->oem_revision = U_BOOT_BUILD_DATE;
memcpy(header->aslc_id, ASLC_ID, 4);
}
@@ -239,6 +243,33 @@
return lapic_nmi->length;
}
+static int acpi_create_madt_irq_overrides(u32 current)
+{
+ struct acpi_madt_irqoverride *irqovr;
+ u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
+ int length = 0;
+
+ irqovr = (void *)current;
+ length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
+
+ irqovr = (void *)(current + length);
+ length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
+
+ return length;
+}
+
+__weak u32 acpi_fill_madt(u32 current)
+{
+ current += acpi_create_madt_lapics(current);
+
+ current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
+ io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
+
+ current += acpi_create_madt_irq_overrides(current);
+
+ return current;
+}
+
static void acpi_create_madt(struct acpi_madt *madt)
{
struct acpi_table_header *header = &(madt->header);
@@ -262,8 +293,8 @@
header->checksum = table_compute_checksum((void *)madt, header->length);
}
-static int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig,
- u32 base, u16 seg_nr, u8 start, u8 end)
+int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
+ u16 seg_nr, u8 start, u8 end)
{
memset(mmconfig, 0, sizeof(*mmconfig));
mmconfig->base_address_l = base;
@@ -275,7 +306,7 @@
return sizeof(struct acpi_mcfg_mmconfig);
}
-static u32 acpi_fill_mcfg(u32 current)
+__weak u32 acpi_fill_mcfg(u32 current)
{
current += acpi_create_mcfg_mmconfig
((struct acpi_mcfg_mmconfig *)current,
@@ -432,6 +463,10 @@
debug("ACPI: done\n");
+ /* Don't touch ACPI hardware on HW reduced platforms */
+ if (fadt->flags & ACPI_FADT_HW_REDUCED_ACPI)
+ return current;
+
/*
* Other than waiting for OSPM to request us to switch to ACPI mode,
* do it by ourselves, since SMI will not be triggered.
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index aafbeb0..00172dc 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -48,15 +48,15 @@
command_line[0] = '\0';
- env_command_line = getenv("bootargs");
+ env_command_line = env_get("bootargs");
/* set console= argument if we use a serial console */
if (!strstr(env_command_line, "console=")) {
- if (!strcmp(getenv("stdout"), "serial")) {
+ if (!strcmp(env_get("stdout"), "serial")) {
/* We seem to use serial console */
sprintf(command_line, "console=ttyS0,%s ",
- getenv("baudrate"));
+ env_get("baudrate"));
}
}
@@ -285,7 +285,7 @@
/* argv[1] holds the address of the bzImage */
s = argv[1];
} else {
- s = getenv("fileaddr");
+ s = env_get("fileaddr");
}
if (s)
diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c
index 1604bb9..16961ac 100644
--- a/arch/xtensa/lib/bootm.c
+++ b/arch/xtensa/lib/bootm.c
@@ -136,7 +136,7 @@
{
struct bp_tag *params, *params_start;
ulong initrd_start, initrd_end;
- char *commandline = getenv("bootargs");
+ char *commandline = env_get("bootargs");
if (!(flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)))
return 0;
diff --git a/board/Arcturus/ucp1020/cmd_arc.c b/board/Arcturus/ucp1020/cmd_arc.c
index fa6b485..0d3ac88 100644
--- a/board/Arcturus/ucp1020/cmd_arc.c
+++ b/board/Arcturus/ucp1020/cmd_arc.c
@@ -138,7 +138,7 @@
printf("\t<not found>\n");
} else {
printf("\t%s\n", smac[3]);
- setenv("SERIAL", smac[3]);
+ env_set("SERIAL", smac[3]);
}
}
@@ -149,10 +149,10 @@
if (smac[2][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("ethaddr");
+ char *ret = env_get("ethaddr");
if (strcmp(ret, __stringify(CONFIG_ETHADDR)) == 0) {
- setenv("ethaddr", smac[2]);
+ env_set("ethaddr", smac[2]);
printf("\t%s (factory)\n", smac[2]);
} else {
printf("\t%s\n", ret);
@@ -160,8 +160,8 @@
}
if (strcmp(smac[1], "00:00:00:00:00:00") == 0) {
- setenv("eth1addr", smac[2]);
- setenv("eth2addr", smac[2]);
+ env_set("eth1addr", smac[2]);
+ env_set("eth2addr", smac[2]);
return 0;
}
@@ -169,10 +169,10 @@
if (smac[1][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("eth1addr");
+ char *ret = env_get("eth1addr");
if (strcmp(ret, __stringify(CONFIG_ETH1ADDR)) == 0) {
- setenv("eth1addr", smac[1]);
+ env_set("eth1addr", smac[1]);
printf("\t%s (factory)\n", smac[1]);
} else {
printf("\t%s\n", ret);
@@ -180,7 +180,7 @@
}
if (strcmp(smac[0], "00:00:00:00:00:00") == 0) {
- setenv("eth2addr", smac[1]);
+ env_set("eth2addr", smac[1]);
return 0;
}
@@ -188,10 +188,10 @@
if (smac[0][0] == 0xFF) {
printf("\t<not found>\n");
} else {
- char *ret = getenv("eth2addr");
+ char *ret = env_get("eth2addr");
if (strcmp(ret, __stringify(CONFIG_ETH2ADDR)) == 0) {
- setenv("eth2addr", smac[0]);
+ env_set("eth2addr", smac[0]);
printf("\t%s (factory)\n", smac[0]);
} else {
printf("\t%s\n", ret);
diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c
index cd484fc..b5e7a5d 100644
--- a/board/Arcturus/ucp1020/spl.c
+++ b/board/Arcturus/ucp1020/spl.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
@@ -99,7 +100,7 @@
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c
index 0d086e8..3f786a2 100644
--- a/board/Arcturus/ucp1020/ucp1020.c
+++ b/board/Arcturus/ucp1020/ucp1020.c
@@ -64,7 +64,7 @@
for (i = 0; i < GPIO_MAX_NUM; i++) {
sprintf(envname, "GPIO%d", i);
- val = getenv(envname);
+ val = env_get(envname);
if (val) {
char direction = toupper(val[0]);
char level = toupper(val[1]);
@@ -82,7 +82,7 @@
}
}
- val = getenv("PCIE_OFF");
+ val = env_get("PCIE_OFF");
if (val) {
gpio_direction_input(GPIO_PCIE1_EN);
gpio_direction_input(GPIO_PCIE2_EN);
@@ -91,7 +91,7 @@
gpio_direction_output(GPIO_PCIE2_EN, 1);
}
- val = getenv("SDHC_CDWP_OFF");
+ val = env_get("SDHC_CDWP_OFF");
if (!val) {
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -214,7 +214,7 @@
else
printf("NCT72(0x%x): ready\n", id2);
- kval = getenv("kernelargs");
+ kval = env_get("kernelargs");
mmc = find_mmc_device(0);
if (mmc)
@@ -230,21 +230,21 @@
strcat(newkernelargs, mmckargs);
strcat(newkernelargs, " ");
strcat(newkernelargs, &tmp[n]);
- setenv("kernelargs", newkernelargs);
+ env_set("kernelargs", newkernelargs);
} else {
- setenv("kernelargs", mmckargs);
+ env_set("kernelargs", mmckargs);
}
}
get_arc_info();
if (kval) {
- sval = getenv("SERIAL");
+ sval = env_get("SERIAL");
if (sval) {
strcpy(newkernelargs, "SN=");
strcat(newkernelargs, sval);
strcat(newkernelargs, " ");
strcat(newkernelargs, kval);
- setenv("kernelargs", newkernelargs);
+ env_set("kernelargs", newkernelargs);
}
} else {
printf("Error reading kernelargs env variable!\n");
@@ -307,8 +307,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/Barix/ipam390/ipam390.c b/board/Barix/ipam390/ipam390.c
index 3a58402..d203429 100644
--- a/board/Barix/ipam390/ipam390.c
+++ b/board/Barix/ipam390/ipam390.c
@@ -157,7 +157,7 @@
u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
u32 rev = 0;
- s = getenv("maxcpuclk");
+ s = env_get("maxcpuclk");
if (s)
maxcpuclk = simple_strtoul(s, NULL, 10);
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
index a227221..6083479 100644
--- a/board/BuR/brppt1/board.c
+++ b/board/BuR/brppt1/board.c
@@ -167,7 +167,7 @@
lcd_position_cursor(1, 8);
lcd_puts(
"switching to network-console ... ");
- setenv("bootcmd", "run netconsole");
+ env_set("bootcmd", "run netconsole");
}
return 0;
}
diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c
index f4bfa41..ca08f3c 100644
--- a/board/BuR/brxre1/board.c
+++ b/board/BuR/brxre1/board.c
@@ -203,7 +203,7 @@
lcd_position_cursor(1, 8);
lcd_puts(
"switching to network-console ... ");
- setenv("bootcmd", "run netconsole");
+ env_set("bootcmd", "run netconsole");
cnt = 4;
break;
} else if (!gpio_get_value(ESC_KEY) &&
@@ -211,7 +211,7 @@
lcd_position_cursor(1, 8);
lcd_puts(
"starting u-boot script from USB ... ");
- setenv("bootcmd", "run usbscript");
+ env_set("bootcmd", "run usbscript");
cnt = 4;
break;
} else if ((!gpio_get_value(ESC_KEY) &&
@@ -221,7 +221,7 @@
lcd_position_cursor(1, 8);
lcd_puts(
"starting script from network ... ");
- setenv("bootcmd", "run netscript");
+ env_set("bootcmd", "run netscript");
cnt = 4;
break;
} else if (!gpio_get_value(ESC_KEY)) {
@@ -232,19 +232,19 @@
lcd_position_cursor(1, 8);
lcd_puts(
"starting vxworks from network ... ");
- setenv("bootcmd", "run netboot");
+ env_set("bootcmd", "run netboot");
cnt = 4;
} else if (scratchreg == 0xCD) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting script from network ... ");
- setenv("bootcmd", "run netscript");
+ env_set("bootcmd", "run netscript");
cnt = 4;
} else if (scratchreg == 0xCE) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting AR from eMMC ... ");
- setenv("bootcmd", "run mmcboot");
+ env_set("bootcmd", "run mmcboot");
cnt = 4;
}
@@ -252,7 +252,7 @@
switch (cnt) {
case 0:
lcd_puts("entering BOOT-mode. ");
- setenv("bootcmd", "run defaultAR");
+ env_set("bootcmd", "run defaultAR");
buf = 0x0000;
break;
case 1:
@@ -282,10 +282,10 @@
snprintf(othbootargs, sizeof(othbootargs),
"u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x",
(unsigned int) gd->fb_base-0x20,
- (u32)getenv_ulong("vx_memtop", 16, gd->fb_base-0x20),
- (u32)getenv_ulong("vx_romfsbase", 16, 0),
- (u32)getenv_ulong("vx_romfssize", 16, 0));
- setenv("othbootargs", othbootargs);
+ (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20),
+ (u32)env_get_ulong("vx_romfsbase", 16, 0),
+ (u32)env_get_ulong("vx_romfssize", 16, 0));
+ env_set("othbootargs", othbootargs);
/*
* reset VBAR registers to its reset location, VxWorks 6.9.3.2 does
* expect that vectors are there, original u-boot moves them to _start
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index c3a56db..c1cd010 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -58,9 +58,9 @@
unsigned int bright = FDTPROP(PATHINF, "brightdef");
unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim");
#else
- unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
- unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
- unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
+ unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
+ unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
+ unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
#endif
unsigned int tmp;
struct gptimer *timerhw;
@@ -184,22 +184,22 @@
puts("no 'factory-settings / rotation' in dtb!\n");
}
snprintf(buf, sizeof(buf), "fbcon=rotate:%d", panel_info.vl_rot);
- setenv("optargs_rot", buf);
+ env_set("optargs_rot", buf);
#else
- pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
- pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
- pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL);
- pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL);
- pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL);
- pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL);
- pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL);
- pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL);
- pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL);
- pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL);
- pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
- pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
- pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
- panel_info.vl_rot = getenv_ulong("ds1_rotation", 10, 0);
+ pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
+ pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
+ pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
+ pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
+ pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
+ pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
+ pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
+ pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
+ pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
+ pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL);
+ pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
+ pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
+ pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
+ panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);
#endif
if (
~0UL == (pnltmp.hactive) ||
@@ -251,7 +251,7 @@
{
int rc;
loff_t dtbsize;
- u32 dtbaddr = getenv_ulong("dtbaddr", 16, 0UL);
+ u32 dtbaddr = env_get_ulong("dtbaddr", 16, 0UL);
if (dtbaddr == 0) {
printf("%s: don't have a valid <dtbaddr> in env!\n", __func__);
@@ -263,9 +263,9 @@
(size_t *)&dtbsize,
NULL, 0x20000, (u_char *)dtbaddr);
#else
- char *dtbname = getenv("dtb");
- char *dtbdev = getenv("dtbdev");
- char *dtbpart = getenv("dtbpart");
+ char *dtbname = env_get("dtb");
+ char *dtbdev = env_get("dtbdev");
+ char *dtbpart = env_get("dtbpart");
if (!dtbdev || !dtbpart || !dtbname) {
printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__);
return -1;
@@ -375,7 +375,7 @@
* if no simplefb is requested through environment, we don't set up
* one, instead we turn off backlight.
*/
- if (getenv_ulong("simplefb", 10, 0) == 0) {
+ if (env_get_ulong("simplefb", 10, 0) == 0) {
lcdbacklight(0);
return 0;
}
@@ -405,11 +405,11 @@
char *name, char *altname,
char *suffix)
{
- char *envval = getenv(name);
+ char *envval = env_get(name);
if (0 != envval) {
lcd_printf("%s %s %s", prefix, envval, suffix);
} else if (0 != altname) {
- envval = getenv(altname);
+ envval = env_get(altname);
if (0 != envval)
lcd_printf("%s %s %s", prefix, envval, suffix);
} else {
@@ -447,7 +447,7 @@
}
pin = FDTPROP(PATHINF, "pwrpin");
#else
- pin = getenv_ulong("ds1_pwr", 16, ~0UL);
+ pin = env_get_ulong("ds1_pwr", 16, ~0UL);
#endif
if (pin == ~0UL) {
puts("no pwrpin in dtb/env, cannot powerup display!\n");
@@ -657,7 +657,7 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
printf("<ethaddr> not set. trying DTB ... ");
mac = dtbmacaddr(0);
@@ -670,7 +670,7 @@
if (mac) {
printf("using: %pM on ", mac);
- eth_setenv_enetaddr("ethaddr", (const u8 *)mac);
+ eth_env_set_enetaddr("ethaddr", (const u8 *)mac);
}
}
writel(MII_MODE_ENABLE, &cdev->miisel);
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index a00a83a..d23b9f3 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -139,7 +139,7 @@
int enable;
enable = 1;
- s = getenv("watchdog");
+ s = env_get("watchdog");
if (s != NULL)
if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
enable = 0;
@@ -191,13 +191,13 @@
unsigned long splash;
#endif
printf("Init Video as ");
- s = getenv("displaywidth");
+ s = env_get("displaywidth");
if (s != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
- s = getenv("displayheight");
+ s = env_get("displayheight");
if (s != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
@@ -211,7 +211,7 @@
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s != NULL) {
splash = simple_strtoul(s, NULL, 16);
vcxk_acknowledge_wait();
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 86926f8..af66837 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -90,7 +90,7 @@
static bool omnia_detect_sata(void)
{
struct udevice *bus, *dev;
- int ret;
+ int ret, retry = 3;
u16 mode;
puts("SERDES0 card detect: ");
@@ -106,8 +106,13 @@
return false;
}
- ret = dm_i2c_read(dev, OMNIA_I2C_MCU_ADDR_STATUS, (uchar *) &mode, 2);
- if (ret) {
+ for (; retry > 0; --retry) {
+ ret = dm_i2c_read(dev, OMNIA_I2C_MCU_ADDR_STATUS, (uchar *) &mode, 2);
+ if (!ret)
+ break;
+ }
+
+ if (!retry) {
puts("I2C read failed! Default PEX\n");
return false;
}
@@ -280,7 +285,7 @@
puts("EEPROM regdomain read failed.\n");
printf("Regdomain set to %s\n", rd);
- return setenv("regdomain", rd);
+ return env_set("regdomain", rd);
}
#endif
@@ -510,17 +515,17 @@
mac[5] = mac1[3];
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
increment_mac(mac);
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("eth1addr", mac);
+ eth_env_set_enetaddr("eth1addr", mac);
increment_mac(mac);
if (is_valid_ethaddr(mac))
- eth_setenv_enetaddr("eth2addr", mac);
+ eth_env_set_enetaddr("eth2addr", mac);
out:
#endif
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
index 3cd4dc9..5e75eb0 100644
--- a/board/CarMediaLab/flea3/flea3.c
+++ b/board/CarMediaLab/flea3/flea3.c
@@ -211,7 +211,7 @@
{ "mxc_nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
- if (getenv("fdt_noauto")) {
+ if (env_get("fdt_noauto")) {
puts(" Skiping ft_board_setup (fdt_noauto defined)\n");
return 0;
}
diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c
index 2e6e9ef..f639a37 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -221,10 +221,10 @@
{
init_fan();
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
uchar mac[6];
if (lacie_read_mac_address(mac) == 0)
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
}
#endif
init_leds();
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index 16d6947..52f3664 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -83,10 +83,10 @@
int misc_init_r(void)
{
#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
uchar mac[6];
if (lacie_read_mac_address(mac) == 0)
- eth_setenv_enetaddr("ethaddr", mac);
+ eth_env_set_enetaddr("ethaddr", mac);
}
#endif
return 0;
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index 20544e2..6313882 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -81,7 +81,7 @@
ethaddr[0], ethaddr[1], ethaddr[2],
ethaddr[3], ethaddr[4], ethaddr[5]);
printf("parsed %s = %s\n", var, val);
- setenv(var, val);
+ env_set(var, val);
}
if (!strncmp(buf + 32, SYNO_SN_TAG, strlen(SYNO_SN_TAG))) {
char *snp, *csump;
@@ -111,7 +111,7 @@
goto out_unmap;
}
printf("parsed SN = %s\n", snp);
- setenv("SN", snp);
+ env_set("SN", snp);
} else { /* old style format */
unsigned char csum = 0;
@@ -125,7 +125,7 @@
}
bufp[n] = '\0';
printf("parsed SN = %s\n", buf + 32);
- setenv("SN", buf + 32);
+ env_set("SN", buf + 32);
}
out_unmap:
unmap_physmem(buf, len);
diff --git a/board/advantech/som-db5800-som-6867/Kconfig b/board/advantech/som-db5800-som-6867/Kconfig
index f6f3748..fac562a 100644
--- a/board/advantech/som-db5800-som-6867/Kconfig
+++ b/board/advantech/som-db5800-som-6867/Kconfig
@@ -21,6 +21,8 @@
select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
+ select BOARD_EARLY_INIT_F
+ select SPI_FLASH_MACRONIX
config PCIE_ECAM_BASE
default 0xe0000000
diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
index 5bed2c1..6158795 100644
--- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
+++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
@@ -17,8 +17,3 @@
return 0;
}
-
-int arch_early_init_r(void)
-{
- return 0;
-}
diff --git a/board/amazon/kc1/kc1.c b/board/amazon/kc1/kc1.c
index 13a9c6a..eead98b 100644
--- a/board/amazon/kc1/kc1.c
+++ b/board/amazon/kc1/kc1.c
@@ -118,8 +118,8 @@
}
if (reboot_mode[0] > 0 && isascii(reboot_mode[0])) {
- if (!getenv("reboot-mode"))
- setenv("reboot-mode", (char *)reboot_mode);
+ if (!env_get("reboot-mode"))
+ env_set("reboot-mode", (char *)reboot_mode);
}
omap_reboot_mode_clear();
diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c
index b29f56d..eac04d8 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -44,18 +44,18 @@
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
mac_addr, EFUSE_MAC_SIZE);
if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
if (len == EFUSE_SN_SIZE)
- setenv("serial#", serial);
+ env_set("serial#", serial);
}
return 0;
diff --git a/board/aries/ma5d4evk/ma5d4evk.c b/board/aries/ma5d4evk/ma5d4evk.c
index b9294fc..956c297 100644
--- a/board/aries/ma5d4evk/ma5d4evk.c
+++ b/board/aries/ma5d4evk/ma5d4evk.c
@@ -325,7 +325,7 @@
int board_late_init(void)
{
- setenv("bootmode", boot_mode_sf ? "sf" : "emmc");
+ env_set("bootmode", boot_mode_sf ? "sf" : "emmc");
return 0;
}
diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c
index 6abc215..698715ca 100644
--- a/board/aristainetos/aristainetos-v2.c
+++ b/board/aristainetos/aristainetos-v2.c
@@ -651,7 +651,7 @@
{
char *my_bootdelay;
char bootmode = 0;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
/*
* Check the boot-source. If booting from NOR Flash,
@@ -668,11 +668,11 @@
bootmode |= (gpio_get_value(IMX_GPIO_NR(7, 1)) ? 1 : 0) << 2;
if (bootmode == 7) {
- my_bootdelay = getenv("nor_bootdelay");
+ my_bootdelay = env_get("nor_bootdelay");
if (my_bootdelay != NULL)
- setenv("bootdelay", my_bootdelay);
+ env_set("bootdelay", my_bootdelay);
else
- setenv("bootdelay", "-2");
+ env_set("bootdelay", "-2");
}
/* if we have the lg panel, we can initialze it now */
diff --git a/board/armadeus/apf27/Kconfig b/board/armadeus/apf27/Kconfig
index 65544a8..a342d2e 100644
--- a/board/armadeus/apf27/Kconfig
+++ b/board/armadeus/apf27/Kconfig
@@ -1,5 +1,8 @@
if TARGET_APF27
+config SPL_LDSCRIPT
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+
config SYS_BOARD
default "apf27"
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index c3bafd4..858f74e 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -116,7 +116,7 @@
int misc_init_r (void)
{
- setenv("verify", "n");
+ env_set("verify", "n");
return (0);
}
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index b087fce..d3ce947 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -87,10 +87,6 @@
#ifdef CONFIG_CMD_NAND
at91sam9260ek_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init((1 << 0) | (1 << 1));
-#endif
-
return 0;
}
diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile
index c547fed..d7ba153 100644
--- a/board/atmel/at91sam9261ek/Makefile
+++ b/board/atmel/at91sam9261ek/Makefile
@@ -10,5 +10,5 @@
#
obj-y += at91sam9261ek.o
-obj-y += led.o
+obj-$(CONFIG_AT91_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c
index 1ba6063..c11bb2c 100644
--- a/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ b/board/atmel/at91sam9261ek/at91sam9261ek.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/at91sam9261.h>
#include <asm/arch/at91sam9261_matrix.h>
@@ -221,6 +222,23 @@
#endif /* CONFIG_LCD_INFO */
#endif
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+ at91_seriald_hw_init();
+}
+#endif
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+#ifdef CONFIG_DEBUG_UART
+ debug_uart_init();
+#endif
+ return 0;
+}
+#endif
+
int board_init(void)
{
#ifdef CONFIG_AT91SAM9G10EK
@@ -233,13 +251,9 @@
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- at91_seriald_hw_init();
#ifdef CONFIG_CMD_NAND
at91sam9261ek_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_DRIVER_DM9000
at91sam9261ek_dm9000_hw_init();
#endif
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 9fa6893..bb06e56 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -205,10 +205,6 @@
#ifdef CONFIG_CMD_NAND
at91sam9263ek_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_set_pio_output(AT91_PIO_PORTE, 20, 1); /* select spi0 clock */
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_USB_OHCI_NEW
at91_uhp_hw_init();
#endif
diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c
index 672b376..6b13bdf 100644
--- a/board/atmel/at91sam9rlek/at91sam9rlek.c
+++ b/board/atmel/at91sam9rlek/at91sam9rlek.c
@@ -184,9 +184,6 @@
#ifdef CONFIG_CMD_NAND
at91sam9rlek_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_LCD
at91sam9rlek_lcd_hw_init();
#endif
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index 48f45b3..3f0860c 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -169,7 +169,7 @@
const char *ETHADDR_NAME = "ethaddr";
struct udevice *bus, *dev;
- if (getenv(ETHADDR_NAME))
+ if (env_get(ETHADDR_NAME))
return 0;
if (uclass_get_device_by_seq(UCLASS_I2C, 1, &bus)) {
@@ -192,7 +192,7 @@
return -1;
}
- return eth_setenv_enetaddr(ETHADDR_NAME, ethaddr);
+ return eth_env_set_enetaddr(ETHADDR_NAME, ethaddr);
}
#else
static int set_ethaddr_from_eeprom(void)
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index c1f2769..88bcd87 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -267,7 +267,7 @@
*p = tolower(*p);
strcat(name, "ek.dtb");
- setenv("dtb_name", name);
+ env_set("dtb_name", name);
#endif
return 0;
}
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
index 1ad4ef9..df10d6a 100644
--- a/board/bachmann/ot1200/ot1200.c
+++ b/board/bachmann/ot1200/ot1200.c
@@ -312,9 +312,9 @@
/* depending on the phy address we can detect our board version */
if (phydev->addr == 0)
- setenv("boardver", "");
+ env_set("boardver", "");
else
- setenv("boardver", "mr");
+ env_set("boardver", "mr");
printf("using phy at %d\n", phydev->addr);
ret = fec_probe(bis, -1, base, bus, phydev);
diff --git a/board/birdland/bav335x/board.c b/board/birdland/bav335x/board.c
index 67aca3c..f284568 100644
--- a/board/birdland/bav335x/board.c
+++ b/board/birdland/bav335x/board.c
@@ -162,8 +162,8 @@
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
@@ -301,8 +301,8 @@
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "BAV335xB");
- setenv("board_rev", "B"); /* Fix me, but why bother.. */
+ env_set("board_name", "BAV335xB");
+ env_set("board_rev", "B"); /* Fix me, but why bother.. */
#endif
return 0;
}
@@ -392,11 +392,11 @@
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c
index 2215c29..25e5c3d 100644
--- a/board/bluegiga/apx4devkit/apx4devkit.c
+++ b/board/bluegiga/apx4devkit/apx4devkit.c
@@ -133,8 +133,8 @@
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
- if (getenv("revision#") != NULL)
- return simple_strtoul(getenv("revision#"), NULL, 10);
+ if (env_get("revision#") != NULL)
+ return simple_strtoul(env_get("revision#"), NULL, 10);
return 0;
}
#endif
diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c
index e82c691..8733a9a 100644
--- a/board/bluewater/gurnard/gurnard.c
+++ b/board/bluewater/gurnard/gurnard.c
@@ -341,7 +341,7 @@
at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
/* Select the second timing index for board rev 2 */
- rev_str = getenv("board_rev");
+ rev_str = env_get("board_rev");
if (rev_str && !strncmp(rev_str, "2", 1)) {
struct udevice *dev;
@@ -368,7 +368,7 @@
* Set MAC address so we do not need to init Ethernet before Linux
* boot
*/
- env_str = getenv("ethaddr");
+ env_str = env_get("ethaddr");
if (env_str) {
struct at91_emac *emac = (struct at91_emac *)ATMEL_BASE_EMAC;
/* Parse MAC address */
@@ -385,7 +385,7 @@
&emac->sa2l);
writel((env_enetaddr[4] | env_enetaddr[5] << 8), &emac->sa2h);
- printf("MAC: %s\n", getenv("ethaddr"));
+ printf("MAC: %s\n", env_get("ethaddr"));
} else {
/* Not set in environment */
printf("MAC: not set\n");
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index 38577f3..999ed95 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -251,7 +251,7 @@
if (value == 0) {
printf("front button activated !\n");
- setenv("harakiri", "1");
+ env_set("harakiri", "1");
}
}
@@ -460,7 +460,7 @@
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (shc_eeprom_valid)
if (is_valid_ethaddr(header.mac_addr))
- eth_setenv_enetaddr("ethaddr", header.mac_addr);
+ eth_env_set_enetaddr("ethaddr", header.mac_addr);
#endif
return 0;
@@ -545,11 +545,11 @@
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel(MII_MODE_ENABLE, &cdev->miisel);
@@ -565,7 +565,7 @@
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 17fd6f5..3b92b64 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -749,7 +749,7 @@
int board_cfb_skip(void)
{
- return NULL != getenv("novideo");
+ return NULL != env_get("novideo");
}
static void setup_display(void)
@@ -954,7 +954,7 @@
{
char envvalue[ARRAY_SIZE(buttons)+1];
int numpressed = read_keys(envvalue);
- setenv("keybd", envvalue);
+ env_set("keybd", envvalue);
return numpressed == 0;
}
@@ -974,7 +974,7 @@
char keypress[ARRAY_SIZE(buttons)+1];
numpressed = read_keys(keypress);
if (numpressed) {
- char *kbd_magic_keys = getenv("magic_keys");
+ char *kbd_magic_keys = env_get("magic_keys");
char *suffix;
/*
* loop over all magic keys
@@ -983,7 +983,7 @@
char *keys;
char magic[sizeof(kbd_magic_prefix) + 1];
sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
- keys = getenv(magic);
+ keys = env_get(magic);
if (keys) {
if (!strcmp(keys, keypress))
break;
@@ -993,9 +993,9 @@
char cmd_name[sizeof(kbd_command_prefix) + 1];
char *cmd;
sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
- cmd = getenv(cmd_name);
+ cmd = env_get(cmd_name);
if (cmd) {
- setenv("preboot", cmd);
+ env_set("preboot", cmd);
return;
}
}
@@ -1021,6 +1021,6 @@
#ifdef CONFIG_CMD_BMODE
add_board_boot_modes(board_boot_modes);
#endif
- setenv_hex("reset_cause", get_imx_reset_cause());
+ env_set_hex("reset_cause", get_imx_reset_cause());
return 0;
}
diff --git a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
index 5f4c634..0267582 100644
--- a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
+++ b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
@@ -103,7 +103,7 @@
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
debug("%s\n", __func__);
- if (!getenv("serial#"))
+ if (!env_get("serial#"))
g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
return 0;
}
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c
index f5b94f6..8f48ccb 100644
--- a/board/broadcom/bcm28155_ap/bcm28155_ap.c
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -110,7 +110,7 @@
int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
debug("%s\n", __func__);
- if (!getenv("serial#"))
+ if (!env_get("serial#"))
g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
return 0;
}
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 0f37345..2d01ac2 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -203,7 +203,7 @@
{
uchar enetaddr[6];
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
/* signal unset/invalid ethaddr to user */
set_led(LED_INFO_BLINKING);
}
@@ -228,7 +228,7 @@
static void rescue_mode(void)
{
printf("Entering rescue mode..\n");
- setenv("bootsource", "rescue");
+ env_set("bootsource", "rescue");
}
static void check_push_button(void)
diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
index 0265e9b..f81fa95 100644
--- a/board/cadence/xtfpga/xtfpga.c
+++ b/board/cadence/xtfpga/xtfpga.c
@@ -86,14 +86,14 @@
* Default MAC address comes from CONFIG_ETHADDR + DIP switches 1-6.
*/
- char *s = getenv("ethaddr");
+ char *s = env_get("ethaddr");
if (s == 0) {
unsigned int x;
char s[] = __stringify(CONFIG_ETHBASE);
x = (*(volatile u32 *)CONFIG_SYS_FPGAREG_DIPSW)
& FPGAREG_MAC_MASK;
sprintf(&s[15], "%02x", x);
- setenv("ethaddr", s);
+ env_set("ethaddr", s);
}
#endif /* CONFIG_CMD_NET */
diff --git a/board/calao/usb_a9263/usb_a9263.c b/board/calao/usb_a9263/usb_a9263.c
index d627b24..ee8f5e8 100644
--- a/board/calao/usb_a9263/usb_a9263.c
+++ b/board/calao/usb_a9263/usb_a9263.c
@@ -18,25 +18,9 @@
#include <asm/io.h>
#include <net.h>
#include <netdev.h>
-#include <dataflash.h>
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_HAS_DATAFLASH
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- {0x00000000, 0x00001FFF, FLAG_PROTECT_SET, 0, "Bootstrap"},
- {0x00002000, 0x00003FFF, FLAG_PROTECT_CLEAR, 0, "Environment"},
- {0x00004000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"},
-};
-#endif
-
#ifdef CONFIG_CMD_NAND
static void usb_a9263_nand_hw_init(void)
{
@@ -115,9 +99,6 @@
#ifdef CONFIG_CMD_NAND
usb_a9263_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_MACB
usb_a9263_macb_hw_init();
#endif
diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c
index 542e534..b656465 100644
--- a/board/ccv/xpress/xpress.c
+++ b/board/ccv/xpress/xpress.c
@@ -318,7 +318,7 @@
int board_late_init(void)
{
add_board_boot_modes(board_boot_modes);
- setenv("board_name", "xpress");
+ env_set("board_name", "xpress");
return 0;
}
diff --git a/board/cei/cei-tk1-som/cei-tk1-som.c b/board/cei/cei-tk1-som/cei-tk1-som.c
index 9ba7490..7c87bd1 100644
--- a/board/cei/cei-tk1-som/cei-tk1-som.c
+++ b/board/cei/cei-tk1-som/cei-tk1-som.c
@@ -39,6 +39,7 @@
#ifdef CONFIG_PCI_TEGRA
int tegra_pcie_board_init(void)
{
+/* TODO: Convert to driver model
struct udevice *pmic;
int err;
@@ -59,6 +60,7 @@
error("failed to set SD4 voltage: %d\n", err);
return err;
}
+*/
return 0;
}
diff --git a/board/compulab/cl-som-am57x/eth.c b/board/compulab/cl-som-am57x/eth.c
index 0c4bf91..b615fb9 100644
--- a/board/compulab/cl-som-am57x/eth.c
+++ b/board/compulab/cl-som-am57x/eth.c
@@ -95,7 +95,7 @@
int ret;
uint8_t enetaddr[6];
- ret = eth_getenv_enetaddr(env_name, enetaddr);
+ ret = eth_env_get_enetaddr(env_name, enetaddr);
if (ret)
return 0;
@@ -107,7 +107,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- ret = eth_setenv_enetaddr(env_name, enetaddr);
+ ret = eth_env_set_enetaddr(env_name, enetaddr);
if (ret)
printf("cl-som-am57x: Failed to set Eth port %d MAC address\n",
port_num);
@@ -181,7 +181,7 @@
gpio_set_value(CL_SOM_AM57X_GPIO_PHY1_RST, 1);
mdelay(20);
- cpsw_phy_envval = getenv("cpsw_phy");
+ cpsw_phy_envval = env_get("cpsw_phy");
if (cpsw_phy_envval != NULL)
cpsw_act_phy = simple_strtoul(cpsw_phy_envval, NULL, 0);
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index c59884a..a1da278 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -114,10 +114,10 @@
{
int ret;
struct display_info_t *preset;
- char const *panel = getenv("displaytype");
+ char const *panel = env_get("displaytype");
if (!panel) /* Also accept panel for backward compatibility */
- panel = getenv("panel");
+ panel = env_get("panel");
if (!panel)
return -ENOENT;
@@ -470,7 +470,7 @@
unsigned char enetaddr[6];
int rc;
- rc = eth_getenv_enetaddr(env_var, enetaddr);
+ rc = eth_env_get_enetaddr(env_var, enetaddr);
if (rc)
return 0;
@@ -481,7 +481,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr(env_var, enetaddr);
+ return eth_env_set_enetaddr(env_var, enetaddr);
}
#define SB_FX6_I2C_EEPROM_BUS 0
@@ -605,13 +605,13 @@
fdt_shrink_to_minimum(blob, 0); /* Make room for new properties */
/* MAC addr */
- if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (eth_env_get_enetaddr("ethaddr", enetaddr)) {
fdt_find_and_setprop(blob,
"/soc/aips-bus@02100000/ethernet@02188000",
"local-mac-address", enetaddr, 6, 1);
}
- if (eth_getenv_enetaddr("eth1addr", enetaddr)) {
+ if (eth_env_get_enetaddr("eth1addr", enetaddr)) {
fdt_find_and_setprop(blob, "/eth@pcie", "local-mac-address",
enetaddr, 6, 1);
}
diff --git a/board/compulab/cm_t335/cm_t335.c b/board/compulab/cm_t335/cm_t335.c
index c4506b9..6f6ba49 100644
--- a/board/compulab/cm_t335/cm_t335.c
+++ b/board/compulab/cm_t335/cm_t335.c
@@ -106,7 +106,7 @@
uchar enetaddr[6];
int rv;
- rv = eth_getenv_enetaddr("ethaddr", enetaddr);
+ rv = eth_env_get_enetaddr("ethaddr", enetaddr);
if (rv)
return 0;
@@ -117,7 +117,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
#define AR8051_PHY_DEBUG_ADDR_REG 0x1d
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index f169125..be938eb 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -398,7 +398,7 @@
}
#endif
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#ifdef CONFIG_SYS_I2C_OMAP24XX
/*
* Routine: reset_net_chip
* Description: reset the Ethernet controller via TPS65930 GPIO
@@ -434,7 +434,7 @@
unsigned char enetaddr[6];
int rc;
- rc = eth_getenv_enetaddr("ethaddr", enetaddr);
+ rc = eth_env_get_enetaddr("ethaddr", enetaddr);
if (rc)
return 0;
@@ -445,7 +445,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
/*
diff --git a/board/compulab/cm_t3517/cm_t3517.c b/board/compulab/cm_t3517/cm_t3517.c
index 38eb641..0ff49dc 100644
--- a/board/compulab/cm_t3517/cm_t3517.c
+++ b/board/compulab/cm_t3517/cm_t3517.c
@@ -168,7 +168,7 @@
unsigned char enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr("ethaddr", enetaddr);
+ ret = eth_env_get_enetaddr("ethaddr", enetaddr);
if (ret)
return 0;
@@ -182,7 +182,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("ethaddr", enetaddr);
+ return eth_env_set_enetaddr("ethaddr", enetaddr);
}
#define SB_T35_ETH_RST_GPIO 164
diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
index 6437718..31730a4 100644
--- a/board/compulab/cm_t54/cm_t54.c
+++ b/board/compulab/cm_t54/cm_t54.c
@@ -126,7 +126,7 @@
uint8_t enetaddr[6];
/* MAC addr */
- if (eth_getenv_enetaddr("usbethaddr", enetaddr)) {
+ if (eth_env_get_enetaddr("usbethaddr", enetaddr)) {
fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address",
enetaddr, 6, 1);
}
@@ -161,7 +161,7 @@
uint8_t enetaddr[6];
int ret;
- ret = eth_getenv_enetaddr("usbethaddr", enetaddr);
+ ret = eth_env_get_enetaddr("usbethaddr", enetaddr);
if (ret)
return 0;
@@ -172,7 +172,7 @@
if (!is_valid_ethaddr(enetaddr))
return -1;
- return eth_setenv_enetaddr("usbethaddr", enetaddr);
+ return eth_env_set_enetaddr("usbethaddr", enetaddr);
}
int board_eth_init(bd_t *bis)
diff --git a/board/compulab/common/omap3_display.c b/board/compulab/common/omap3_display.c
index 61707f5..ed2077e 100644
--- a/board/compulab/common/omap3_display.c
+++ b/board/compulab/common/omap3_display.c
@@ -400,7 +400,7 @@
{
struct prcm *prcm = (struct prcm *)PRCM_BASE;
char *custom_lcd;
- char *displaytype = getenv("displaytype");
+ char *displaytype = env_get("displaytype");
if (displaytype == NULL)
return;
@@ -408,7 +408,7 @@
lcd_def = env_parse_displaytype(displaytype);
/* If we did not recognize the preset, check if it's an env variable */
if (lcd_def == NONE) {
- custom_lcd = getenv(displaytype);
+ custom_lcd = env_get(displaytype);
if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
return;
}
diff --git a/board/congatec/Kconfig b/board/congatec/Kconfig
index ff5a1d8..fb341bf 100644
--- a/board/congatec/Kconfig
+++ b/board/congatec/Kconfig
@@ -24,6 +24,17 @@
Note that PCIE_ECAM_BASE is set up by the FSP so the value used
by U-Boot matches that value.
+config TARGET_THEADORABLE_X86_CONGA_QA3_E3845
+ bool "theadorable-x86 baseboard & conga-QA3/E3845"
+ help
+ This is the theadorable-x86 baseboard board equipped with the
+ conga-QA3/E3845-4G SoM. It contains an Atom E3845 with Ethernet,
+ micro-SD, USB 2, USB 3, SATA, serial console and HDMI 1.3 video
+ out. It requires some binary blobs - see README.x86 for details.
+
+ Note that PCIE_ECAM_BASE is set up by the FSP so the value used
+ by U-Boot matches that value.
+
endchoice
source "board/congatec/conga-qeval20-qa3-e3845/Kconfig"
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 5cb97b4..8cd0090 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -235,7 +235,7 @@
return 0;
/* set level of MIPI if specified */
- lv_mipi = getenv("lv_mipi");
+ lv_mipi = env_get("lv_mipi");
if (lv_mipi)
return 0;
@@ -583,7 +583,7 @@
{
int i;
int ret;
- char const *panel = getenv("panel");
+ char const *panel = env_get("panel");
if (!panel) {
for (i = 0; i < ARRAY_SIZE(displays); i++) {
struct display_info_t const *dev = displays + i;
@@ -755,9 +755,9 @@
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Kconfig b/board/congatec/conga-qeval20-qa3-e3845/Kconfig
index 9f31238..e1fae73 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Kconfig
+++ b/board/congatec/conga-qeval20-qa3-e3845/Kconfig
@@ -1,5 +1,3 @@
-if TARGET_CONGA_QEVAL20_QA3_E3845
-
config SYS_BOARD
default "conga-qeval20-qa3-e3845"
@@ -10,7 +8,8 @@
default "baytrail"
config SYS_CONFIG_NAME
- default "conga-qeval20-qa3-e3845"
+ default "conga-qeval20-qa3-e3845" if TARGET_CONGA_QEVAL20_QA3_E3845
+ default "theadorable-x86-conga-qa3-e3845" if TARGET_THEADORABLE_X86_CONGA_QA3_E3845
config SYS_TEXT_BASE
default 0xfff00000 if !EFI_STUB
@@ -21,8 +20,11 @@
select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
+ select BOARD_EARLY_INIT_F
+ select BOARD_LATE_INIT
+ select SPI_FLASH_STMICRO
+ imply SPI_FLASH_SPANSION
+ imply SPI_FLASH_WINBOND
config PCIE_ECAM_BASE
default 0xe0000000
-
-endif
diff --git a/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS b/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
index 3d7e8e2..cceda4f 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
+++ b/board/congatec/conga-qeval20-qa3-e3845/MAINTAINERS
@@ -3,6 +3,9 @@
S: Maintained
F: board/congatec/conga-qeval20-qa3-e3845
F: include/configs/conga-qeval20-qa3-e3845.h
+F: include/configs/theadorable-x86-conga-qa3-e3845.h
F: configs/conga-qeval20-qa3-e3845_defconfig
F: configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+F: configs/theadorable-x86-conga-qa3-e3845_defconfig
+F: configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
F: arch/x86/dts/conga-qeval20-qa3-e3845.dts
diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
index 7a5b765..1283eeb 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
+++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
@@ -28,11 +28,6 @@
return 0;
}
-int arch_early_init_r(void)
-{
- return 0;
-}
-
int board_late_init(void)
{
struct udevice *dev;
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index 3ff64f4..cfa1d50 100644
--- a/board/coreboot/coreboot/Kconfig
+++ b/board/coreboot/coreboot/Kconfig
@@ -12,6 +12,17 @@
config SYS_TEXT_BASE
default 0x01110000
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ imply SPI_FLASH_ATMEL
+ imply SPI_FLASH_EON
+ imply SPI_FLASH_GIGADEVICE
+ imply SPI_FLASH_MACRONIX
+ imply SPI_FLASH_SPANSION
+ imply SPI_FLASH_STMICRO
+ imply SPI_FLASH_SST
+ imply SPI_FLASH_WINBOND
+
comment "coreboot-specific options"
config SYS_CONFIG_NAME
diff --git a/board/coreboot/coreboot/Makefile b/board/coreboot/coreboot/Makefile
index 27ebe78..4f2ac89 100644
--- a/board/coreboot/coreboot/Makefile
+++ b/board/coreboot/coreboot/Makefile
@@ -12,4 +12,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += coreboot_start.o coreboot.o
+obj-y += coreboot_start.o
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
deleted file mode 100644
index bb7f778..0000000
--- a/board/coreboot/coreboot/coreboot.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (C) 2013 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <cros_ec.h>
-#include <asm/gpio.h>
-
-int arch_early_init_r(void)
-{
- return 0;
-}
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index 43c4cb7..c928881 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -123,7 +123,7 @@
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0)
- setenv("bootdelay", "60");
+ env_set("bootdelay", "60");
return 0;
}
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 11ea52f..c2d2e8e8 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -131,7 +131,7 @@
uchar env_enetaddr[6];
int enetaddr_found;
- enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr);
+ enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr);
#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH
int spi_mac_read;
@@ -147,7 +147,7 @@
if (!enetaddr_found) {
if (!spi_mac_read) {
if (is_valid_ethaddr(buff)) {
- if (eth_setenv_enetaddr("ethaddr", buff)) {
+ if (eth_env_set_enetaddr("ethaddr", buff)) {
printf("Warning: Failed to "
"set MAC address from SPI flash\n");
}
@@ -292,7 +292,7 @@
u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
u32 rev = 0;
- s = getenv("maxcpuclk");
+ s = env_get("maxcpuclk");
if (s)
maxcpuclk = simple_strtoul(s, NULL, 10);
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index 52bb736..5650207 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -293,7 +293,7 @@
if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
return;
- if (!strcmp(getenv("dspwake"), "no"))
+ if (!strcmp(env_get("dspwake"), "no"))
return;
*resetvect++ = 0x1E000; /* DSP Idle */
@@ -323,7 +323,7 @@
uint8_t tmp[20], addr[10];
- if (getenv("ethaddr") == NULL) {
+ if (env_get("ethaddr") == NULL) {
/* Read Ethernet MAC address from EEPROM */
if (dvevm_read_mac_address(addr)) {
/* Set Ethernet MAC address from EEPROM */
@@ -337,7 +337,7 @@
addr[0], addr[1], addr[2], addr[3], addr[4],
addr[5]);
- setenv("ethaddr", (char *)tmp);
+ env_set("ethaddr", (char *)tmp);
} else {
printf("Invalid MAC address read.\n");
}
diff --git a/board/dfi/Kconfig b/board/dfi/Kconfig
index d2a1d78..5488f68 100644
--- a/board/dfi/Kconfig
+++ b/board/dfi/Kconfig
@@ -8,10 +8,9 @@
choice
prompt "Mainboard model"
- optional
-config TARGET_DFI_BT700
- bool "DFI BT700 BayTrail"
+config TARGET_Q7X_151_DFI_BT700
+ bool "DFI BT700 BayTrail on DFI Q7X-151 baseboard"
imply SCSI
help
This is the DFI Q7X-151 baseboard equipped with the
@@ -23,6 +22,19 @@
Note that PCIE_ECAM_BASE is set up by the FSP so the value used
by U-Boot matches that value.
+config TARGET_THEADORABLE_X86_DFI_BT700
+ bool "DFI BT700 BayTrail on theadorable-x86 baseboard"
+ imply SCSI
+ help
+ This is the theadorable-x86 baseboard equipped with the
+ DFI BayTrail Bt700 SoM. It contains an Atom E3845 with
+ Ethernet (in non-PCIe-x4 configuration), micro-SD, USB 2,
+ USB 3, SATA, serial console and DisplayPort video out.
+ It requires some binary blobs - see README.x86 for details.
+
+ Note that PCIE_ECAM_BASE is set up by the FSP so the value used
+ by U-Boot matches that value.
+
endchoice
source "board/dfi/dfi-bt700/Kconfig"
diff --git a/board/dfi/dfi-bt700/Kconfig b/board/dfi/dfi-bt700/Kconfig
index 3f0acb3..4b6c3fc 100644
--- a/board/dfi/dfi-bt700/Kconfig
+++ b/board/dfi/dfi-bt700/Kconfig
@@ -1,5 +1,3 @@
-if TARGET_DFI_BT700
-
config SYS_BOARD
default "dfi-bt700"
@@ -10,7 +8,8 @@
default "baytrail"
config SYS_CONFIG_NAME
- default "dfi-bt700"
+ default "dfi-bt700" if TARGET_Q7X_151_DFI_BT700
+ default "theadorable-x86-dfi-bt700" if TARGET_THEADORABLE_X86_DFI_BT700
config SYS_TEXT_BASE
default 0xfff00000 if !EFI_STUB
@@ -21,8 +20,11 @@
select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
+ select BOARD_EARLY_INIT_F
+ select BOARD_LATE_INIT
+ select SPI_FLASH_STMICRO
+ imply SPI_FLASH_SPANSION
+ imply SPI_FLASH_WINBOND
config PCIE_ECAM_BASE
default 0xe0000000
-
-endif
diff --git a/board/dfi/dfi-bt700/MAINTAINERS b/board/dfi/dfi-bt700/MAINTAINERS
index 6639787..a99a725 100644
--- a/board/dfi/dfi-bt700/MAINTAINERS
+++ b/board/dfi/dfi-bt700/MAINTAINERS
@@ -3,6 +3,7 @@
S: Maintained
F: board/dfi/dfi-bt700
F: include/configs/dfi-bt700.h
+F: include/configs/theadorable-x86-dfi-bt700.h
F: configs/dfi-bt700-q7x-151_defconfig
F: configs/theadorable-x86-dfi-bt700_defconfig
F: arch/x86/dts/dfi-bt700.dtsi
diff --git a/board/dfi/dfi-bt700/dfi-bt700.c b/board/dfi/dfi-bt700/dfi-bt700.c
index 8645bdc..3dd2036 100644
--- a/board/dfi/dfi-bt700/dfi-bt700.c
+++ b/board/dfi/dfi-bt700/dfi-bt700.c
@@ -28,3 +28,30 @@
return 0;
}
+
+int board_late_init(void)
+{
+ struct gpio_desc desc;
+ int ret;
+
+ ret = dm_gpio_lookup_name("F10", &desc);
+ if (ret)
+ debug("gpio ret=%d\n", ret);
+ ret = dm_gpio_request(&desc, "xhci_hub_reset");
+ if (ret)
+ debug("gpio_request ret=%d\n", ret);
+ ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
+ if (ret)
+ debug("gpio dir ret=%d\n", ret);
+
+ /* Pull xHCI hub reset to low (active low) */
+ dm_gpio_set_value(&desc, 0);
+
+ /* Wait at least 5 ms, so lets choose 10 to be safe */
+ mdelay(10);
+
+ /* Pull xHCI hub reset to high (active low) */
+ dm_gpio_set_value(&desc, 1);
+
+ return 0;
+}
diff --git a/board/efi/efi-x86/efi.c b/board/efi/efi-x86/efi.c
index 1fbe36a..2adc202 100644
--- a/board/efi/efi-x86/efi.c
+++ b/board/efi/efi-x86/efi.c
@@ -5,9 +5,3 @@
*/
#include <common.h>
-#include <asm/gpio.h>
-
-int arch_early_init_r(void)
-{
- return 0;
-}
diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c
index 2c8e978..d64c345 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -58,8 +58,6 @@
#include <netdev.h>
#include <miiphy.h>
#include <i2c.h>
-#include <spi.h>
-#include <dataflash.h>
#include <mmc.h>
#include <atmel_mci.h>
@@ -67,7 +65,6 @@
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_spi.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/io.h>
@@ -77,25 +74,6 @@
DECLARE_GLOBAL_DATA_PTR;
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
- {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}
-};
-
-/*
- * In fact we have 7 partitions, but u-boot supports 5 only. This is
- * no big deal, because the first partition is reserved for applications
- * and the last one is used by Nut/OS. Both need not to be visible here.
- */
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
- { 0x00021000, 0x00041FFF, FLAG_PROTECT_SET, 0, "setup" },
- { 0x00042000, 0x000C5FFF, FLAG_PROTECT_SET, 0, "uboot" },
- { 0x000C6000, 0x00359FFF, FLAG_PROTECT_SET, 0, "kernel" },
- { 0x0035A000, 0x003DDFFF, FLAG_PROTECT_SET, 0, "nutos" },
- { 0x003DE000, 0x003FEFFF, FLAG_PROTECT_CLEAR, 0, "env" }
-};
-
/*
* This is called last during early initialization. Most of the basic
* hardware interfaces are up and running.
@@ -158,14 +136,10 @@
/* Set adress of boot parameters. */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
/* Initialize UARTs and power management. */
- at91_seriald_hw_init();
ethernut5_power_init();
#ifdef CONFIG_CMD_NAND
ethernut5_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
return 0;
}
@@ -221,31 +195,3 @@
return !at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN);
}
#endif
-
-#ifdef CONFIG_ATMEL_SPI
-/*
-
- * Note, that u-boot uses different code for SPI bus access. While
- * memory routines use automatic chip select control, the serial
- * flash support requires 'manual' GPIO control. Thus, we switch
- * modes.
- */
-void spi_cs_activate(struct spi_slave *slave)
-{
- /* Enable NPCS0 in GPIO mode. This disables peripheral control. */
- at91_set_pio_output(AT91_PIO_PORTA, 3, 0);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- /* Disable NPCS0 in GPIO mode. */
- at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
- /* Switch back to peripheral chip select control. */
- at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && cs == 0;
-}
-#endif
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index cbe355a..6b98b5c 100644
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -466,7 +466,7 @@
add_board_boot_modes(board_boot_modes);
#endif
- setenv("board_name", BOARD_NAME);
+ env_set("board_name", BOARD_NAME);
return 0;
}
diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c
index e3bb569..c7ec55f 100644
--- a/board/engicam/common/board.c
+++ b/board/engicam/common/board.c
@@ -21,11 +21,11 @@
char mmcblk[32];
u32 dev_no = mmc_get_env_dev();
- setenv_ulong("mmcdev", dev_no);
+ env_set_ulong("mmcdev", dev_no);
/* Set mmcblk env */
sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
- setenv("mmcroot", mmcblk);
+ env_set("mmcroot", mmcblk);
sprintf(cmd, "mmc dev %d", dev_no);
run_command(cmd, 0);
@@ -43,20 +43,20 @@
#ifdef CONFIG_ENV_IS_IN_MMC
mmc_late_init();
#endif
- setenv("modeboot", "mmcboot");
+ env_set("modeboot", "mmcboot");
break;
case IMX6_BMODE_NAND:
- setenv("modeboot", "nandboot");
+ env_set("modeboot", "nandboot");
break;
default:
- setenv("modeboot", "");
+ env_set("modeboot", "");
break;
}
if (is_mx6ul())
- setenv("console", "ttymxc0");
+ env_set("console", "ttymxc0");
else
- setenv("console", "ttymxc3");
+ env_set("console", "ttymxc3");
setenv_fdt_file();
diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/geam6ul/geam6ul.c
index bc36fc7..ffd383a 100644
--- a/board/engicam/geam6ul/geam6ul.c
+++ b/board/engicam/geam6ul/geam6ul.c
@@ -93,7 +93,7 @@
void setenv_fdt_file(void)
{
if (is_mx6ul())
- setenv("fdt_file", "imx6ul-geam-kit.dtb");
+ env_set("fdt_file", "imx6ul-geam-kit.dtb");
}
#ifdef CONFIG_SPL_BUILD
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c
index 5b2ed06..3d4f713 100644
--- a/board/engicam/icorem6/icorem6.c
+++ b/board/engicam/icorem6/icorem6.c
@@ -195,9 +195,9 @@
void setenv_fdt_file(void)
{
if (is_mx6dq())
- setenv("fdt_file", "imx6q-icore.dtb");
+ env_set("fdt_file", "imx6q-icore.dtb");
else if(is_mx6dl() || is_mx6solo())
- setenv("fdt_file", "imx6dl-icore.dtb");
+ env_set("fdt_file", "imx6dl-icore.dtb");
}
#ifdef CONFIG_SPL_BUILD
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c
index 10a9471..2a321dc 100644
--- a/board/engicam/icorem6_rqs/icorem6_rqs.c
+++ b/board/engicam/icorem6_rqs/icorem6_rqs.c
@@ -35,9 +35,9 @@
void setenv_fdt_file(void)
{
if (is_mx6dq())
- setenv("fdt_file", "imx6q-icore-rqs.dtb");
+ env_set("fdt_file", "imx6q-icore-rqs.dtb");
else if(is_mx6dl() || is_mx6solo())
- setenv("fdt_file", "imx6dl-icore-rqs.dtb");
+ env_set("fdt_file", "imx6dl-icore-rqs.dtb");
}
#ifdef CONFIG_SPL_BUILD
diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c
index 4dcc9ea..fbf1724 100644
--- a/board/engicam/isiotmx6ul/isiotmx6ul.c
+++ b/board/engicam/isiotmx6ul/isiotmx6ul.c
@@ -102,9 +102,9 @@
{
if (is_mx6ul()) {
#ifdef CONFIG_ENV_IS_IN_MMC
- setenv("fdt_file", "imx6ul-isiot-emmc.dtb");
+ env_set("fdt_file", "imx6ul-isiot-emmc.dtb");
#else
- setenv("fdt_file", "imx6ul-isiot-nand.dtb");
+ env_set("fdt_file", "imx6ul-isiot-nand.dtb");
#endif
}
}
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index e4bda79..0c5900a 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -181,7 +181,7 @@
puts("Board: EtherCAN/2 Gateway");
break;
}
- if (getenv_f("serial#", str, sizeof(str)) > 0) {
+ if (env_get_f("serial#", str, sizeof(str)) > 0) {
puts(", serial# ");
puts(str);
}
@@ -198,7 +198,7 @@
{
char *str;
- char *serial = getenv("serial#");
+ char *serial = env_get("serial#");
if (serial) {
str = strchr(serial, '_');
if (str && (strlen(str) >= 4)) {
@@ -231,7 +231,8 @@
* In some cases this this needs to be set to 4.
* Check the user has set environment mdiv to 4 to change the divisor.
*/
- if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) {
+ str = env_get("mdiv");
+ if (str && (strcmp(str, "4") == 0)) {
writel((readl(&pmc->mckr) & ~AT91_PMC_MDIV) |
AT91SAM9_PMC_MDIV_4, &pmc->mckr);
at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
@@ -247,13 +248,8 @@
int board_early_init_f(void)
{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOCDE);
at91_periph_clk_enable(ATMEL_ID_UHP);
- at91_seriald_hw_init();
-
return 0;
}
@@ -268,9 +264,6 @@
#ifdef CONFIG_CMD_NAND
meesc_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_MACB
meesc_macb_hw_init();
#endif
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index 83a7015..5d872fd 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -195,7 +195,7 @@
vid, vdd_target/10);
/* check override variable for overriding VDD */
- vdd_string = getenv("b4qds_vdd_mv");
+ vdd_string = env_get("b4qds_vdd_mv");
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
@@ -542,7 +542,7 @@
* Extract hwconfig from environment since environment
* is not setup properly yet
*/
- getenv_f("hwconfig", buffer, sizeof(buffer));
+ env_get_f("hwconfig", buffer, sizeof(buffer));
buf = buffer;
if (hwconfig_subarg_cmp_f("fsl_b4860_serdes2",
@@ -1197,8 +1197,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/b4860qds/spl.c b/board/freescale/b4860qds/spl.c
index 60d7f0d..b1824b0 100644
--- a/board/freescale/b4860qds/spl.c
+++ b/board/freescale/b4860qds/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
@@ -101,7 +102,7 @@
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#endif
i2c_init_all();
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
index fb8bb39..c642e88 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -65,8 +65,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index a7772c4..ed0b453 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -370,8 +370,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
diff --git a/board/freescale/c29xpcie/c29xpcie.c b/board/freescale/c29xpcie/c29xpcie.c
index 45f463f..23901a4 100644
--- a/board/freescale/c29xpcie/c29xpcie.c
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -138,8 +138,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
diff --git a/board/freescale/c29xpcie/spl.c b/board/freescale/c29xpcie/spl.c
index 94093f1..28541a7 100644
--- a/board/freescale/c29xpcie/spl.c
+++ b/board/freescale/c29xpcie/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
@@ -63,7 +64,7 @@
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c
index cefe3cc..b3e5f01 100644
--- a/board/freescale/common/cmd_esbc_validate.c
+++ b/board/freescale/common/cmd_esbc_validate.c
@@ -52,7 +52,7 @@
* to continue U-Boot
*/
sprintf(buf, "%lx", img_addr);
- setenv("img_addr", buf);
+ env_set("img_addr", buf);
if (ret)
return 1;
diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c
index 2cd4fba..6e750b0 100644
--- a/board/freescale/common/fsl_chain_of_trust.c
+++ b/board/freescale/common/fsl_chain_of_trust.c
@@ -80,8 +80,14 @@
* bootdelay = 0 (To disable Boot Prompt)
* bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)
*/
- setenv("bootdelay", "0");
- setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD);
+ env_set("bootdelay", "0");
+
+#ifdef CONFIG_ARM
+ env_set("secureboot", "y");
+#else
+ env_set("bootcmd", CONFIG_CHAIN_BOOT_CMD);
+#endif
+
return 0;
}
#endif
diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index 1c2287d..0c3a54c 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -10,15 +10,15 @@
#include <asm/arch/ns_access.h>
#include <asm/arch/fsl_serdes.h>
-void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
+void set_devices_ns_access(unsigned long index, u16 val)
{
u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR;
u32 *reg;
uint32_t tmp;
- reg = base + ns_dev->ind / 2;
+ reg = base + index / 2;
tmp = in_be32(reg);
- if (ns_dev->ind % 2 == 0) {
+ if (index % 2 == 0) {
tmp &= 0x0000ffff;
tmp |= val << 16;
} else {
@@ -34,7 +34,7 @@
int i;
for (i = 0; i < num; i++)
- set_devices_ns_access(ns_dev + i, ns_dev[i].val);
+ set_devices_ns_access(ns_dev[i].ind, ns_dev[i].val);
}
void enable_layerscape_ns_access(void)
@@ -50,20 +50,20 @@
switch (pcie) {
#ifdef CONFIG_PCIE1
case PCIE1:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE1, val);
+ set_devices_ns_access(CSU_CSLX_PCIE1_IO, val);
return;
#endif
#ifdef CONFIG_PCIE2
case PCIE2:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE2, val);
+ set_devices_ns_access(CSU_CSLX_PCIE2_IO, val);
return;
#endif
#ifdef CONFIG_PCIE3
case PCIE3:
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], val);
- set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], val);
+ set_devices_ns_access(CSU_CSLX_PCIE3, val);
+ set_devices_ns_access(CSU_CSLX_PCIE3_IO, val);
return;
#endif
default:
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 29aa778..152ad84 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -478,8 +478,8 @@
/* Only initialize environment variables that are blank
* (i.e. have not yet been set)
*/
- if (!getenv(enetvar))
- setenv(enetvar, ethaddr);
+ if (!env_get(enetvar))
+ env_set(enetvar, ethaddr);
}
}
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 9b65c13..d6d1bfc 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -376,7 +376,7 @@
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv(CONFIG_VID_FLS_ENV);
+ vdd_string = env_get(CONFIG_VID_FLS_ENV);
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
@@ -560,7 +560,7 @@
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv(CONFIG_VID_FLS_ENV);
+ vdd_string = env_get(CONFIG_VID_FLS_ENV);
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 93e1258..132650c 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -191,8 +191,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c
index 3340e4d..5854e2d 100644
--- a/board/freescale/ls1021aiot/ls1021aiot.c
+++ b/board/freescale/ls1021aiot/ls1021aiot.c
@@ -201,10 +201,6 @@
ls102xa_smmu_stream_id_init();
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
return 0;
}
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index ff32d5c..2da0677 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -435,7 +435,6 @@
/* Allow OCRAM access permission as R/W */
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
- enable_layerscape_ns_access();
#endif
/*
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 057a11d..883abf7 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -261,10 +261,6 @@
config_serdes_mux();
#endif
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 1dd5e69..33f1afd 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -69,10 +69,6 @@
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
-#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
- enable_layerscape_ns_access();
-#endif
-
#ifdef CONFIG_SECURE_BOOT
/*
* In case of Secure Boot, the IBR configures the SMMU
diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg
index 6a5076e..ccedf87 100644
--- a/board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg
+++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg
@@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 01ee0100
# RCW
-0c150010 0e000000 00000000 00000000
+0c150012 0e000000 00000000 00000000
11335559 40000012 60040000 c1000000
00000000 00000000 00000000 00238800
20124000 00003000 00000096 00000001
diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg
index d5265b8..d3b1522 100644
--- a/board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg
+++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg
@@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 01ee0100
# RCW
-0c150010 0e000000 00000000 00000000
+0c150012 0e000000 00000000 00000000
11335559 40005012 60040000 c1000000
00000000 00000000 00000000 00238800
20124000 00003101 00000096 00000001
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index defcac5..aca29bc 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -449,7 +449,7 @@
>> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
char *env_hwconfig;
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
switch (serdes1_prtcl) {
case 0x07:
@@ -603,7 +603,7 @@
>> FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
int *riser_phy_addr;
- char *env_hwconfig = getenv("hwconfig");
+ char *env_hwconfig = env_get("hwconfig");
if (hwconfig_f("xqsgmii", env_hwconfig))
riser_phy_addr = &xqsgii_riser_phy_addr[0];
@@ -849,7 +849,7 @@
unsigned int i;
char *env_hwconfig;
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
initialize_dpmac_to_slot();
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index f36fb98..83773d0 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -204,7 +204,7 @@
val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
if (hwconfig_f("dspi", env_hwconfig) &&
DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index df2d768..07ba026 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -204,25 +204,12 @@
int board_init(void)
{
- char *env_hwconfig;
- u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
#ifdef CONFIG_FSL_MC_ENET
u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
#endif
- u32 val;
init_final_memctl_regs();
- val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
-
- env_hwconfig = getenv("hwconfig");
-
- if (hwconfig_f("dspi", env_hwconfig) &&
- DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
- config_board_mux(MUX_TYPE_DSPI);
- else
- config_board_mux(MUX_TYPE_SDHC);
-
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif
@@ -257,31 +244,31 @@
int misc_init_r(void)
{
-#ifdef CONFIG_FSL_QIXIS
- /*
- * LS2081ARDB has smart voltage translator which needs
- * to be programmed as below
- */
-#ifndef CONFIG_TARGET_LS2081ARDB
- u8 sw;
+ char *env_hwconfig;
+ u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+ u32 val;
- sw = QIXIS_READ(arch);
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
+
+ env_hwconfig = env_get("hwconfig");
+
+ if (hwconfig_f("dspi", env_hwconfig) &&
+ DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
+ config_board_mux(MUX_TYPE_DSPI);
+ else
+ config_board_mux(MUX_TYPE_SDHC);
+
/*
- * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+ * LS2081ARDB RevF board has smart voltage translator
* which needs to be programmed to enable high speed SD interface
* by setting GPIO4_10 output to zero
*/
- if ((sw & 0xf) == 0x5) {
-#endif
+#ifdef CONFIG_TARGET_LS2081ARDB
out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
in_le32(GPIO4_GPDIR_ADDR)));
out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
in_le32(GPIO4_GPDAT_ADDR)));
-#ifndef CONFIG_TARGET_LS2081ARDB
- }
#endif
-#endif
-
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
@@ -341,6 +328,32 @@
#endif
#ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+ int offset;
+
+/*
+ * IFC and QSPI are muxed on board.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+#ifdef CONFIG_FSL_QSPI
+ offset = fdt_path_offset(fdt, "/soc/ifc");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/ifc");
+#else
+ offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+ if (offset < 0)
+ return;
+
+ fdt_status_disabled(fdt, offset);
+}
+
int ft_board_setup(void *blob, bd_t *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
@@ -368,6 +381,8 @@
fsl_fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_flash(blob);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
#endif
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index f30a151..b715d83 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -216,7 +216,7 @@
buf[i * 6 + 4], buf[i * 6 + 5]);
sprintf((char *)enetvar,
i ? "eth%daddr" : "ethaddr", i);
- setenv((char *)enetvar, str);
+ env_set((char *)enetvar, str);
}
}
}
diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c
index 39c40e5..e5d3dfd 100644
--- a/board/freescale/mpc837xemds/pci.c
+++ b/board/freescale/mpc837xemds/pci.c
@@ -67,7 +67,7 @@
static int is_pex_x2(void)
{
- const char *pex_x2 = getenv("pex_x2");
+ const char *pex_x2 = env_get("pex_x2");
if (pex_x2 && !strcmp(pex_x2, "yes"))
return 1;
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 319f047..9a0ab7f 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -173,7 +173,7 @@
char buffer[HWCONFIG_BUFFER_SIZE] = {0};
int esdhc_hwconfig_enabled = 0;
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
esdhc_hwconfig_enabled = hwconfig_f("esdhc", buffer);
if (esdhc_hwconfig_enabled == 0)
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index ed6836a..93d54f5 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -239,8 +239,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds
index 8a4a8a2..71a63f1 100644
--- a/board/freescale/mx31ads/u-boot.lds
+++ b/board/freescale/mx31ads/u-boot.lds
@@ -30,7 +30,7 @@
drivers/mtd/built-in.o (.text*)
. = DEFINED(env_offset) ? env_offset : .;
- common/env_embedded.o(.text*)
+ env/embedded.o(.text*)
*(.text*)
}
diff --git a/board/freescale/mx31pdk/Kconfig b/board/freescale/mx31pdk/Kconfig
index 055545c..b9fc2d5 100644
--- a/board/freescale/mx31pdk/Kconfig
+++ b/board/freescale/mx31pdk/Kconfig
@@ -1,5 +1,8 @@
if TARGET_MX31PDK
+config SPL_LDSCRIPT
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+
config SYS_BOARD
default "mx31pdk"
diff --git a/board/freescale/mx51evk/mx51evk_video.c b/board/freescale/mx51evk/mx51evk_video.c
index 86ec750..cc2c855 100644
--- a/board/freescale/mx51evk/mx51evk_video.c
+++ b/board/freescale/mx51evk/mx51evk_video.c
@@ -76,7 +76,7 @@
int board_video_skip(void)
{
int ret;
- char const *e = getenv("panel");
+ char const *e = env_get("panel");
if (e) {
if (strcmp(e, "claa") == 0) {
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 27d606f..ea36603 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -246,7 +246,7 @@
if (!p)
return -ENODEV;
- setenv("fdt_file", "imx53-qsb.dtb");
+ env_set("fdt_file", "imx53-qsb.dtb");
/* Set VDDA to 1.25V */
val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
@@ -289,7 +289,7 @@
if (!p)
return -ENODEV;
- setenv("fdt_file", "imx53-qsrb.dtb");
+ env_set("fdt_file", "imx53-qsrb.dtb");
/* Set VDDGP to 1.25V for 1GHz on SW1 */
pmic_reg_read(p, REG_SW_0, &val);
diff --git a/board/freescale/mx53loco/mx53loco_video.c b/board/freescale/mx53loco/mx53loco_video.c
index bc5e8a9..5fb0f04 100644
--- a/board/freescale/mx53loco/mx53loco_video.c
+++ b/board/freescale/mx53loco/mx53loco_video.c
@@ -92,7 +92,7 @@
int board_video_skip(void)
{
int ret;
- char const *e = getenv("panel");
+ char const *e = env_get("panel");
if (e) {
if (strcmp(e, "seiko") == 0) {
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index cad6004..f8f77f6 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -687,14 +687,14 @@
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "SABREAUTO");
+ env_set("board_name", "SABREAUTO");
if (is_mx6dqp())
- setenv("board_rev", "MX6QP");
+ env_set("board_rev", "MX6QP");
else if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else if (is_mx6sdl())
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 5329c3b..9a562b3 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -700,14 +700,14 @@
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "SABRESD");
+ env_set("board_name", "SABRESD");
if (is_mx6dqp())
- setenv("board_rev", "MX6QP");
+ env_set("board_rev", "MX6QP");
else if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else if (is_mx6sdl())
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index a30c379..cf7a069 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -674,12 +674,12 @@
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "EVK");
+ env_set("board_name", "EVK");
if (is_mx6ul_9x9_evk())
- setenv("board_rev", "9X9");
+ env_set("board_rev", "9X9");
else
- setenv("board_rev", "14X14");
+ env_set("board_rev", "14X14");
#endif
return 0;
diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
index 66b08f8..cebcec7 100644
--- a/board/freescale/mx6ullevk/mx6ullevk.c
+++ b/board/freescale/mx6ullevk/mx6ullevk.c
@@ -84,8 +84,8 @@
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "EVK");
- setenv("board_rev", "14X14");
+ env_set("board_name", "EVK");
+ env_set("board_rev", "14X14");
#endif
return 0;
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index 65bb575..aa04e99 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -453,8 +453,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
#if defined(CONFIG_PCI)
FT_FSL_PCI_SETUP;
diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c
index 2cebc2c..0013088 100644
--- a/board/freescale/p1010rdb/spl.c
+++ b/board/freescale/p1010rdb/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
@@ -87,7 +88,7 @@
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index 345feac..bf49326 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -339,8 +339,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c
index a117dc3..94b357d 100644
--- a/board/freescale/p1022ds/spl.c
+++ b/board/freescale/p1022ds/spl.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
@@ -100,7 +101,7 @@
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index 0451722..ccda824 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -137,8 +137,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 51217c5..31c8ed9 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -350,7 +350,8 @@
#ifdef CONFIG_VSC7385_ENET
/* If a VSC7385 microcode image is present, then upload it. */
- if ((tmp = getenv("vscfw_addr")) != NULL) {
+ tmp = env_get("vscfw_addr");
+ if (tmp) {
vscfw_addr = simple_strtoul(tmp, NULL, 16);
printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
if (vsc7385_upload_firmware((void *) vscfw_addr,
@@ -438,8 +439,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index ca7ba57..c1d4c36 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <ns16550.h>
#include <malloc.h>
#include <mmc.h>
@@ -92,7 +93,7 @@
nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#else
env_relocate();
#endif
diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c
index f54a6ff..02c8999 100644
--- a/board/freescale/p1_twr/p1_twr.c
+++ b/board/freescale/p1_twr/p1_twr.c
@@ -268,8 +268,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 21fb66f..78ee747 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -219,8 +219,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index 6cb5692..cf5023c 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -50,13 +50,19 @@
{
void *fdt = get_fdt_virt();
uint64_t r;
+ int size, node;
+ u32 naddr;
+ const fdt32_t *prop;
/*
* To be able to read the FDT we need to create a temporary TLB
* map for it.
*/
map_fdt_as(10);
- r = fdt_get_base_address(fdt, fdt_path_offset(fdt, "/soc"));
+ node = fdt_path_offset(fdt, "/soc");
+ naddr = fdt_address_cells(fdt, node);
+ prop = fdt_getprop(fdt, node, "ranges", &size);
+ r = fdt_translate_address(fdt, node, prop + naddr);
disable_tlb(10);
return r;
@@ -205,10 +211,10 @@
/* -kernel boot */
prop = fdt_getprop(fdt, chosen, "qemu,boot-kernel", &len);
if (prop && (len >= 8))
- setenv_hex("qemu_kernel_addr", *prop);
+ env_set_hex("qemu_kernel_addr", *prop);
/* Give the user a variable for the host fdt */
- setenv_hex("fdt_addr_r", (ulong)fdt);
+ env_set_hex("fdt_addr_r", (ulong)fdt);
return 0;
}
diff --git a/board/freescale/t102xqds/spl.c b/board/freescale/t102xqds/spl.c
index b987ece..3aa19e6 100644
--- a/board/freescale/t102xqds/spl.c
+++ b/board/freescale/t102xqds/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
@@ -138,7 +139,7 @@
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t102xqds/t102xqds.c b/board/freescale/t102xqds/t102xqds.c
index 1b2f6b2..20374ba 100644
--- a/board/freescale/t102xqds/t102xqds.c
+++ b/board/freescale/t102xqds/t102xqds.c
@@ -363,8 +363,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index dc6d9ee..ca1e49f 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
@@ -125,7 +126,7 @@
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index f370f72..8885a54 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -186,8 +186,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 5466fbf..a36997b 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -245,8 +245,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index 2e43307..4fb9323 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
@@ -119,7 +120,7 @@
(uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index d4c3d4d..2818cdf 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -132,8 +132,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c
index d7d716b..36961dc 100644
--- a/board/freescale/t208xqds/spl.c
+++ b/board/freescale/t208xqds/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
@@ -124,7 +125,7 @@
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 26093ea..ed3d3f4 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -451,8 +451,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index b431401..f0cc34d 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <malloc.h>
#include <ns16550.h>
#include <nand.h>
@@ -94,7 +95,7 @@
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 1ab05ec..619495e 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -118,8 +118,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t4qds/spl.c b/board/freescale/t4qds/spl.c
index 9ecdaed..750f155 100644
--- a/board/freescale/t4qds/spl.c
+++ b/board/freescale/t4qds/spl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
@@ -129,7 +130,7 @@
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t4qds/t4240emu.c b/board/freescale/t4qds/t4240emu.c
index 35ad19e..7136aca 100644
--- a/board/freescale/t4qds/t4240emu.c
+++ b/board/freescale/t4qds/t4240emu.c
@@ -70,8 +70,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c
index 8f9e7e8..7b71b54 100644
--- a/board/freescale/t4qds/t4240qds.c
+++ b/board/freescale/t4qds/t4240qds.c
@@ -265,7 +265,7 @@
vdd_target = vdd[vid];
/* check override variable for overriding VDD */
- vdd_string = getenv("t4240qds_vdd_mv");
+ vdd_string = env_get("t4240qds_vdd_mv");
if (vdd_override == 0 && vdd_string &&
!strict_strtoul(vdd_string, 10, &vdd_string_override))
vdd_override = vdd_string_override;
@@ -684,8 +684,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index 5feab1c..932954e 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <console.h>
+#include <environment.h>
#include <asm/spl.h>
#include <malloc.h>
#include <ns16550.h>
@@ -87,7 +88,7 @@
(uchar *)CONFIG_ENV_ADDR);
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
i2c_init_all();
diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c
index bdd6f4e..f511706 100644
--- a/board/freescale/t4rdb/t4240rdb.c
+++ b/board/freescale/t4rdb/t4240rdb.c
@@ -97,8 +97,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 46404b4..e9865b4 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1160,7 +1160,7 @@
char arg[10];
size_t len;
int i;
- int quiet = simple_strtol(getenv("quiet"), NULL, 10);
+ int quiet = simple_strtol(env_get("quiet"), NULL, 10);
if (board >= GW_UNKNOWN)
return;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 89848c8..4ddc7e1 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -298,11 +298,11 @@
#endif
/* default to the first detected enet dev */
- if (!getenv("ethprime")) {
+ if (!env_get("ethprime")) {
struct eth_device *dev = eth_get_dev_by_index(0);
if (dev) {
- setenv("ethprime", dev->name);
- printf("set ethprime to %s\n", getenv("ethprime"));
+ env_set("ethprime", dev->name);
+ printf("set ethprime to %s\n", env_get("ethprime"));
}
}
@@ -579,7 +579,7 @@
*/
void get_board_serial(struct tag_serialnr *serialnr)
{
- char *serial = getenv("serial#");
+ char *serial = env_get("serial#");
if (serial) {
serialnr->high = 0;
@@ -658,11 +658,11 @@
int quiet; /* Quiet or minimal output mode */
quiet = 0;
- p = getenv("quiet");
+ p = env_get("quiet");
if (p)
quiet = simple_strtol(p, NULL, 10);
else
- setenv("quiet", "0");
+ env_set("quiet", "0");
puts("\nGateworks Corporation Copyright 2014\n");
if (info->model[0]) {
@@ -737,26 +737,26 @@
else if (is_cpu_type(MXC_CPU_MX6DL) ||
is_cpu_type(MXC_CPU_MX6SOLO))
cputype = "imx6dl";
- setenv("soctype", cputype);
+ env_set("soctype", cputype);
if (8 << (ventana_info.nand_flash_size-1) >= 2048)
- setenv("flash_layout", "large");
+ env_set("flash_layout", "large");
else
- setenv("flash_layout", "normal");
+ env_set("flash_layout", "normal");
memset(str, 0, sizeof(str));
for (i = 0; i < (sizeof(str)-1) && info->model[i]; i++)
str[i] = tolower(info->model[i]);
- setenv("model", str);
- if (!getenv("fdt_file")) {
+ env_set("model", str);
+ if (!env_get("fdt_file")) {
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file", fdt);
+ env_set("fdt_file", fdt);
}
p = strchr(str, '-');
if (p) {
*p++ = 0;
- setenv("model_base", str);
+ env_set("model_base", str);
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file1", fdt);
+ env_set("fdt_file1", fdt);
if (board_type != GW551x &&
board_type != GW552x &&
board_type != GW553x &&
@@ -765,30 +765,30 @@
str[5] = 'x';
str[6] = 0;
sprintf(fdt, "%s-%s.dtb", cputype, str);
- setenv("fdt_file2", fdt);
+ env_set("fdt_file2", fdt);
}
/* initialize env from EEPROM */
if (test_bit(EECONFIG_ETH0, info->config) &&
- !getenv("ethaddr")) {
- eth_setenv_enetaddr("ethaddr", info->mac0);
+ !env_get("ethaddr")) {
+ eth_env_set_enetaddr("ethaddr", info->mac0);
}
if (test_bit(EECONFIG_ETH1, info->config) &&
- !getenv("eth1addr")) {
- eth_setenv_enetaddr("eth1addr", info->mac1);
+ !env_get("eth1addr")) {
+ eth_env_set_enetaddr("eth1addr", info->mac1);
}
/* board serial-number */
sprintf(str, "%6d", info->serial);
- setenv("serial#", str);
+ env_set("serial#", str);
/* memory MB */
sprintf(str, "%d", (int) (gd->ram_size >> 20));
- setenv("mem_mb", str);
+ env_set("mem_mb", str);
}
/* Set a non-initialized hwconfig based on board configuration */
- if (!strcmp(getenv("hwconfig"), "_UNKNOWN_")) {
+ if (!strcmp(env_get("hwconfig"), "_UNKNOWN_")) {
buf[0] = 0;
if (gpio_cfg[board_type].rs232_en)
strcat(buf, "rs232;");
@@ -798,7 +798,7 @@
if (strlen(buf) + strlen(buf1) < sizeof(buf))
strcat(buf, buf1);
}
- setenv("hwconfig", buf);
+ env_set("hwconfig", buf);
}
/* setup baseboard specific GPIO based on board and env */
@@ -1035,7 +1035,7 @@
int j;
sprintf(mac, "eth1addr");
- tmp = getenv(mac);
+ tmp = env_get(mac);
if (tmp) {
for (j = 0; j < 6; j++) {
mac_addr[j] = tmp ?
@@ -1118,8 +1118,8 @@
{ "sst,w25q256", MTD_DEV_TYPE_NOR, }, /* SPI flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
};
- const char *model = getenv("model");
- const char *display = getenv("display");
+ const char *model = env_get("model");
+ const char *display = env_get("display");
int i;
char rev = 0;
@@ -1131,7 +1131,7 @@
}
}
- if (getenv("fdt_noauto")) {
+ if (env_get("fdt_noauto")) {
puts(" Skiping ft_board_setup (fdt_noauto defined)\n");
return 0;
}
@@ -1152,15 +1152,15 @@
printf(" Adjusting FDT per EEPROM for %s...\n", model);
/* board serial number */
- fdt_setprop(blob, 0, "system-serial", getenv("serial#"),
- strlen(getenv("serial#")) + 1);
+ fdt_setprop(blob, 0, "system-serial", env_get("serial#"),
+ strlen(env_get("serial#")) + 1);
/* board (model contains model from device-tree) */
fdt_setprop(blob, 0, "board", info->model,
strlen((const char *)info->model) + 1);
/* set desired digital video capture format */
- ft_sethdmiinfmt(blob, getenv("hdmiinfmt"));
+ ft_sethdmiinfmt(blob, env_get("hdmiinfmt"));
/*
* Board model specific fixups
@@ -1315,7 +1315,7 @@
}
#if defined(CONFIG_CMD_PCI)
- if (!getenv("nopcifixup"))
+ if (!env_get("nopcifixup"))
ft_board_pci_fixup(blob, bd);
#endif
@@ -1324,7 +1324,7 @@
* remove nodes by alias path if EEPROM config tells us the
* peripheral is not loaded on the board.
*/
- if (getenv("fdt_noconfig")) {
+ if (env_get("fdt_noconfig")) {
puts(" Skiping periperhal config (fdt_noconfig defined)\n");
return 0;
}
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 69a638d..9524da7 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -690,9 +690,9 @@
debug("%s\n", __func__);
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- debug("boot_os=%s\n", getenv("boot_os"));
- if (getenv_yesno("boot_os") == 1)
+ env_load();
+ debug("boot_os=%s\n", env_get("boot_os"));
+ if (env_get_yesno("boot_os") == 1)
ret = 0;
#else
/* use i2c-0:0x50:0x00 for falcon boot mode (0=linux, else uboot) */
diff --git a/board/gdsys/a38x/keyprogram.c b/board/gdsys/a38x/keyprogram.c
index a4a6f1c..d75e08b 100644
--- a/board/gdsys/a38x/keyprogram.c
+++ b/board/gdsys/a38x/keyprogram.c
@@ -129,12 +129,12 @@
char *hexprog;
struct key_program *prog;
- cmd = getenv("loadkeyprogram");
+ cmd = env_get("loadkeyprogram");
if (!cmd || run_command(cmd, 0))
return 1;
- hexprog = getenv("keyprogram");
+ hexprog = env_get("keyprogram");
if (decode_hexstr(hexprog, &binprog))
return 1;
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index c6566e9..7e48507 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -103,7 +103,7 @@
int checkboard(void)
{
- char *s = getenv("serial#");
+ char *s = env_get("serial#");
bool hw_type_cat = pca9698_get_value(0x20, 20);
puts("Board: ");
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 34e9d19..fec6915 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -106,7 +106,7 @@
int checkboard(void)
{
- char *s = getenv("serial#");
+ char *s = env_get("serial#");
bool hw_type_cat = pca9698_get_value(0x20, 18);
puts("Board: ");
diff --git a/board/gdsys/p1022/controlcenterd-id.c b/board/gdsys/p1022/controlcenterd-id.c
index 95f11fb..1813a58 100644
--- a/board/gdsys/p1022/controlcenterd-id.c
+++ b/board/gdsys/p1022/controlcenterd-id.c
@@ -217,7 +217,7 @@
{
ulong addr;
#ifdef CCDM_SECOND_STAGE
- addr = getenv_ulong("loadaddr", 16, CONFIG_LOADADDR);
+ addr = env_get_ulong("loadaddr", 16, CONFIG_LOADADDR);
#else
addr = target_addr;
#endif
@@ -235,7 +235,7 @@
{
ulong addr;
/* TODO use other area? */
- addr = getenv_ulong("loadaddr", 16, CONFIG_LOADADDR);
+ addr = env_get_ulong("loadaddr", 16, CONFIG_LOADADDR);
return (u8 *)(addr);
}
#endif
@@ -1043,13 +1043,13 @@
goto failure;
/* run "prepboot" from env to get "mmcdev" set */
- cptr = getenv("prepboot");
+ cptr = env_get("prepboot");
if (cptr && !run_command(cptr, 0))
- mmcdev = getenv("mmcdev");
+ mmcdev = env_get("mmcdev");
if (!mmcdev)
goto failure;
- cptr = getenv("ramdiskimage");
+ cptr = env_get("ramdiskimage");
if (cptr)
image_path = cptr;
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 01064dc..9fb814d 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -223,7 +223,7 @@
#ifdef CONFIG_TRAILBLAZER
int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- return run_command(getenv("bootcmd"), flag);
+ return run_command(env_get("bootcmd"), flag);
}
int board_early_init_r(void)
@@ -335,8 +335,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 8999b58..944716d 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -22,6 +22,7 @@
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
+ select SPI_FLASH_WINBOND
config PCIE_ECAM_BASE
default 0xf0000000
diff --git a/board/google/chromebook_link/link.c b/board/google/chromebook_link/link.c
index 42615e1..dc22592 100644
--- a/board/google/chromebook_link/link.c
+++ b/board/google/chromebook_link/link.c
@@ -5,19 +5,3 @@
*/
#include <common.h>
-#include <cros_ec.h>
-#include <dm.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/pci.h>
-#include <asm/arch/pch.h>
-
-int arch_early_init_r(void)
-{
- return 0;
-}
-
-int board_early_init_f(void)
-{
- return 0;
-}
diff --git a/board/google/chromebook_samus/Kconfig b/board/google/chromebook_samus/Kconfig
index f2b9481..afbfe53 100644
--- a/board/google/chromebook_samus/Kconfig
+++ b/board/google/chromebook_samus/Kconfig
@@ -21,6 +21,7 @@
select INTEL_BROADWELL
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
+ select SPI_FLASH_WINBOND
config PCIE_ECAM_BASE
default 0xf0000000
diff --git a/board/google/chromebook_samus/samus.c b/board/google/chromebook_samus/samus.c
index 3c3f5d4..5b5eb19 100644
--- a/board/google/chromebook_samus/samus.c
+++ b/board/google/chromebook_samus/samus.c
@@ -5,14 +5,3 @@
*/
#include <common.h>
-#include <asm/cpu.h>
-
-int arch_early_init_r(void)
-{
- return cpu_run_reference_code();
-}
-
-int board_early_init_f(void)
-{
- return 0;
-}
diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig
index 2af3aa9..875df9d 100644
--- a/board/google/chromebox_panther/Kconfig
+++ b/board/google/chromebox_panther/Kconfig
@@ -22,6 +22,7 @@
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
+ select SPI_FLASH_WINBOND
config SYS_CAR_ADDR
hex
diff --git a/board/google/chromebox_panther/panther.c b/board/google/chromebox_panther/panther.c
index e3baf88..2adc202 100644
--- a/board/google/chromebox_panther/panther.c
+++ b/board/google/chromebox_panther/panther.c
@@ -5,14 +5,3 @@
*/
#include <common.h>
-#include <asm/arch/pch.h>
-
-int arch_early_init_r(void)
-{
- return 0;
-}
-
-int board_early_init_f(void)
-{
- return 0;
-}
diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c
index e3f82b0..2f5974a 100644
--- a/board/grinn/chiliboard/board.c
+++ b/board/grinn/chiliboard/board.c
@@ -126,11 +126,11 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
@@ -142,9 +142,9 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
#endif
diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c
index 817e22f..941e7ea 100644
--- a/board/grinn/liteboard/board.c
+++ b/board/grinn/liteboard/board.c
@@ -149,7 +149,7 @@
static int check_mmc_autodetect(void)
{
- char *autodetect_str = getenv("mmcautodetect");
+ char *autodetect_str = env_get("mmcautodetect");
if ((autodetect_str != NULL) &&
(strcmp(autodetect_str, "yes") == 0)) {
@@ -168,12 +168,12 @@
if (!check_mmc_autodetect())
return;
- setenv_ulong("mmcdev", dev_no);
+ env_set_ulong("mmcdev", dev_no);
/* Set mmcblk env */
sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw",
dev_no);
- setenv("mmcroot", mmcblk);
+ env_set("mmcroot", mmcblk);
sprintf(cmd, "mmc dev %d", dev_no);
run_command(cmd, 0);
diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c
index d76c28b..bfc5fd1 100644
--- a/board/gumstix/pepper/board.c
+++ b/board/gumstix/pepper/board.c
@@ -239,7 +239,7 @@
uint32_t mac_hi, mac_lo;
const char *devname;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
@@ -250,7 +250,7 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 1af2207..f7c05ab 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -80,11 +80,11 @@
boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
sprintf(envbuffer, "bootcmd%d", boot_choice);
- if (getenv(envbuffer)) {
+ if (env_get(envbuffer)) {
sprintf(envbuffer, "run bootcmd%d", boot_choice);
- setenv("bootcmd", envbuffer);
+ env_set("bootcmd", envbuffer);
} else
- setenv("bootcmd", "");
+ env_set("bootcmd", "");
return 0;
}
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index 47bce4d..c513d0a 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -345,7 +345,7 @@
static int init_dwmmc(void)
{
- int ret;
+ int ret = 0;
#ifdef CONFIG_MMC_DW
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
index 1deb2bd..0a02e44 100644
--- a/board/htkw/mcx/mcx.c
+++ b/board/htkw/mcx/mcx.c
@@ -83,7 +83,7 @@
if (gpio_get_value(HOT_WATER_BUTTON))
return 0;
- setenv("bootcmd", "run swupdate");
+ env_set("bootcmd", "run swupdate");
return 0;
}
diff --git a/board/intel/Kconfig b/board/intel/Kconfig
index 4d341aa..d7d950e 100644
--- a/board/intel/Kconfig
+++ b/board/intel/Kconfig
@@ -35,6 +35,13 @@
Intel Platform Controller Hub EG20T, other system components and
peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
+config TARGET_EDISON
+ bool "Edison"
+ help
+ This is the Intel Edison Compute Module. It contains a dual core Intel
+ Atom Tangier CPU, 1 GB RAM integrated on package. There is also 4 GB
+ eMMC flash on board, Wi-Fi, Bluetooth 4 and USB controllers.
+
config TARGET_GALILEO
bool "Galileo"
help
@@ -64,6 +71,7 @@
source "board/intel/bayleybay/Kconfig"
source "board/intel/cougarcanyon2/Kconfig"
source "board/intel/crownbay/Kconfig"
+source "board/intel/edison/Kconfig"
source "board/intel/galileo/Kconfig"
source "board/intel/minnowmax/Kconfig"
diff --git a/board/intel/bayleybay/Kconfig b/board/intel/bayleybay/Kconfig
index 597228f..a622499 100644
--- a/board/intel/bayleybay/Kconfig
+++ b/board/intel/bayleybay/Kconfig
@@ -20,6 +20,7 @@
select X86_RESET_VECTOR
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
+ select SPI_FLASH_WINBOND
config PCIE_ECAM_BASE
default 0xe0000000
diff --git a/board/intel/cougarcanyon2/Kconfig b/board/intel/cougarcanyon2/Kconfig
index 95a617b..ed76448 100644
--- a/board/intel/cougarcanyon2/Kconfig
+++ b/board/intel/cougarcanyon2/Kconfig
@@ -21,5 +21,7 @@
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_FSP
select BOARD_ROMSIZE_KB_2048
+ select BOARD_EARLY_INIT_F
+ select SPI_FLASH_WINBOND
endif
diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig
index b30701a..1eed227 100644
--- a/board/intel/crownbay/Kconfig
+++ b/board/intel/crownbay/Kconfig
@@ -20,5 +20,7 @@
select X86_RESET_VECTOR
select INTEL_QUEENSBAY
select BOARD_ROMSIZE_KB_1024
+ select BOARD_EARLY_INIT_F
+ select SPI_FLASH_SST
endif
diff --git a/board/intel/edison/Kconfig b/board/intel/edison/Kconfig
new file mode 100644
index 0000000..4ff9d5a
--- /dev/null
+++ b/board/intel/edison/Kconfig
@@ -0,0 +1,26 @@
+if TARGET_EDISON
+
+config SYS_BOARD
+ default "edison"
+
+config SYS_VENDOR
+ default "intel"
+
+config SYS_SOC
+ default "tangier"
+
+config SYS_CONFIG_NAME
+ default "edison"
+
+config SYS_TEXT_BASE
+ default 0x01101000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select X86_LOAD_FROM_32_BIT
+ select INTEL_MID
+ select INTEL_TANGIER
+ select BOARD_LATE_INIT
+ select MD5
+
+endif
diff --git a/board/intel/edison/MAINTAINERS b/board/intel/edison/MAINTAINERS
new file mode 100644
index 0000000..4bc4a00
--- /dev/null
+++ b/board/intel/edison/MAINTAINERS
@@ -0,0 +1,6 @@
+Intel Edison Board
+M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+S: Maintained
+F: board/intel/edison
+F: include/configs/edison.h
+F: configs/edison_defconfig
diff --git a/board/intel/edison/Makefile b/board/intel/edison/Makefile
new file mode 100644
index 0000000..dde1594
--- /dev/null
+++ b/board/intel/edison/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += start.o edison.o
diff --git a/board/intel/edison/config.mk b/board/intel/edison/config.mk
new file mode 100644
index 0000000..465133f
--- /dev/null
+++ b/board/intel/edison/config.mk
@@ -0,0 +1,18 @@
+#
+# Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0 BSD-3-Clause
+#
+
+# Add 4096 bytes of zeroes to u-boot.bin
+quiet_cmd_mkalign_eds = EDSALGN $@
+cmd_mkalign_eds = \
+ dd if=$^ of=$@ bs=4k seek=1 2>/dev/null && \
+ mv $@ $^
+
+ALL-y += u-boot-align.bin
+u-boot-align.bin: u-boot.bin
+ $(call if_changed,mkalign_eds)
+
+HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros
diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c
new file mode 100644
index 0000000..4b1e6d0
--- /dev/null
+++ b/board/intel/edison/edison.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dwc3-uboot.h>
+#include <environment.h>
+#include <mmc.h>
+#include <u-boot/md5.h>
+#include <usb.h>
+#include <watchdog.h>
+
+#include <linux/usb/gadget.h>
+
+#include <asm/cache.h>
+#include <asm/scu.h>
+#include <asm/u-boot-x86.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct dwc3_device dwc3_device_data = {
+ .maximum_speed = USB_SPEED_HIGH,
+ .base = CONFIG_SYS_USB_OTG_BASE,
+ .dr_mode = USB_DR_MODE_PERIPHERAL,
+ .index = 0,
+};
+
+int usb_gadget_handle_interrupts(int controller_index)
+{
+ dwc3_uboot_handle_interrupt(controller_index);
+ WATCHDOG_RESET();
+ return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ if (index == 0 && init == USB_INIT_DEVICE)
+ return dwc3_uboot_init(&dwc3_device_data);
+ return -EINVAL;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ if (index == 0 && init == USB_INIT_DEVICE) {
+ dwc3_uboot_exit(index);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static void assign_serial(void)
+{
+ struct mmc *mmc = find_mmc_device(0);
+ unsigned char ssn[16];
+ char usb0addr[18];
+ char serial[33];
+ int i;
+
+ if (!mmc)
+ return;
+
+ md5((unsigned char *)mmc->cid, sizeof(mmc->cid), ssn);
+
+ snprintf(usb0addr, sizeof(usb0addr), "02:00:86:%02x:%02x:%02x",
+ ssn[13], ssn[14], ssn[15]);
+ env_set("usb0addr", usb0addr);
+
+ for (i = 0; i < 16; i++)
+ snprintf(&serial[2 * i], 3, "%02x", ssn[i]);
+ env_set("serial#", serial);
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+ env_save();
+#endif
+}
+
+static void assign_hardware_id(void)
+{
+ struct ipc_ifwi_version v;
+ char hardware_id[4];
+ int ret;
+
+ ret = scu_ipc_command(IPCMSG_GET_FW_REVISION, 1, NULL, 0, (u32 *)&v, 4);
+ if (ret < 0)
+ printf("Can't retrieve hardware revision\n");
+
+ snprintf(hardware_id, sizeof(hardware_id), "%02X", v.hardware_id);
+ env_set("hardware_id", hardware_id);
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
+ env_save();
+#endif
+}
+
+int board_late_init(void)
+{
+ if (!env_get("serial#"))
+ assign_serial();
+
+ if (!env_get("hardware_id"))
+ assign_hardware_id();
+
+ return 0;
+}
diff --git a/board/intel/edison/start.S b/board/intel/edison/start.S
new file mode 100644
index 0000000..932fe6c
--- /dev/null
+++ b/board/intel/edison/start.S
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2008
+ * Graeme Russ, graeme.russ@gmail.com.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* board early intialization */
+.globl early_board_init
+early_board_init:
+ /* No 32-bit board specific initialisation */
+ jmp early_board_init_ret
diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig
index 87a0ec4..1416c89 100644
--- a/board/intel/galileo/Kconfig
+++ b/board/intel/galileo/Kconfig
@@ -20,6 +20,7 @@
select X86_RESET_VECTOR
select INTEL_QUARK
select BOARD_ROMSIZE_KB_1024
+ select SPI_FLASH_WINBOND
config SMBIOS_PRODUCT_NAME
default "GalileoGen2"
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index 568bd4d..2fe1923 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -9,11 +9,6 @@
#include <asm/arch/device.h>
#include <asm/arch/quark.h>
-int board_early_init_f(void)
-{
- return 0;
-}
-
/*
* Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
*
diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig
index 7e975f9c..a8668e4 100644
--- a/board/intel/minnowmax/Kconfig
+++ b/board/intel/minnowmax/Kconfig
@@ -21,6 +21,7 @@
select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
+ select SPI_FLASH_STMICRO
config PCIE_ECAM_BASE
default 0xe0000000
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index 99aed53..5bdb2fd 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -12,11 +12,6 @@
#define GPIO_BANKE_NAME "gpioe"
-int arch_early_init_r(void)
-{
- return 0;
-}
-
int misc_init_r(void)
{
struct udevice *dev;
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index e33170d..d33dc96 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -194,13 +194,13 @@
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
switch (get_board_revision()) {
case 0:
- setenv("board_name", "igep0034-lite");
+ env_set("board_name", "igep0034-lite");
break;
case 1:
- setenv("board_name", "igep0034");
+ env_set("board_name", "igep0034");
break;
default:
- setenv("board_name", "igep0033");
+ env_set("board_name", "igep0033");
break;
}
#endif
@@ -264,7 +264,7 @@
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
@@ -275,7 +275,7 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN),
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 843d35e..a7a7560 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -251,10 +251,10 @@
{
switch (gd->bd->bi_arch_number) {
case MACH_TYPE_IGEP0020:
- setenv("fdtfile", "omap3-igep0020.dtb");
+ env_set("fdtfile", "omap3-igep0020.dtb");
break;
case MACH_TYPE_IGEP0030:
- setenv("fdtfile", "omap3-igep0030.dtb");
+ env_set("fdtfile", "omap3-igep0030.dtb");
break;
}
}
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 408079c..6cd2812 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -51,24 +51,24 @@
pnvramaddr = gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM
- CONFIG_KM_PNVRAM;
sprintf((char *)buf, "0x%x", pnvramaddr);
- setenv("pnvramaddr", (char *)buf);
+ env_set("pnvramaddr", (char *)buf);
/* try to read rootfssize (ram image) from environment */
- p = getenv("rootfssize");
+ p = env_get("rootfssize");
if (p != NULL)
strict_strtoul(p, 16, &rootfssize);
pram = (rootfssize + CONFIG_KM_RESERVED_PRAM + CONFIG_KM_PHRAM +
CONFIG_KM_PNVRAM) / 0x400;
sprintf((char *)buf, "0x%x", pram);
- setenv("pram", (char *)buf);
+ env_set("pram", (char *)buf);
varaddr = gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM;
sprintf((char *)buf, "0x%x", varaddr);
- setenv("varaddr", (char *)buf);
+ env_set("varaddr", (char *)buf);
kernelmem = gd->ram_size - 0x400 * pram;
sprintf((char *)buf, "0x%x", kernelmem);
- setenv("kernelmem", (char *)buf);
+ env_set("kernelmem", (char *)buf);
return 0;
}
@@ -169,7 +169,7 @@
return 1;
}
strcpy((char *)buf, p);
- setenv("boardid", (char *)buf);
+ env_set("boardid", (char *)buf);
printf("set boardid=%s\n", buf);
p = get_local_var("IVM_HWKey");
@@ -178,7 +178,7 @@
return 1;
}
strcpy((char *)buf, p);
- setenv("hwkey", (char *)buf);
+ env_set("hwkey", (char *)buf);
printf("set hwkey=%s\n", buf);
printf("Execute manually saveenv for persistent storage.\n");
@@ -236,10 +236,10 @@
}
/* now try to read values from environment if available */
- p = getenv("boardid");
+ p = env_get("boardid");
if (p != NULL)
rc = strict_strtoul(p, 16, &envbid);
- p = getenv("hwkey");
+ p = env_get("hwkey");
if (p != NULL)
rc = strict_strtoul(p, 16, &envhwkey);
@@ -253,7 +253,7 @@
* BoardId/HWkey not available in the environment, so try the
* environment variable for BoardId/HWkey list
*/
- char *bidhwklist = getenv("boardIdListHex");
+ char *bidhwklist = env_get("boardIdListHex");
if (bidhwklist) {
int found = 0;
@@ -311,9 +311,9 @@
envbid = bid;
envhwkey = hwkey;
sprintf(buf, "%lx", bid);
- setenv("boardid", buf);
+ env_set("boardid", buf);
sprintf(buf, "%lx", hwkey);
- setenv("hwkey", buf);
+ env_set("hwkey", buf);
}
} /* end while( ! found ) */
}
@@ -355,7 +355,7 @@
#if defined(CONFIG_POST)
testpin = post_hotkeys_pressed();
#endif
- s = getenv("test_bank");
+ s = env_get("test_bank");
/* when test_bank is not set, act as if testpin is not asserted */
testboot = (testpin != 0) && (s);
if (verbose) {
diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
index e9e518c..f1321d9 100644
--- a/board/keymile/common/ivm.c
+++ b/board/keymile/common/ivm.c
@@ -261,7 +261,7 @@
GET_STRING("IVM_Symbol", IVM_POS_SYMBOL_ONLY, 8)
GET_STRING("IVM_DeviceName", IVM_POS_SHORT_TEXT, 64)
- tmp = (unsigned char *) getenv("IVM_DeviceName");
+ tmp = (unsigned char *)env_get("IVM_DeviceName");
if (tmp) {
int len = strlen((char *)tmp);
int i = 0;
@@ -310,11 +310,11 @@
#ifndef CONFIG_KMTEGR1
/* if an offset is defined, add it */
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true);
- setenv((char *)"ethaddr", (char *)valbuf);
+ env_set((char *)"ethaddr", (char *)valbuf);
#ifdef CONFIG_KMVECT1
/* KMVECT1 has two ethernet interfaces */
process_mac(valbuf, page2, 1, true);
- setenv((char *)"eth1addr", (char *)valbuf);
+ env_set((char *)"eth1addr", (char *)valbuf);
#endif
#else
/* KMTEGR1 has a special setup. eth0 has no connection to the outside and
@@ -322,9 +322,9 @@
* gets the official MAC address from the IVM
*/
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, false);
- setenv((char *)"ethaddr", (char *)valbuf);
+ env_set((char *)"ethaddr", (char *)valbuf);
process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true);
- setenv((char *)"eth1addr", (char *)valbuf);
+ env_set((char *)"eth1addr", (char *)valbuf);
#endif
return 0;
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 8020c37..5e07faa 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -263,11 +263,11 @@
mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR);
if (piggy_present()) {
- setenv("ethact", "UEC2");
- setenv("netdev", "eth1");
+ env_set("ethact", "UEC2");
+ env_set("netdev", "eth1");
puts("using PIGGY for network boot\n");
} else {
- setenv("netdev", "eth0");
+ env_set("netdev", "eth0");
puts("using frontport for network boot\n");
}
#endif
@@ -280,7 +280,7 @@
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
set_km_env();
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 85785ff..af1ebc4 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -193,7 +193,7 @@
unsigned int bootcountaddr;
bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
sprintf((char *)buf, "0x%x", bootcountaddr);
- setenv("bootcountaddr", (char *)buf);
+ env_set("bootcountaddr", (char *)buf);
}
int misc_init_r(void)
@@ -201,7 +201,7 @@
#if defined(CONFIG_KM_MGCOGE3UN)
char *wait_for_ne;
u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
- wait_for_ne = getenv("waitforne");
+ wait_for_ne = env_get("waitforne");
if ((wait_for_ne != NULL) && (dip_switch == 0)) {
if (strcmp(wait_for_ne, "true") == 0) {
@@ -299,7 +299,7 @@
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index abb2019..8c9d6b1 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -222,7 +222,7 @@
if (dip_switch != 0) {
/* start bootloader */
puts("DIP: Enabled\n");
- setenv("actual_bank", "0");
+ env_set("actual_bank", "0");
}
#endif
set_km_env();
@@ -239,7 +239,7 @@
unsigned char mac_addr[6];
/* get the mac addr from env */
- tmp = getenv("ethaddr");
+ tmp = env_get("ethaddr");
if (!tmp) {
printf("ethaddr env variable not defined\n");
return;
@@ -271,8 +271,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 980cd62..f0ace03 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -240,7 +240,7 @@
int ret;
/* If 'ethaddr' is already set, do nothing. */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return 0;
/* EEPROM is at bus 2. */
@@ -264,7 +264,7 @@
}
/* Set ethernet address from EEPROM. */
- eth_setenv_enetaddr("ethaddr", data.mac);
+ eth_env_set_enetaddr("ethaddr", data.mac);
return ret;
}
diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
index f924645..a299f76 100644
--- a/board/lg/sniper/sniper.c
+++ b/board/lg/sniper/sniper.c
@@ -133,8 +133,8 @@
}
if (reboot_mode[0] > 0 && isascii(reboot_mode[0])) {
- if (!getenv("reboot-mode"))
- setenv("reboot-mode", (char *)reboot_mode);
+ if (!env_get("reboot-mode"))
+ env_set("reboot-mode", (char *)reboot_mode);
}
omap_reboot_mode_clear();
diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c
index e265e2a..4f7e018 100644
--- a/board/liebherr/mccmon6/mccmon6.c
+++ b/board/liebherr/mccmon6/mccmon6.c
@@ -367,7 +367,7 @@
int board_late_init(void)
{
- setenv("board_name", "mccmon6");
+ env_set("board_name", "mccmon6");
return 0;
}
@@ -467,7 +467,7 @@
return 1;
env_init();
- ret = getenv_f("boot_os", s, sizeof(s));
+ ret = env_get_f("boot_os", s, sizeof(s));
if ((ret != -1) && (strcmp(s, "no") == 0))
return 1;
@@ -481,7 +481,7 @@
* recovery_status = <any value> -> start SWUpdate
*
*/
- ret = getenv_f("recovery_status", s, sizeof(s));
+ ret = env_get_f("recovery_status", s, sizeof(s));
if (ret != -1)
return 1;
diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index 5d2d997..c18a5a3 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -105,7 +105,7 @@
volatile unsigned int ctr;
u32 reset;
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c
index 0a7d412..78fc546 100644
--- a/board/logicpd/imx6/imx6logic.c
+++ b/board/logicpd/imx6/imx6logic.c
@@ -173,11 +173,11 @@
int board_late_init(void)
{
- setenv("board_name", "imx6logic");
+ env_set("board_name", "imx6logic");
if (is_mx6dq()) {
- setenv("board_rev", "MX6DQ");
- setenv("fdt_file", "imx6q-logicpd.dtb");
+ env_set("board_rev", "MX6DQ");
+ env_set("fdt_file", "imx6q-logicpd.dtb");
}
return 0;
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 7990dd2..fe3f9e6 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -219,8 +219,8 @@
gd->bd->bi_arch_number = board->machine_id;
/* If the user has not set fdtimage, set the default */
- if (!getenv("fdtimage"))
- setenv("fdtimage", board->fdtfile);
+ if (!env_get("fdtimage"))
+ env_set("fdtimage", board->fdtfile);
}
/* restore hsusb0_data5 pin as hsusb0_data5 */
@@ -320,7 +320,7 @@
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)); /*SDRC_CKE1*/
+ MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | DIS | M0)); /*SDRC_CKE1*/
MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/
MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/
diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
index e91f874..e6c2526 100644
--- a/board/logicpd/zoom1/zoom1.c
+++ b/board/logicpd/zoom1/zoom1.c
@@ -130,10 +130,10 @@
uchar eth_addr[6];
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("zoom1: Couldn't get eth device\n");
rc = -1;
diff --git a/board/micronas/vct/vct.c b/board/micronas/vct/vct.c
index 8bf8d5f..510746d 100644
--- a/board/micronas/vct/vct.c
+++ b/board/micronas/vct/vct.c
@@ -72,7 +72,7 @@
int checkboard(void)
{
char buf[64];
- int i = getenv_f("serial#", buf, sizeof(buf));
+ int i = env_get_f("serial#", buf, sizeof(buf));
u32 config0 = read_c0_prid();
if ((config0 & 0xff0000) == PRID_COMP_LEGACY
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 6a4427a..7764288 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -234,18 +234,18 @@
params->u.core.rootdev = 0x0;
/* append omap atag only if env setup_omap_atag is set to 1 */
- str = getenv("setup_omap_atag");
+ str = env_get("setup_omap_atag");
if (!str || str[0] != '1')
return;
- str = getenv("setup_console_atag");
+ str = env_get("setup_console_atag");
if (str && str[0] == '1')
setup_console_atag = 1;
else
setup_console_atag = 0;
- setup_boot_reason_atag = getenv("setup_boot_reason_atag");
- setup_boot_mode_atag = getenv("setup_boot_mode_atag");
+ setup_boot_reason_atag = env_get("setup_boot_reason_atag");
+ setup_boot_mode_atag = env_get("setup_boot_mode_atag");
params = *in_params;
t = (struct tag_omap *)¶ms->u;
@@ -413,7 +413,7 @@
/* set env variable attkernaddr for relocated kernel */
sprintf(buf, "%#x", KERNEL_ADDRESS);
- setenv("attkernaddr", buf);
+ env_set("attkernaddr", buf);
/* initialize omap tags */
init_omap_tags();
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index a66b710..bd08a2e 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -6,7 +6,9 @@
*/
#include <common.h>
+#include <dm.h>
#include <power/as3722.h>
+#include <power/pmic.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
@@ -37,27 +39,45 @@
}
#ifdef CONFIG_PCI_TEGRA
-int tegra_pcie_board_init(void)
+/* TODO: Convert to driver model */
+static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
{
- struct udevice *pmic;
int err;
- err = as3722_init(&pmic);
+ if (sd > 6)
+ return -EINVAL;
+
+ err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
if (err) {
- error("failed to initialize AS3722 PMIC: %d\n", err);
+ error("failed to update SD control register: %d", err);
return err;
}
- err = as3722_sd_enable(pmic, 4);
- if (err < 0) {
- error("failed to enable SD4: %d\n", err);
- return err;
+ return 0;
+}
+
+int tegra_pcie_board_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_PMIC,
+ DM_GET_DRIVER(pmic_as3722), &dev);
+ if (ret) {
+ debug("%s: Failed to find PMIC\n", __func__);
+ return ret;
}
- err = as3722_sd_set_voltage(pmic, 4, 0x24);
- if (err < 0) {
- error("failed to set SD4 voltage: %d\n", err);
- return err;
+ ret = as3722_sd_enable(dev, 4);
+ if (ret < 0) {
+ error("failed to enable SD4: %d\n", ret);
+ return ret;
+ }
+
+ ret = as3722_sd_set_voltage(dev, 4, 0x24);
+ if (ret < 0) {
+ error("failed to set SD4 voltage: %d\n", ret);
+ return ret;
}
return 0;
diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c
index 8f68ae9..54acf54 100644
--- a/board/nvidia/nyan-big/nyan-big.c
+++ b/board/nvidia/nyan-big/nyan-big.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
@@ -46,20 +47,23 @@
int tegra_lcd_pmic_init(int board_id)
{
- struct udevice *pmic;
+ struct udevice *dev;
int ret;
- ret = as3722_get(&pmic);
- if (ret)
- return -ENOENT;
+ ret = uclass_get_device_by_driver(UCLASS_PMIC,
+ DM_GET_DRIVER(pmic_as3722), &dev);
+ if (ret) {
+ debug("%s: Failed to find PMIC\n", __func__);
+ return ret;
+ }
if (board_id == 0)
- as3722_write(pmic, 0x00, 0x3c);
+ pmic_reg_write(dev, 0x00, 0x3c);
else
- as3722_write(pmic, 0x00, 0x50);
- as3722_write(pmic, 0x12, 0x10);
- as3722_write(pmic, 0x0c, 0x07);
- as3722_write(pmic, 0x20, 0x10);
+ pmic_reg_write(dev, 0x00, 0x50);
+ pmic_reg_write(dev, 0x12, 0x10);
+ pmic_reg_write(dev, 0x0c, 0x07);
+ pmic_reg_write(dev, 0x20, 0x10);
return 0;
}
diff --git a/board/overo/overo.c b/board/overo/overo.c
index adf33cf..140e34d 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -172,47 +172,47 @@
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "dvi");
- setenv("expansionname", "summit");
+ env_set("defaultdisplay", "dvi");
+ env_set("expansionname", "summit");
break;
case GUMSTIX_TOBI:
printf("Recognized Tobi expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "dvi");
- setenv("expansionname", "tobi");
+ env_set("defaultdisplay", "dvi");
+ env_set("expansionname", "tobi");
break;
case GUMSTIX_TOBI_DUO:
printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("expansionname", "tobiduo");
+ env_set("expansionname", "tobiduo");
break;
case GUMSTIX_PALO35:
printf("Recognized Palo35 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd35");
- setenv("expansionname", "palo35");
+ env_set("defaultdisplay", "lcd35");
+ env_set("expansionname", "palo35");
break;
case GUMSTIX_PALO43:
printf("Recognized Palo43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "palo43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "palo43");
break;
case GUMSTIX_CHESTNUT43:
printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "chestnut43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "chestnut43");
break;
case GUMSTIX_PINTO:
printf("Recognized Pinto expansion board (rev %d %s)\n",
@@ -225,8 +225,8 @@
expansion_config.revision,
expansion_config.fab_revision);
MUX_GUMSTIX();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "gallop43");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "gallop43");
break;
case GUMSTIX_ALTO35:
printf("Recognized Alto35 expansion board (rev %d %s)\n",
@@ -234,8 +234,8 @@
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_ALTO35();
- setenv("defaultdisplay", "lcd35");
- setenv("expansionname", "alto35");
+ env_set("defaultdisplay", "lcd35");
+ env_set("expansionname", "alto35");
break;
case GUMSTIX_STAGECOACH:
printf("Recognized Stagecoach expansion board (rev %d %s)\n",
@@ -261,8 +261,8 @@
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_ARBOR43C();
- setenv("defaultdisplay", "lcd43");
- setenv("expansionname", "arbor43c");
+ env_set("defaultdisplay", "lcd43");
+ env_set("expansionname", "arbor43c");
break;
case ETTUS_USRP_E:
printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
@@ -270,13 +270,13 @@
expansion_config.fab_revision);
MUX_GUMSTIX();
MUX_USRP_E();
- setenv("defaultdisplay", "dvi");
+ env_set("defaultdisplay", "dvi");
break;
case GUMSTIX_NO_EEPROM:
case GUMSTIX_EMPTY_EEPROM:
puts("No or empty EEPROM on expansion board\n");
MUX_GUMSTIX();
- setenv("expansionname", "tobi");
+ env_set("expansionname", "tobi");
break;
default:
printf("Unrecognized expansion board 0x%08x\n", expansion_id);
@@ -284,14 +284,14 @@
}
if (expansion_config.content == 1)
- setenv(expansion_config.env_var, expansion_config.env_setting);
+ env_set(expansion_config.env_var, expansion_config.env_setting);
omap_die_id_display();
if (get_cpu_family() == CPU_OMAP34XX)
- setenv("boardname", "overo");
+ env_set("boardname", "overo");
else
- setenv("boardname", "overo-storm");
+ env_set("boardname", "overo-storm");
return 0;
}
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 4f3853a..52ad5b6 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -216,7 +216,7 @@
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
@@ -229,7 +229,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
goto try_usbether;
}
diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index 54e88c6..8d2ce63 100644
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -392,7 +392,7 @@
#endif
snprintf(buf, sizeof(buf), "%d", get_board_rev());
- setenv("board_rev", buf);
+ env_set("board_rev", buf);
return 0;
}
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 37d0b85..848e278 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -128,7 +128,7 @@
}
if (dm_gpio_get_value(&resin)) {
- setenv("bootdelay", "-1");
+ env_set("bootdelay", "-1");
printf("Power button pressed - dropping to console.\n");
}
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index d3c6ba5..530f149 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -247,11 +247,11 @@
{
const char *fdtfile;
- if (getenv("fdtfile"))
+ if (env_get("fdtfile"))
return;
fdtfile = model->fdtfile;
- setenv("fdtfile", fdtfile);
+ env_set("fdtfile", fdtfile);
}
/*
@@ -260,13 +260,13 @@
*/
static void set_fdt_addr(void)
{
- if (getenv("fdt_addr"))
+ if (env_get("fdt_addr"))
return;
if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC)
return;
- setenv_hex("fdt_addr", fw_dtb_pointer);
+ env_set_hex("fdt_addr", fw_dtb_pointer);
}
/*
@@ -287,7 +287,7 @@
if (!model->has_onboard_eth)
return;
- if (getenv("usbethaddr"))
+ if (env_get("usbethaddr"))
return;
BCM2835_MBOX_INIT_HDR(msg);
@@ -300,10 +300,10 @@
return;
}
- eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
+ eth_env_set_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
- if (!getenv("ethaddr"))
- setenv("ethaddr", getenv("usbethaddr"));
+ if (!env_get("ethaddr"))
+ env_set("ethaddr", env_get("usbethaddr"));
return;
}
@@ -314,13 +314,13 @@
char s[11];
snprintf(s, sizeof(s), "0x%X", revision);
- setenv("board_revision", s);
+ env_set("board_revision", s);
snprintf(s, sizeof(s), "%d", rev_scheme);
- setenv("board_rev_scheme", s);
+ env_set("board_rev_scheme", s);
/* Can't rename this to board_rev_type since it's an ABI for scripts */
snprintf(s, sizeof(s), "0x%X", rev_type);
- setenv("board_rev", s);
- setenv("board_name", model->name);
+ env_set("board_rev", s);
+ env_set("board_name", model->name);
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
@@ -330,7 +330,7 @@
int ret;
char serial_string[17] = { 0 };
- if (getenv("serial#"))
+ if (env_get("serial#"))
return;
BCM2835_MBOX_INIT_HDR(msg);
@@ -345,7 +345,7 @@
snprintf(serial_string, sizeof(serial_string), "%016" PRIx64,
msg->get_board_serial.body.resp.serial);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
int misc_init_r(void)
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index b35b6a3..0bf8160 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -143,7 +143,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 5156eaf..574dcda 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -418,10 +418,10 @@
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("blanche: Couldn't get eth device\n");
rc = -1;
diff --git a/board/renesas/ecovec/ecovec.c b/board/renesas/ecovec/ecovec.c
index 28b557a..e4bb440 100644
--- a/board/renesas/ecovec/ecovec.c
+++ b/board/renesas/ecovec/ecovec.c
@@ -55,7 +55,7 @@
/* Set MAC address */
sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
- setenv("ethaddr", env_mac);
+ env_set("ethaddr", env_mac);
debug_led(0x0F);
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 359f95e..54e1269 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -126,7 +126,7 @@
#ifdef CONFIG_SH_ETHER
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index dd62145..8fa648e 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -131,7 +131,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 2ada816..562be04 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -136,7 +136,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index 926a657..5b1a167 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -126,7 +126,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/sh7752evb/sh7752evb.c b/board/renesas/sh7752evb/sh7752evb.c
index 525d979..4a76fb7 100644
--- a/board/renesas/sh7752evb/sh7752evb.c
+++ b/board/renesas/sh7752evb/sh7752evb.c
@@ -221,10 +221,10 @@
for (i = 0; i < SH7752EVB_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_giga_eth_register(i, mac_string);
}
diff --git a/board/renesas/sh7753evb/sh7753evb.c b/board/renesas/sh7753evb/sh7753evb.c
index 3d1eeda..ca9e144 100644
--- a/board/renesas/sh7753evb/sh7753evb.c
+++ b/board/renesas/sh7753evb/sh7753evb.c
@@ -237,10 +237,10 @@
for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_giga_eth_register(i, mac_string);
}
diff --git a/board/renesas/sh7757lcr/sh7757lcr.c b/board/renesas/sh7757lcr/sh7757lcr.c
index 0a04a9d..3f970fc 100644
--- a/board/renesas/sh7757lcr/sh7757lcr.c
+++ b/board/renesas/sh7757lcr/sh7757lcr.c
@@ -278,10 +278,10 @@
for (i = 0; i < SH7757LCR_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i == 0)
- setenv("ethaddr", mac_string);
+ env_set("ethaddr", mac_string);
else {
sprintf(env_string, "eth%daddr", i);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
}
set_mac_to_sh_eth_register(i, mac_string);
@@ -291,7 +291,7 @@
for (i = 0; i < SH7757LCR_GIGA_ETHERNET_NUM_CH; i++) {
get_sh_eth_mac(i + SH7757LCR_ETHERNET_NUM_CH, mac_string, buf);
sprintf(env_string, "eth%daddr", i + SH7757LCR_ETHERNET_NUM_CH);
- setenv(env_string, mac_string);
+ env_set(env_string, mac_string);
set_mac_to_sh_giga_eth_register(i, mac_string);
}
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index e13a38f..a8de402 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -135,7 +135,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index fe8dd3d..d681148 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -137,7 +137,7 @@
unsigned char enetaddr[6];
ret = sh_eth_initialize(bis);
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return ret;
/* Set Mac address */
diff --git a/board/renesas/ulcb/Kconfig b/board/renesas/ulcb/Kconfig
new file mode 100644
index 0000000..1e9a10d
--- /dev/null
+++ b/board/renesas/ulcb/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ULCB
+
+config SYS_SOC
+ default "rmobile"
+
+config SYS_BOARD
+ default "ulcb"
+
+config SYS_VENDOR
+ default "renesas"
+
+config SYS_CONFIG_NAME
+ default "ulcb"
+
+endif
diff --git a/board/renesas/ulcb/MAINTAINERS b/board/renesas/ulcb/MAINTAINERS
new file mode 100644
index 0000000..e7cdc52
--- /dev/null
+++ b/board/renesas/ulcb/MAINTAINERS
@@ -0,0 +1,7 @@
+ULCB BOARD
+M: Marek Vasut <marek.vasut+renesas@gmail.com>
+S: Maintained
+F: board/renesas/ulcb/
+F: include/configs/ulcb.h
+F: configs/r8a7795_ulcb_defconfig
+F: configs/r8a7796_ulcb_defconfig
diff --git a/board/renesas/ulcb/Makefile b/board/renesas/ulcb/Makefile
new file mode 100644
index 0000000..6fe0b48
--- /dev/null
+++ b/board/renesas/ulcb/Makefile
@@ -0,0 +1,9 @@
+#
+# board/renesas/ulcb/Makefile
+#
+# Copyright (C) 2017 Renesas Electronics Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := ulcb.o cpld.o ../rcar-common/common.o
diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c
new file mode 100644
index 0000000..f9384b0
--- /dev/null
+++ b/board/renesas/ulcb/cpld.c
@@ -0,0 +1,167 @@
+/*
+ * ULCB board CPLD access support
+ *
+ * Copyright (C) 2017 Renesas Electronics Corporation
+ * Copyright (C) 2017 Cogent Embedded, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spi.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#define SCLK GPIO_GP_6_8
+#define SSTBZ GPIO_GP_2_3
+#define MOSI GPIO_GP_6_7
+#define MISO GPIO_GP_6_10
+
+#define CPLD_ADDR_MODE 0x00 /* RW */
+#define CPLD_ADDR_MUX 0x02 /* RW */
+#define CPLD_ADDR_DIPSW6 0x08 /* R */
+#define CPLD_ADDR_RESET 0x80 /* RW */
+#define CPLD_ADDR_VERSION 0xFF /* R */
+
+static int cpld_initialized;
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ /* Always valid */
+ return 1;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ /* Always active */
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ /* Always active */
+}
+
+void ulcb_softspi_sda(int set)
+{
+ gpio_set_value(MOSI, set);
+}
+
+void ulcb_softspi_scl(int set)
+{
+ gpio_set_value(SCLK, set);
+}
+
+unsigned char ulcb_softspi_read(void)
+{
+ return !!gpio_get_value(MISO);
+}
+
+static void cpld_rw(u8 write)
+{
+ gpio_set_value(MOSI, write);
+ gpio_set_value(SSTBZ, 0);
+ gpio_set_value(SCLK, 1);
+ gpio_set_value(SCLK, 0);
+ gpio_set_value(SSTBZ, 1);
+}
+
+static u32 cpld_read(u8 addr)
+{
+ u32 data = 0;
+
+ spi_xfer(NULL, 8, &addr, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+
+ cpld_rw(0);
+
+ spi_xfer(NULL, 32, NULL, &data, SPI_XFER_BEGIN | SPI_XFER_END);
+
+ return swab32(data);
+}
+
+static void cpld_write(u8 addr, u32 data)
+{
+ data = swab32(data);
+
+ spi_xfer(NULL, 32, &data, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+
+ spi_xfer(NULL, 8, NULL, &addr, SPI_XFER_BEGIN | SPI_XFER_END);
+
+ cpld_rw(1);
+}
+
+static void cpld_init(void)
+{
+ if (cpld_initialized)
+ return;
+
+ /* PULL-UP on MISO line */
+ setbits_le32(PFC_PUEN5, PUEN_SSI_SDATA4);
+
+ gpio_request(SCLK, NULL);
+ gpio_request(SSTBZ, NULL);
+ gpio_request(MOSI, NULL);
+ gpio_request(MISO, NULL);
+
+ gpio_direction_output(SCLK, 0);
+ gpio_direction_output(SSTBZ, 1);
+ gpio_direction_output(MOSI, 0);
+ gpio_direction_input(MISO);
+
+ /* Dummy read */
+ cpld_read(CPLD_ADDR_VERSION);
+
+ cpld_initialized = 1;
+}
+
+static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ u32 addr, val;
+
+ cpld_init();
+
+ if (argc == 2 && strcmp(argv[1], "info") == 0) {
+ printf("CPLD version:\t\t\t0x%08x\n",
+ cpld_read(CPLD_ADDR_VERSION));
+ printf("H3 Mode setting (MD0..28):\t0x%08x\n",
+ cpld_read(CPLD_ADDR_MODE));
+ printf("Multiplexer settings:\t\t0x%08x\n",
+ cpld_read(CPLD_ADDR_MUX));
+ printf("DIPSW (SW6):\t\t\t0x%08x\n",
+ cpld_read(CPLD_ADDR_DIPSW6));
+ return 0;
+ }
+
+ if (argc < 3)
+ return CMD_RET_USAGE;
+
+ addr = simple_strtoul(argv[2], NULL, 16);
+ if (!(addr == CPLD_ADDR_VERSION || addr == CPLD_ADDR_MODE ||
+ addr == CPLD_ADDR_MUX || addr == CPLD_ADDR_DIPSW6 ||
+ addr == CPLD_ADDR_RESET)) {
+ printf("Invalid CPLD register address\n");
+ return CMD_RET_USAGE;
+ }
+
+ if (argc == 3 && strcmp(argv[1], "read") == 0) {
+ printf("0x%x\n", cpld_read(addr));
+ } else if (argc == 4 && strcmp(argv[1], "write") == 0) {
+ val = simple_strtoul(argv[3], NULL, 16);
+ cpld_write(addr, val);
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ cpld, 4, 1, do_cpld,
+ "CPLD access",
+ "info\n"
+ "cpld read addr\n"
+ "cpld write addr val\n"
+);
+
+void reset_cpu(ulong addr)
+{
+ cpld_init();
+ cpld_write(CPLD_ADDR_RESET, 1);
+}
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
new file mode 100644
index 0000000..4005ec8
--- /dev/null
+++ b/board/renesas/ulcb/ulcb.c
@@ -0,0 +1,257 @@
+/*
+ * board/renesas/ulcb/ulcb.c
+ * This file is ULCB board support.
+ *
+ * Copyright (C) 2017 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <netdev.h>
+#include <dm.h>
+#include <dm/platform_data/serial_sh.h>
+#include <asm/processor.h>
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <linux/errno.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
+#include <asm/arch/sh_sdhi.h>
+#include <i2c.h>
+#include <mmc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CPGWPCR 0xE6150904
+#define CPGWPR 0xE615090C
+
+#define CLK2MHZ(clk) (clk / 1000 / 1000)
+void s_init(void)
+{
+ struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
+ struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
+
+ /* Watchdog init */
+ writel(0xA5A5A500, &rwdt->rwtcsra);
+ writel(0xA5A5A500, &swdt->swtcsra);
+
+ writel(0xA5A50000, CPGWPCR);
+ writel(0xFFFFFFFF, CPGWPR);
+}
+
+#define GSX_MSTP112 BIT(12) /* 3DG */
+#define TMU0_MSTP125 BIT(25) /* secure */
+#define TMU1_MSTP124 BIT(24) /* non-secure */
+#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
+#define ETHERAVB_MSTP812 BIT(12)
+#define DVFS_MSTP926 BIT(26)
+#define SD0_MSTP314 BIT(14)
+#define SD1_MSTP313 BIT(13)
+#define SD2_MSTP312 BIT(12) /* either MMC0 */
+
+#define SD0CKCR 0xE6150074
+#define SD1CKCR 0xE6150078
+#define SD2CKCR 0xE6150268
+#define SD3CKCR 0xE615026C
+
+int board_early_init_f(void)
+{
+ /* TMU0,1 */ /* which use ? */
+ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
+ /* SCIF2 */
+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310);
+ /* EHTERAVB */
+ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812);
+ /* eMMC */
+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312);
+ /* SDHI0 */
+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314);
+
+ writel(0, SD0CKCR);
+ writel(0, SD1CKCR);
+ writel(0, SD2CKCR);
+ writel(0, SD3CKCR);
+
+#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
+ /* DVFS for reset */
+ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+#endif
+ return 0;
+}
+
+/* SYSC */
+/* R/- 32 Power status register 2(3DG) */
+#define SYSC_PWRSR2 0xE6180100
+/* -/W 32 Power resume control register 2 (3DG) */
+#define SYSC_PWRONCR2 0xE618010C
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+
+ /* Init PFC controller */
+#if defined(CONFIG_R8A7795)
+ r8a7795_pinmux_init();
+#elif defined(CONFIG_R8A7796)
+ r8a7796_pinmux_init();
+#endif
+
+ /* USB1 pull-up */
+ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
+
+#ifdef CONFIG_RAVB
+ /* EtherAVB Enable */
+ /* GPSR2 */
+ gpio_request(GPIO_GFN_AVB_AVTP_CAPTURE_A, NULL);
+ gpio_request(GPIO_GFN_AVB_AVTP_MATCH_A, NULL);
+ gpio_request(GPIO_GFN_AVB_LINK, NULL);
+ gpio_request(GPIO_GFN_AVB_PHY_INT, NULL);
+ gpio_request(GPIO_GFN_AVB_MAGIC, NULL);
+ gpio_request(GPIO_GFN_AVB_MDC, NULL);
+
+ /* IPSR0 */
+ gpio_request(GPIO_IFN_AVB_MDC, NULL);
+ gpio_request(GPIO_IFN_AVB_MAGIC, NULL);
+ gpio_request(GPIO_IFN_AVB_PHY_INT, NULL);
+ gpio_request(GPIO_IFN_AVB_LINK, NULL);
+ gpio_request(GPIO_IFN_AVB_AVTP_MATCH_A, NULL);
+ gpio_request(GPIO_IFN_AVB_AVTP_CAPTURE_A, NULL);
+ /* IPSR1 */
+ gpio_request(GPIO_FN_AVB_AVTP_PPS, NULL);
+ /* IPSR2 */
+ gpio_request(GPIO_FN_AVB_AVTP_MATCH_B, NULL);
+ /* IPSR3 */
+ gpio_request(GPIO_FN_AVB_AVTP_CAPTURE_B, NULL);
+
+ /* AVB_PHY_RST */
+ gpio_request(GPIO_GP_2_10, NULL);
+ gpio_direction_output(GPIO_GP_2_10, 0);
+ mdelay(20);
+ gpio_set_value(GPIO_GP_2_10, 1);
+ udelay(1);
+#endif
+
+ return 0;
+}
+
+static struct eth_pdata salvator_x_ravb_platdata = {
+ .iobase = 0xE6800000,
+ .phy_interface = 0,
+ .max_speed = 1000,
+};
+
+U_BOOT_DEVICE(salvator_x_ravb) = {
+ .name = "ravb",
+ .platdata = &salvator_x_ravb_platdata,
+};
+
+#ifdef CONFIG_SH_SDHI
+int board_mmc_init(bd_t *bis)
+{
+ int ret = -ENODEV;
+
+ /* SDHI0 */
+ gpio_request(GPIO_GFN_SD0_DAT0, NULL);
+ gpio_request(GPIO_GFN_SD0_DAT1, NULL);
+ gpio_request(GPIO_GFN_SD0_DAT2, NULL);
+ gpio_request(GPIO_GFN_SD0_DAT3, NULL);
+ gpio_request(GPIO_GFN_SD0_CLK, NULL);
+ gpio_request(GPIO_GFN_SD0_CMD, NULL);
+ gpio_request(GPIO_GFN_SD0_CD, NULL);
+ gpio_request(GPIO_GFN_SD0_WP, NULL);
+
+ gpio_request(GPIO_GP_5_2, NULL);
+ gpio_request(GPIO_GP_5_1, NULL);
+ gpio_direction_output(GPIO_GP_5_2, 1); /* power on */
+ gpio_direction_output(GPIO_GP_5_1, 1); /* 1: 3.3V, 0: 1.8V */
+
+ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0,
+ SH_SDHI_QUIRK_64BIT_BUF);
+ if (ret)
+ return ret;
+
+ /* SDHI1/SDHI2 eMMC */
+ gpio_request(GPIO_GFN_SD1_DAT0, NULL);
+ gpio_request(GPIO_GFN_SD1_DAT1, NULL);
+ gpio_request(GPIO_GFN_SD1_DAT2, NULL);
+ gpio_request(GPIO_GFN_SD1_DAT3, NULL);
+ gpio_request(GPIO_GFN_SD2_DAT0, NULL);
+ gpio_request(GPIO_GFN_SD2_DAT1, NULL);
+ gpio_request(GPIO_GFN_SD2_DAT2, NULL);
+ gpio_request(GPIO_GFN_SD2_DAT3, NULL);
+ gpio_request(GPIO_GFN_SD2_CLK, NULL);
+#if defined(CONFIG_R8A7795)
+ gpio_request(GPIO_GFN_SD2_CMD, NULL);
+#elif defined(CONFIG_R8A7796)
+ gpio_request(GPIO_FN_SD2_CMD, NULL);
+#else
+#error Only R8A7795 and R87796 is supported
+#endif
+ gpio_request(GPIO_GP_5_3, NULL);
+ gpio_request(GPIO_GP_5_9, NULL);
+ gpio_direction_output(GPIO_GP_5_3, 0); /* 1: 3.3V, 0: 1.8V */
+ gpio_direction_output(GPIO_GP_5_9, 0); /* 1: 3.3V, 0: 1.8V */
+
+ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 1,
+ SH_SDHI_QUIRK_64BIT_BUF);
+
+ return ret;
+}
+#endif
+
+int dram_init(void)
+{
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+#if (CONFIG_NR_DRAM_BANKS >= 2)
+ gd->ram_size += PHYS_SDRAM_2_SIZE;
+#endif
+#if (CONFIG_NR_DRAM_BANKS >= 3)
+ gd->ram_size += PHYS_SDRAM_3_SIZE;
+#endif
+#if (CONFIG_NR_DRAM_BANKS >= 4)
+ gd->ram_size += PHYS_SDRAM_4_SIZE;
+#endif
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+#if (CONFIG_NR_DRAM_BANKS >= 2)
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+#endif
+#if (CONFIG_NR_DRAM_BANKS >= 3)
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+#endif
+#if (CONFIG_NR_DRAM_BANKS >= 4)
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
+#endif
+ return 0;
+}
+
+const struct rmobile_sysinfo sysinfo = {
+ CONFIG_RCAR_BOARD_STRING
+};
+
+static const struct sh_serial_platdata serial_platdata = {
+ .base = SCIF2_BASE,
+ .type = PORT_SCIF,
+ .clk = CONFIG_SH_SCIF_CLK_FREQ,
+ .clk_mode = INT_CLK,
+};
+
+U_BOOT_DEVICE(salvator_x_scif2) = {
+ .name = "serial_sh",
+ .platdata = &serial_platdata,
+};
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
index 6dca1fc..6a47642 100644
--- a/board/rockchip/evb_px5/evb-px5.c
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -4,30 +4,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <asm/io.h>
-#include <fdtdec.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int mach_cpu_init(void)
-{
- struct rk3368_pmu_grf *pmugrf;
- int node;
-
- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rk3368-pmugrf");
- pmugrf = (struct rk3368_pmu_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
-
- rk_clrsetreg(&pmugrf->gpio0d_iomux,
- GPIO0D0_MASK | GPIO0D1_MASK |
- GPIO0D2_MASK | GPIO0D3_MASK,
- GPIO0D0_GPIO << GPIO0D0_SHIFT |
- GPIO0D1_GPIO << GPIO0D1_SHIFT |
- GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
- GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
- return 0;
-}
int board_init(void)
{
diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c
index 7e2edf4..9134994 100644
--- a/board/rockchip/kylin_rk3036/kylin_rk3036.c
+++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c
@@ -44,7 +44,7 @@
{
if (fastboot_key_pressed()) {
printf("enter fastboot!\n");
- setenv("preboot", "setenv preboot; fastboot usb0");
+ env_set("preboot", "setenv preboot; fastboot usb0");
}
return 0;
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index c2872e7..790a921 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -29,7 +29,7 @@
return 0;
if (is_valid_ethaddr(ethaddr))
- eth_setenv_enetaddr("ethaddr", ethaddr);
+ eth_env_set_enetaddr("ethaddr", ethaddr);
return 0;
}
diff --git a/board/ronetix/pm9261/Makefile b/board/ronetix/pm9261/Makefile
index 3860283..90835d3 100644
--- a/board/ronetix/pm9261/Makefile
+++ b/board/ronetix/pm9261/Makefile
@@ -11,5 +11,5 @@
#
obj-y += pm9261.o
-obj-y += led.o
+obj-$(CONFIG_RED_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 160f8f8..f338ff8 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -21,7 +21,6 @@
#include <lcd.h>
#include <atmel_lcdc.h>
-#include <dataflash.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
#include <net.h>
#endif
@@ -178,7 +177,7 @@
void lcd_show_board_info(void)
{
- ulong dram_size, nand_size, flash_size, dataflash_size;
+ ulong dram_size, nand_size, flash_size;
int i;
char temp[32];
@@ -201,17 +200,11 @@
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
flash_size += flash_info[i].size;
- dataflash_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
- dataflash_size += (unsigned int) dataflash_info[i].Device.pages_number *
- dataflash_info[i].Device.pages_size;
-
lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n"
"%ld MB DataFlash\n",
dram_size >> 20,
nand_size >> 20,
- flash_size >> 20,
- dataflash_size >> 20);
+ flash_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
@@ -219,11 +212,6 @@
int board_early_init_f(void)
{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOC);
-
- at91_seriald_hw_init();
-
return 0;
}
@@ -238,9 +226,6 @@
#ifdef CONFIG_CMD_NAND
pm9261_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_DRIVER_DM9000
pm9261_dm9000_hw_init();
#endif
diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile
index 43ea599..53e621d 100644
--- a/board/ronetix/pm9263/Makefile
+++ b/board/ronetix/pm9263/Makefile
@@ -11,5 +11,5 @@
#
obj-y += pm9263.o
-obj-y += led.o
+obj-$(CONFIG_AT91_LED) += led.o
obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 0c23bb6..8d20084 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -20,7 +20,6 @@
#include <asm/arch/gpio.h>
#include <lcd.h>
#include <atmel_lcdc.h>
-#include <dataflash.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
@@ -277,7 +276,7 @@
void lcd_show_board_info(void)
{
- ulong dram_size, nand_size, flash_size, dataflash_size;
+ ulong dram_size, nand_size, flash_size;
int i;
char temp[32];
@@ -300,17 +299,11 @@
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
flash_size += flash_info[i].size;
- dataflash_size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
- dataflash_size += (unsigned int) dataflash_info[i].Device.pages_number *
- dataflash_info[i].Device.pages_size;
-
lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n"
- "4 MB PSRAM, %ld MB DataFlash\n",
+ "4 MB PSRAM\n",
dram_size >> 20,
nand_size >> 20,
- flash_size >> 20,
- dataflash_size >> 20);
+ flash_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
@@ -318,12 +311,6 @@
int board_early_init_f(void)
{
- at91_periph_clk_enable(ATMEL_ID_PIOA);
- at91_periph_clk_enable(ATMEL_ID_PIOB);
- at91_periph_clk_enable(ATMEL_ID_PIOCDE);
-
- at91_seriald_hw_init();
-
return 0;
}
@@ -338,9 +325,6 @@
#ifdef CONFIG_CMD_NAND
pm9263_nand_hw_init();
#endif
-#ifdef CONFIG_HAS_DATAFLASH
- at91_spi0_hw_init(1 << 0);
-#endif
#ifdef CONFIG_MACB
pm9263_macb_hw_init();
#endif
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index 44f412d..ae2a6e6 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -179,7 +179,7 @@
if (board_is_odroidxu4())
return info;
- return getenv("dfu_alt_system");
+ return env_get("dfu_alt_system");
}
char *get_dfu_alt_boot(char *interface, char *devstr)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index b18eed2..4157349 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -51,7 +51,7 @@
alt_setting = get_dfu_alt_boot(interface, devstr);
if (alt_setting) {
- setenv("dfu_alt_boot", alt_setting);
+ env_set("dfu_alt_boot", alt_setting);
offset = snprintf(buf, buf_size, "%s", alt_setting);
}
@@ -71,7 +71,7 @@
status = "done\n";
}
- setenv("dfu_alt_info", alt_info);
+ env_set("dfu_alt_info", alt_info);
puts(status);
}
#endif
@@ -83,14 +83,14 @@
snprintf(info, ARRAY_SIZE(info), "%u.%u", (s5p_cpu_rev & 0xf0) >> 4,
s5p_cpu_rev & 0xf);
- setenv("soc_rev", info);
+ env_set("soc_rev", info);
snprintf(info, ARRAY_SIZE(info), "%x", s5p_cpu_id);
- setenv("soc_id", info);
+ env_set("soc_id", info);
#ifdef CONFIG_REVISION_TAG
snprintf(info, ARRAY_SIZE(info), "%x", get_board_rev());
- setenv("board_rev", info);
+ env_set("board_rev", info);
#endif
#ifdef CONFIG_OF_LIBFDT
const char *bdtype = "";
@@ -102,11 +102,11 @@
bdtype = "";
sprintf(info, "%s%s", bdname, bdtype);
- setenv("boardname", info);
+ env_set("boardname", info);
#endif
snprintf(info, ARRAY_SIZE(info), "%s%x-%s%s.dtb",
CONFIG_SYS_SOC, s5p_cpu_id, bdname, bdtype);
- setenv("fdtfile", info);
+ env_set("fdtfile", info);
#endif
}
#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index b4cb332..e40a2f6 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -66,7 +66,7 @@
#ifdef CONFIG_SET_DFU_ALT_INFO
char *get_dfu_alt_system(char *interface, char *devstr)
{
- return getenv("dfu_alt_system");
+ return env_get("dfu_alt_system");
}
char *get_dfu_alt_boot(char *interface, char *devstr)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 00059a1..f091338 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -469,7 +469,7 @@
#endif
#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
- setenv("lcdinfo", "lcd=s6e8ax0");
+ env_set("lcdinfo", "lcd=s6e8ax0");
#endif
}
#endif
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index cc6eaf7..549ac8b 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -397,6 +397,6 @@
vid->pclk_name = 1; /* MPLL */
vid->sclk_div = 1;
- setenv("lcdinfo", "lcd=ld9040");
+ env_set("lcdinfo", "lcd=ld9040");
}
#endif
diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c
index 5c8b436..af1a3e7 100644
--- a/board/samtec/vining_2000/vining_2000.c
+++ b/board/samtec/vining_2000/vining_2000.c
@@ -131,8 +131,8 @@
/* just to get secound mac address */
imx_get_mac_from_fuse(1, eth1addr);
- if (!getenv("eth1addr") && is_valid_ethaddr(eth1addr))
- eth_setenv_enetaddr("eth1addr", eth1addr);
+ if (!env_get("eth1addr") && is_valid_ethaddr(eth1addr))
+ eth_env_set_enetaddr("eth1addr", eth1addr);
imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
@@ -413,11 +413,11 @@
return ret;
if (val >= VAL_UPPER)
- setenv("pin_state", "connected");
+ env_set("pin_state", "connected");
else if (val < VAL_UPPER && val > VAL_LOWER)
- setenv("pin_state", "open");
+ env_set("pin_state", "open");
else
- setenv("pin_state", "button");
+ env_set("pin_state", "button");
return ret;
}
diff --git a/board/samtec/vining_fpga/socfpga.c b/board/samtec/vining_fpga/socfpga.c
index f888ecb..229b12f 100644
--- a/board/samtec/vining_fpga/socfpga.c
+++ b/board/samtec/vining_fpga/socfpga.c
@@ -69,31 +69,31 @@
/* Check EEPROM signature. */
if (!(data[0] == 0xa5 && data[1] == 0x5a)) {
puts("Invalid I2C EEPROM signature.\n");
- setenv("unit_serial", "invalid");
- setenv("unit_ident", "VINing-xxxx-STD");
- setenv("hostname", "vining-invalid");
+ env_set("unit_serial", "invalid");
+ env_set("unit_ident", "VINing-xxxx-STD");
+ env_set("hostname", "vining-invalid");
return 0;
}
/* If 'unit_serial' is already set, do nothing. */
- if (!getenv("unit_serial")) {
+ if (!env_get("unit_serial")) {
/* This field is Big Endian ! */
serial = (data[0x54] << 24) | (data[0x55] << 16) |
(data[0x56] << 8) | (data[0x57] << 0);
memset(str, 0, sizeof(str));
sprintf(str, "%07i", serial);
- setenv("unit_serial", str);
+ env_set("unit_serial", str);
}
- if (!getenv("unit_ident")) {
+ if (!env_get("unit_ident")) {
memset(str, 0, sizeof(str));
memcpy(str, &data[0x2e], 18);
- setenv("unit_ident", str);
+ env_set("unit_ident", str);
}
/* Set ethernet address from EEPROM. */
- if (!getenv("ethaddr") && is_valid_ethaddr(&data[0x62]))
- eth_setenv_enetaddr("ethaddr", &data[0x62]);
+ if (!env_get("ethaddr") && is_valid_ethaddr(&data[0x62]))
+ eth_env_set_enetaddr("ethaddr", &data[0x62]);
return 0;
}
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index b967227..65fa6af 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -121,7 +121,7 @@
char *ptr_env;
/* If button is not found we take default */
- ptr_env = getenv(envname);
+ ptr_env = env_get(envname);
if (NULL == ptr_env) {
gpio = def;
} else {
@@ -199,7 +199,7 @@
strcat(str_tmp, num);
/* If env var is not found we stop */
- ptr_env = getenv(str_tmp);
+ ptr_env = env_get(str_tmp);
if (NULL == ptr_env)
break;
diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c
index 6c869ed..b4f027a 100644
--- a/board/siemens/common/factoryset.c
+++ b/board/siemens/common/factoryset.c
@@ -266,7 +266,7 @@
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-static int factoryset_mac_setenv(void)
+static int factoryset_mac_env_set(void)
{
uint8_t mac_addr[6];
@@ -292,15 +292,15 @@
}
}
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
return 0;
}
-int factoryset_setenv(void)
+int factoryset_env_set(void)
{
int ret = 0;
- if (factoryset_mac_setenv() < 0)
+ if (factoryset_mac_env_set() < 0)
ret = -1;
return ret;
diff --git a/board/siemens/common/factoryset.h b/board/siemens/common/factoryset.h
index 3f23d5e..8602627 100644
--- a/board/siemens/common/factoryset.h
+++ b/board/siemens/common/factoryset.h
@@ -25,7 +25,7 @@
};
int factoryset_read_eeprom(int i2c_addr);
-int factoryset_setenv(void);
+int factoryset_env_set(void);
extern struct factorysetcontainer factory_dat;
#endif /* __FACTORYSET_H */
diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index d8869a0..c705b5a 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -272,13 +272,13 @@
#ifdef CONFIG_FACTORYSET
/* Set ASN in environment*/
if (factory_dat.asn[0] != 0) {
- setenv("dtb_name", (char *)factory_dat.asn);
+ env_set("dtb_name", (char *)factory_dat.asn);
} else {
/* dtb suffix gets added in load script */
- setenv("dtb_name", "am335x-draco");
+ env_set("dtb_name", "am335x-draco");
}
#else
- setenv("dtb_name", "am335x-draco");
+ env_set("dtb_name", "am335x-draco");
#endif
return 0;
@@ -330,7 +330,7 @@
int n = 0;
int rv;
- factoryset_setenv();
+ factoryset_env_set();
/* Set rgmii mode and enable rmii clock to be sourced from chip */
writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel);
diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index 750f338..8bbb035 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -225,7 +225,7 @@
if (!is_valid_ethaddr(factory_dat.mac))
printf("Error: no valid mac address\n");
else
- eth_setenv_enetaddr("ethaddr", factory_dat.mac);
+ eth_env_set_enetaddr("ethaddr", factory_dat.mac);
#endif /* #ifdef CONFIG_FACTORYSET */
/* Set rgmii mode and enable rmii clock to be sourced from chip */
@@ -446,12 +446,12 @@
factory_dat.pxm50 = 0;
sprintf(tmp, "%s_%s", factory_dat.asn,
factory_dat.comp_version);
- ret = setenv("boardid", tmp);
+ ret = env_set("boardid", tmp);
if (ret)
printf("error setting board id\n");
} else {
factory_dat.pxm50 = 1;
- ret = setenv("boardid", "PXM50_1.0");
+ ret = env_set("boardid", "PXM50_1.0");
if (ret)
printf("error setting board id\n");
}
diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index b3c666c..2a97414 100644
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -182,7 +182,7 @@
int rv;
#ifndef CONFIG_SPL_BUILD
- factoryset_setenv();
+ factoryset_env_set();
#endif
/* Set rgmii mode and enable rmii clock to be sourced from chip */
@@ -482,7 +482,7 @@
else
strcpy(tmp, "QMX7.E38_4.0");
- ret = setenv("boardid", tmp);
+ ret = env_set("boardid", tmp);
if (ret)
printf("error setting board id\n");
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index 4aa8d64..8390bdd 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -15,6 +15,7 @@
#include <command.h>
#include <common.h>
#include <dm.h>
+#include <environment.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
@@ -376,36 +377,36 @@
char *kern_size;
char *kern_size_fb;
- partitionset_active = getenv("partitionset_active");
+ partitionset_active = env_get("partitionset_active");
if (partitionset_active) {
if (partitionset_active[0] == 'A')
- setenv("partitionset_active", "B");
+ env_set("partitionset_active", "B");
else
- setenv("partitionset_active", "A");
+ env_set("partitionset_active", "A");
} else {
printf("partitionset_active missing.\n");
return -ENOENT;
}
- rootfs = getenv("rootfs");
- rootfs_fallback = getenv("rootfs_fallback");
- setenv("rootfs", rootfs_fallback);
- setenv("rootfs_fallback", rootfs);
+ rootfs = env_get("rootfs");
+ rootfs_fallback = env_get("rootfs_fallback");
+ env_set("rootfs", rootfs_fallback);
+ env_set("rootfs_fallback", rootfs);
- kern_size = getenv("kernel_size");
- kern_size_fb = getenv("kernel_size_fallback");
- setenv("kernel_size", kern_size_fb);
- setenv("kernel_size_fallback", kern_size);
+ kern_size = env_get("kernel_size");
+ kern_size_fb = env_get("kernel_size_fallback");
+ env_set("kernel_size", kern_size_fb);
+ env_set("kernel_size_fallback", kern_size);
- kern_off = getenv("kernel_Off");
- kern_off_fb = getenv("kernel_Off_fallback");
- setenv("kernel_Off", kern_off_fb);
- setenv("kernel_Off_fallback", kern_off);
+ kern_off = env_get("kernel_Off");
+ kern_off_fb = env_get("kernel_Off_fallback");
+ env_set("kernel_Off", kern_off_fb);
+ env_set("kernel_Off_fallback", kern_off);
- setenv("bootargs", '\0');
- setenv("upgrade_available", '\0');
- setenv("boot_retries", '\0');
- saveenv();
+ env_set("bootargs", '\0');
+ env_set("upgrade_available", '\0');
+ env_set("boot_retries", '\0');
+ env_save();
return 0;
}
@@ -417,14 +418,14 @@
unsigned long boot_retry = 0;
char boot_buf[10];
- upgrade_available = simple_strtoul(getenv("upgrade_available"), NULL,
+ upgrade_available = simple_strtoul(env_get("upgrade_available"), NULL,
10);
if (upgrade_available) {
- boot_retry = simple_strtoul(getenv("boot_retries"), NULL, 10);
+ boot_retry = simple_strtoul(env_get("boot_retries"), NULL, 10);
boot_retry++;
sprintf(boot_buf, "%lx", boot_retry);
- setenv("boot_retries", boot_buf);
- saveenv();
+ env_set("boot_retries", boot_buf);
+ env_save();
/*
* Here the boot_retries count is checked, and if the
diff --git a/board/silica/pengwyn/board.c b/board/silica/pengwyn/board.c
index 1f5a586..0429e6f 100644
--- a/board/silica/pengwyn/board.c
+++ b/board/silica/pengwyn/board.c
@@ -171,7 +171,7 @@
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
@@ -184,7 +184,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
return n;
}
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index fb691c2..004f370 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -38,7 +38,7 @@
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
char buf[64];
int f;
- int i = getenv_f("serial#", buf, sizeof(buf));
+ int i = env_get_f("serial#", buf, sizeof(buf));
#ifdef CONFIG_PCI
char *src;
#endif
@@ -409,7 +409,7 @@
printf ("hwmon IC init failed\n");
if (flag) {
- param = getenv("brightness");
+ param = env_get("brightness");
rc = param ? simple_strtol(param, NULL, 10) : -1;
if (rc < 0)
rc = DEFAULT_BRIGHTNESS;
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 1ccdfa8..7e59fb2 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -376,14 +376,14 @@
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_hummingboard())
- setenv("board_name", "HUMMINGBOARD");
+ env_set("board_name", "HUMMINGBOARD");
else
- setenv("board_name", "CUBOXI");
+ env_set("board_name", "CUBOXI");
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c
index d6a84db..a02304f 100644
--- a/board/spear/common/spr_misc.c
+++ b/board/spear/common/spr_misc.c
@@ -53,15 +53,15 @@
#if defined(CONFIG_CMD_NET)
uchar mac_id[6];
- if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
- eth_setenv_enetaddr("ethaddr", mac_id);
+ if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
+ eth_env_set_enetaddr("ethaddr", mac_id);
#endif
- setenv("verify", "n");
+ env_set("verify", "n");
#if defined(CONFIG_SPEAR_USBTTY)
- setenv("stdin", "usbtty");
- setenv("stdout", "usbtty");
- setenv("stderr", "usbtty");
+ env_set("stdin", "usbtty");
+ env_set("stdout", "usbtty");
+ env_set("stderr", "usbtty");
#ifndef CONFIG_SYS_NO_DCACHE
dcache_enable();
diff --git a/board/spear/x600/Kconfig b/board/spear/x600/Kconfig
index 6a1c5c7..59f2b1e 100644
--- a/board/spear/x600/Kconfig
+++ b/board/spear/x600/Kconfig
@@ -1,5 +1,8 @@
if TARGET_X600
+config SPL_LDSCRIPT
+ default "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
+
config SYS_BOARD
default "x600"
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 8c8abf6..d6763c3 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -314,13 +314,13 @@
char serialno[25];
uint32_t u_id_low, u_id_mid, u_id_high;
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
u_id_low = readl(&STM32_U_ID->u_id_low);
u_id_mid = readl(&STM32_U_ID->u_id_mid);
u_id_high = readl(&STM32_U_ID->u_id_high);
sprintf(serialno, "%08x%08x%08x",
u_id_high, u_id_mid, u_id_low);
- setenv("serial#", serialno);
+ env_set("serial#", serialno);
}
return 0;
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 43766e0..f4411f0 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -10,7 +10,9 @@
#
obj-y += board.o
obj-$(CONFIG_SUNXI_GMAC) += gmac.o
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SUNXI_AHCI) += ahci.o
+endif
obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o
obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o
obj-$(CONFIG_MACH_SUN7I) += dram_sun5i_auto.o
diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c
index 522e54a..a79b80c 100644
--- a/board/sunxi/ahci.c
+++ b/board/sunxi/ahci.c
@@ -1,5 +1,6 @@
#include <common.h>
#include <ahci.h>
+#include <dm.h>
#include <scsi.h>
#include <errno.h>
#include <asm/io.h>
@@ -13,9 +14,8 @@
/* This magic PHY initialisation was taken from the Allwinner releases
* and Linux driver, but is completely undocumented.
*/
-static int sunxi_ahci_phy_init(u32 base)
+static int sunxi_ahci_phy_init(u8 *reg_base)
{
- u8 *reg_base = (u8 *)base;
u32 reg_val;
int timeout;
@@ -70,10 +70,65 @@
return 0;
}
+#ifndef CONFIG_DM_SCSI
void scsi_init(void)
{
- if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0)
+ if (sunxi_ahci_phy_init((u8 *)SUNXI_SATA_BASE) < 0)
return;
ahci_init((void __iomem *)SUNXI_SATA_BASE);
}
+#else
+static int sunxi_sata_probe(struct udevice *dev)
+{
+ ulong base;
+ u8 *reg;
+ int ret;
+
+ base = dev_read_addr(dev);
+ if (base == FDT_ADDR_T_NONE) {
+ debug("%s: Failed to find address (err=%d\n)", __func__, ret);
+ return -EINVAL;
+ }
+ reg = (u8 *)base;
+ ret = sunxi_ahci_phy_init(reg);
+ if (ret) {
+ debug("%s: Failed to init phy (err=%d\n)", __func__, ret);
+ return ret;
+ }
+ ret = ahci_probe_scsi(dev, base);
+ if (ret) {
+ debug("%s: Failed to probe (err=%d\n)", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int sunxi_sata_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+ int ret;
+
+ ret = ahci_bind_scsi(dev, &scsi_dev);
+ if (ret) {
+ debug("%s: Failed to bind (err=%d\n)", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id sunxi_ahci_ids[] = {
+ { .compatible = "allwinner,sun4i-a10-ahci" },
+ { }
+};
+
+U_BOOT_DRIVER(ahci_sunxi_drv) = {
+ .name = "ahci_sunxi",
+ .id = UCLASS_AHCI,
+ .of_match = sunxi_ahci_ids,
+ .bind = sunxi_sata_bind,
+ .probe = sunxi_sata_probe,
+};
+#endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 800f412..70e0143 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -602,7 +602,7 @@
char *serial_string;
unsigned long long serial;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string) {
serial = simple_strtoull(serial_string, NULL, 16);
@@ -646,7 +646,7 @@
return;
}
/* otherwise assume .scr format (mkimage-type script) */
- setenv_hex("fel_scriptaddr", spl->fel_script_address);
+ env_set_hex("fel_scriptaddr", spl->fel_script_address);
}
/*
@@ -694,7 +694,7 @@
else
sprintf(ethaddr, "eth%daddr", i);
- if (getenv(ethaddr))
+ if (env_get(ethaddr))
continue;
/* Non OUI / registered MAC address */
@@ -705,14 +705,14 @@
mac_addr[4] = (sid[3] >> 8) & 0xff;
mac_addr[5] = (sid[3] >> 0) & 0xff;
- eth_setenv_enetaddr(ethaddr, mac_addr);
+ eth_env_set_enetaddr(ethaddr, mac_addr);
}
- if (!getenv("serial#")) {
+ if (!env_get("serial#")) {
snprintf(serial_string, sizeof(serial_string),
"%08x%08x", sid[0], sid[3]);
- setenv("serial#", serial_string);
+ env_set("serial#", serial_string);
}
}
}
@@ -721,11 +721,11 @@
{
__maybe_unused int ret;
- setenv("fel_booted", NULL);
- setenv("fel_scriptaddr", NULL);
+ env_set("fel_booted", NULL);
+ env_set("fel_scriptaddr", NULL);
/* determine if we are running in FEL mode */
if (!is_boot0_magic(SPL_ADDR + 4)) { /* eGON.BT0 */
- setenv("fel_booted", "1");
+ env_set("fel_booted", "1");
parse_spl_header(SPL_ADDR);
}
diff --git a/board/syteco/zmx25/zmx25.c b/board/syteco/zmx25/zmx25.c
index bdbf02a..85fda13 100644
--- a/board/syteco/zmx25/zmx25.c
+++ b/board/syteco/zmx25/zmx25.c
@@ -146,7 +146,7 @@
udelay(5000);
#endif
- e = getenv("gs_base_board");
+ e = env_get("gs_base_board");
if (e != NULL) {
if (strcmp(e, "G283") == 0) {
int key = gpio_get_value(IMX_GPIO_NR(2, 29));
@@ -156,9 +156,9 @@
gpio_set_value(IMX_GPIO_NR(1, 29), 0);
gpio_set_value(IMX_GPIO_NR(4, 21), 0);
- setenv("preboot", "run gs_slow_boot");
+ env_set("preboot", "run gs_slow_boot");
} else
- setenv("preboot", "run gs_fast_boot");
+ env_set("preboot", "run gs_fast_boot");
}
}
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index e89ee35..f79bb9d 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -76,8 +76,8 @@
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
@@ -322,11 +322,11 @@
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
@@ -340,9 +340,9 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
@@ -373,7 +373,7 @@
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ether_addr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c
index 25aeebc..8c38f14 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -94,7 +94,7 @@
omap_die_id_display();
- eth_addr = getenv("ethaddr");
+ eth_addr = env_get("ethaddr");
if (eth_addr)
return 0;
diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c
index 94251c6..8fe26a7 100644
--- a/board/technologic/ts4800/ts4800.c
+++ b/board/technologic/ts4800/ts4800.c
@@ -178,7 +178,7 @@
ethaddr[i] = (reg_mac[i / 4] >> ((i % 4) * 8)) & 0xFF;
if (is_valid_ethaddr(ethaddr)) {
- eth_setenv_enetaddr("ethaddr", ethaddr);
+ eth_env_set_enetaddr("ethaddr", ethaddr);
return 0;
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index 6e73ae1..9eaae50 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -261,7 +261,7 @@
if (ret)
return 0;
- eth_addr = getenv("ethaddr");
+ eth_addr = env_get("ethaddr");
if (!eth_addr)
TAM3517_READ_MAC_FROM_EEPROM(&info);
@@ -311,7 +311,7 @@
fb = (void *)0x88000000;
- s = getenv("panel");
+ s = env_get("panel");
if (s) {
index = simple_strtoul(s, NULL, 10);
if (index < ARRAY_SIZE(lcd_cfg))
diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig
new file mode 100644
index 0000000..d7aa487
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_LION_RK3368
+
+config SYS_BOARD
+ default "lion_rk3368"
+
+config SYS_VENDOR
+ default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+ default "lion_rk3368"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/theobroma-systems/lion_rk3368/MAINTAINERS b/board/theobroma-systems/lion_rk3368/MAINTAINERS
new file mode 100644
index 0000000..857f784d
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/MAINTAINERS
@@ -0,0 +1,10 @@
+LION-RK3368 (RK3368-uQ7 system-on-module)
+M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+M: Klaus Goger <klaus.goger@theobroma-systems.com>
+S: Maintained
+F: board/theobroma-systems/lion_rk3368
+F: include/configs/lion_rk3368.h
+F: arch/arm/dts/rk3368-lion.dts
+F: configs/lion-rk3368_defconfig
+W: https://www.theobroma-systems.com/rk3368-uq7/tech-specs
+T: git git://git.theobroma-systems.com/lion-u-boot.git
diff --git a/board/theobroma-systems/lion_rk3368/Makefile b/board/theobroma-systems/lion_rk3368/Makefile
new file mode 100644
index 0000000..f13a20b
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += lion_rk3368.o
diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README
new file mode 100644
index 0000000..47304fc
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/README
@@ -0,0 +1,60 @@
+Here is the step-by-step to boot to U-Boot on RK3368-uQ7
+
+Get the Source and build ATF
+============================
+
+ > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
+ > cd arm-trusted-firmware
+ > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31
+ > cp build/rk3368/release/bl31.bin ../u-boot/bl31-rk3368.bin
+
+Configure U-Boot
+================
+
+ > cd ../u-boot
+ > make lion-rk3368_defconfig
+
+Build the TPL/SPL stage
+=======================
+
+ > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm
+ > tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img
+ > cat spl/u-boot-spl-dtb.bin >> spl-3368.img
+
+Build the full U-Boot and a FIT image including the ATF
+=======================================================
+
+ > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
+
+Write to a SD-card
+==================
+
+ > dd if=spl-3368.img of=/dev/sdb seek=64
+ > dd if=u-boot.itb of=/dev/sdb seek=512
+
+
+If everything went according to plan, you should see the following
+output on UART0:
+
+<debug_uart> U-Boot TPL board init
+Trying to boot from BOOTROM
+Returning to boot ROM...
+Trying to boot from MMC1
+NOTICE: BL31: v1.3(release):v1.2-1320-gbf43a443
+NOTICE: BL31: Built : 18:04:47, Jul 5 2017
+
+
+U-Boot 2017.07-00158-g2395e99858 (Jul 18 2017 - 21:03:31 +0200)
+
+Model: Theobroma Systems RK3368-uQ7 SoM
+DRAM: 2 GiB
+MMC: dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0
+Using default environment
+
+In: serial@ff180000
+Out: serial@ff180000
+Err: serial@ff180000
+Net:
+Warning: ethernet@ff290000 (eth0) using random MAC address - d2:69:35:7e:d0:1e
+eth0: ethernet@ff290000
+Hit any key to stop autoboot: 2
diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
new file mode 100644
index 0000000..405750f
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * Minimal dts for a SPL FIT image payload.
+ *
+ * SPDX-License-Identifier: GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+/ {
+ description = "FIT image with U-Boot proper, ATF bl31, DTB";
+ #address-cells = <1>;
+
+ images {
+ uboot {
+ description = "U-Boot (64-bit)";
+ data = /incbin/("../../../u-boot-nodtb.bin");
+ type = "standalone";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00200000>;
+ };
+ atf {
+ description = "ARM Trusted Firmware";
+ data = /incbin/("../../../bl31-rk3368.bin");
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ load = <0x00010000>;
+ entry = <0x00010000>;
+ };
+
+ fdt {
+ description = "RK3368-uQ7 (Lion) flat device-tree";
+ data = /incbin/("../../../u-boot.dtb");
+ type = "flat_dt";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "conf";
+ conf {
+ description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
+ firmware = "uboot";
+ loadables = "atf";
+ fdt = "fdt";
+ };
+ };
+};
diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
new file mode 100644
index 0000000..73b1488
--- /dev/null
+++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/timer.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mach_cpu_init(void)
+{
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README
index 250e345..214281a 100644
--- a/board/theobroma-systems/puma_rk3399/README
+++ b/board/theobroma-systems/puma_rk3399/README
@@ -37,7 +37,7 @@
> cd arm-trusted-firmware
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
- > cp build/rk3399/release/bl31.bin ../u-boot
+ > cp build/rk3399/release/bl31.bin ../u-boot/bl31-rk3399.bin
Compile the M0 firmware
=======================
diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
index f93c251..520f846 100644
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
@@ -13,7 +13,7 @@
#address-cells = <1>;
images {
- uboot@1 {
+ uboot {
description = "U-Boot (64-bit)";
data = /incbin/("../../../u-boot-nodtb.bin");
type = "standalone";
@@ -21,23 +21,23 @@
compression = "none";
load = <0x00200000>;
};
- atf@1 {
+ atf {
description = "ARM Trusted Firmware";
- data = /incbin/("../../../bl31.bin");
+ data = /incbin/("../../../bl31-rk3399.bin");
type = "firmware";
arch = "arm64";
compression = "none";
load = <0x00001000>;
entry = <0x00001000>;
};
- pmu@1 {
+ pmu {
description = "Cortex-M0 firmware";
data = /incbin/("../../../rk3399m0.bin");
type = "pmu-firmware";
compression = "none";
load = <0xff8c0000>;
};
- fdt@1 {
+ fdt {
description = "RK3399-Q7 (Puma) flat device-tree";
data = /incbin/("../../../u-boot.dtb");
type = "flat_dt";
@@ -46,12 +46,12 @@
};
configurations {
- default = "conf@1";
- conf@1 {
+ default = "conf";
+ conf {
description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
- firmware = "uboot@1";
- loadables = "atf@1";
- fdt = "fdt@1";
+ firmware = "uboot";
+ loadables = "atf";
+ fdt = "fdt";
};
};
};
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 36e9cd7..c6f8eed 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -9,20 +9,11 @@
#include <ram.h>
#include <dm/pinctrl.h>
#include <dm/uclass-internal.h>
-#include <misc.h>
#include <asm/setup.h>
#include <asm/arch/periph.h>
#include <power/regulator.h>
#include <u-boot/sha256.h>
-#define RK3399_CPUID_OFF 0x7
-#define RK3399_CPUID_LEN 0x10
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define RK3399_CPUID_OFF 0x7
-#define RK3399_CPUID_LEN 0x10
-
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
@@ -72,13 +63,13 @@
{
#if CONFIG_IS_ENABLED(CMD_NET)
int ret;
- const char *cpuid = getenv("cpuid#");
+ const char *cpuid = env_get("cpuid#");
u8 hash[SHA256_SUM_LEN];
int size = sizeof(hash);
u8 mac_addr[6];
/* Only generate a MAC address, if none is set in the environment */
- if (getenv("ethaddr"))
+ if (env_get("ethaddr"))
return;
if (!cpuid) {
@@ -98,7 +89,7 @@
/* Make this a valid MAC address and set it */
mac_addr[0] &= 0xfe; /* clear multicast bit */
mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
#endif
return;
@@ -107,11 +98,14 @@
static void setup_serial(void)
{
#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+ const u32 cpuid_offset = 0x7;
+ const u32 cpuid_length = 0x10;
+
struct udevice *dev;
int ret, i;
- u8 cpuid[RK3399_CPUID_LEN];
- u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2];
- char cpuid_str[RK3399_CPUID_LEN * 2 + 1];
+ u8 cpuid[cpuid_length];
+ u8 low[cpuid_length/2], high[cpuid_length/2];
+ char cpuid_str[cpuid_length * 2 + 1];
u64 serialno;
char serialno_str[16];
@@ -124,7 +118,7 @@
}
/* read the cpu_id range from the efuses */
- ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));
+ ret = misc_read(dev, cpuid_offset, &cpuid, sizeof(cpuid));
if (ret) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
@@ -150,8 +144,8 @@
serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
- setenv("cpuid#", cpuid_str);
- setenv("serial#", serialno_str);
+ env_set("cpuid#", cpuid_str);
+ env_set("serial#", serialno_str);
#endif
return;
@@ -171,7 +165,7 @@
char *serial_string;
u64 serial = 0;
- serial_string = getenv("serial#");
+ serial_string = env_get("serial#");
if (serial_string)
serial = simple_strtoull(serial_string, NULL, 16);
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 0a16529..1a52bff 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -249,8 +249,8 @@
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
@@ -731,7 +731,7 @@
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
#endif
#if !defined(CONFIG_SPL_BUILD)
@@ -745,11 +745,11 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
@@ -761,9 +761,9 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
#endif
@@ -908,7 +908,7 @@
#if defined(CONFIG_USB_ETHER) && \
(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+ eth_env_set_enetaddr("usbnet_devaddr", mac_addr);
rv = usb_eth_initialize(bis);
if (rv < 0)
diff --git a/board/ti/am3517crane/am3517crane.c b/board/ti/am3517crane/am3517crane.c
index 5fa319d..136cc43 100644
--- a/board/ti/am3517crane/am3517crane.c
+++ b/board/ti/am3517crane/am3517crane.c
@@ -43,7 +43,7 @@
*/
int misc_init_r(void)
{
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 933596d..2c417e7 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -626,7 +626,7 @@
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
#endif
return 0;
}
@@ -791,10 +791,10 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
puts("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl(&cdev->macid1l);
@@ -806,9 +806,9 @@
mac_addr[4] = mac_lo & 0xFF;
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
if (board_is_eposevm()) {
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 00a31a97..7e7056c 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -592,7 +592,7 @@
/* we will let default be "no lcd" */
}
out:
- setenv("idk_lcd", idk_lcd);
+ env_set("idk_lcd", idk_lcd);
return;
}
@@ -612,7 +612,7 @@
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
/*
* Set the GPIO7 Pad to POWERHOLD. This has higher priority
@@ -742,8 +742,8 @@
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
@@ -933,11 +933,11 @@
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
@@ -949,9 +949,9 @@
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
@@ -986,9 +986,9 @@
for (i = 0; i < num_macs; i++) {
u64_to_mac(mac1 + i, mac_addr);
if (is_valid_ethaddr(mac_addr)) {
- eth_setenv_enetaddr_by_index("eth",
- i + 2,
- mac_addr);
+ eth_env_set_enetaddr_by_index("eth",
+ i + 2,
+ mac_addr);
}
}
}
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 887b577..2f62fbe 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -341,16 +341,16 @@
switch (get_board_revision()) {
case REVISION_AXBX:
printf("Beagle Rev Ax/Bx\n");
- setenv("beaglerev", "AxBx");
+ env_set("beaglerev", "AxBx");
break;
case REVISION_CX:
printf("Beagle Rev C1/C2/C3\n");
- setenv("beaglerev", "Cx");
+ env_set("beaglerev", "Cx");
MUX_BEAGLE_C();
break;
case REVISION_C4:
printf("Beagle Rev C4\n");
- setenv("beaglerev", "C4");
+ env_set("beaglerev", "C4");
MUX_BEAGLE_C();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
@@ -360,7 +360,7 @@
break;
case REVISION_XM_AB:
printf("Beagle xM Rev A/B\n");
- setenv("beaglerev", "xMAB");
+ env_set("beaglerev", "xMAB");
MUX_BEAGLE_XM();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
@@ -371,7 +371,7 @@
break;
case REVISION_XM_C:
printf("Beagle xM Rev C\n");
- setenv("beaglerev", "xMC");
+ env_set("beaglerev", "xMC");
MUX_BEAGLE_XM();
/* Set VAUX2 to 1.8V for EHCI PHY */
twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
@@ -397,14 +397,14 @@
expansion_config.revision,
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
- setenv("buddy", "zippy");
+ env_set("buddy", "zippy");
break;
case TINCANTOOLS_ZIPPY2:
printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
- setenv("buddy", "zippy2");
+ env_set("buddy", "zippy2");
break;
case TINCANTOOLS_TRAINER:
printf("Recognized Tincantools Trainer board (rev %d %s)\n",
@@ -412,37 +412,37 @@
expansion_config.fab_revision);
MUX_TINCANTOOLS_ZIPPY();
MUX_TINCANTOOLS_TRAINER();
- setenv("buddy", "trainer");
+ env_set("buddy", "trainer");
break;
case TINCANTOOLS_SHOWDOG:
printf("Recognized Tincantools Showdow board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
/* Place holder for DSS2 definition for showdog lcd */
- setenv("defaultdisplay", "showdoglcd");
- setenv("buddy", "showdog");
+ env_set("defaultdisplay", "showdoglcd");
+ env_set("buddy", "showdog");
break;
case KBADC_BEAGLEFPGA:
printf("Recognized KBADC Beagle FPGA board\n");
MUX_KBADC_BEAGLEFPGA();
- setenv("buddy", "beaglefpga");
+ env_set("buddy", "beaglefpga");
break;
case LW_BEAGLETOUCH:
printf("Recognized Liquidware BeagleTouch board\n");
- setenv("buddy", "beagletouch");
+ env_set("buddy", "beagletouch");
break;
case BRAINMUX_LCDOG:
printf("Recognized Brainmux LCDog board\n");
- setenv("buddy", "lcdog");
+ env_set("buddy", "lcdog");
break;
case BRAINMUX_LCDOGTOUCH:
printf("Recognized Brainmux LCDog Touch board\n");
- setenv("buddy", "lcdogtouch");
+ env_set("buddy", "lcdogtouch");
break;
case BBTOYS_WIFI:
printf("Recognized BeagleBoardToys WiFi board\n");
MUX_BBTOYS_WIFI()
- setenv("buddy", "bbtoys-wifi");
+ env_set("buddy", "bbtoys-wifi");
break;
case BBTOYS_VGA:
printf("Recognized BeagleBoardToys VGA board\n");
@@ -459,20 +459,20 @@
case LSR_COM6L_ADPT:
printf("Recognized LSR COM6L Adapter Board\n");
MUX_BBTOYS_WIFI()
- setenv("buddy", "lsr-com6l-adpt");
+ env_set("buddy", "lsr-com6l-adpt");
break;
case BEAGLE_NO_EEPROM:
printf("No EEPROM on expansion board\n");
- setenv("buddy", "none");
+ env_set("buddy", "none");
break;
default:
printf("Unrecognized expansion board: %x\n",
expansion_config.device_vendor);
- setenv("buddy", "unknown");
+ env_set("buddy", "unknown");
}
if (expansion_config.content == 1)
- setenv(expansion_config.env_var, expansion_config.env_setting);
+ env_set(expansion_config.env_var, expansion_config.env_setting);
twl4030_power_init();
switch (get_board_revision()) {
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 1da5ace..6f07ec3 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -379,21 +379,21 @@
struct ti_common_eeprom *ep = TI_EEPROM_DATA;
if (name)
- setenv("board_name", name);
+ env_set("board_name", name);
else if (ep->name)
- setenv("board_name", ep->name);
+ env_set("board_name", ep->name);
else
- setenv("board_name", unknown);
+ env_set("board_name", unknown);
if (ep->version)
- setenv("board_rev", ep->version);
+ env_set("board_rev", ep->version);
else
- setenv("board_rev", unknown);
+ env_set("board_rev", unknown);
if (ep->serial)
- setenv("board_serial", ep->serial);
+ env_set("board_serial", ep->serial);
else
- setenv("board_serial", unknown);
+ env_set("board_serial", unknown);
}
static u64 mac_to_u64(u8 mac[6])
@@ -451,8 +451,8 @@
for (i = 0; i < num_macs; i++) {
u64_to_mac(mac1 + i, mac_addr);
if (is_valid_ethaddr(mac_addr)) {
- eth_setenv_enetaddr_by_index("eth", i + index,
- mac_addr);
+ eth_env_set_enetaddr_by_index("eth", i + index,
+ mac_addr);
}
}
}
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 7d36f03..93d3d0b 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -558,7 +558,7 @@
* on HS devices.
*/
if (get_device_type() == HS_DEVICE)
- setenv("boot_fit", "1");
+ env_set("boot_fit", "1");
omap_die_id_serial();
omap_set_fastboot_vars();
@@ -825,8 +825,8 @@
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
- env_relocate_spec();
- if (getenv_yesno("boot_os") != 1)
+ env_load();
+ if (env_get_yesno("boot_os") != 1)
return 1;
#endif
@@ -893,11 +893,11 @@
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
@@ -909,9 +909,9 @@
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
mac_addr[5] = mac_lo & 0xFF;
- if (!getenv("eth1addr")) {
+ if (!env_get("eth1addr")) {
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("eth1addr", mac_addr);
+ eth_env_set_enetaddr("eth1addr", mac_addr);
}
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
diff --git a/board/ti/evm/MAINTAINERS b/board/ti/evm/MAINTAINERS
index 612a08a..cd315c1 100644
--- a/board/ti/evm/MAINTAINERS
+++ b/board/ti/evm/MAINTAINERS
@@ -1,5 +1,5 @@
EVM BOARD
-M: Tom Rini <trini@konsulko.com>
+M: Derald D. Woods <woods.technical@gmail.com>
S: Maintained
F: board/ti/evm/
F: include/configs/omap3_evm.h
diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fe8e793..6bf57f9 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -12,6 +12,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
@@ -22,14 +24,35 @@
#include <i2c.h>
#include <twl4030.h>
#include <asm/mach-types.h>
+#include <asm/omap_musb.h>
#include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
#include "evm.h"
-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
DECLARE_GLOBAL_DATA_PTR;
+static const struct ns16550_platdata omap3_evm_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+ "ns16550_serial",
+ &omap3_evm_serial
+};
+
static u32 omap3_evm_version;
u32 get_omap3_evm_rev(void)
@@ -60,25 +83,19 @@
default:
omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
}
-#else
+#else /* !CONFIG_CMD_NET */
#if defined(CONFIG_STATIC_BOARD_REV)
- /*
- * Look for static defintion of the board revision
- */
+ /* Look for static defintion of the board revision */
omap3_evm_version = CONFIG_STATIC_BOARD_REV;
#else
- /*
- * Fallback to the default above.
- */
+ /* Fallback to the default above */
omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
}
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
u8 omap3_evm_need_extvbus(void)
{
u8 retval = 0;
@@ -88,7 +105,7 @@
return retval;
}
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
/*
* Routine: board_init
@@ -105,7 +122,7 @@
return 0;
}
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
@@ -138,7 +155,34 @@
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
timings->mr = MICRON_V_MR_165;
}
-#endif
+#endif /* CONFIG_SPL_BUILD */
+
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+ .multipoint = 1,
+ .dyn_fifo = 1,
+ .num_eps = 16,
+ .ram_bits = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+ .interface_type = MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+ .mode = MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+ .config = &musb_config,
+ .power = 100,
+ .platform_ops = &omap2430_ops,
+ .board_data = &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
/*
* Routine: misc_init_r
@@ -146,8 +190,9 @@
*/
int misc_init_r(void)
{
+ twl4030_power_init();
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#ifdef CONFIG_SYS_I2C_OMAP24XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
@@ -161,6 +206,13 @@
#endif
omap_die_id_display();
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+ omap_die_id_usbethaddr();
+#endif
return 0;
}
@@ -175,7 +227,7 @@
MUX_EVM();
}
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
@@ -237,7 +289,7 @@
int board_eth_init(bd_t *bis)
{
int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
#define STR_ENV_ETHADDR "ethaddr"
struct eth_device *dev;
@@ -245,16 +297,16 @@
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
} else {
printf("omap3evm: Couldn't get eth device\n");
rc = -1;
}
}
-#endif
+#endif /* CONFIG_SMC911X */
return rc;
}
#endif /* CONFIG_CMD_NET */
@@ -264,11 +316,35 @@
{
return omap_mmc_init(0, 0, 0, -1, -1);
}
-#endif
-#if defined(CONFIG_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+ return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 91e9b88..0f8268b 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -278,12 +278,19 @@
/* TS_PEN_IRQ */\
MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\
/* - LAN_INTR*/\
- MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*McSPI1_CS3*/\
- MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*McSPI2_CLK*/\
- MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*McSPI2_SIMO*/\
- MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*McSPI2_SOMI*/\
- MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*McSPI2_CS0*/\
- MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)) /*HSUSB2_DATA2*/\
+ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)) /*HSUSB2_DATA7*/\
+ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)) /*HSUSB2_DATA4*/\
+ MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)) /*HSUSB2_DATA5*/\
+ MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)) /*HSUSB2_DATA6*/\
+ MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)) /*HSUSB2_DATA3*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)) /*HSUSB2_DATA1*/\
/*Control and debug */\
MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) /*SYS_32K*/\
MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) /*SYS_CLKREQ*/\
@@ -318,12 +325,6 @@
MUX_VAL(CP(ETK_D7_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D7*/\
MUX_VAL(CP(ETK_D8_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D8*/\
MUX_VAL(CP(ETK_D9_ES2 ), (IEN | PTD | DIS | M0)) /*ETK_D9*/\
- MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) /*ETK_D10*/\
- MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) /*ETK_D11*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) /*ETK_D12*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)) /*ETK_D13*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)) /*ETK_D14*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)) /*ETK_D15*/\
/*Die to Die */\
MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)) /*d2d_mcad1*/\
MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)) /*d2d_mcad2*/\
diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README
index 5430c7d..a26b7f8 100644
--- a/board/ti/ks2_evm/README
+++ b/board/ti/ks2_evm/README
@@ -61,7 +61,7 @@
Supported boot modes:
- SPI NOR boot
- - AEMIF NAND boot
+ - AEMIF NAND boot (K2E, K2L and K2HK)
- UART boot
- MMC boot (Only on K2G)
@@ -69,7 +69,7 @@
- u-boot.bin: for loading and running u-boot.bin through
Texas Instruments code composure studio (CCS) and for UART boot.
- u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
- - MLO: gpimage for programming AEMIF NAND flash for NAND boot, MMC boot.
+ - MLO: gpimage for programming NAND flash for NAND boot, MMC boot.
Build instructions:
===================
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index c61baee..ae86dfb 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -74,7 +74,7 @@
char *env;
int res = -1;
- env = getenv(env_name);
+ env = env_get(env_name);
if (env)
res = simple_strtol(env, NULL, 0);
@@ -151,9 +151,9 @@
u32 ddr3a_size;
int unitrd_fixup = 0;
- env = getenv("mem_lpae");
+ env = env_get("mem_lpae");
lpae = env && simple_strtol(env, NULL, 0);
- env = getenv("uinitrd_fixup");
+ env = env_get("uinitrd_fixup");
unitrd_fixup = env && simple_strtol(env, NULL, 0);
ddr3a_size = 0;
@@ -180,13 +180,13 @@
}
/* reserve memory at start of bank */
- env = getenv("mem_reserve_head");
+ env = env_get("mem_reserve_head");
if (env) {
start[0] += ustrtoul(env, &endp, 0);
size[0] -= ustrtoul(env, &endp, 0);
}
- env = getenv("mem_reserve");
+ env = env_get("mem_reserve");
if (env)
size[0] -= ustrtoul(env, &endp, 0);
@@ -251,7 +251,7 @@
char *env;
u64 *reserve_start;
- env = getenv("mem_lpae");
+ env = env_get("mem_lpae");
lpae = env && simple_strtol(env, NULL, 0);
if (lpae) {
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 2160576..15f0f54 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -310,9 +310,9 @@
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (board_is_k2g_gp())
- setenv("board_name", "66AK2GGP\0");
+ env_set("board_name", "66AK2GGP\0");
else if (board_is_k2g_ice())
- setenv("board_name", "66AK2GIC\0");
+ env_set("board_name", "66AK2GIC\0");
#endif
return 0;
}
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 6ffb53c..c59e58a 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -103,7 +103,7 @@
board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", "panda-es");
+ env_set("board_name", "panda-es");
#endif
board_id = ((board_id4 << 4) | (board_id3 << 3) |
(board_id2 << 2) | (board_id1 << 1) | (board_id0));
@@ -117,7 +117,7 @@
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
- setenv("board_name", "panda-a4");
+ env_set("board_name", "panda-a4");
#endif
}
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 055a29d..cdde6a8 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -166,7 +166,7 @@
uint8_t mac_addr[6];
uint32_t mac_hi, mac_lo;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
@@ -179,7 +179,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
printf("Unable to read MAC address. Set <ethaddr>\n");
}
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 9d6c3d6..cb40cc5 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -38,7 +38,7 @@
uint32_t mac_hi, mac_lo;
struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
- if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
printf("<ethaddr> not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
@@ -51,7 +51,7 @@
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
else
printf("Unable to read MAC address. Set <ethaddr>\n");
}
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index d31eeb8..741b3ac 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -102,7 +102,7 @@
CONFIG_DM9000_BASE, GPMC_SIZE_16M);
/* Use OMAP DIE_ID as MAC address */
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
printf("ethaddr not set, using Die ID\n");
die_id_0 = readl(&id_base->die_id_0);
enetaddr[0] = 0x02; /* locally administered */
@@ -111,7 +111,7 @@
enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
enetaddr[5] = (die_id_0 & 0x000000ff);
- eth_setenv_enetaddr("ethaddr", enetaddr);
+ eth_env_set_enetaddr("ethaddr", enetaddr);
}
#endif
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c
index c7e519c..5de61e7 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -61,6 +61,7 @@
#ifdef CONFIG_PCI_TEGRA
int tegra_pcie_board_init(void)
{
+ /* TODO: Convert to driver model
struct udevice *pmic;
int err;
@@ -94,6 +95,7 @@
error("failed to set GPIO#2 high: %d\n", err);
return err;
}
+ */
/* Reset I210 Gigabit Ethernet Controller */
gpio_request(LAN_RESET_N, "LAN_RESET_N");
@@ -110,6 +112,7 @@
gpio_direction_output(TEGRA_GPIO(O, 6), 0);
/* Make sure LDO9 and LDO10 are initially enabled @ 0V */
+ /* TODO: Convert to driver model
err = as3722_ldo_enable(pmic, 9);
if (err < 0) {
error("failed to enable LDO9: %d\n", err);
@@ -130,6 +133,7 @@
error("failed to set LDO10 voltage: %d\n", err);
return err;
}
+ */
mdelay(100);
@@ -137,6 +141,7 @@
gpio_set_value(TEGRA_GPIO(O, 6), 1);
/* Enable LDO9 and LDO10 for +V3.3_ETH on patched prototypes */
+ /* TODO: Convert to driver model
err = as3722_ldo_set_voltage(pmic, 9, 0xff);
if (err < 0) {
error("failed to set LDO9 voltage: %d\n", err);
@@ -147,6 +152,7 @@
error("failed to set LDO10 voltage: %d\n", err);
return err;
}
+ */
mdelay(100);
gpio_set_value(LAN_RESET_N, 1);
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 8e5613c..7a3e493 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <dm.h>
+#include <environment.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/mxc_hdmi.h>
@@ -803,7 +804,7 @@
rev = get_board_rev();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
- setenv("board_rev", env_str);
+ env_set("board_rev", env_str);
#ifndef CONFIG_TDX_APALIS_IMX6_V1_0
if ((rev & 0xfff0) == 0x0100) {
@@ -813,12 +814,12 @@
setup_iomux_dce_uart();
/* if using the default device tree, use version for V1.0 HW */
- fdt_env = getenv("fdt_file");
+ fdt_env = env_get("fdt_file");
if ((fdt_env != NULL) && (strcmp(FDT_FILE, fdt_env) == 0)) {
- setenv("fdt_file", FDT_FILE_V1_0);
+ env_set("fdt_file", FDT_FILE_V1_0);
printf("patching fdt_file to " FDT_FILE_V1_0 "\n");
#ifndef CONFIG_ENV_IS_NOWHERE
- saveenv();
+ env_save();
#endif
}
}
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index cbf7aa9..dbcd233 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -676,7 +676,7 @@
rev = get_board_rev();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
- setenv("board_rev", env_str);
+ env_set("board_rev", env_str);
#endif
return 0;
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index 46dd15b..3858af9 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -535,7 +535,7 @@
if (((src->sbmr2 & SRC_SBMR2_BMOD_MASK) >> SRC_SBMR2_BMOD_SHIFT)
== SRC_SBMR2_BMOD_SERIAL) {
printf("Serial Downloader recovery mode, disable autoboot\n");
- setenv("bootdelay", "-1");
+ env_set("bootdelay", "-1");
}
return 0;
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 1bf8ca8..328c4c0 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -278,7 +278,7 @@
len = cli_readline(message);
it = console_buffer[0];
- soc = getenv("soc");
+ soc = env_get("soc");
if (!strcmp("mx6", soc)) {
#ifdef CONFIG_MACH_TYPE
if (it == 'y' || it == 'Y')
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index 0d26787..b4e4727 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -80,24 +80,24 @@
tdx_hw_tag.ver_minor,
(char)tdx_hw_tag.ver_assembly + 'A');
- setenv("serial#", tdx_serial_str);
+ env_set("serial#", tdx_serial_str);
/*
* Check if environment contains a valid MAC address,
* set the one from config block if not
*/
- if (!eth_getenv_enetaddr("ethaddr", ethaddr))
- eth_setenv_enetaddr("ethaddr", (u8 *)&tdx_eth_addr);
+ if (!eth_env_get_enetaddr("ethaddr", ethaddr))
+ eth_env_set_enetaddr("ethaddr", (u8 *)&tdx_eth_addr);
#ifdef CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR
- if (!eth_getenv_enetaddr("eth1addr", ethaddr)) {
+ if (!eth_env_get_enetaddr("eth1addr", ethaddr)) {
/*
* Secondary MAC address is allocated from block
* 0x100000 higher then the first MAC address
*/
memcpy(ethaddr, &tdx_eth_addr, 6);
ethaddr[3] += 0x10;
- eth_setenv_enetaddr("eth1addr", ethaddr);
+ eth_env_set_enetaddr("eth1addr", ethaddr);
}
#endif
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index fcdea34..14991fd 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -251,7 +251,7 @@
int board_late_init(void)
{
- setenv("board_name", tqma6_get_boardname());
+ env_set("board_name", tqma6_get_boardname());
tqma6_bb_board_late_init();
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 276c625..7fa1289 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -437,7 +437,7 @@
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- setenv("board_name", board_string());
+ env_set("board_name", board_string());
#endif
return 0;
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
index 7534935..a359626 100644
--- a/board/udoo/udoo.c
+++ b/board/udoo/udoo.c
@@ -255,9 +255,9 @@
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_cpu_type(MXC_CPU_MX6Q))
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
#endif
return 0;
}
diff --git a/board/varisys/common/sys_eeprom.c b/board/varisys/common/sys_eeprom.c
index b55ab81..69f596a 100644
--- a/board/varisys/common/sys_eeprom.c
+++ b/board/varisys/common/sys_eeprom.c
@@ -401,7 +401,7 @@
mac[5]);
printf("MAC: %s\n", ethaddr);
- setenv(envvar, ethaddr);
+ env_set(envvar, ethaddr);
}
return ret;
@@ -486,8 +486,8 @@
/* Only initialize environment variables that are blank
* (i.e. have not yet been set)
*/
- if (!getenv(enetvar))
- setenv(enetvar, ethaddr);
+ if (!env_get(enetvar))
+ env_set(enetvar, ethaddr);
}
}
diff --git a/board/varisys/cyrus/cyrus.c b/board/varisys/cyrus/cyrus.c
index 74f4473..30f518a 100644
--- a/board/varisys/cyrus/cyrus.c
+++ b/board/varisys/cyrus/cyrus.c
@@ -87,8 +87,8 @@
ft_cpu_setup(blob, bd);
- base = getenv_bootm_low();
- size = getenv_bootm_size();
+ base = env_get_bootm_low();
+ size = env_get_bootm_size();
fdt_fixup_memory(blob, (u64)base, (u64)size);
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index d3b1f15..cb39190 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -68,7 +68,7 @@
printf("DIPs: 0x%1x\n", (~dips) & 0xf);
if ((dips & 0xf) == 0xe)
- setenv("console", "ttyUSB0,115200n8");
+ env_set("console", "ttyUSB0,115200n8");
return 0;
}
@@ -373,7 +373,7 @@
return -ENODEV;
}
- setenv("board_name", model);
+ env_set("board_name", model);
#endif
return 0;
@@ -453,11 +453,11 @@
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
- if (!getenv("ethaddr")) {
+ if (!env_get("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ethaddr(mac_addr))
- eth_setenv_enetaddr("ethaddr", mac_addr);
+ eth_env_set_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 1dbc966..adfcf48 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -425,14 +425,14 @@
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
if (is_mx6dq())
- setenv("board_rev", "MX6Q");
+ env_set("board_rev", "MX6Q");
else
- setenv("board_rev", "MX6DL");
+ env_set("board_rev", "MX6DL");
if (is_revc1())
- setenv("board_name", "C1");
+ env_set("board_name", "C1");
else
- setenv("board_name", "B1");
+ env_set("board_name", "B1");
#endif
return 0;
}
diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig
index 1fde4b2..4bc34ed 100644
--- a/board/work-microwave/work_92105/Kconfig
+++ b/board/work-microwave/work_92105/Kconfig
@@ -17,4 +17,11 @@
help
This controls the LCD driver.
+config CMD_MAX6957
+ bool "Enable 'max6957aax' PMIC command"
+ help
+ DEPRECATED: Needs conversion to driver model.
+
+ This allows PMIC registers to be read and written.
+
endif
diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c
index 37a7363..c997cea 100644
--- a/board/work-microwave/work_92105/work_92105_display.c
+++ b/board/work-microwave/work_92105/work_92105_display.c
@@ -228,7 +228,7 @@
i2c_write(0x2c, 0x01, 1, &enable_backlight, 1);
/* set display contrast */
- display_contrast_str = getenv("fwopt_dispcontrast");
+ display_contrast_str = env_get("fwopt_dispcontrast");
if (display_contrast_str)
display_contrast = simple_strtoul(display_contrast_str,
NULL, 10);
diff --git a/board/xes/common/board.c b/board/xes/common/board.c
index 4ed6f50..b76eb94 100644
--- a/board/xes/common/board.c
+++ b/board/xes/common/board.c
@@ -51,13 +51,13 @@
/* Display board specific information */
puts(" ");
- i = getenv_f("board_rev", buf, sizeof(buf));
+ i = env_get_f("board_rev", buf, sizeof(buf));
if (i > 0)
printf("Rev %s, ", buf);
- i = getenv_f("serial#", buf, sizeof(buf));
+ i = env_get_f("serial#", buf, sizeof(buf));
if (i > 0)
printf("Serial# %s, ", buf);
- i = getenv_f("board_cfg", buf, sizeof(buf));
+ i = env_get_f("board_cfg", buf, sizeof(buf));
if (i > 0)
printf("Cfg %s", buf);
puts("\n");
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index b2fbecf..90ef542 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -86,22 +86,22 @@
{
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
case ZYNQ_BM_QSPI:
- setenv("modeboot", "qspiboot");
+ env_set("modeboot", "qspiboot");
break;
case ZYNQ_BM_NAND:
- setenv("modeboot", "nandboot");
+ env_set("modeboot", "nandboot");
break;
case ZYNQ_BM_NOR:
- setenv("modeboot", "norboot");
+ env_set("modeboot", "norboot");
break;
case ZYNQ_BM_SD:
- setenv("modeboot", "sdboot");
+ env_set("modeboot", "sdboot");
break;
case ZYNQ_BM_JTAG:
- setenv("modeboot", "jtagboot");
+ env_set("modeboot", "jtagboot");
break;
default:
- setenv("modeboot", "");
+ env_set("modeboot", "");
break;
}
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 9d69d65..75aab92 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -20,7 +20,11 @@
endif
endif
-obj-$(CONFIG_SPL_BUILD) += $(init-objs)
+ifdef_any_of = $(filter-out undefined,$(foreach v,$(1),$(origin $(v))))
+
+ifneq ($(call ifdef_any_of, CONFIG_ZYNQMP_PSU_INIT_ENABLED CONFIG_SPL_BUILD),)
+obj-y += $(init-objs)
+endif
# Suppress "warning: function declaration isn't a prototype"
CFLAGS_REMOVE_psu_init_gpl.o := -Wstrict-prototypes
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 51a3d9f..d17868b 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -75,36 +75,70 @@
.name = "17eg",
},
};
+#endif
-static int chip_id(void)
+int chip_id(unsigned char id)
{
struct pt_regs regs;
- regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID;
- regs.regs[1] = 0;
- regs.regs[2] = 0;
- regs.regs[3] = 0;
+ int val = -EINVAL;
- smc_call(®s);
+ if (current_el() != 3) {
+ regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID;
+ regs.regs[1] = 0;
+ regs.regs[2] = 0;
+ regs.regs[3] = 0;
- /*
- * SMC returns:
- * regs[0][31:0] = status of the operation
- * regs[0][63:32] = CSU.IDCODE register
- * regs[1][31:0] = CSU.version register
- */
- regs.regs[0] = upper_32_bits(regs.regs[0]);
- regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
- ZYNQMP_CSU_IDCODE_SVD_MASK;
- regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
+ smc_call(®s);
- return regs.regs[0];
+ /*
+ * SMC returns:
+ * regs[0][31:0] = status of the operation
+ * regs[0][63:32] = CSU.IDCODE register
+ * regs[1][31:0] = CSU.version register
+ */
+ switch (id) {
+ case IDCODE:
+ regs.regs[0] = upper_32_bits(regs.regs[0]);
+ regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
+ ZYNQMP_CSU_IDCODE_SVD_MASK;
+ regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
+ val = regs.regs[0];
+ break;
+ case VERSION:
+ regs.regs[1] = lower_32_bits(regs.regs[1]);
+ regs.regs[1] &= ZYNQMP_CSU_SILICON_VER_MASK;
+ val = regs.regs[1];
+ break;
+ default:
+ printf("%s, Invalid Req:0x%x\n", __func__, id);
+ }
+ } else {
+ switch (id) {
+ case IDCODE:
+ val = readl(ZYNQMP_CSU_IDCODE_ADDR);
+ val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
+ ZYNQMP_CSU_IDCODE_SVD_MASK;
+ val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
+ break;
+ case VERSION:
+ val = readl(ZYNQMP_CSU_VER_ADDR);
+ val &= ZYNQMP_CSU_SILICON_VER_MASK;
+ break;
+ default:
+ printf("%s, Invalid Req:0x%x\n", __func__, id);
+ }
+ }
+
+ return val;
}
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
+ !defined(CONFIG_SPL_BUILD)
static char *zynqmp_get_silicon_idcode_name(void)
{
uint32_t i, id;
- id = chip_id();
+ id = chip_id(IDCODE);
for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
if (zynqmp_devices[i].id == id)
return zynqmp_devices[i].name;
@@ -118,6 +152,11 @@
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
zynqmp_pmufw_version();
#endif
+
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
+ psu_init();
+#endif
+
return 0;
}
@@ -133,10 +172,10 @@
if (current_el() != 3) {
static char version[ZYNQMP_VERSION_SIZE];
- strncat(version, "xczu", ZYNQMP_VERSION_SIZE);
+ strncat(version, "xczu", 4);
zynqmppl.name = strncat(version,
zynqmp_get_silicon_idcode_name(),
- ZYNQMP_VERSION_SIZE);
+ ZYNQMP_VERSION_SIZE - 5);
printf("Chip ID:\t%s\n", zynqmppl.name);
fpga_init();
fpga_add(fpga_xilinx, &zynqmppl);
@@ -150,7 +189,10 @@
{
u32 val;
- if (current_el() == 3) {
+ val = readl(&crlapb_base->timestamp_ref_ctrl);
+ val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
+
+ if (current_el() == 3 && !val) {
val = readl(&crlapb_base->timestamp_ref_ctrl);
val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
writel(val, &crlapb_base->timestamp_ref_ctrl);
@@ -162,12 +204,6 @@
writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN,
&iou_scntr_secure->counter_control_register);
}
- /* Program freq register in System counter and enable system counter */
- writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register);
- writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG |
- ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN,
- &iou_scntr->counter_control_register);
-
return 0;
}
@@ -282,10 +318,10 @@
* and default boot_targets
*/
new_targets = calloc(1, strlen(mode) +
- strlen(getenv("boot_targets")) + 2);
+ strlen(env_get("boot_targets")) + 2);
- sprintf(new_targets, "%s %s", mode, getenv("boot_targets"));
- setenv("boot_targets", new_targets);
+ sprintf(new_targets, "%s %s", mode, env_get("boot_targets"));
+ env_set("boot_targets", new_targets);
return 0;
}
diff --git a/cmd/Kconfig b/cmd/Kconfig
index f18efc1..42d955c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -158,6 +158,12 @@
help
Print GPL license text
+config CMD_REGINFO
+ bool "reginfo"
+ depends on PPC
+ help
+ Register dump
+
endmenu
menu "Boot commands"
@@ -270,6 +276,54 @@
help
Poweroff/Shutdown the system
+config CMD_SPL
+ bool "spl export - Export boot information for Falcon boot"
+ depends on SPL
+ help
+ Falcon mode allows booting directly from SPL into an Operating
+ System such as Linux, thus skipping U-Boot proper. See
+ doc/README.falcon for full information about how to use this
+ command.
+
+config CMD_SPL_NAND_OFS
+ hex "Offset of OS command line args for Falcon-mode NAND boot"
+ depends on CMD_SPL
+ default 0
+ help
+ This provides the offset of the command line arguments for Linux
+ when booting from NAND in Falcon mode. See doc/README.falcon
+ for full information about how to use this option (and also see
+ board/gateworks/gw_ventana/README for an example).
+
+config CMD_SPL_WRITE_SIZE
+ hex "Size of argument area"
+ depends on CMD_SPL
+ default 0x2000
+ help
+ This provides the size of the command-line argument area in NAND
+ flash used by Falcon-mode boot. See the documentation until CMD_SPL
+ for detail.
+
+config CMD_THOR_DOWNLOAD
+ bool "thor - TIZEN 'thor' download"
+ help
+ Implements the 'thor' download protocol. This is a way of
+ downloading a software update over USB from an attached host.
+ There is no documentation about this within the U-Boot source code
+ but you should be able to find something on the interwebs.
+
+config CMD_ZBOOT
+ bool "zboot - x86 boot command"
+ help
+ With x86 machines it is common to boot a bzImage file which
+ contains both a kernel and a setup.bin file. The latter includes
+ configuration information from the dark ages which x86 boards still
+ need to pick things out of.
+
+ Consider using FIT in preference to this since it supports directly
+ booting both 32- and 64-bit kernels, as well as secure boot.
+ Documentation is available in doc/uImage.FIT/x86-fit-boot.txt
+
endmenu
menu "Environment commands"
@@ -336,20 +390,6 @@
menu "Memory commands"
-config CMD_MEMORY
- bool "md, mm, nm, mw, cp, cmp, base, loop"
- default y
- help
- Memory commands.
- md - memory display
- mm - memory modify (auto-incrementing address)
- nm - memory modify (constant address)
- mw - memory write (fill)
- cp - memory copy
- cmp - memory compare
- base - print or set address offset
- loop - initialize loop on address range
-
config CMD_CRC32
bool "crc32"
select HASH
@@ -411,6 +451,11 @@
Help printed with the LAYOUT VERSIONS part of the 'eeprom'
command's help.
+config LOOPW
+ bool "loopw"
+ help
+ Infinite write loop on address range
+
config CMD_MD5SUM
bool "md5sum"
default n
@@ -425,22 +470,24 @@
help
Add -v option to verify data against an MD5 checksum.
-config CMD_SHA1SUM
- bool "sha1sum"
- select SHA1
+config CMD_MEMINFO
+ bool "meminfo"
help
- Compute SHA1 checksum.
+ Display memory information.
-config SHA1SUM_VERIFY
- bool "sha1sum -v"
- depends on CMD_SHA1SUM
+config CMD_MEMORY
+ bool "md, mm, nm, mw, cp, cmp, base, loop"
+ default y
help
- Add -v option to verify data against a SHA1 checksum.
-
-config LOOPW
- bool "loopw"
- help
- Infinite write loop on address range
+ Memory commands.
+ md - memory display
+ mm - memory modify (auto-incrementing address)
+ nm - memory modify (constant address)
+ mw - memory write (fill)
+ cp - memory copy
+ cmp - memory compare
+ base - print or set address offset
+ loop - initialize loop on address range
config CMD_MEMTEST
bool "memtest"
@@ -453,10 +500,25 @@
mdc - memory display cyclic
mwc - memory write cyclic
-config CMD_MEMINFO
- bool "meminfo"
+config CMD_SHA1SUM
+ bool "sha1sum"
+ select SHA1
help
- Display memory information.
+ Compute SHA1 checksum.
+
+config SHA1SUM_VERIFY
+ bool "sha1sum -v"
+ depends on CMD_SHA1SUM
+ help
+ Add -v option to verify data against a SHA1 checksum.
+
+config CMD_STRINGS
+ bool "strings - display strings in memory"
+ help
+ This works similarly to the Unix 'strings' command except that it
+ works with a memory range. String of printable characters found
+ within the range are displayed. The minimum number of characters
+ for a sequence to be considered a string can be provided.
endmenu
@@ -483,6 +545,12 @@
menu "Device access commands"
+config CMD_ARMFLASH
+ #depends on FLASH_CFI_DRIVER
+ bool "armflash"
+ help
+ ARM Ltd reference designs flash partition access
+
config CMD_CLK
bool "clk - Show clock frequencies"
help
@@ -492,17 +560,6 @@
clock values from associated drivers. However currently no command
exists for this.
-config CMD_DM
- bool "dm - Access to driver model information"
- depends on DM
- default y
- help
- Provides access to driver model data structures and information,
- such as a list of devices, list of uclasses and the state of each
- device (e.g. activated). This is not required for operation, but
- can be useful to see the state of driver model for debugging or
- interest.
-
config CMD_DEMO
bool "demo - Demonstration commands for driver model"
depends on DM
@@ -515,6 +572,109 @@
option is to use sandbox and pass the -d point to sandbox's
u-boot.dtb file.
+config CMD_DFU
+ bool "dfu"
+ select USB_FUNCTION_DFU
+ help
+ Enables the command "dfu" which is used to have U-Boot create a DFU
+ class device via USB. This command requires that the "dfu_alt_info"
+ environment variable be set and define the alt settings to expose to
+ the host.
+
+config CMD_DM
+ bool "dm - Access to driver model information"
+ depends on DM
+ default y
+ help
+ Provides access to driver model data structures and information,
+ such as a list of devices, list of uclasses and the state of each
+ device (e.g. activated). This is not required for operation, but
+ can be useful to see the state of driver model for debugging or
+ interest.
+
+config CMD_FDC
+ bool "fdcboot - Boot from floppy device"
+ help
+ The 'fdtboot' command allows booting an image from a floppy disk.
+
+config CMD_FLASH
+ bool "flinfo, erase, protect"
+ default y
+ help
+ NOR flash support.
+ flinfo - print FLASH memory information
+ erase - FLASH memory
+ protect - enable or disable FLASH write protection
+
+config CMD_FPGA
+ bool "fpga"
+ default y
+ help
+ FPGA support.
+
+config CMD_FPGA_LOADBP
+ bool "fpga loadbp - load partial bitstream (Xilinx only)"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a bitstream buffer containing
+ a partial bitstream.
+
+config CMD_FPGA_LOADFS
+ bool "fpga loadfs - load bitstream from FAT filesystem (Xilinx only)"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a FAT filesystem.
+
+config CMD_FPGA_LOADMK
+ bool "fpga loadmk - load bitstream from image"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a image generated by mkimage.
+
+config CMD_FPGA_LOADP
+ bool "fpga loadp - load partial bitstream"
+ depends on CMD_FPGA
+ help
+ Supports loading an FPGA device from a bitstream buffer containing
+ a partial bitstream.
+
+config CMD_FPGAD
+ bool "fpgad - dump FPGA registers"
+ help
+ (legacy, needs conversion to driver model)
+ Provides a way to dump FPGA registers by calling the board-specific
+ fpga_get_reg() function. This functions similarly to the 'md'
+ command.
+
+config CMD_FUSE
+ bool "fuse - support for the fuse subssystem"
+ help
+ (deprecated - needs conversion to driver model)
+ This allows reading, sensing, programming or overriding fuses
+ which control the behaviour of the device. The command uses the
+ fuse_...() API.
+
+config CMD_GPIO
+ bool "gpio"
+ help
+ GPIO support.
+
+config CMD_GPT
+ bool "GPT (GUID Partition Table) command"
+ select PARTITION_UUIDS
+ select EFI_PARTITION
+ help
+ Enable the 'gpt' command to ready and write GPT style partition
+ tables.
+
+config CMD_GPT_RENAME
+ bool "GPT partition renaming commands"
+ depends on CMD_GPT
+ help
+ Enables the 'gpt' command to interchange names on two GPT
+ partitions via the 'gpt swap' command or to rename single
+ partitions via the 'rename' command.
+
config CMD_IDE
bool "ide - Support for IDE drivers"
select IDE
@@ -566,6 +726,11 @@
might be useful to enhance tracing to only checksum the accesses and
not the data read/written.
+config CMD_I2C
+ bool "i2c"
+ help
+ I2C support.
+
config CMD_LOADB
bool "loadb"
default y
@@ -578,29 +743,6 @@
help
Load an S-Record file over serial line
-config CMD_FLASH
- bool "flinfo, erase, protect"
- default y
- help
- NOR flash support.
- flinfo - print FLASH memory information
- erase - FLASH memory
- protect - enable or disable FLASH write protection
-
-config CMD_GPT
- bool "GPT (GUID Partition Table) command"
- select PARTITION_UUIDS
- select EFI_PARTITION
- help
- Enable the 'gpt' command to ready and write GPT style partition
- tables.
-
-config CMD_ARMFLASH
- #depends on FLASH_CFI_DRIVER
- bool "armflash"
- help
- ARM Ltd reference designs flash partition access
-
config CMD_MMC
bool "mmc"
help
@@ -631,6 +773,30 @@
endif # CMD_NAND
+config CMD_NVME
+ bool "nvme"
+ depends on NVME
+ default y if NVME
+ help
+ NVM Express device support
+
+config CMD_MMC_SPI
+ bool "mmc_spi - Set up MMC SPI device"
+ help
+ Provides a way to set up an MMC (Multimedia Card) SPI (Serial
+ Peripheral Interface) device. The device provides a means of
+ accessing an MMC device via SPI using a single data line, limited
+ to 20MHz. It is useful since it reduces the amount of protocol code
+ required.
+
+config CMD_ONENAND
+ bool "onenand - access to onenand device"
+ help
+ OneNAND is a brand of NAND ('Not AND' gate) flash which provides
+ various useful features. This command allows reading, writing,
+ and erasing blocks. It allso provides a way to show and change
+ bad blocks, and test the device.
+
config CMD_PART
bool "part"
select PARTITION_UUIDS
@@ -638,85 +804,26 @@
Read and display information about the partition table on
various media.
-config CMD_SF
- bool "sf"
+config CMD_PCI
+ bool "pci - Access PCI devices"
help
- SPI Flash support
+ Provide access to PCI (Peripheral Interconnect Bus), a type of bus
+ used on some devices to allow the CPU to communicate with its
+ peripherals. Sub-commands allow bus enumeration, displaying and
+ changing configuration space and a few other features.
-config CMD_SPI
- bool "sspi"
+config CMD_PCMCIA
+ bool "pinit - Set up PCMCIA device"
help
- SPI utility command.
+ Provides a means to initialise a PCMCIA (Personal Computer Memory
+ Card International Association) device. This is an old standard from
+ about 1990. These devices are typically removable memory or network
+ cards using a standard 68-pin connector.
-config CMD_I2C
- bool "i2c"
+config CMD_READ
+ bool "read - Read binary data from a partition"
help
- I2C support.
-
-config CMD_USB
- bool "usb"
- help
- USB support.
-
-config CMD_DFU
- bool "dfu"
- select USB_FUNCTION_DFU
- help
- Enables the command "dfu" which is used to have U-Boot create a DFU
- class device via USB.
-
-config CMD_USB_MASS_STORAGE
- bool "UMS usb mass storage"
- help
- USB mass storage support
-
-config CMD_FPGA
- bool "fpga"
- default y
- help
- FPGA support.
-
-config CMD_FPGA_LOADBP
- bool "fpga loadbp - load partial bitstream (Xilinx only)"
- depends on CMD_FPGA
- help
- Supports loading an FPGA device from a bitstream buffer containing
- a partial bitstream.
-
-config CMD_FPGA_LOADFS
- bool "fpga loadfs - load bitstream from FAT filesystem (Xilinx only)"
- depends on CMD_FPGA
- help
- Supports loading an FPGA device from a FAT filesystem.
-
-config CMD_FPGA_LOADMK
- bool "fpga loadmk - load bitstream from image"
- depends on CMD_FPGA
- help
- Supports loading an FPGA device from a image generated by mkimage.
-
-config CMD_FPGA_LOADP
- bool "fpga loadp - load partial bitstream"
- depends on CMD_FPGA
- help
- Supports loading an FPGA device from a bitstream buffer containing
- a partial bitstream.
-
-config CMD_FPGAD
- bool "fpgad - dump FPGA registers"
- help
- (legacy, needs conversion to driver model)
- Provides a way to dump FPGA registers by calling the board-specific
- fpga_get_reg() function. This functions similarly to the 'md'
- command.
-
-config CMD_FUSE
- bool "fuse - support for the fuse subssystem"
- help
- (deprecated - needs conversion to driver model)
- This allows reading, sensing, programming or overriding fuses
- which control the behaviour of the device. The command uses the
- fuse_...() API.
+ Provides low-level access to the data in a partition.
config CMD_REMOTEPROC
bool "remoteproc"
@@ -724,16 +831,6 @@
help
Support for Remote Processor control
-config CMD_GPIO
- bool "gpio"
- help
- GPIO support.
-
-config CMD_FDC
- bool "fdcboot - Boot from floppy device"
- help
- The 'fdtboot' command allows booting an image from a floppy disk.
-
config CMD_SATA
bool "sata - Access SATA subsystem"
select SATA
@@ -747,6 +844,62 @@
Attachment, where AT refers to an IBM AT (Advanced Technology)
computer released in 1984.
+config CMD_SAVES
+ bool "saves - Save a file over serial in S-Record format"
+ help
+ Provides a way to save a binary file using the Motorola S-Record
+ format over the serial line.
+
+config CMD_SDRAM
+ bool "sdram - Print SDRAM configuration information"
+ help
+ Provides information about attached SDRAM. This assumed that the
+ SDRAM has an EEPROM with information that can be read using the
+ I2C bus. This is only available on some boards.
+
+config CMD_SF
+ bool "sf"
+ help
+ SPI Flash support
+
+config CMD_SF_TEST
+ bool "sf test - Allow testing of SPI flash"
+ help
+ Provides a way to test that SPI flash is working correctly. The
+ test is destructive, in that an area of SPI flash must be provided
+ for the test to use. Performance information is also provided,
+ measuring the performance of reading, writing and erasing in
+ Mbps (Million Bits Per Second). This value should approximately
+ equal the SPI bus speed for a single-bit-wide SPI bus, assuming
+ everything is working properly.
+
+config CMD_SPI
+ bool "sspi"
+ help
+ SPI utility command.
+
+config CMD_TSI148
+ bool "tsi148 - Command to access tsi148 device"
+ help
+ This provides various sub-commands to initialise and configure the
+ Turndra tsi148 device. See the command help for full details.
+
+config CMD_UNIVERSE
+ bool "universe - Command to set up the Turndra Universe controller"
+ help
+ This allows setting up the VMEbus provided by this controller.
+ See the command help for full details.
+
+config CMD_USB
+ bool "usb"
+ help
+ USB support.
+
+config CMD_USB_MASS_STORAGE
+ bool "UMS usb mass storage"
+ help
+ USB mass storage support
+
endmenu
@@ -982,6 +1135,25 @@
source "cmd/mvebu/Kconfig"
+config CMD_TERMINAL
+ bool "terminal - provides a way to attach a serial terminal"
+ help
+ Provides a 'cu'-like serial terminal command. This can be used to
+ access other serial ports from the system console. The terminal
+ is very simple with no special processing of characters. As with
+ cu, you can press ~. (tilde followed by period) to exit.
+
+config CMD_UUID
+ bool "uuid, guid - generation of unique IDs"
+ help
+ This enables two commands:
+
+ uuid - generate random Universally Unique Identifier
+ guid - generate Globally Unique Identifier based on random UUID
+
+ The two commands are very similar except for the endianness of the
+ output.
+
endmenu
config CMD_BOOTSTAGE
@@ -1213,6 +1385,56 @@
Defines a default MTD partitioning scheme in the Linux MTD command
line partitions format
+config CMD_MTDPARTS_SPREAD
+ bool "Padd partition size to take account of bad blocks"
+ depends on CMD_MTDPARTS
+ help
+ This enables the 'spread' sub-command of the mtdparts command.
+ This command will modify the existing mtdparts variable by increasing
+ the size of the partitions such that 1) each partition's net size is
+ at least as large as the size specified in the mtdparts variable and
+ 2) each partition starts on a good block.
+
+config CMD_REISER
+ bool "reiser - Access to reiserfs filesystems"
+ help
+ This provides two commands which operate on a resierfs filesystem,
+ commonly used some years ago:
+
+ reiserls - list files
+ reiserload - load a file
+
+config CMD_SCSI
+ bool "scsi - Access to SCSI devices"
+ default y if SCSI
+ help
+ This provides a 'scsi' command which provides access to SCSI (Small
+ Computer System Interface) devices. The command provides a way to
+ scan the bus, reset the bus, read and write data and get information
+ about devices.
+
+config CMD_YAFFS2
+ bool "yaffs2 - Access of YAFFS2 filesystem"
+ depends on YAFFS2
+ default y
+ help
+ This provides commands for accessing a YAFFS2 filesystem. Yet
+ Another Flash Filesystem 2 is a filesystem designed specifically
+ for NAND flash. It incorporates bad-block management and ensures
+ that device writes are sequential regardless of filesystem
+ activity.
+
+config CMD_ZFS
+ bool "zfs - Access of ZFS filesystem"
+ help
+ This provides commands to accessing a ZFS filesystem, commonly used
+ on Solaris systems. Two sub-commands are provided:
+
+ zfsls - list files in a directory
+ zfsload - load a file
+
+ See doc/README.zfs for more details.
+
endmenu
menu "Debug commands"
@@ -1249,6 +1471,15 @@
single-stepping, inspecting variables, etc. This is supported only
on PowerPC at present.
+config CMD_TRACE
+ bool "trace - Support tracing of function calls and timing"
+ help
+ Enables a command to control using of function tracing within
+ U-Boot. This allows recording of call traces including timing
+ information. The command can write data to memory for exporting
+ for analsys (e.g. using bootchart). See doc/README.trace for full
+ details.
+
endmenu
config CMD_UBI
diff --git a/cmd/Makefile b/cmd/Makefile
index bd231f2..13c86f8 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -97,7 +97,6 @@
obj-$(CONFIG_CMD_PCI) += pci.o
endif
obj-y += pcmcia.o
-obj-$(CONFIG_CMD_PORTIO) += portio.o
obj-$(CONFIG_CMD_PXE) += pxe.o
obj-$(CONFIG_CMD_QFW) += qfw.o
obj-$(CONFIG_CMD_READ) += read.o
@@ -106,8 +105,9 @@
obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
obj-$(CONFIG_SANDBOX) += host.o
obj-$(CONFIG_CMD_SATA) += sata.o
+obj-$(CONFIG_CMD_NVME) += nvme.o
obj-$(CONFIG_CMD_SF) += sf.o
-obj-$(CONFIG_SCSI) += scsi.o disk.o
+obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
obj-$(CONFIG_CMD_SPI) += spi.o
@@ -133,7 +133,7 @@
obj-$(CONFIG_CMD_USB_MASS_STORAGE) += usb_mass_storage.o
obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o
obj-$(CONFIG_CMD_XIMG) += ximg.o
-obj-$(CONFIG_YAFFS2) += yaffs2.o
+obj-$(CONFIG_CMD_YAFFS2) += yaffs2.o
obj-$(CONFIG_CMD_SPL) += spl.o
obj-$(CONFIG_CMD_ZIP) += zip.o
obj-$(CONFIG_CMD_ZFS) += zfs.o
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 8971697..27ffcd5 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -28,7 +28,7 @@
sprintf(name, "eth%iaddr", idx);
else
strcpy(name, "ethaddr");
- val = getenv(name);
+ val = env_get(name);
if (!val)
val = "(not set)";
printf("%-12s= %s\n", name, val);
@@ -51,7 +51,7 @@
} while (dev);
printf("current eth = %s\n", eth_get_name());
- printf("ip_addr = %s\n", getenv("ipaddr"));
+ printf("ip_addr = %s\n", env_get("ipaddr"));
}
#endif
@@ -141,7 +141,7 @@
#if defined(CONFIG_HAS_ETH5)
print_eth(5);
#endif
- printf("IP addr = %s\n", getenv("ipaddr"));
+ printf("IP addr = %s\n", env_get("ipaddr"));
#endif
}
@@ -166,7 +166,7 @@
#if defined(CONFIG_PPC)
void __weak board_detail(void)
{
- /* Please define boot_detail() for your platform */
+ /* Please define board_detail() for your platform */
}
int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -344,9 +344,9 @@
#ifdef CONFIG_BOARD_TYPES
printf("Board Type = %ld\n", gd->board_type);
#endif
-#ifdef CONFIG_SYS_MALLOC_F
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
- CONFIG_SYS_MALLOC_F_LEN);
+ CONFIG_VAL(SYS_MALLOC_F_LEN));
#endif
if (gd->fdt_blob)
printf("fdt_blob = %p\n", gd->fdt_blob);
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 771300e..d20775e 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -20,6 +20,8 @@
DECLARE_GLOBAL_DATA_PTR;
+static uint8_t efi_obj_list_initalized;
+
/*
* When booting using the "bootefi" command, we don't know which
* physical device the file came from. So we create a pseudo-device
@@ -54,14 +56,6 @@
}
};
-static efi_status_t EFIAPI bootefi_open_dp(void *handle, efi_guid_t *protocol,
- void **protocol_interface, void *agent_handle,
- void *controller_handle, uint32_t attributes)
-{
- *protocol_interface = bootefi_device_path;
- return EFI_SUCCESS;
-}
-
/* The EFI loaded_image interface for the image executed via "bootefi" */
static struct efi_loaded_image loaded_image_info = {
.device_handle = bootefi_device_path,
@@ -78,7 +72,7 @@
* return handle which points to loaded_image_info
*/
.guid = &efi_guid_loaded_image,
- .open = &efi_return_handle,
+ .protocol_interface = &loaded_image_info,
},
{
/*
@@ -86,7 +80,15 @@
* bootefi_device_path
*/
.guid = &efi_guid_device_path,
- .open = &bootefi_open_dp,
+ .protocol_interface = bootefi_device_path,
+ },
+ {
+ .guid = &efi_guid_console_control,
+ .protocol_interface = (void *) &efi_console_control
+ },
+ {
+ .guid = &efi_guid_device_path_to_text_protocol,
+ .protocol_interface = (void *) &efi_device_path_to_text
},
},
};
@@ -99,11 +101,43 @@
/* When asking for the device path interface, return
* bootefi_device_path */
.guid = &efi_guid_device_path,
- .open = &bootefi_open_dp,
+ .protocol_interface = bootefi_device_path
}
},
};
+/* Initialize and populate EFI object list */
+static void efi_init_obj_list(void)
+{
+ efi_obj_list_initalized = 1;
+
+ list_add_tail(&loaded_image_info_obj.link, &efi_obj_list);
+ list_add_tail(&bootefi_device_obj.link, &efi_obj_list);
+ efi_console_register();
+#ifdef CONFIG_PARTITIONS
+ efi_disk_register();
+#endif
+#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
+ efi_gop_register();
+#endif
+#ifdef CONFIG_NET
+ void *nethandle = loaded_image_info.device_handle;
+ efi_net_register(&nethandle);
+
+ if (!memcmp(bootefi_device_path[0].str, "N\0e\0t", 6))
+ loaded_image_info.device_handle = nethandle;
+ else
+ loaded_image_info.device_handle = bootefi_device_path;
+#endif
+#ifdef CONFIG_GENERATE_SMBIOS_TABLE
+ efi_smbios_register();
+#endif
+
+ /* Initialize EFI runtime services */
+ efi_reset_system_init();
+ efi_get_time_init();
+}
+
static void *copy_fdt(void *fdt)
{
u64 fdt_size = fdt_totalsize(fdt);
@@ -147,15 +181,28 @@
return new_fdt;
}
+static ulong efi_do_enter(void *image_handle,
+ struct efi_system_table *st,
+ asmlinkage ulong (*entry)(void *image_handle,
+ struct efi_system_table *st))
+{
+ efi_status_t ret = EFI_LOAD_ERROR;
+
+ if (entry)
+ ret = entry(image_handle, st);
+ st->boottime->exit(image_handle, ret, 0, NULL);
+ return ret;
+}
+
#ifdef CONFIG_ARM64
-static unsigned long efi_run_in_el2(ulong (*entry)(void *image_handle,
- struct efi_system_table *st), void *image_handle,
- struct efi_system_table *st)
+static unsigned long efi_run_in_el2(asmlinkage ulong (*entry)(
+ void *image_handle, struct efi_system_table *st),
+ void *image_handle, struct efi_system_table *st)
{
/* Enable caches again */
dcache_enable();
- return entry(image_handle, st);
+ return efi_do_enter(image_handle, st, entry);
}
#endif
@@ -168,6 +215,7 @@
ulong (*entry)(void *image_handle, struct efi_system_table *st)
asmlinkage;
ulong fdt_pages, fdt_size, fdt_start, fdt_end;
+ const efi_guid_t fdt_guid = EFI_FDT_GUID;
bootm_headers_t img = { 0 };
/*
@@ -186,9 +234,7 @@
}
/* Link to it in the efi tables */
- systab.tables[0].guid = EFI_FDT_GUID;
- systab.tables[0].table = fdt;
- systab.nr_tables = 1;
+ efi_install_configuration_table(&fdt_guid, fdt);
/* And reserve the space in the memory map */
fdt_start = ((ulong)fdt) & ~EFI_PAGE_MASK;
@@ -201,7 +247,7 @@
EFI_BOOT_SERVICES_DATA, true);
} else {
printf("WARNING: Invalid device tree, expect boot to fail\n");
- systab.nr_tables = 0;
+ efi_install_configuration_table(&fdt_guid, NULL);
}
/* Load the EFI payload */
@@ -210,38 +256,14 @@
return -ENOENT;
/* Initialize and populate EFI object list */
- INIT_LIST_HEAD(&efi_obj_list);
- list_add_tail(&loaded_image_info_obj.link, &efi_obj_list);
- list_add_tail(&bootefi_device_obj.link, &efi_obj_list);
-#ifdef CONFIG_PARTITIONS
- efi_disk_register();
-#endif
-#ifdef CONFIG_LCD
- efi_gop_register();
-#endif
-#ifdef CONFIG_NET
- void *nethandle = loaded_image_info.device_handle;
- efi_net_register(&nethandle);
-
- if (!memcmp(bootefi_device_path[0].str, "N\0e\0t", 6))
- loaded_image_info.device_handle = nethandle;
- else
- loaded_image_info.device_handle = bootefi_device_path;
-#endif
-#ifdef CONFIG_GENERATE_SMBIOS_TABLE
- efi_smbios_register();
-#endif
-
- /* Initialize EFI runtime services */
- efi_reset_system_init();
- efi_get_time_init();
+ if (!efi_obj_list_initalized)
+ efi_init_obj_list();
/* Call our payload! */
debug("%s:%d Jumping to 0x%lx\n", __func__, __LINE__, (long)entry);
if (setjmp(&loaded_image_info.exit_jmp)) {
- efi_status_t status = loaded_image_info.exit_status;
- return status == EFI_SUCCESS ? 0 : -EINVAL;
+ return loaded_image_info.exit_status;
}
#ifdef CONFIG_ARM64
@@ -260,7 +282,7 @@
}
#endif
- return entry(&loaded_image_info, &systab);
+ return efi_do_enter(&loaded_image_info, &systab, entry);
}
@@ -269,7 +291,7 @@
{
char *saddr, *sfdt;
unsigned long addr, fdt_addr = 0;
- int r = 0;
+ unsigned long r;
if (argc < 2)
return CMD_RET_USAGE;
@@ -294,12 +316,13 @@
printf("## Starting EFI application at %08lx ...\n", addr);
r = do_bootefi_exec((void *)addr, (void*)fdt_addr);
- printf("## Application terminated, r = %d\n", r);
+ printf("## Application terminated, r = %lu\n",
+ r & ~EFI_ERROR_MASK);
- if (r != 0)
- r = 1;
-
- return r;
+ if (r != EFI_SUCCESS)
+ return 1;
+ else
+ return 0;
}
#ifdef CONFIG_SYS_LONGHELP
@@ -325,7 +348,7 @@
{
__maybe_unused struct blk_desc *desc;
char devname[32] = { 0 }; /* dp->str is u16[32] long */
- char *colon;
+ char *colon, *s;
#if defined(CONFIG_BLK) || CONFIG_IS_ENABLED(ISO_PARTITION)
desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10));
@@ -370,5 +393,9 @@
} else {
snprintf(devname, sizeof(devname), "%s", path);
}
+ /* DOS style file path: */
+ s = devname;
+ while ((s = strchr(s, '/')))
+ *s++ = '\\';
ascii2unicode(bootefi_image_path[0].str, devname);
}
diff --git a/cmd/bootm.c b/cmd/bootm.c
index daf15d9..df0bbe1 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -138,7 +138,7 @@
int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)
{
- const char *ep = getenv("autostart");
+ const char *ep = env_get("autostart");
if (ep && !strcmp(ep, "yes")) {
char *local_args[2];
@@ -202,7 +202,7 @@
#if defined(CONFIG_CMD_BOOTD)
int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- return run_command(getenv("bootcmd"), flag);
+ return run_command(env_get("bootcmd"), flag);
}
U_BOOT_CMD(
diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 5879065..870db7c 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -53,7 +53,7 @@
return NULL;
sprintf(name, "bootmenu_%d", n);
- return getenv(name);
+ return env_get(name);
}
static void bootmenu_print_entry(void *data)
@@ -483,7 +483,7 @@
delay_str = argv[1];
if (!delay_str)
- delay_str = getenv("bootmenu_delay");
+ delay_str = env_get("bootmenu_delay");
if (delay_str)
delay = (int)simple_strtol(delay_str, NULL, 10);
diff --git a/cmd/cbfs.c b/cmd/cbfs.c
index 95a11a3..799ba01 100644
--- a/cmd/cbfs.c
+++ b/cmd/cbfs.c
@@ -80,7 +80,7 @@
printf("\n%ld bytes read\n", size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return 0;
}
diff --git a/cmd/cramfs.c b/cmd/cramfs.c
index 49ee36c..86f1bac 100644
--- a/cmd/cramfs.c
+++ b/cmd/cramfs.c
@@ -104,7 +104,7 @@
struct mtdids id;
ulong addr;
- addr = simple_strtoul(getenv("cramfsaddr"), NULL, 16);
+ addr = simple_strtoul(env_get("cramfsaddr"), NULL, 16);
/* hack! */
/* cramfs_* only supports NOR flash chips */
@@ -117,9 +117,9 @@
part.offset = (u64)(uintptr_t) map_sysmem(addr - OFFSET_ADJUSTMENT, 0);
/* pre-set Boot file name */
- if ((filename = getenv("bootfile")) == NULL) {
+ filename = env_get("bootfile");
+ if (!filename)
filename = "uImage";
- }
if (argc == 2) {
filename = argv[1];
@@ -138,7 +138,7 @@
if (size > 0) {
printf("### CRAMFS load complete: %d bytes loaded to 0x%lx\n",
size, offset);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
} else {
printf("### CRAMFS LOAD ERROR<%x> for %s!\n", size, filename);
}
@@ -169,7 +169,7 @@
struct mtdids id;
ulong addr;
- addr = simple_strtoul(getenv("cramfsaddr"), NULL, 16);
+ addr = simple_strtoul(env_get("cramfsaddr"), NULL, 16);
/* hack! */
/* cramfs_* only supports NOR flash chips */
diff --git a/cmd/elf.c b/cmd/elf.c
index ed9625b..5745a38 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -148,7 +148,7 @@
unsigned long addr; /* Address of the ELF image */
unsigned long rc; /* Return value from user code */
char *sload = NULL;
- const char *ep = getenv("autostart");
+ const char *ep = env_get("autostart");
int rcode = 0;
/* Consume 'bootelf' */
@@ -242,11 +242,11 @@
*/
#if defined(CONFIG_WALNUT)
tmp = (char *)CONFIG_SYS_NVRAM_BASE_ADDR + 0x500;
- eth_getenv_enetaddr("ethaddr", (uchar *)build_buf);
+ eth_env_get_enetaddr("ethaddr", (uchar *)build_buf);
memcpy(tmp, &build_buf[3], 3);
#elif defined(CONFIG_SYS_VXWORKS_MAC_PTR)
tmp = (char *)CONFIG_SYS_VXWORKS_MAC_PTR;
- eth_getenv_enetaddr("ethaddr", (uchar *)build_buf);
+ eth_env_get_enetaddr("ethaddr", (uchar *)build_buf);
memcpy(tmp, build_buf, 6);
#else
puts("## Ethernet MAC address not copied to NV RAM\n");
@@ -258,7 +258,7 @@
* (LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET) as defined by
* VxWorks BSP. For example, on PowerPC it defaults to 0x4200.
*/
- tmp = getenv("bootaddr");
+ tmp = env_get("bootaddr");
if (!tmp) {
printf("## VxWorks bootline address not specified\n");
} else {
@@ -269,21 +269,21 @@
* parameter. If it is not defined, we may be able to
* construct the info.
*/
- bootline = getenv("bootargs");
+ bootline = env_get("bootargs");
if (bootline) {
memcpy((void *)bootaddr, bootline,
max(strlen(bootline), (size_t)255));
flush_cache(bootaddr, max(strlen(bootline),
(size_t)255));
} else {
- tmp = getenv("bootdev");
+ tmp = env_get("bootdev");
if (tmp) {
strcpy(build_buf, tmp);
ptr = strlen(tmp);
} else
printf("## VxWorks boot device not specified\n");
- tmp = getenv("bootfile");
+ tmp = env_get("bootfile");
if (tmp)
ptr += sprintf(build_buf + ptr,
"host:%s ", tmp);
@@ -295,12 +295,12 @@
* The following parameters are only needed if 'bootdev'
* is an ethernet device, otherwise they are optional.
*/
- tmp = getenv("ipaddr");
+ tmp = env_get("ipaddr");
if (tmp) {
ptr += sprintf(build_buf + ptr, "e=%s", tmp);
- tmp = getenv("netmask");
+ tmp = env_get("netmask");
if (tmp) {
- u32 mask = getenv_ip("netmask").s_addr;
+ u32 mask = env_get_ip("netmask").s_addr;
ptr += sprintf(build_buf + ptr,
":%08x ", ntohl(mask));
} else {
@@ -308,19 +308,19 @@
}
}
- tmp = getenv("serverip");
+ tmp = env_get("serverip");
if (tmp)
ptr += sprintf(build_buf + ptr, "h=%s ", tmp);
- tmp = getenv("gatewayip");
+ tmp = env_get("gatewayip");
if (tmp)
ptr += sprintf(build_buf + ptr, "g=%s ", tmp);
- tmp = getenv("hostname");
+ tmp = env_get("hostname");
if (tmp)
ptr += sprintf(build_buf + ptr, "tn=%s ", tmp);
- tmp = getenv("othbootargs");
+ tmp = env_get("othbootargs");
if (tmp) {
strcpy(build_buf + ptr, tmp);
ptr += strlen(tmp);
@@ -341,12 +341,12 @@
* Since E820 information is critical to the kernel, if we don't
* specify these in the environments, use a default one.
*/
- tmp = getenv("e820data");
+ tmp = env_get("e820data");
if (tmp)
data = (struct e820entry *)simple_strtoul(tmp, NULL, 16);
else
data = (struct e820entry *)VXWORKS_E820_DATA_ADDR;
- tmp = getenv("e820info");
+ tmp = env_get("e820info");
if (tmp)
info = (struct e820info *)simple_strtoul(tmp, NULL, 16);
else
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 89b9e73..b84529a 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -18,6 +18,8 @@
protocol for downloading images, flashing and device control
used on Android devices.
+ See doc/README.android-fastboot for more information.
+
config ANDROID_BOOT_IMAGE
bool "Enable support for Android Boot Images"
help
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 05e19f8..118613f 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -43,21 +43,21 @@
buf = map_sysmem(addr, 0);
working_fdt = buf;
- setenv_hex("fdtaddr", addr);
+ env_set_hex("fdtaddr", addr);
}
/*
* Get a value from the fdt and format it to be set in the environment
*/
-static int fdt_value_setenv(const void *nodep, int len, const char *var)
+static int fdt_value_env_set(const void *nodep, int len, const char *var)
{
if (is_printable_string(nodep, len))
- setenv(var, (void *)nodep);
+ env_set(var, (void *)nodep);
else if (len == 4) {
char buf[11];
sprintf(buf, "0x%08X", fdt32_to_cpu(*(fdt32_t *)nodep));
- setenv(var, buf);
+ env_set(var, buf);
} else if (len%4 == 0 && len <= 20) {
/* Needed to print things like sha1 hashes. */
char buf[41];
@@ -66,7 +66,7 @@
for (i = 0; i < len; i += sizeof(unsigned int))
sprintf(buf + (i * 2), "%08x",
*(unsigned int *)(nodep + i));
- setenv(var, buf);
+ env_set(var, buf);
} else {
printf("error: unprintable value\n");
return 1;
@@ -111,7 +111,7 @@
return 1;
printf("The address of the fdt is %#08lx\n",
control ? (ulong)map_to_sysmem(blob) :
- getenv_hex("fdtaddr", 0));
+ env_get_hex("fdtaddr", 0));
return 0;
}
@@ -358,10 +358,12 @@
if (curDepth == startDepth + 1)
curIndex++;
if (subcmd[0] == 'n' && curIndex == reqIndex) {
- const char *nodeName = fdt_get_name(
- working_fdt, nextNodeOffset, NULL);
+ const char *node_name;
- setenv(var, (char *)nodeName);
+ node_name = fdt_get_name(working_fdt,
+ nextNodeOffset,
+ NULL);
+ env_set(var, node_name);
return 0;
}
nextNodeOffset = fdt_next_node(
@@ -371,7 +373,7 @@
}
if (subcmd[0] == 's') {
/* get the num nodes at this level */
- setenv_ulong(var, curIndex + 1);
+ env_set_ulong(var, curIndex + 1);
} else {
/* node index not found */
printf("libfdt node not found\n");
@@ -382,13 +384,14 @@
working_fdt, nodeoffset, prop, &len);
if (len == 0) {
/* no property value */
- setenv(var, "");
+ env_set(var, "");
return 0;
} else if (nodep && len > 0) {
if (subcmd[0] == 'v') {
int ret;
- ret = fdt_value_setenv(nodep, len, var);
+ ret = fdt_value_env_set(nodep, len,
+ var);
if (ret != 0)
return ret;
} else if (subcmd[0] == 'a') {
@@ -396,13 +399,13 @@
char buf[11];
sprintf(buf, "0x%p", nodep);
- setenv(var, buf);
+ env_set(var, buf);
} else if (subcmd[0] == 's') {
/* Get size */
char buf[11];
sprintf(buf, "0x%08X", len);
- setenv(var, buf);
+ env_set(var, buf);
} else
return CMD_RET_USAGE;
return 0;
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 016349f..ac6f504 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -43,8 +43,8 @@
int op, dev = FPGA_INVALID_DEVICE;
size_t data_size = 0;
void *fpga_data = NULL;
- char *devstr = getenv("fpga");
- char *datastr = getenv("fpgadata");
+ char *devstr = env_get("fpga");
+ char *datastr = env_get("fpgadata");
int rc = FPGA_FAIL;
int wrong_parms = 0;
#if defined(CONFIG_FIT)
diff --git a/cmd/gpt.c b/cmd/gpt.c
index 3e98821..638aa19 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -19,6 +19,11 @@
#include <linux/ctype.h>
#include <div64.h>
#include <memalign.h>
+#include <linux/compat.h>
+#include <linux/sizes.h>
+#include <stdlib.h>
+
+static LIST_HEAD(disk_partitions);
/**
* extract_env(): Expand env name from string format '&{env_name}'
@@ -50,14 +55,14 @@
memset(s + strlen(s) - 1, '\0', 1);
memmove(s, s + 2, strlen(s) - 1);
- e = getenv(s);
+ e = env_get(s);
if (e == NULL) {
#ifdef CONFIG_RANDOM_UUID
debug("%s unset. ", str);
gen_rand_uuid_str(uuid_str, UUID_STR_FORMAT_GUID);
- setenv(s, uuid_str);
+ env_set(s, uuid_str);
- e = getenv(s);
+ e = env_get(s);
if (e) {
debug("Set to random.\n");
ret = 0;
@@ -151,6 +156,208 @@
return result;
}
+static int calc_parts_list_len(int numparts)
+{
+ int partlistlen = UUID_STR_LEN + 1 + strlen("uuid_disk=");
+ /* for the comma */
+ partlistlen++;
+
+ /* per-partition additions; numparts starts at 1, so this should be correct */
+ partlistlen += numparts * (strlen("name=,") + PART_NAME_LEN + 1);
+ /* see part.h for definition of struct disk_partition */
+ partlistlen += numparts * (strlen("start=MiB,") + sizeof(lbaint_t) + 1);
+ partlistlen += numparts * (strlen("size=MiB,") + sizeof(lbaint_t) + 1);
+ partlistlen += numparts * (strlen("uuid=;") + UUID_STR_LEN + 1);
+ /* for the terminating null */
+ partlistlen++;
+ debug("Length of partitions_list is %d for %d partitions\n", partlistlen,
+ numparts);
+ return partlistlen;
+}
+
+#ifdef CONFIG_CMD_GPT_RENAME
+static void del_gpt_info(void)
+{
+ struct list_head *pos = &disk_partitions;
+ struct disk_part *curr;
+ while (!list_empty(pos)) {
+ curr = list_entry(pos->next, struct disk_part, list);
+ list_del(pos->next);
+ free(curr);
+ }
+}
+
+static struct disk_part *allocate_disk_part(disk_partition_t *info, int partnum)
+{
+ struct disk_part *newpart;
+ newpart = malloc(sizeof(*newpart));
+ if (!newpart)
+ return ERR_PTR(-ENOMEM);
+ memset(newpart, '\0', sizeof(newpart));
+
+ newpart->gpt_part_info.start = info->start;
+ newpart->gpt_part_info.size = info->size;
+ newpart->gpt_part_info.blksz = info->blksz;
+ strncpy((char *)newpart->gpt_part_info.name, (const char *)info->name,
+ PART_NAME_LEN);
+ newpart->gpt_part_info.name[PART_NAME_LEN - 1] = '\0';
+ strncpy((char *)newpart->gpt_part_info.type, (const char *)info->type,
+ PART_TYPE_LEN);
+ newpart->gpt_part_info.type[PART_TYPE_LEN - 1] = '\0';
+ newpart->gpt_part_info.bootable = info->bootable;
+#ifdef CONFIG_PARTITION_UUIDS
+ strncpy(newpart->gpt_part_info.uuid, (const char *)info->uuid,
+ UUID_STR_LEN);
+ /* UUID_STR_LEN is correct, as uuid[]'s length is UUID_STR_LEN+1 chars */
+ newpart->gpt_part_info.uuid[UUID_STR_LEN] = '\0';
+#endif
+ newpart->partnum = partnum;
+
+ return newpart;
+}
+
+static void prettyprint_part_size(char *sizestr, lbaint_t partsize,
+ lbaint_t blksize)
+{
+ unsigned long long partbytes, partmegabytes;
+
+ partbytes = partsize * blksize;
+ partmegabytes = lldiv(partbytes, SZ_1M);
+ snprintf(sizestr, 16, "%lluMiB", partmegabytes);
+}
+
+static void print_gpt_info(void)
+{
+ struct list_head *pos;
+ struct disk_part *curr;
+ char partstartstr[16];
+ char partsizestr[16];
+
+ list_for_each(pos, &disk_partitions) {
+ curr = list_entry(pos, struct disk_part, list);
+ prettyprint_part_size(partstartstr, curr->gpt_part_info.start,
+ curr->gpt_part_info.blksz);
+ prettyprint_part_size(partsizestr, curr->gpt_part_info.size,
+ curr->gpt_part_info.blksz);
+
+ printf("Partition %d:\n", curr->partnum);
+ printf("Start %s, size %s\n", partstartstr, partsizestr);
+ printf("Block size %lu, name %s\n", curr->gpt_part_info.blksz,
+ curr->gpt_part_info.name);
+ printf("Type %s, bootable %d\n", curr->gpt_part_info.type,
+ curr->gpt_part_info.bootable);
+#ifdef CONFIG_PARTITION_UUIDS
+ printf("UUID %s\n", curr->gpt_part_info.uuid);
+#endif
+ printf("\n");
+ }
+}
+
+/*
+ * create the string that upstream 'gpt write' command will accept as an
+ * argument
+ *
+ * From doc/README.gpt, Format of partitions layout:
+ * "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+ * name=kernel,size=60MiB,uuid=...;"
+ * The fields 'name' and 'size' are mandatory for every partition.
+ * The field 'start' is optional. The fields 'uuid' and 'uuid_disk'
+ * are optional if CONFIG_RANDOM_UUID is enabled.
+ */
+static int create_gpt_partitions_list(int numparts, const char *guid,
+ char *partitions_list)
+{
+ struct list_head *pos;
+ struct disk_part *curr;
+ char partstr[PART_NAME_LEN + 1];
+
+ if (!partitions_list)
+ return -EINVAL;
+
+ strcpy(partitions_list, "uuid_disk=");
+ strncat(partitions_list, guid, UUID_STR_LEN + 1);
+ strcat(partitions_list, ";");
+
+ list_for_each(pos, &disk_partitions) {
+ curr = list_entry(pos, struct disk_part, list);
+ strcat(partitions_list, "name=");
+ strncat(partitions_list, (const char *)curr->gpt_part_info.name,
+ PART_NAME_LEN + 1);
+ strcat(partitions_list, ",start=");
+ prettyprint_part_size(partstr, (unsigned long)curr->gpt_part_info.start,
+ (unsigned long) curr->gpt_part_info.blksz);
+ /* one extra byte for NULL */
+ strncat(partitions_list, partstr, PART_NAME_LEN + 1);
+ strcat(partitions_list, ",size=");
+ prettyprint_part_size(partstr, curr->gpt_part_info.size,
+ curr->gpt_part_info.blksz);
+ strncat(partitions_list, partstr, PART_NAME_LEN + 1);
+
+ strcat(partitions_list, ",uuid=");
+ strncat(partitions_list, curr->gpt_part_info.uuid,
+ UUID_STR_LEN + 1);
+ strcat(partitions_list, ";");
+ }
+ return 0;
+}
+
+/*
+ * read partition info into disk_partitions list where
+ * it can be printed or modified
+ */
+static int get_gpt_info(struct blk_desc *dev_desc)
+{
+ /* start partition numbering at 1, as U-Boot does */
+ int valid_parts = 0, p, ret;
+ disk_partition_t info;
+ struct disk_part *new_disk_part;
+
+ /*
+ * Always re-read partition info from device, in case
+ * it has changed
+ */
+ INIT_LIST_HEAD(&disk_partitions);
+
+ for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+ ret = part_get_info(dev_desc, p, &info);
+ if (ret)
+ continue;
+
+ /* Add 1 here because counter is zero-based but p1 is
+ the first partition */
+ new_disk_part = allocate_disk_part(&info, valid_parts+1);
+ if (IS_ERR(new_disk_part))
+ goto out;
+
+ list_add_tail(&new_disk_part->list, &disk_partitions);
+ valid_parts++;
+ }
+ if (valid_parts == 0) {
+ printf("** No valid partitions found **\n");
+ goto out;
+ }
+ return valid_parts;
+ out:
+ if (valid_parts >= 1)
+ del_gpt_info();
+ return -ENODEV;
+}
+
+/* a wrapper to test get_gpt_info */
+static int do_get_gpt_info(struct blk_desc *dev_desc)
+{
+ int ret;
+
+ ret = get_gpt_info(dev_desc);
+ if (ret > 0) {
+ print_gpt_info();
+ del_gpt_info();
+ return 0;
+ }
+ return ret;
+}
+#endif
+
/**
* set_gpt_info(): Fill partition information from string
* function allocates memory, remember to free!
@@ -178,6 +385,7 @@
int errno = 0;
uint64_t size_ll, start_ll;
lbaint_t offset = 0;
+ int max_str_part = calc_parts_list_len(MAX_SEARCH_PARTITIONS);
debug("%s: lba num: 0x%x %d\n", __func__,
(unsigned int)dev_desc->lba, (unsigned int)dev_desc->lba);
@@ -186,6 +394,8 @@
return -1;
str = strdup(str_part);
+ if (str == NULL)
+ return -ENOMEM;
/* extract disk guid */
s = str;
@@ -193,6 +403,8 @@
if (!val) {
#ifdef CONFIG_RANDOM_UUID
*str_disk_guid = malloc(UUID_STR_LEN + 1);
+ if (str_disk_guid == NULL)
+ return -ENOMEM;
gen_rand_uuid_str(*str_disk_guid, UUID_STR_FORMAT_STD);
#else
free(str);
@@ -207,10 +419,14 @@
/* Move s to first partition */
strsep(&s, ";");
}
- if (strlen(s) == 0)
+ if (s == NULL) {
+ printf("Error: is the partitions string NULL-terminated?\n");
+ return -EINVAL;
+ }
+ if (strnlen(s, max_str_part) == 0)
return -3;
- i = strlen(s) - 1;
+ i = strnlen(s, max_str_part) - 1;
if (s[i] == ';')
s[i] = '\0';
@@ -224,6 +440,8 @@
/* allocate memory for partitions */
parts = calloc(sizeof(disk_partition_t), p_count);
+ if (parts == NULL)
+ return -ENOMEM;
/* retrieve partitions data from string */
for (i = 0; i < p_count; i++) {
@@ -245,12 +463,12 @@
} else {
if (extract_env(val, &p))
p = val;
- if (strlen(p) >= sizeof(parts[i].uuid)) {
+ if (strnlen(p, max_str_part) >= sizeof(parts[i].uuid)) {
printf("Wrong uuid format for partition %d\n", i);
errno = -4;
goto err;
}
- strcpy((char *)parts[i].uuid, p);
+ strncpy((char *)parts[i].uuid, p, max_str_part);
free(val);
}
#ifdef CONFIG_PARTITION_TYPE_GUID
@@ -260,13 +478,13 @@
/* 'type' is optional */
if (extract_env(val, &p))
p = val;
- if (strlen(p) >= sizeof(parts[i].type_guid)) {
+ if (strnlen(p, max_str_part) >= sizeof(parts[i].type_guid)) {
printf("Wrong type guid format for partition %d\n",
i);
errno = -4;
goto err;
}
- strcpy((char *)parts[i].type_guid, p);
+ strncpy((char *)parts[i].type_guid, p, max_str_part);
free(val);
}
#endif
@@ -278,11 +496,11 @@
}
if (extract_env(val, &p))
p = val;
- if (strlen(p) >= sizeof(parts[i].name)) {
+ if (strnlen(p, max_str_part) >= sizeof(parts[i].name)) {
errno = -4;
goto err;
}
- strcpy((char *)parts[i].name, p);
+ strncpy((char *)parts[i].name, p, max_str_part);
free(val);
/* size */
@@ -398,6 +616,144 @@
return ret;
}
+static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr)
+{
+ int ret;
+ char disk_guid[UUID_STR_LEN + 1];
+
+ ret = get_disk_guid(dev_desc, disk_guid);
+ if (ret < 0)
+ return CMD_RET_FAILURE;
+
+ if (namestr)
+ env_set(namestr, disk_guid);
+ else
+ printf("%s\n", disk_guid);
+
+ return ret;
+}
+
+#ifdef CONFIG_CMD_GPT_RENAME
+static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
+ char *name1, char *name2)
+{
+ struct list_head *pos;
+ struct disk_part *curr;
+ disk_partition_t *new_partitions = NULL;
+ char disk_guid[UUID_STR_LEN + 1];
+ char *partitions_list, *str_disk_guid;
+ u8 part_count = 0;
+ int partlistlen, ret, numparts = 0, partnum, i = 1, ctr1 = 0, ctr2 = 0;
+
+ if ((subcomm == NULL) || (name1 == NULL) || (name2 == NULL) ||
+ (strcmp(subcomm, "swap") && (strcmp(subcomm, "rename"))))
+ return -EINVAL;
+
+ ret = get_disk_guid(dev_desc, disk_guid);
+ if (ret < 0)
+ return ret;
+ numparts = get_gpt_info(dev_desc);
+ if (numparts <= 0)
+ return numparts ? numparts : -ENODEV;
+
+ partlistlen = calc_parts_list_len(numparts);
+ partitions_list = malloc(partlistlen);
+ if (partitions_list == NULL)
+ return -ENOMEM;
+ memset(partitions_list, '\0', partlistlen);
+
+ ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
+ if (ret < 0)
+ return ret;
+ /*
+ * Uncomment the following line to print a string that 'gpt write'
+ * or 'gpt verify' will accept as input.
+ */
+ debug("OLD partitions_list is %s with %u chars\n", partitions_list,
+ (unsigned)strlen(partitions_list));
+
+ ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
+ &new_partitions, &part_count);
+ if (ret < 0)
+ return ret;
+
+ if (!strcmp(subcomm, "swap")) {
+ if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) {
+ printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
+ return -EINVAL;
+ }
+ list_for_each(pos, &disk_partitions) {
+ curr = list_entry(pos, struct disk_part, list);
+ if (!strcmp((char *)curr->gpt_part_info.name, name1)) {
+ strcpy((char *)curr->gpt_part_info.name, name2);
+ ctr1++;
+ } else if (!strcmp((char *)curr->gpt_part_info.name, name2)) {
+ strcpy((char *)curr->gpt_part_info.name, name1);
+ ctr2++;
+ }
+ }
+ if ((ctr1 + ctr2 < 2) || (ctr1 != ctr2)) {
+ printf("Cannot swap partition names except in pairs.\n");
+ return -EINVAL;
+ }
+ } else { /* rename */
+ if (strlen(name2) > PART_NAME_LEN) {
+ printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
+ return -EINVAL;
+ }
+ partnum = (int)simple_strtol(name1, NULL, 10);
+ if ((partnum < 0) || (partnum > numparts)) {
+ printf("Illegal partition number %s\n", name1);
+ return -EINVAL;
+ }
+ ret = part_get_info(dev_desc, partnum, new_partitions);
+ if (ret < 0)
+ return ret;
+
+ /* U-Boot partition numbering starts at 1 */
+ list_for_each(pos, &disk_partitions) {
+ curr = list_entry(pos, struct disk_part, list);
+ if (i == partnum) {
+ strcpy((char *)curr->gpt_part_info.name, name2);
+ break;
+ }
+ i++;
+ }
+ }
+
+ ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
+ if (ret < 0)
+ return ret;
+ debug("NEW partitions_list is %s with %u chars\n", partitions_list,
+ (unsigned)strlen(partitions_list));
+
+ ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
+ &new_partitions, &part_count);
+ if (ret < 0)
+ return ret;
+
+ debug("Writing new partition table\n");
+ ret = gpt_restore(dev_desc, disk_guid, new_partitions, numparts);
+ if (ret < 0) {
+ printf("Writing new partition table failed\n");
+ return ret;
+ }
+
+ debug("Reading back new partition table\n");
+ numparts = get_gpt_info(dev_desc);
+ if (numparts <= 0)
+ return numparts ? numparts : -ENODEV;
+ printf("new partition table with %d partitions is:\n", numparts);
+ print_gpt_info();
+
+ del_gpt_info();
+ free(partitions_list);
+ free(str_disk_guid);
+ free(new_partitions);
+ return ret;
+}
+#endif
+
/**
* do_gpt(): Perform GPT operations
*
@@ -415,7 +771,11 @@
char *ep;
struct blk_desc *blk_dev_desc = NULL;
+#ifndef CONFIG_CMD_GPT_RENAME
if (argc < 4 || argc > 5)
+#else
+ if (argc < 4 || argc > 6)
+#endif
return CMD_RET_USAGE;
dev = (int)simple_strtoul(argv[3], &ep, 10);
@@ -436,6 +796,15 @@
} else if ((strcmp(argv[1], "verify") == 0)) {
ret = gpt_verify(blk_dev_desc, argv[4]);
printf("Verify GPT: ");
+ } else if (strcmp(argv[1], "guid") == 0) {
+ ret = do_disk_guid(blk_dev_desc, argv[4]);
+#ifdef CONFIG_CMD_GPT_RENAME
+ } else if (strcmp(argv[1], "read") == 0) {
+ ret = do_get_gpt_info(blk_dev_desc);
+ } else if ((strcmp(argv[1], "swap") == 0) ||
+ (strcmp(argv[1], "rename") == 0)) {
+ ret = do_rename_gpt_parts(blk_dev_desc, argv[1], argv[4], argv[5]);
+#endif
} else {
return CMD_RET_USAGE;
}
@@ -458,4 +827,24 @@
" Example usage:\n"
" gpt write mmc 0 $partitions\n"
" gpt verify mmc 0 $partitions\n"
+ " read <interface> <dev>\n"
+ " - read GPT into a data structure for manipulation\n"
+ " guid <interface> <dev>\n"
+ " - print disk GUID\n"
+ " guid <interface> <dev> <varname>\n"
+ " - set environment variable to disk GUID\n"
+ " Example usage:\n"
+ " gpt guid mmc 0\n"
+ " gpt guid mmc 0 varname\n"
+#ifdef CONFIG_CMD_GPT_RENAME
+ "gpt partition renaming commands:\n"
+ "gpt swap <interface> <dev> <name1> <name2>\n"
+ " - change all partitions named name1 to name2\n"
+ " and vice-versa\n"
+ "gpt rename <interface> <dev> <part> <name>\n"
+ " - rename the specified partition\n"
+ " Example usage:\n"
+ " gpt swap mmc 0 foo bar\n"
+ " gpt rename mmc 0 3 foo\n"
+#endif
);
diff --git a/cmd/ini.c b/cmd/ini.c
index 727fd1c..8656299 100644
--- a/cmd/ini.c
+++ b/cmd/ini.c
@@ -219,7 +219,7 @@
for (i = 0; i < strlen(value); i++)
value[i] = tolower(value[i]);
#endif
- setenv(name, value);
+ env_set(name, value);
printf("ini: Imported %s as %s\n", name, value);
}
@@ -238,9 +238,9 @@
section = argv[1];
file_address = (char *)simple_strtoul(
- argc < 3 ? getenv("loadaddr") : argv[2], NULL, 16);
+ argc < 3 ? env_get("loadaddr") : argv[2], NULL, 16);
file_size = (size_t)simple_strtoul(
- argc < 4 ? getenv("filesize") : argv[3], NULL, 16);
+ argc < 4 ? env_get("filesize") : argv[3], NULL, 16);
return ini_parse(file_address, file_size, ini_handler, (void *)section);
}
diff --git a/cmd/itest.c b/cmd/itest.c
index e1896d9..70db04a 100644
--- a/cmd/itest.c
+++ b/cmd/itest.c
@@ -101,7 +101,7 @@
i++;
}
s[i] = 0;
- return getenv((const char *)&s[2]);
+ return env_get((const char *)&s[2]);
} else {
return s;
}
diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index dc94705..aee2f45 100644
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -479,9 +479,9 @@
ulong offset = load_addr;
/* pre-set Boot file name */
- if ((filename = getenv("bootfile")) == NULL) {
+ filename = env_get("bootfile");
+ if (!filename)
filename = "uImage";
- }
if (argc == 2) {
filename = argv[1];
@@ -512,7 +512,7 @@
if (size > 0) {
printf("### %s load complete: %d bytes loaded to 0x%lx\n",
fsname, size, offset);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
} else {
printf("### %s LOAD ERROR<%x> for %s!\n", fsname, size, filename);
}
diff --git a/cmd/load.c b/cmd/load.c
index 4597ec5..519c309 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -50,11 +50,11 @@
load_baudrate = current_baudrate = gd->baudrate;
#endif
- if (((env_echo = getenv("loads_echo")) != NULL) && (*env_echo == '1')) {
+ env_echo = env_get("loads_echo");
+ if (env_echo && *env_echo == '1')
do_echo = 1;
- } else {
+ else
do_echo = 0;
- }
#ifdef CONFIG_SYS_LOADS_BAUD_CHANGE
if (argc >= 2) {
@@ -182,7 +182,7 @@
start_addr, end_addr, size, size
);
flush_cache(start_addr, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return (addr);
case SREC_START:
break;
@@ -427,9 +427,9 @@
offset = CONFIG_SYS_LOAD_ADDR;
/* pre-set offset from $loadaddr */
- if ((s = getenv("loadaddr")) != NULL) {
+ s = env_get("loadaddr");
+ if (s)
offset = simple_strtoul(s, NULL, 16);
- }
load_baudrate = current_baudrate = gd->baudrate;
@@ -529,7 +529,7 @@
flush_cache(offset, size);
printf("## Total Size = 0x%08x = %d Bytes\n", size, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return offset;
}
@@ -1000,7 +1000,7 @@
flush_cache(offset, ALIGN(size, ARCH_DMA_MINALIGN));
printf("## Total Size = 0x%08x = %d Bytes\n", size, size);
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return offset;
}
diff --git a/cmd/log.c b/cmd/log.c
index 873ee40..7a3bd5c 100644
--- a/cmd/log.c
+++ b/cmd/log.c
@@ -71,7 +71,8 @@
#endif
/* Set up log version */
- if ((s = getenv ("logversion")) != NULL)
+ s = env_get("logversion");
+ if (s)
log_version = (int)simple_strtoul(s, NULL, 10);
if (log_version == 2)
@@ -94,7 +95,8 @@
log->v2.start = log->v2.con;
/* Initialize default loglevel if present */
- if ((s = getenv ("loglevel")) != NULL)
+ s = env_get("loglevel");
+ if (s)
console_loglevel = (int)simple_strtoul(s, NULL, 10);
gd->flags |= GD_FLG_LOGINIT;
diff --git a/cmd/lzmadec.c b/cmd/lzmadec.c
index c78df82..1b482ed 100644
--- a/cmd/lzmadec.c
+++ b/cmd/lzmadec.c
@@ -42,7 +42,7 @@
return 1;
printf("Uncompressed size: %ld = %#lX\n", (ulong)src_len,
(ulong)src_len);
- setenv_hex("filesize", src_len);
+ env_set_hex("filesize", src_len);
return 0;
}
diff --git a/cmd/md5sum.c b/cmd/md5sum.c
index 23bb81e..c737cb2 100644
--- a/cmd/md5sum.c
+++ b/cmd/md5sum.c
@@ -35,7 +35,7 @@
sprintf(str_ptr, "%02x", sum[i]);
str_ptr += 2;
}
- setenv(dest, str_output);
+ env_set(dest, str_output);
}
}
@@ -54,7 +54,7 @@
if (strlen(verify_str) == 32)
vsum_str = verify_str;
else {
- vsum_str = getenv(verify_str);
+ vsum_str = env_get(verify_str);
if (vsum_str == NULL || strlen(vsum_str) != 32)
return 1;
}
diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index 683c48b..615aa74 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -239,19 +239,19 @@
dev = list_entry(dentry, struct mtd_device, link);
if (dev == current_mtd_dev) {
mtddevnum += current_mtd_partnum;
- setenv_ulong("mtddevnum", mtddevnum);
+ env_set_ulong("mtddevnum", mtddevnum);
break;
}
mtddevnum += dev->num_parts;
}
part = mtd_part_info(current_mtd_dev, current_mtd_partnum);
- setenv("mtddevname", part->name);
+ env_set("mtddevname", part->name);
debug("=> mtddevnum %d,\n=> mtddevname %s\n", mtddevnum, part->name);
} else {
- setenv("mtddevnum", NULL);
- setenv("mtddevname", NULL);
+ env_set("mtddevnum", NULL);
+ env_set("mtddevname", NULL);
debug("=> mtddevnum NULL\n=> mtddevname NULL\n");
}
@@ -270,12 +270,12 @@
sprintf(buf, "%s%d,%d", MTD_DEV_TYPE(current_mtd_dev->id->type),
current_mtd_dev->id->num, current_mtd_partnum);
- setenv("partition", buf);
+ env_set("partition", buf);
strncpy(last_partition, buf, 16);
debug("=> partition %s\n", buf);
} else {
- setenv("partition", NULL);
+ env_set("partition", NULL);
last_partition[0] = '\0';
debug("=> partition NULL\n");
@@ -1213,9 +1213,9 @@
ret = generate_mtdparts(buf, buflen);
if ((buf[0] != '\0') && (ret == 0))
- setenv("mtdparts", buf);
+ env_set("mtdparts", buf);
else
- setenv("mtdparts", NULL);
+ env_set("mtdparts", NULL);
return ret;
}
@@ -1533,11 +1533,11 @@
* @param buf temporary buffer pointer MTDPARTS_MAXLEN long
* @return mtdparts variable string, NULL if not found
*/
-static const char *getenv_mtdparts(char *buf)
+static const char *env_get_mtdparts(char *buf)
{
if (gd->flags & GD_FLG_ENV_READY)
- return getenv("mtdparts");
- if (getenv_f("mtdparts", buf, MTDPARTS_MAXLEN) != -1)
+ return env_get("mtdparts");
+ if (env_get_f("mtdparts", buf, MTDPARTS_MAXLEN) != -1)
return buf;
return NULL;
}
@@ -1565,7 +1565,7 @@
}
/* re-read 'mtdparts' variable, mtd_devices_init may be updating env */
- p = getenv_mtdparts(tmp_parts);
+ p = env_get_mtdparts(tmp_parts);
if (!p)
p = mtdparts;
@@ -1741,9 +1741,9 @@
}
/* get variables */
- ids = getenv("mtdids");
- parts = getenv_mtdparts(tmp_parts);
- current_partition = getenv("partition");
+ ids = env_get("mtdids");
+ parts = env_get_mtdparts(tmp_parts);
+ current_partition = env_get("partition");
/* save it for later parsing, cannot rely on current partition pointer
* as 'partition' variable may be updated during init */
@@ -1764,7 +1764,7 @@
if (mtdids_default) {
debug("mtdids variable not defined, using default\n");
ids = mtdids_default;
- setenv("mtdids", (char *)ids);
+ env_set("mtdids", (char *)ids);
} else {
printf("mtdids not defined, no default present\n");
return 1;
@@ -1780,7 +1780,7 @@
if (!parts) {
if (mtdparts_default && use_defaults) {
parts = mtdparts_default;
- if (setenv("mtdparts", (char *)parts) == 0)
+ if (env_set("mtdparts", (char *)parts) == 0)
use_defaults = 0;
} else
printf("mtdparts variable not set, see 'help mtdparts'\n");
@@ -1850,7 +1850,7 @@
current_mtd_partnum = pnum;
current_save();
}
- } else if (getenv("partition") == NULL) {
+ } else if (env_get("partition") == NULL) {
debug("no partition variable set, setting...\n");
current_save();
}
@@ -1956,9 +1956,9 @@
{
if (argc == 2) {
if (strcmp(argv[1], "default") == 0) {
- setenv("mtdids", NULL);
- setenv("mtdparts", NULL);
- setenv("partition", NULL);
+ env_set("mtdids", NULL);
+ env_set("mtdparts", NULL);
+ env_set("partition", NULL);
use_defaults = 1;
mtdparts_init();
@@ -1967,7 +1967,7 @@
/* this may be the first run, initialize lists if needed */
mtdparts_init();
- setenv("mtdparts", NULL);
+ env_set("mtdparts", NULL);
/* mtd_devices_init() calls current_save() */
return mtd_devices_init();
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index ea46e7b..a1997ac 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -98,7 +98,7 @@
const char *addr_str;
unsigned long addr;
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str)
addr = simple_strtoul(addr_str, NULL, 16);
else
diff --git a/cmd/nand.c b/cmd/nand.c
index a2152ec..a22945d 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -305,9 +305,9 @@
printf(" bbt options 0x%08x\n", chip->bbt_options);
/* Set geometry info */
- setenv_hex("nand_writesize", mtd->writesize);
- setenv_hex("nand_oobsize", mtd->oobsize);
- setenv_hex("nand_erasesize", mtd->erasesize);
+ env_set_hex("nand_writesize", mtd->writesize);
+ env_set_hex("nand_oobsize", mtd->oobsize);
+ env_set_hex("nand_erasesize", mtd->erasesize);
}
static int raw_access(struct mtd_info *mtd, ulong addr, loff_t off,
@@ -383,7 +383,7 @@
#else
int quiet = 0;
#endif
- const char *quiet_str = getenv("quiet");
+ const char *quiet_str = env_get("quiet");
int dev = nand_curr_device;
int repeat = flag & CMD_FLAG_REPEAT;
@@ -966,11 +966,11 @@
switch (argc) {
case 1:
addr = CONFIG_SYS_LOAD_ADDR;
- boot_device = getenv("bootdevice");
+ boot_device = env_get("bootdevice");
break;
case 2:
addr = simple_strtoul(argv[1], NULL, 16);
- boot_device = getenv("bootdevice");
+ boot_device = env_get("bootdevice");
break;
case 3:
addr = simple_strtoul(argv[1], NULL, 16);
diff --git a/cmd/net.c b/cmd/net.c
index df8b6c9..d7c776a 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -42,7 +42,7 @@
);
#ifdef CONFIG_CMD_TFTPPUT
-int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
return netboot_common(TFTPPUT, cmdtp, argc, argv);
}
@@ -116,23 +116,23 @@
if (net_gateway.s_addr) {
ip_to_string(net_gateway, tmp);
- setenv("gatewayip", tmp);
+ env_set("gatewayip", tmp);
}
if (net_netmask.s_addr) {
ip_to_string(net_netmask, tmp);
- setenv("netmask", tmp);
+ env_set("netmask", tmp);
}
if (net_hostname[0])
- setenv("hostname", net_hostname);
+ env_set("hostname", net_hostname);
if (net_root_path[0])
- setenv("rootpath", net_root_path);
+ env_set("rootpath", net_root_path);
if (net_ip.s_addr) {
ip_to_string(net_ip, tmp);
- setenv("ipaddr", tmp);
+ env_set("ipaddr", tmp);
}
#if !defined(CONFIG_BOOTP_SERVERIP)
/*
@@ -141,32 +141,32 @@
*/
if (net_server_ip.s_addr) {
ip_to_string(net_server_ip, tmp);
- setenv("serverip", tmp);
+ env_set("serverip", tmp);
}
#endif
if (net_dns_server.s_addr) {
ip_to_string(net_dns_server, tmp);
- setenv("dnsip", tmp);
+ env_set("dnsip", tmp);
}
#if defined(CONFIG_BOOTP_DNS2)
if (net_dns_server2.s_addr) {
ip_to_string(net_dns_server2, tmp);
- setenv("dnsip2", tmp);
+ env_set("dnsip2", tmp);
}
#endif
if (net_nis_domain[0])
- setenv("domain", net_nis_domain);
+ env_set("domain", net_nis_domain);
#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_TIMEOFFSET)
if (net_ntp_time_offset) {
sprintf(tmp, "%d", net_ntp_time_offset);
- setenv("timeoffset", tmp);
+ env_set("timeoffset", tmp);
}
#endif
#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER)
if (net_ntp_server.s_addr) {
ip_to_string(net_ntp_server, tmp);
- setenv("ntpserverip", tmp);
+ env_set("ntpserverip", tmp);
}
#endif
}
@@ -181,7 +181,7 @@
ulong addr;
/* pre-set load_addr */
- s = getenv("loadaddr");
+ s = env_get("loadaddr");
if (s != NULL)
load_addr = simple_strtoul(s, NULL, 16);
@@ -291,14 +291,14 @@
printf("CDP offered appliance VLAN %d\n",
ntohs(cdp_appliance_vlan));
vlan_to_string(cdp_appliance_vlan, tmp);
- setenv("vlan", tmp);
+ env_set("vlan", tmp);
net_our_vlan = cdp_appliance_vlan;
}
if (cdp_native_vlan != htons(-1)) {
printf("CDP offered native VLAN %d\n", ntohs(cdp_native_vlan));
vlan_to_string(cdp_native_vlan, tmp);
- setenv("nvlan", tmp);
+ env_set("nvlan", tmp);
net_native_vlan = cdp_native_vlan;
}
}
@@ -331,7 +331,7 @@
char *toff;
if (argc < 2) {
- net_ntp_server = getenv_ip("ntpserverip");
+ net_ntp_server = env_get_ip("ntpserverip");
if (net_ntp_server.s_addr == 0) {
printf("ntpserverip not set\n");
return CMD_RET_FAILURE;
@@ -344,7 +344,7 @@
}
}
- toff = getenv("timeoffset");
+ toff = env_get("timeoffset");
if (toff == NULL)
net_ntp_time_offset = 0;
else
@@ -423,14 +423,14 @@
net_gateway.s_addr = 0;
ip_to_string(net_gateway, tmp);
- setenv("gatewayip", tmp);
+ env_set("gatewayip", tmp);
ip_to_string(net_netmask, tmp);
- setenv("netmask", tmp);
+ env_set("netmask", tmp);
ip_to_string(net_ip, tmp);
- setenv("ipaddr", tmp);
- setenv("llipaddr", tmp); /* store this for next time */
+ env_set("ipaddr", tmp);
+ env_set("llipaddr", tmp); /* store this for next time */
return CMD_RET_SUCCESS;
}
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index cd17db6..4033d90 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -283,7 +283,7 @@
return 0;
}
-int setenv(const char *varname, const char *varvalue)
+int env_set(const char *varname, const char *varvalue)
{
const char * const argv[4] = { "setenv", varname, varvalue, NULL };
@@ -304,12 +304,12 @@
* @param value Value to set it to
* @return 0 if ok, 1 on error
*/
-int setenv_ulong(const char *varname, ulong value)
+int env_set_ulong(const char *varname, ulong value)
{
/* TODO: this should be unsigned */
char *str = simple_itoa(value);
- return setenv(varname, str);
+ return env_set(varname, str);
}
/**
@@ -319,21 +319,21 @@
* @param value Value to set it to
* @return 0 if ok, 1 on error
*/
-int setenv_hex(const char *varname, ulong value)
+int env_set_hex(const char *varname, ulong value)
{
char str[17];
sprintf(str, "%lx", value);
- return setenv(varname, str);
+ return env_set(varname, str);
}
-ulong getenv_hex(const char *varname, ulong default_val)
+ulong env_get_hex(const char *varname, ulong default_val)
{
const char *s;
ulong value;
char *endp;
- s = getenv(varname);
+ s = env_get(varname);
if (s)
value = simple_strtoul(s, &endp, 16);
if (!s || endp == s)
@@ -594,7 +594,7 @@
return 1;
/* Set read buffer to initial value or empty sting */
- init_val = getenv(argv[1]);
+ init_val = env_get(argv[1]);
if (init_val)
snprintf(buffer, CONFIG_SYS_CBSIZE, "%s", init_val);
else
@@ -622,7 +622,7 @@
* return address of storage for that variable,
* or NULL if not found
*/
-char *getenv(const char *name)
+char *env_get(const char *name)
{
if (gd->flags & GD_FLG_ENV_READY) { /* after import into hashtable */
ENTRY e, *ep;
@@ -637,7 +637,7 @@
}
/* restricted capabilities before import */
- if (getenv_f(name, (char *)(gd->env_buf), sizeof(gd->env_buf)) > 0)
+ if (env_get_f(name, (char *)(gd->env_buf), sizeof(gd->env_buf)) > 0)
return (char *)(gd->env_buf);
return NULL;
@@ -646,7 +646,7 @@
/*
* Look up variable from environment for restricted C runtime env.
*/
-int getenv_f(const char *name, char *buf, unsigned len)
+int env_get_f(const char *name, char *buf, unsigned len)
{
int i, nxt;
@@ -690,13 +690,13 @@
* found
* @return the decoded value, or default_val if not found
*/
-ulong getenv_ulong(const char *name, int base, ulong default_val)
+ulong env_get_ulong(const char *name, int base, ulong default_val)
{
/*
- * We can use getenv() here, even before relocation, since the
+ * We can use env_get() here, even before relocation, since the
* environment variable value is an integer and thus short.
*/
- const char *str = getenv(name);
+ const char *str = env_get(name);
return str ? simple_strtoul(str, NULL, base) : default_val;
}
@@ -706,9 +706,11 @@
static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
- printf("Saving Environment to %s...\n", env_name_spec);
+ struct env_driver *env = env_driver_lookup_default();
- return saveenv() ? 1 : 0;
+ printf("Saving Environment to %s...\n", env->name);
+
+ return env_save() ? 1 : 0;
}
U_BOOT_CMD(
@@ -929,7 +931,7 @@
return 1;
}
sprintf(buf, "%zX", (size_t)len);
- setenv("filesize", buf);
+ env_set("filesize", buf);
return 0;
}
@@ -955,7 +957,7 @@
envp->flags = ACTIVE_FLAG;
#endif
}
- setenv_hex("filesize", len + offsetof(env_t, data));
+ env_set_hex("filesize", len + offsetof(env_t, data));
return 0;
diff --git a/cmd/nvme.c b/cmd/nvme.c
new file mode 100644
index 0000000..e1ef95f
--- /dev/null
+++ b/cmd/nvme.c
@@ -0,0 +1,197 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <nvme.h>
+#include <part.h>
+#include <linux/math64.h>
+
+static int nvme_curr_device;
+
+static int do_nvme_scan(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ int ret;
+
+ ret = nvme_scan_namespace();
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_list(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ blk_list_devices(IF_TYPE_NVME);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_info(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ int devnum;
+ struct udevice *udev;
+ int ret;
+
+ if (argc > 1)
+ devnum = (int)simple_strtoul(argv[1], NULL, 10);
+ else
+ devnum = nvme_curr_device;
+
+ ret = blk_get_device(IF_TYPE_NVME, devnum, &udev);
+ if (ret < 0)
+ return CMD_RET_FAILURE;
+
+ nvme_print_info(udev);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_device(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ if (argc > 1) {
+ int devnum = (int)simple_strtoul(argv[1], NULL, 10);
+
+ if (!blk_show_device(IF_TYPE_NVME, devnum)) {
+ nvme_curr_device = devnum;
+ printf("... is now current device\n");
+ } else {
+ return CMD_RET_FAILURE;
+ }
+ } else {
+ blk_show_device(IF_TYPE_NVME, nvme_curr_device);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_part(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ if (argc > 1) {
+ int devnum = (int)simple_strtoul(argv[2], NULL, 10);
+
+ if (blk_print_part_devnum(IF_TYPE_NVME, devnum)) {
+ printf("\nNVMe device %d not available\n", devnum);
+ return CMD_RET_FAILURE;
+ }
+ } else {
+ blk_print_part_devnum(IF_TYPE_NVME, nvme_curr_device);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_nvme_read(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long time;
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ ulong addr = simple_strtoul(argv[1], NULL, 16);
+ ulong cnt = simple_strtoul(argv[3], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul(argv[2], NULL, 16);
+
+ printf("\nNVMe read: device %d block # " LBAFU " count %ld ... ",
+ nvme_curr_device, blk, cnt);
+
+ time = get_timer(0);
+ n = blk_read_devnum(IF_TYPE_NVME, nvme_curr_device, blk,
+ cnt, (ulong *)addr);
+ time = get_timer(time);
+
+ printf("read: %s\n", (n == cnt) ? "OK" : "ERROR");
+ printf("%lu bytes read in %lu ms", cnt * 512, time);
+ if (time > 0) {
+ puts(" (");
+ print_size(div_u64(cnt * 512, time) * 1000, "/s");
+ puts(")");
+ }
+ puts("\n");
+
+ return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+static int do_nvme_write(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long time;
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ ulong addr = simple_strtoul(argv[1], NULL, 16);
+ ulong cnt = simple_strtoul(argv[3], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul(argv[2], NULL, 16);
+
+ printf("\nNVMe write: device %d block # " LBAFU " count %ld ... ",
+ nvme_curr_device, blk, cnt);
+
+ time = get_timer(0);
+ n = blk_write_devnum(IF_TYPE_NVME, nvme_curr_device, blk,
+ cnt, (ulong *)addr);
+ time = get_timer(time);
+
+ printf("write: %s\n", (n == cnt) ? "OK" : "ERROR");
+ printf("%lu bytes write in %lu ms", cnt * 512, time);
+ if (time > 0) {
+ puts(" (");
+ print_size(div_u64(cnt * 512, time) * 1000, "/s");
+ puts(")");
+ }
+ puts("\n");
+
+ return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+static cmd_tbl_t cmd_nvme[] = {
+ U_BOOT_CMD_MKENT(scan, 1, 1, do_nvme_scan, "", ""),
+ U_BOOT_CMD_MKENT(list, 1, 1, do_nvme_list, "", ""),
+ U_BOOT_CMD_MKENT(info, 2, 1, do_nvme_info, "", ""),
+ U_BOOT_CMD_MKENT(device, 2, 1, do_nvme_device, "", ""),
+ U_BOOT_CMD_MKENT(part, 2, 1, do_nvme_part, "", ""),
+ U_BOOT_CMD_MKENT(write, 4, 0, do_nvme_write, "", ""),
+ U_BOOT_CMD_MKENT(read, 4, 0, do_nvme_read, "", "")
+};
+
+static int do_nvmecops(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ cmd_tbl_t *cp;
+
+ cp = find_cmd_tbl(argv[1], cmd_nvme, ARRAY_SIZE(cmd_nvme));
+
+ argc--;
+ argv++;
+
+ if (cp == NULL || argc > cp->maxargs)
+ return CMD_RET_USAGE;
+
+ if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+ return CMD_RET_SUCCESS;
+
+ return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+ nvme, 8, 1, do_nvmecops,
+ "NVM Express sub-system",
+ "\nnvme scan - scan NVMe blk devices\n"
+ "nvme list - show all available NVMe blk devices\n"
+ "nvme info [dev]- show current or a specific NVMe blk device\n"
+ "nvme device [dev] - show or set current device\n"
+ "nvme part [dev] - print partition table\n"
+ "nvme read addr blk# cnt\n"
+ "nvme write addr blk# cnt"
+);
diff --git a/cmd/part.c b/cmd/part.c
index 8ba0598..746bf40 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -38,7 +38,7 @@
return 1;
if (argc > 2)
- setenv(argv[2], info.uuid);
+ env_set(argv[2], info.uuid);
else
printf("%s\n", info.uuid);
@@ -99,7 +99,7 @@
sprintf(t, "%s%x", str[0] ? " " : "", p);
strcat(str, t);
}
- setenv(var, str);
+ env_set(var, str);
return 0;
}
@@ -135,7 +135,7 @@
snprintf(buf, sizeof(buf), LBAF, info.start);
if (argc > 3)
- setenv(argv[3], buf);
+ env_set(argv[3], buf);
else
printf("%s\n", buf);
@@ -169,7 +169,7 @@
snprintf(buf, sizeof(buf), LBAF, info.size);
if (argc > 3)
- setenv(argv[3], buf);
+ env_set(argv[3], buf);
else
printf("%s\n", buf);
diff --git a/cmd/pci.c b/cmd/pci.c
index fe27b4f..b8c799f 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -694,7 +694,7 @@
if ((bdf = get_pci_dev(argv[2])) == -1)
return 1;
break;
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
case 'e':
pci_init();
return 0;
@@ -782,7 +782,7 @@
static char pci_help_text[] =
"[bus] [long]\n"
" - short or long list of PCI devices on bus 'bus'\n"
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
"pci enum\n"
" - Enumerate PCI buses\n"
#endif
diff --git a/cmd/portio.c b/cmd/portio.c
deleted file mode 100644
index bf3a997..0000000
--- a/cmd/portio.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2003
- * Marc Singer, elf@buici.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Port I/O Functions
- *
- * Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
- */
-
-#include <common.h>
-#include <command.h>
-
-/* Display values from last command.
- * Memory modify remembered values are different from display memory.
- */
-static uint in_last_addr, in_last_size;
-static uint out_last_addr, out_last_size, out_last_value;
-
-
-int do_portio_out (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- uint addr = out_last_addr;
- uint size = out_last_size;
- uint value = out_last_value;
-
- if (argc != 3)
- return CMD_RET_USAGE;
-
- if ((flag & CMD_FLAG_REPEAT) == 0) {
- /*
- * New command specified. Check for a size specification.
- * Defaults to long if no or incorrect specification.
- */
- size = cmd_get_data_size (argv[0], 1);
- addr = simple_strtoul (argv[1], NULL, 16);
- value = simple_strtoul (argv[2], NULL, 16);
- }
-#if defined (CONFIG_X86)
-
- {
- unsigned short port = addr;
-
- switch (size) {
- default:
- case 1:
- {
- unsigned char ch = value;
- __asm__ volatile ("out %0, %%dx"::"a" (ch), "d" (port));
- }
- break;
- case 2:
- {
- unsigned short w = value;
- __asm__ volatile ("out %0, %%dx"::"a" (w), "d" (port));
- }
- break;
- case 4:
- __asm__ volatile ("out %0, %%dx"::"a" (value), "d" (port));
-
- break;
- }
- }
-
-#endif /* CONFIG_X86 */
-
- out_last_addr = addr;
- out_last_size = size;
- out_last_value = value;
-
- return 0;
-}
-
-U_BOOT_CMD(
- out, 3, 1, do_portio_out,
- "write datum to IO port",
- "[.b, .w, .l] port value\n - output to IO port"
-);
-
-int do_portio_in (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- uint addr = in_last_addr;
- uint size = in_last_size;
-
- if (argc != 2)
- return CMD_RET_USAGE;
-
- if ((flag & CMD_FLAG_REPEAT) == 0) {
- /*
- * New command specified. Check for a size specification.
- * Defaults to long if no or incorrect specification.
- */
- size = cmd_get_data_size (argv[0], 1);
- addr = simple_strtoul (argv[1], NULL, 16);
- }
-#if defined (CONFIG_X86)
-
- {
- unsigned short port = addr;
-
- switch (size) {
- default:
- case 1:
- {
- unsigned char ch;
- __asm__ volatile ("in %%dx, %0":"=a" (ch):"d" (port));
-
- printf (" %02x\n", ch);
- }
- break;
- case 2:
- {
- unsigned short w;
- __asm__ volatile ("in %%dx, %0":"=a" (w):"d" (port));
-
- printf (" %04x\n", w);
- }
- break;
- case 4:
- {
- unsigned long l;
- __asm__ volatile ("in %%dx, %0":"=a" (l):"d" (port));
-
- printf (" %08lx\n", l);
- }
- break;
- }
- }
-#endif /* CONFIG_X86 */
-
- in_last_addr = addr;
- in_last_size = size;
-
- return 0;
-}
-
-U_BOOT_CMD(
- in, 2, 1, do_portio_in,
- "read data from an IO port",
- "[.b, .w, .l] port\n"
- " - read datum from IO port"
-);
diff --git a/cmd/pxe.c b/cmd/pxe.c
index 0a07f14..c5a770a 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -33,15 +33,15 @@
static bool is_pxe;
/*
- * Like getenv, but prints an error if envvar isn't defined in the
- * environment. It always returns what getenv does, so it can be used in
- * place of getenv without changing error handling otherwise.
+ * Like env_get, but prints an error if envvar isn't defined in the
+ * environment. It always returns what env_get does, so it can be used in
+ * place of env_get without changing error handling otherwise.
*/
static char *from_env(const char *envvar)
{
char *ret;
- ret = getenv(envvar);
+ ret = env_get(envvar);
if (!ret)
printf("missing environment variable: %s\n", envvar);
@@ -70,8 +70,7 @@
return -EINVAL;
}
- if (!eth_getenv_enetaddr_by_index("eth", eth_get_dev_index(),
- ethaddr))
+ if (!eth_env_get_enetaddr_by_index("eth", eth_get_dev_index(), ethaddr))
return -ENOENT;
sprintf(outbuf, "01-%02x-%02x-%02x-%02x-%02x-%02x",
@@ -591,7 +590,7 @@
char bootargs[CONFIG_SYS_CBSIZE];
cli_simple_process_macros(label->append, bootargs);
- setenv("bootargs", bootargs);
+ env_set("bootargs", bootargs);
}
debug("running: %s\n", localcmd);
@@ -649,9 +648,9 @@
}
bootm_argv[2] = initrd_str;
- strcpy(bootm_argv[2], getenv("ramdisk_addr_r"));
+ strcpy(bootm_argv[2], env_get("ramdisk_addr_r"));
strcat(bootm_argv[2], ":");
- strcat(bootm_argv[2], getenv("filesize"));
+ strcat(bootm_argv[2], env_get("filesize"));
}
if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@@ -662,8 +661,8 @@
if (label->ipappend & 0x1) {
sprintf(ip_str, " ip=%s:%s:%s:%s",
- getenv("ipaddr"), getenv("serverip"),
- getenv("gatewayip"), getenv("netmask"));
+ env_get("ipaddr"), env_get("serverip"),
+ env_get("gatewayip"), env_get("netmask"));
}
#ifdef CONFIG_CMD_NET
@@ -695,11 +694,11 @@
strcat(bootargs, mac_str);
cli_simple_process_macros(bootargs, finalbootargs);
- setenv("bootargs", finalbootargs);
+ env_set("bootargs", finalbootargs);
printf("append: %s\n", finalbootargs);
}
- bootm_argv[1] = getenv("kernel_addr_r");
+ bootm_argv[1] = env_get("kernel_addr_r");
/*
* fdt usage is optional:
@@ -714,7 +713,7 @@
*
* Scenario 3: fdt blob is not available.
*/
- bootm_argv[3] = getenv("fdt_addr_r");
+ bootm_argv[3] = env_get("fdt_addr_r");
/* if fdt label is defined then get fdt from server */
if (bootm_argv[3]) {
@@ -726,7 +725,7 @@
} else if (label->fdtdir) {
char *f1, *f2, *f3, *f4, *slash;
- f1 = getenv("fdtfile");
+ f1 = env_get("fdtfile");
if (f1) {
f2 = "";
f3 = "";
@@ -739,9 +738,9 @@
* or the boot scripts should set $fdtfile
* before invoking "pxe" or "sysboot".
*/
- f1 = getenv("soc");
+ f1 = env_get("soc");
f2 = "-";
- f3 = getenv("board");
+ f3 = env_get("board");
f4 = ".dtb";
}
@@ -781,7 +780,7 @@
}
if (!bootm_argv[3])
- bootm_argv[3] = getenv("fdt_addr");
+ bootm_argv[3] = env_get("fdt_addr");
if (bootm_argv[3]) {
if (!bootm_argv[2])
@@ -1671,10 +1670,10 @@
}
if (argc < 6)
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
else {
filename = argv[5];
- setenv("bootfile", filename);
+ env_set("bootfile", filename);
}
if (strstr(argv[3], "ext2"))
diff --git a/cmd/qfw.c b/cmd/qfw.c
index 12436ec..b38026b 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -55,7 +55,7 @@
* when invoking qemu), do not update bootargs
*/
if (*data_addr != '\0') {
- if (setenv("bootargs", data_addr) < 0)
+ if (env_set("bootargs", data_addr) < 0)
printf("warning: unable to change bootargs\n");
}
}
@@ -123,7 +123,7 @@
void *load_addr;
void *initrd_addr;
- env = getenv("loadaddr");
+ env = env_get("loadaddr");
load_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
#ifdef CONFIG_LOADADDR
@@ -132,7 +132,7 @@
NULL;
#endif
- env = getenv("ramdiskaddr");
+ env = env_get("ramdiskaddr");
initrd_addr = env ?
(void *)simple_strtoul(env, NULL, 16) :
#ifdef CONFIG_RAMDISK_ADDR
diff --git a/cmd/read.c b/cmd/read.c
index 61d8ce7..ecf9254 100644
--- a/cmd/read.c
+++ b/cmd/read.c
@@ -66,7 +66,7 @@
return 1;
}
- if (blk_read(dev_desc, offset + blk, cnt, addr) < 0) {
+ if (blk_dread(dev_desc, offset + blk, cnt, addr) < 0) {
printf("Error reading blocks\n");
return 1;
}
diff --git a/cmd/reiser.c b/cmd/reiser.c
index 9c3e9e9..e10c7b9 100644
--- a/cmd/reiser.c
+++ b/cmd/reiser.c
@@ -88,18 +88,18 @@
switch (argc) {
case 3:
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL) {
addr = simple_strtoul (addr_str, NULL, 16);
} else {
addr = CONFIG_SYS_LOAD_ADDR;
}
- filename = getenv ("bootfile");
+ filename = env_get("bootfile");
count = 0;
break;
case 4:
addr = simple_strtoul (argv[3], NULL, 16);
- filename = getenv ("bootfile");
+ filename = env_get("bootfile");
count = 0;
break;
case 5:
@@ -157,7 +157,7 @@
load_addr = addr;
printf ("\n%ld bytes read\n", filelen);
- setenv_hex("filesize", filelen);
+ env_set_hex("filesize", filelen);
return filelen;
}
diff --git a/cmd/scsi.c b/cmd/scsi.c
index 5709718..8e36de1 100644
--- a/cmd/scsi.c
+++ b/cmd/scsi.c
@@ -36,7 +36,9 @@
case 2:
if (strncmp(argv[1], "res", 3) == 0) {
printf("\nReset SCSI\n");
+#ifndef CONFIG_DM_SCSI
scsi_bus_reset(NULL);
+#endif
ret = scsi_scan(true);
if (ret)
return CMD_RET_FAILURE;
diff --git a/cmd/setexpr.c b/cmd/setexpr.c
index e7194fc..af21022 100644
--- a/cmd/setexpr.c
+++ b/cmd/setexpr.c
@@ -145,7 +145,7 @@
}
if (t == NULL) {
- value = getenv(name);
+ value = env_get(name);
if (value == NULL) {
printf("## Error: variable \"%s\" not defined\n", name);
@@ -282,11 +282,11 @@
if (!global)
break;
}
- debug("## FINAL (now setenv()) : %s\n", data);
+ debug("## FINAL (now env_set()) : %s\n", data);
printf("%s=%s\n", name, data);
- return setenv(name, data);
+ return env_set(name, data);
}
#endif
@@ -314,7 +314,7 @@
/* plain assignment: "setexpr name value" */
if (argc == 3) {
- setenv_hex(argv[1], a);
+ env_set_hex(argv[1], a);
return 0;
}
@@ -370,7 +370,7 @@
return 1;
}
- setenv_hex(argv[1], value);
+ env_set_hex(argv[1], value);
return 0;
}
diff --git a/cmd/source.c b/cmd/source.c
index 177f86b..a9831b6 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -40,7 +40,7 @@
size_t fit_len;
#endif
- verify = getenv_yesno ("verify");
+ verify = env_get_yesno("verify");
buf = map_sysmem(addr, 0);
switch (genimg_get_format(buf)) {
diff --git a/cmd/tpm.c b/cmd/tpm.c
index 0c4bc73..d9b4335 100644
--- a/cmd/tpm.c
+++ b/cmd/tpm.c
@@ -231,7 +231,7 @@
default:
return -1;
}
- if (setenv_ulong(*vars, value))
+ if (env_set_ulong(*vars, value))
return -1;
}
@@ -624,7 +624,7 @@
&key_handle);
if (!err) {
printf("Key handle is 0x%x\n", key_handle);
- setenv_hex("key_handle", key_handle);
+ env_set_hex("key_handle", key_handle);
}
return report_return_code(err);
diff --git a/cmd/trace.c b/cmd/trace.c
index 1a6d8c3..a0a7dd1 100644
--- a/cmd/trace.c
+++ b/cmd/trace.c
@@ -16,10 +16,10 @@
if (argc < 2)
return -1;
if (argc < 4) {
- *buff_size = getenv_ulong("profsize", 16, 0);
- *buff = map_sysmem(getenv_ulong("profbase", 16, 0),
+ *buff_size = env_get_ulong("profsize", 16, 0);
+ *buff = map_sysmem(env_get_ulong("profbase", 16, 0),
*buff_size);
- *buff_ptr = getenv_ulong("profoffset", 16, 0);
+ *buff_ptr = env_get_ulong("profoffset", 16, 0);
} else {
*buff_size = simple_strtoul(argv[3], NULL, 16);
*buff = map_sysmem(simple_strtoul(argv[2], NULL, 16),
@@ -46,9 +46,9 @@
used = min(avail, (size_t)needed);
printf("Function trace dumped to %08lx, size %#zx\n",
(ulong)map_to_sysmem(buff + buff_ptr), used);
- setenv_hex("profbase", map_to_sysmem(buff));
- setenv_hex("profsize", buff_size);
- setenv_hex("profoffset", buff_ptr + used);
+ env_set_hex("profbase", map_to_sysmem(buff));
+ env_set_hex("profsize", buff_size);
+ env_set_hex("profoffset", buff_ptr + used);
return 0;
}
@@ -71,9 +71,9 @@
printf("Call list dumped to %08lx, size %#zx\n",
(ulong)map_to_sysmem(buff + buff_ptr), used);
- setenv_hex("profbase", map_to_sysmem(buff));
- setenv_hex("profsize", buff_size);
- setenv_hex("profoffset", buff_ptr + used);
+ env_set_hex("profbase", map_to_sysmem(buff));
+ env_set_hex("profsize", buff_size);
+ env_set_hex("profoffset", buff_ptr + used);
return 0;
}
diff --git a/cmd/unzip.c b/cmd/unzip.c
index a8bcb1f..94f883f 100644
--- a/cmd/unzip.c
+++ b/cmd/unzip.c
@@ -29,7 +29,7 @@
return 1;
printf("Uncompressed size: %ld = 0x%lX\n", src_len, src_len);
- setenv_hex("filesize", src_len);
+ env_set_hex("filesize", src_len);
return 0;
}
diff --git a/cmd/usb.c b/cmd/usb.c
index 4fa456e..992d414 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -150,6 +150,8 @@
static void usb_display_desc(struct usb_device *dev)
{
+ uint packet_size = dev->descriptor.bMaxPacketSize0;
+
if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) {
printf("%d: %s, USB Revision %x.%x\n", dev->devnum,
usb_get_class_desc(dev->config.if_desc[0].desc.bInterfaceClass),
@@ -171,9 +173,10 @@
usb_get_class_desc(
dev->config.if_desc[0].desc.bInterfaceClass));
}
+ if (dev->descriptor.bcdUSB >= cpu_to_le16(0x0300))
+ packet_size = 1 << packet_size;
printf(" - PacketSize: %d Configurations: %d\n",
- dev->descriptor.bMaxPacketSize0,
- dev->descriptor.bNumConfigurations);
+ packet_size, dev->descriptor.bNumConfigurations);
printf(" - Vendor: 0x%04x Product 0x%04x Version %d.%d\n",
dev->descriptor.idVendor, dev->descriptor.idProduct,
(dev->descriptor.bcdDevice>>8) & 0xff,
diff --git a/cmd/ximg.c b/cmd/ximg.c
index d033c15..21b5c37 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -52,7 +52,7 @@
#endif
uint8_t comp;
- verify = getenv_yesno("verify");
+ verify = env_get_yesno("verify");
if (argc > 1) {
addr = simple_strtoul(argv[1], NULL, 16);
@@ -251,8 +251,8 @@
flush_cache(dest, len);
- setenv_hex("fileaddr", data);
- setenv_hex("filesize", len);
+ env_set_hex("fileaddr", data);
+ env_set_hex("filesize", len);
return 0;
}
diff --git a/cmd/zfs.c b/cmd/zfs.c
index 3ed9912..6913043 100644
--- a/cmd/zfs.c
+++ b/cmd/zfs.c
@@ -51,10 +51,10 @@
count = 0;
addr = simple_strtoul(argv[3], NULL, 16);
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
switch (argc) {
case 3:
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL)
addr = simple_strtoul(addr_str, NULL, 16);
else
@@ -115,7 +115,7 @@
load_addr = addr;
printf("%llu bytes read\n", zfile.size);
- setenv_hex("filesize", zfile.size);
+ env_set_hex("filesize", zfile.size);
return 0;
}
diff --git a/cmd/zip.c b/cmd/zip.c
index 7fcd9d5..dac7527 100644
--- a/cmd/zip.c
+++ b/cmd/zip.c
@@ -30,7 +30,7 @@
return 1;
printf("Compressed size: %ld = 0x%lX\n", dst_len, dst_len);
- setenv_hex("filesize", dst_len);
+ env_set_hex("filesize", dst_len);
return 0;
}
diff --git a/common/Kconfig b/common/Kconfig
index 8c8d2e4..4d8cae9 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -174,435 +174,6 @@
endmenu
-menu "Environment"
-
-config ENV_IS_IN_DATAFLASH
- bool "Environment in dataflash"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a DataFlash memory device which you
- want to use for the environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These three #defines specify the offset and size of the
- environment area within the total memory of your DataFlash placed
- at the specified address.
-
-config ENV_IS_IN_EEPROM
- bool "Environment in EEPROM"
- depends on !CHAIN_OF_TRUST
- help
- Use this if you have an EEPROM or similar serial access
- device and a driver for it.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the
- environment area within the total memory of your EEPROM.
-
- - CONFIG_SYS_I2C_EEPROM_ADDR:
- If defined, specified the chip address of the EEPROM device.
- The default address is zero.
-
- - CONFIG_SYS_I2C_EEPROM_BUS:
- If defined, specified the i2c bus of the EEPROM device.
-
- - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
- If defined, the number of bits used to address bytes in a
- single page in the EEPROM device. A 64 byte page, for example
- would require six bits.
-
- - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
- If defined, the number of milliseconds to delay between
- page writes. The default is zero milliseconds.
-
- - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
- The length in bytes of the EEPROM memory array address. Note
- that this is NOT the chip address length!
-
- - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
- EEPROM chips that implement "address overflow" are ones
- like Catalyst 24WC04/08/16 which has 9/10/11 bits of
- address and the extra bits end up in the "chip address" bit
- slots. This makes a 24WC08 (1Kbyte) chip look like four 256
- byte chips.
-
- Note that we consider the length of the address field to
- still be one byte because the extra address bits are hidden
- in the chip address.
-
- - CONFIG_SYS_EEPROM_SIZE:
- The size in bytes of the EEPROM device.
-
- - CONFIG_ENV_EEPROM_IS_ON_I2C
- define this, if you have I2C and SPI activated, and your
- EEPROM, which holds the environment, is on the I2C bus.
-
- - CONFIG_I2C_ENV_EEPROM_BUS
- if you have an Environment on an EEPROM reached over
- I2C muxes, you can define here, how to reach this
- EEPROM. For example:
-
- #define CONFIG_I2C_ENV_EEPROM_BUS 1
-
- EEPROM which holds the environment, is reached over
- a pca9547 i2c mux with address 0x70, channel 3.
-
-config ENV_IS_IN_FAT
- bool "Environment is in a FAT filesystem"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you want to use the FAT file system for the environment.
-
- - FAT_ENV_INTERFACE:
-
- Define this to a string that is the name of the block device.
-
- - FAT_ENV_DEVICE_AND_PART:
-
- Define this to a string to specify the partition of the device. It can
- be as following:
-
- "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
- - "D:P": device D partition P. Error occurs if device D has no
- partition table.
- - "D:0": device D.
- - "D" or "D:": device D partition 1 if device D has partition
- table, or the whole device D if has no partition
- table.
- - "D:auto": first partition in device D with bootable flag set.
- If none, first valid partition in device D. If no
- partition table then means device D.
-
- - FAT_ENV_FILE:
-
- It's a string of the FAT file name. This file use to store the
- environment.
-
- - CONFIG_FAT_WRITE:
- This must be enabled. Otherwise it cannot save the environment file.
-
-config ENV_IS_IN_FLASH
- bool "Environment in flash memory"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a flash device which you want to use for the
- environment.
-
- a) The environment occupies one whole flash sector, which is
- "embedded" in the text segment with the U-Boot code. This
- happens usually with "bottom boot sector" or "top boot
- sector" type flash chips, which have several smaller
- sectors at the start or the end. For instance, such a
- layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
- such a case you would place the environment in one of the
- 4 kB sectors - with U-Boot code before and after it. With
- "top boot sector" type flash chips, you would put the
- environment in one of the last sectors, leaving a gap
- between U-Boot and the environment.
-
- CONFIG_ENV_OFFSET:
-
- Offset of environment data (variable area) to the
- beginning of flash memory; for instance, with bottom boot
- type flash chips the second sector can be used: the offset
- for this sector is given here.
-
- CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
-
- CONFIG_ENV_ADDR:
-
- This is just another way to specify the start address of
- the flash sector containing the environment (instead of
- CONFIG_ENV_OFFSET).
-
- CONFIG_ENV_SECT_SIZE:
-
- Size of the sector containing the environment.
-
-
- b) Sometimes flash chips have few, equal sized, BIG sectors.
- In such a case you don't want to spend a whole sector for
- the environment.
-
- CONFIG_ENV_SIZE:
-
- If you use this in combination with CONFIG_ENV_IS_IN_FLASH
- and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
- of this flash sector for the environment. This saves
- memory for the RAM copy of the environment.
-
- It may also save flash memory if you decide to use this
- when your environment is "embedded" within U-Boot code,
- since then the remainder of the flash sector could be used
- for U-Boot code. It should be pointed out that this is
- STRONGLY DISCOURAGED from a robustness point of view:
- updating the environment in flash makes it always
- necessary to erase the WHOLE sector. If something goes
- wrong before the contents has been restored from a copy in
- RAM, your target system will be dead.
-
- CONFIG_ENV_ADDR_REDUND
- CONFIG_ENV_SIZE_REDUND
-
- These settings describe a second storage area used to hold
- a redundant copy of the environment data, so that there is
- a valid backup copy in case there is a power failure during
- a "saveenv" operation.
-
- BE CAREFUL! Any changes to the flash layout, and some changes to the
- source code will make it necessary to adapt <board>/u-boot.lds*
- accordingly!
-
-config ENV_IS_IN_MMC
- bool "Environment in an MMC device"
- depends on !CHAIN_OF_TRUST
- default y if ARCH_SUNXI
- help
- Define this if you have an MMC device which you want to use for the
- environment.
-
- CONFIG_SYS_MMC_ENV_DEV:
-
- Specifies which MMC device the environment is stored in.
-
- CONFIG_SYS_MMC_ENV_PART (optional):
-
- Specifies which MMC partition the environment is stored in. If not
- set, defaults to partition 0, the user area. Common values might be
- 1 (first MMC boot partition), 2 (second MMC boot partition).
-
- CONFIG_ENV_OFFSET:
- CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the environment
- area within the specified MMC device.
-
- If offset is positive (the usual case), it is treated as relative to
- the start of the MMC partition. If offset is negative, it is treated
- as relative to the end of the MMC partition. This can be useful if
- your board may be fitted with different MMC devices, which have
- different sizes for the MMC partitions, and you always want the
- environment placed at the very end of the partition, to leave the
- maximum possible space before it, to store other data.
-
- These two values are in units of bytes, but must be aligned to an
- MMC sector boundary.
-
- CONFIG_ENV_OFFSET_REDUND (optional):
-
- Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
- hold a redundant copy of the environment data. This provides a
- valid backup copy in case the other copy is corrupted, e.g. due
- to a power failure during a "saveenv" operation.
-
- This value may also be positive or negative; this is handled in the
- same way as CONFIG_ENV_OFFSET.
-
- This value is also in units of bytes, but must also be aligned to
- an MMC sector boundary.
-
- CONFIG_ENV_SIZE_REDUND (optional):
-
- This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
- set. If this value is set, it must be set to the same value as
- CONFIG_ENV_SIZE.
-
-config ENV_IS_IN_NAND
- bool "Environment in a NAND device"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a NAND device which you want to use for the
- environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the environment
- area within the first NAND device. CONFIG_ENV_OFFSET must be
- aligned to an erase block boundary.
-
- - CONFIG_ENV_OFFSET_REDUND (optional):
-
- This setting describes a second storage area of CONFIG_ENV_SIZE
- size used to hold a redundant copy of the environment data, so
- that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
- aligned to an erase block boundary.
-
- - CONFIG_ENV_RANGE (optional):
-
- Specifies the length of the region in which the environment
- can be written. This should be a multiple of the NAND device's
- block size. Specifying a range with more erase blocks than
- are needed to hold CONFIG_ENV_SIZE allows bad blocks within
- the range to be avoided.
-
- - CONFIG_ENV_OFFSET_OOB (optional):
-
- Enables support for dynamically retrieving the offset of the
- environment from block zero's out-of-band data. The
- "nand env.oob" command can be used to record this offset.
- Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
- using CONFIG_ENV_OFFSET_OOB.
-
-config ENV_IS_IN_NVRAM
- bool "Environment in a non-volatile RAM"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have some non-volatile memory device
- (NVRAM, battery buffered SRAM) which you want to use for the
- environment.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines are used to determine the memory area you
- want to use for environment. It is assumed that this memory
- can just be read and written to, without any special
- provision.
-
-config ENV_IS_IN_ONENAND
- bool "Environment is in OneNAND"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you want to put your local device's environment in
- OneNAND.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines are used to determine the device range you
- want to use for environment. It is assumed that this memory
- can just be read and written to, without any special
- provision.
-
-config ENV_IS_IN_REMOTE
- bool "Environment is in remove memory space"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a remote memory space which you
- want to use for the local device's environment.
-
- - CONFIG_ENV_ADDR:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the address and size of the
- environment area within the remote memory space. The
- local device can get the environment from remote memory
- space by SRIO or PCIE links.
-
-config ENV_IS_IN_SPI_FLASH
- bool "Environment is in SPI flash"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have a SPI Flash memory device which you
- want to use for the environment.
-
- - CONFIG_ENV_OFFSET:
- - CONFIG_ENV_SIZE:
-
- These two #defines specify the offset and size of the
- environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
- aligned to an erase sector boundary.
-
- - CONFIG_ENV_SECT_SIZE:
-
- Define the SPI flash's sector size.
-
- - CONFIG_ENV_OFFSET_REDUND (optional):
-
- This setting describes a second storage area of CONFIG_ENV_SIZE
- size used to hold a redundant copy of the environment data, so
- that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
- aligned to an erase sector boundary.
-
- - CONFIG_ENV_SPI_BUS (optional):
- - CONFIG_ENV_SPI_CS (optional):
-
- Define the SPI bus and chip select. If not defined they will be 0.
-
- - CONFIG_ENV_SPI_MAX_HZ (optional):
-
- Define the SPI max work clock. If not defined then use 1MHz.
-
- - CONFIG_ENV_SPI_MODE (optional):
-
- Define the SPI work mode. If not defined then use SPI_MODE_3.
-
-config ENV_IS_IN_UBI
- bool "Environment in a UBI volume"
- depends on !CHAIN_OF_TRUST
- help
- Define this if you have an UBI volume that you want to use for the
- environment. This has the benefit of wear-leveling the environment
- accesses, which is important on NAND.
-
- - CONFIG_ENV_UBI_PART:
-
- Define this to a string that is the mtd partition containing the UBI.
-
- - CONFIG_ENV_UBI_VOLUME:
-
- Define this to the name of the volume that you want to store the
- environment in.
-
- - CONFIG_ENV_UBI_VOLUME_REDUND:
-
- Define this to the name of another volume to store a second copy of
- the environment in. This will enable redundant environments in UBI.
- It is assumed that both volumes are in the same MTD partition.
-
- - CONFIG_UBI_SILENCE_MSG
- - CONFIG_UBIFS_SILENCE_MSG
-
- You will probably want to define these to avoid a really noisy system
- when storing the env in UBI.
-
-config ENV_IS_NOWHERE
- bool "Environment is not stored"
- help
- Define this if you don't want to or can't have an environment stored
- on a storage medium
-
-if ARCH_SUNXI
-
-config ENV_OFFSET
- hex "Environment Offset"
- depends on !ENV_IS_IN_UBI
- depends on !ENV_IS_NOWHERE
- default 0x88000 if ARCH_SUNXI
- help
- Offset from the start of the device (or partition)
-
-config ENV_SIZE
- hex "Environment Size"
- depends on !ENV_IS_NOWHERE
- default 0x20000 if ARCH_SUNXI
- help
- Size of the environment storage area
-
-config ENV_UBI_PART
- string "UBI partition name"
- depends on ENV_IS_IN_UBI
- help
- MTD partition containing the UBI device
-
-config ENV_UBI_VOLUME
- string "UBI volume name"
- depends on ENV_IS_IN_UBI
- help
- Name of the volume that you want to store the environment in.
-
-endif
-
-endmenu
-
config BOOTDELAY
int "delay in seconds before automatically booting"
default 2
@@ -615,6 +186,22 @@
See doc/README.autoboot for details.
+config USE_BOOTARGS
+ bool "Enable boot arguments"
+ help
+ Provide boot arguments to bootm command. Boot arguments are specified
+ in CONFIG_BOOTARGS option. Enable this option to be able to specify
+ CONFIG_BOOTARGS string. If this option is disabled, CONFIG_BOOTARGS
+ will be undefined and won't take any space in U-Boot image.
+
+config BOOTARGS
+ string "Boot arguments"
+ depends on USE_BOOTARGS
+ help
+ This can be used to pass arguments to the bootm command. The value of
+ CONFIG_BOOTARGS goes into the environment value "bootargs". Note that
+ this value will also override the "chosen" node in FDT blob.
+
menu "Console"
config MENU
@@ -858,7 +445,6 @@
config ARCH_EARLY_INIT_R
bool "Call arch-specific init soon after relocation"
- default y if X86
help
With this option U-Boot will call arch_early_init_r() soon after
relocation. Driver model is running by this point, and the cache
@@ -875,7 +461,6 @@
config BOARD_EARLY_INIT_F
bool "Call board-specific init before relocation"
- default y if X86
help
Some boards need to perform initialisation as soon as possible
after boot. With this option, U-Boot calls board_early_init_f()
diff --git a/common/Makefile b/common/Makefile
index 17a92ea..1b56cf9 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -19,7 +19,7 @@
obj-y += bootretry.o
endif
-# boards
+# # boards
obj-y += board_f.o
obj-y += board_r.o
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
@@ -29,31 +29,8 @@
obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o
obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o
-# environment
-obj-y += env_attr.o
-obj-y += env_callback.o
-obj-y += env_flags.o
-obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
-obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
-extra-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o
-extra-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
-obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
-obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
-obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
-obj-$(CONFIG_ENV_IS_IN_SATA) += env_sata.o
-obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
-obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
-obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
-
obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += fdt_support.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
obj-$(CONFIG_MII) += miiphyutil.o
obj-$(CONFIG_CMD_MII) += miiphyutil.o
@@ -92,37 +69,15 @@
obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
-obj-$(CONFIG_SPL_OF_LIBFDT) += fdt_support.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
ifdef CONFIG_SPL_USB_HOST_SUPPORT
obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
-# environment
-ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_attr.o
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_flags.o
-obj-$(CONFIG_TPL_ENV_SUPPORT) += env_callback.o
-else
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
-obj-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
endif
-ifneq ($(CONFIG_TPL_ENV_SUPPORT)$(CONFIG_SPL_ENV_SUPPORT),)
-obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
-obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
-obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o
-obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-endif
-endif
-#environment
-obj-y += env_common.o
#others
obj-$(CONFIG_DDR_SPD) += ddr_spd.o
obj-$(CONFIG_SPD_EEPROM) += ddr_spd.o
@@ -139,15 +94,17 @@
endif
obj-$(CONFIG_CROS_EC) += cros_ec.o
obj-y += dlmalloc.o
-ifdef CONFIG_SYS_MALLOC_F_LEN
+ifdef CONFIG_SYS_MALLOC_F
+ifneq ($(CONFIG_$(SPL_)SYS_MALLOC_F_LEN),0)
obj-y += malloc_simple.o
endif
+endif
obj-y += image.o
obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += image-fdt.o
-obj-$(CONFIG_$(SPL_)FIT) += image-fit.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
+obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
-obj-$(CONFIG_$(SPL_)FIT_SIGNATURE) += image-sig.o
+obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
obj-$(CONFIG_IO_TRACE) += iotrace.o
obj-y += memsize.o
obj-y += stdio.o
@@ -173,5 +130,3 @@
obj-y += command.o
obj-y += s_record.o
obj-y += xyzModem.o
-
-CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
diff --git a/common/autoboot.c b/common/autoboot.c
index c52bad8..a011865 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -50,7 +50,7 @@
static int passwd_abort(uint64_t etime)
{
- const char *sha_env_str = getenv("bootstopkeysha256");
+ const char *sha_env_str = env_get("bootstopkeysha256");
u8 sha_env[SHA256_SUM_LEN];
u8 sha[SHA256_SUM_LEN];
char presskey[MAX_DELAY_STOP_STR];
@@ -109,8 +109,8 @@
int retry;
}
delaykey[] = {
- { .str = getenv("bootdelaykey"), .retry = 1 },
- { .str = getenv("bootstopkey"), .retry = 0 },
+ { .str = env_get("bootdelaykey"), .retry = 1 },
+ { .str = env_get("bootstopkey"), .retry = 0 },
};
char presskey[MAX_DELAY_STOP_STR];
@@ -278,12 +278,12 @@
/* Add an env variable to point to a kernel payload, if available */
addr = fdtdec_get_config_int(gd->fdt_blob, "kernel-offset", 0);
if (addr)
- setenv_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
+ env_set_addr("kernaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
addr = fdtdec_get_config_int(gd->fdt_blob, "rootdisk-offset", 0);
if (addr)
- setenv_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
+ env_set_addr("rootaddr", (void *)(CONFIG_SYS_TEXT_BASE + addr));
#endif /* CONFIG_OF_CONTROL && CONFIG_SYS_TEXT_BASE */
}
@@ -300,11 +300,11 @@
bootcount = bootcount_load();
bootcount++;
bootcount_store(bootcount);
- setenv_ulong("bootcount", bootcount);
- bootlimit = getenv_ulong("bootlimit", 10, 0);
+ env_set_ulong("bootcount", bootcount);
+ bootlimit = env_get_ulong("bootlimit", 10, 0);
#endif /* CONFIG_BOOTCOUNT_LIMIT */
- s = getenv("bootdelay");
+ s = env_get("bootdelay");
bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
#ifdef CONFIG_OF_CONTROL
@@ -321,17 +321,17 @@
#ifdef CONFIG_POST
if (gd->flags & GD_FLG_POSTFAIL) {
- s = getenv("failbootcmd");
+ s = env_get("failbootcmd");
} else
#endif /* CONFIG_POST */
#ifdef CONFIG_BOOTCOUNT_LIMIT
if (bootlimit && (bootcount > bootlimit)) {
printf("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",
(unsigned)bootlimit);
- s = getenv("altbootcmd");
+ s = env_get("altbootcmd");
} else
#endif /* CONFIG_BOOTCOUNT_LIMIT */
- s = getenv("bootcmd");
+ s = env_get("bootcmd");
process_fdt_options(gd->fdt_blob);
stored_bootdelay = bootdelay;
@@ -357,7 +357,7 @@
#ifdef CONFIG_MENUKEY
if (menukey == CONFIG_MENUKEY) {
- s = getenv("menucmd");
+ s = env_get("menucmd");
if (s)
run_command_list(s, -1, 0);
}
diff --git a/common/board_f.c b/common/board_f.c
index 49c8bc8..de5f398 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -118,7 +118,7 @@
static int init_baud_rate(void)
{
- gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
+ gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
}
@@ -324,7 +324,7 @@
{
ulong reg;
- reg = getenv_ulong("pram", 10, CONFIG_PRAM);
+ reg = env_get_ulong("pram", 10, CONFIG_PRAM);
gd->relocaddr -= (reg << 10); /* size is in kB */
debug("Reserving %ldk for protected RAM at %08lx\n", reg,
gd->relocaddr);
@@ -340,7 +340,7 @@
}
#ifdef CONFIG_ARM
-static int reserve_mmu(void)
+__weak int reserve_mmu(void)
{
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
/* reserve TLB table */
@@ -727,7 +727,7 @@
static int initf_console_record(void)
{
-#if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
+#if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
return console_record_init();
#else
return 0;
@@ -736,7 +736,7 @@
static int initf_dm(void)
{
-#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
+#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
int ret;
bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
diff --git a/common/board_r.c b/common/board_r.c
index ecca1ed..94697e7 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -256,7 +256,7 @@
{
ulong malloc_start;
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
@@ -372,7 +372,7 @@
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
- if (getenv_yesno("flashchecksum") == 1) {
+ if (env_get_yesno("flashchecksum") == 1) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
@@ -486,11 +486,11 @@
else
set_default_env(NULL);
#ifdef CONFIG_OF_CONTROL
- setenv_addr("fdtcontroladdr", gd->fdt_blob);
+ env_set_addr("fdtcontroladdr", gd->fdt_blob);
#endif
/* Initialize from environment */
- load_addr = getenv_ulong("loadaddr", 16, load_addr);
+ load_addr = env_get_ulong("loadaddr", 16, load_addr);
return 0;
}
@@ -537,21 +537,21 @@
bd_t *bd = gd->bd;
/* kept around for legacy kernels only ... ignore the next section */
- eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
+ eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
#ifdef CONFIG_HAS_ETH1
- eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
+ eth_env_get_enetaddr("eth1addr", bd->bi_enet1addr);
#endif
#ifdef CONFIG_HAS_ETH2
- eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
+ eth_env_get_enetaddr("eth2addr", bd->bi_enet2addr);
#endif
#ifdef CONFIG_HAS_ETH3
- eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
+ eth_env_get_enetaddr("eth3addr", bd->bi_enet3addr);
#endif
#ifdef CONFIG_HAS_ETH4
- eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
+ eth_env_get_enetaddr("eth4addr", bd->bi_enet4addr);
#endif
#ifdef CONFIG_HAS_ETH5
- eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
+ eth_env_get_enetaddr("eth5addr", bd->bi_enet5addr);
#endif
return 0;
}
@@ -651,14 +651,14 @@
char memsz[32];
# ifdef CONFIG_PRAM
- pram = getenv_ulong("pram", 10, CONFIG_PRAM);
+ pram = env_get_ulong("pram", 10, CONFIG_PRAM);
# endif
# if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
# endif
sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
- setenv("mem", memsz);
+ env_set("mem", memsz);
return 0;
}
diff --git a/common/boot_fit.c b/common/boot_fit.c
index 51440a6..0a72315 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -25,7 +25,7 @@
images = fdt_path_offset(fit, FIT_IMAGES_PATH);
if (images < 0) {
debug("%s: Cannot find /images node: %d\n", __func__, images);
- return FDT_ERROR;
+ return -EINVAL;
}
fdt_name = fdt_getprop(fit, node, FIT_FDT_PROP, &fdt_len);
diff --git a/common/bootm.c b/common/bootm.c
index b2c0912..32b3ea8 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -55,8 +55,8 @@
lmb_init(&images->lmb);
- mem_start = getenv_bootm_low();
- mem_size = getenv_bootm_size();
+ mem_start = env_get_bootm_low();
+ mem_size = env_get_bootm_size();
lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
@@ -72,7 +72,7 @@
char * const argv[])
{
memset((void *)&images, 0, sizeof(images));
- images.verify = getenv_yesno("verify");
+ images.verify = env_get_yesno("verify");
boot_start_lmb(&images);
@@ -524,7 +524,7 @@
{
char *buf;
const char *env_val;
- char *cmdline = getenv("bootargs");
+ char *cmdline = env_get("bootargs");
int want_silent;
/*
@@ -534,7 +534,7 @@
* yes - we always fixup
* unset - we rely on the console silent flag
*/
- want_silent = getenv_yesno("silent_linux");
+ want_silent = env_get_yesno("silent_linux");
if (want_silent == 0)
return;
else if (want_silent == -1 && !(gd->flags & GD_FLG_SILENT))
@@ -569,7 +569,7 @@
env_val = CONSOLE_ARG;
}
- setenv("bootargs", env_val);
+ env_set("bootargs", env_val);
debug("after silent fix-up: %s\n", env_val);
free(buf);
}
@@ -645,8 +645,8 @@
ret = boot_ramdisk_high(&images->lmb, images->rd_start,
rd_len, &images->initrd_start, &images->initrd_end);
if (!ret) {
- setenv_hex("initrd_start", images->initrd_start);
- setenv_hex("initrd_end", images->initrd_end);
+ env_set_hex("initrd_start", images->initrd_start);
+ env_set_hex("initrd_end", images->initrd_end);
}
}
#endif
@@ -691,7 +691,7 @@
#ifdef CONFIG_TRACE
/* Pretend to run the OS, then run a user command */
if (!ret && (states & BOOTM_STATE_OS_FAKE_GO)) {
- char *cmd_list = getenv("fakegocmd");
+ char *cmd_list = env_get("fakegocmd");
ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_FAKE_GO,
images, boot_fn);
diff --git a/common/bootm_os.c b/common/bootm_os.c
index d9e6e93..1feea8a 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -21,9 +21,9 @@
int (*appl)(int, char *const[]);
/* Don't start if "autostart" is set to "no" */
- s = getenv("autostart");
+ s = env_get("autostart");
if ((s != NULL) && !strcmp(s, "no")) {
- setenv_hex("filesize", images->os.image_len);
+ env_set_hex("filesize", images->os.image_len);
return 0;
}
appl = (int (*)(int, char * const []))images->ep;
@@ -96,7 +96,7 @@
cmdline = malloc(len);
copy_args(cmdline, argc, argv, ' ');
} else {
- cmdline = getenv("bootargs");
+ cmdline = env_get("bootargs");
if (cmdline == NULL)
cmdline = "";
}
@@ -227,14 +227,14 @@
#endif
/* See README.plan9 */
- s = getenv("confaddr");
+ s = env_get("confaddr");
if (s != NULL) {
char *confaddr = (char *)simple_strtoul(s, NULL, 16);
if (argc > 0) {
copy_args(confaddr, argc, argv, '\n');
} else {
- s = getenv("bootargs");
+ s = env_get("bootargs");
if (s != NULL)
strcpy(confaddr, s);
}
@@ -278,7 +278,7 @@
ret = fdt_add_subnode(*of_flat_tree, 0, "chosen");
if ((ret >= 0 || ret == -FDT_ERR_EXISTS)) {
- bootline = getenv("bootargs");
+ bootline = env_get("bootargs");
if (bootline) {
ret = fdt_find_and_setprop(*of_flat_tree,
"/chosen", "bootargs",
diff --git a/common/bootretry.c b/common/bootretry.c
index 2d82798..b3b8271 100644
--- a/common/bootretry.c
+++ b/common/bootretry.c
@@ -23,7 +23,7 @@
*/
void bootretry_init_cmd_timeout(void)
{
- char *s = getenv("bootretry");
+ char *s = env_get("bootretry");
if (s != NULL)
retry_time = (int)simple_strtol(s, NULL, 10);
diff --git a/common/cli.c b/common/cli.c
index a433ef2..57874d8 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -129,7 +129,7 @@
for (i = 1; i < argc; ++i) {
char *arg;
- arg = getenv(argv[i]);
+ arg = env_get(argv[i]);
if (arg == NULL) {
printf("## Error: \"%s\" not defined\n", argv[i]);
return 1;
diff --git a/common/cli_hush.c b/common/cli_hush.c
index 00861e2..07c048e 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -560,7 +560,7 @@
{
char *newdir;
if (child->argv[1] == NULL)
- newdir = getenv("HOME");
+ newdir = env_get("HOME");
else
newdir = child->argv[1];
if (chdir(newdir)) {
@@ -948,7 +948,7 @@
#ifndef CONFIG_FEATURE_SH_FANCY_PROMPT
PS1 = NULL;
#else
- PS1 = getenv("PS1");
+ PS1 = env_get("PS1");
if(PS1==0)
PS1 = "\\w \\$ ";
#endif
@@ -987,9 +987,9 @@
#ifdef CONFIG_CMDLINE_PS_SUPPORT
if (i->promptmode == 1)
- ps_prompt = getenv("PS1");
+ ps_prompt = env_get("PS1");
else
- ps_prompt = getenv("PS2");
+ ps_prompt = env_get("PS2");
if (ps_prompt)
prompt = ps_prompt;
#endif
@@ -2172,7 +2172,7 @@
name=strdup(s);
#ifdef __U_BOOT__
- if (getenv(name) != NULL) {
+ if (env_get(name) != NULL) {
printf ("ERROR: "
"There is a global environment variable with the same name.\n");
free(name);
@@ -2265,7 +2265,7 @@
} else {
#ifndef __U_BOOT__
if(cur->flg_export)
- unsetenv(cur->name);
+ unenv_set(cur->name);
#endif
free(cur->name);
free(cur->value);
@@ -2793,7 +2793,7 @@
}
}
- p = getenv(src);
+ p = env_get(src);
if (!p)
p = get_local_var(src);
@@ -3157,7 +3157,7 @@
static void update_ifs_map(void)
{
/* char *ifs and char map[256] are both globals. */
- ifs = (uchar *)getenv("IFS");
+ ifs = (uchar *)env_get("IFS");
if (ifs == NULL) ifs=(uchar *)" \t\n";
/* Precompute a list of 'flow through' behavior so it can be treated
* quickly up front. Computation is necessary because of IFS.
diff --git a/common/cli_simple.c b/common/cli_simple.c
index bb96aae..cb642d2 100644
--- a/common/cli_simple.c
+++ b/common/cli_simple.c
@@ -131,7 +131,7 @@
envname[i] = 0;
/* Get its value */
- envval = getenv(envname);
+ envval = env_get(envname);
/* Copy into the line if it exists */
if (envval != NULL)
@@ -168,7 +168,7 @@
* WARNING:
*
* We must create a temporary copy of the command since the command we get
- * may be the result from getenv(), which returns a pointer directly to
+ * may be the result from env_get(), which returns a pointer directly to
* the environment data, which may change magicly when the command we run
* creates or modifies environment variables (like "bootp" does).
*/
diff --git a/common/console.c b/common/console.c
index c6156f3..3167921 100644
--- a/common/console.c
+++ b/common/console.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <console.h>
#include <debug_uart.h>
+#include <dm.h>
#include <stdarg.h>
#include <iomux.h>
#include <malloc.h>
@@ -146,6 +147,29 @@
return error;
}
+/**
+ * console_dev_is_serial() - Check if a stdio device is a serial device
+ *
+ * @sdev: Device to check
+ * @return true if this device is in the serial uclass (or for pre-driver-model,
+ * whether it is called "serial".
+ */
+static bool console_dev_is_serial(struct stdio_dev *sdev)
+{
+ bool is_serial;
+
+#ifdef CONFIG_DM_SERIAL
+ if (sdev->flags & DEV_FLAGS_DM) {
+ struct udevice *dev = sdev->priv;
+
+ is_serial = device_get_uclass_id(dev) == UCLASS_SERIAL;
+ } else
+#endif
+ is_serial = !strcmp(sdev->name, "serial");
+
+ return is_serial;
+}
+
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
/** Console I/O multiplexing *******************************************/
@@ -210,7 +234,7 @@
for (i = 0; i < cd_count[file]; i++) {
dev = console_devices[file][i];
- if (dev->puts != NULL && strcmp(dev->name, "serial") != 0)
+ if (dev->puts != NULL && !console_dev_is_serial(dev))
dev->puts(dev, s);
}
}
@@ -249,7 +273,7 @@
static inline void console_puts_noserial(int file, const char *s)
{
- if (strcmp(stdio_devices[file]->name, "serial") != 0)
+ if (!console_dev_is_serial(stdio_devices[file]))
stdio_devices[file]->puts(stdio_devices[file], s);
}
@@ -426,12 +450,6 @@
unmap_sysmem(buffer);
}
-static void pre_console_puts(const char *s)
-{
- while (*s)
- pre_console_putc(*s++);
-}
-
static void print_pre_console_buffer(int flushpoint)
{
unsigned long in = 0, out = 0;
@@ -459,7 +477,6 @@
}
#else
static inline void pre_console_putc(const char c) {}
-static inline void pre_console_puts(const char *s) {}
static inline void print_pre_console_buffer(int flushpoint) {}
#endif
@@ -501,41 +518,8 @@
void puts(const char *s)
{
-#ifdef CONFIG_DEBUG_UART
- if (!gd || !(gd->flags & GD_FLG_SERIAL_READY)) {
- while (*s) {
- int ch = *s++;
-
- printch(ch);
- }
- return;
- }
-#endif
-#ifdef CONFIG_CONSOLE_RECORD
- if (gd && (gd->flags & GD_FLG_RECORD) && gd->console_out.start)
- membuff_put(&gd->console_out, s, strlen(s));
-#endif
-#ifdef CONFIG_SILENT_CONSOLE
- if (gd->flags & GD_FLG_SILENT)
- return;
-#endif
-
-#ifdef CONFIG_DISABLE_CONSOLE
- if (gd->flags & GD_FLG_DISABLE_CONSOLE)
- return;
-#endif
-
- if (!gd->have_console)
- return pre_console_puts(s);
-
- if (gd->flags & GD_FLG_DEVINIT) {
- /* Send to the standard output */
- fputs(stdout, s);
- } else {
- /* Send directly to the handler */
- pre_console_puts(s);
- serial_puts(s);
- }
+ while (*s)
+ putc(*s++);
}
#ifdef CONFIG_CONSOLE_RECORD
@@ -682,7 +666,7 @@
static void console_update_silent(void)
{
#ifdef CONFIG_SILENT_CONSOLE
- if (getenv("silent") != NULL)
+ if (env_get("silent") != NULL)
gd->flags |= GD_FLG_SILENT;
else
gd->flags &= ~GD_FLG_SILENT;
@@ -761,9 +745,9 @@
/* stdin stdout and stderr are in environment */
/* scan for it */
- stdinname = getenv("stdin");
- stdoutname = getenv("stdout");
- stderrname = getenv("stderr");
+ stdinname = env_get("stdin");
+ stdoutname = env_get("stdout");
+ stderrname = env_get("stderr");
if (OVERWRITE_CONSOLE == 0) { /* if not overwritten by config switch */
inputdev = search_device(DEV_FLAGS_INPUT, stdinname);
@@ -817,7 +801,7 @@
#ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
/* set the environment variables (will overwrite previous env settings) */
for (i = 0; i < 3; i++) {
- setenv(stdio_names[i], stdio_devices[i]->name);
+ env_set(stdio_names[i], stdio_devices[i]->name);
}
#endif /* CONFIG_SYS_CONSOLE_ENV_OVERWRITE */
@@ -852,7 +836,7 @@
* console to serial console in this case or suppress it if
* "silent" mode was requested.
*/
- if (getenv("splashimage") != NULL) {
+ if (env_get("splashimage") != NULL) {
if (!(gd->flags & GD_FLG_SILENT))
outputdev = search_device (DEV_FLAGS_OUTPUT, "serial");
}
@@ -896,7 +880,7 @@
/* Setting environment variables */
for (i = 0; i < 3; i++) {
- setenv(stdio_names[i], stdio_devices[i]->name);
+ env_set(stdio_names[i], stdio_devices[i]->name);
}
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index fc1e8b3..c37979b 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -1254,7 +1254,7 @@
INTERNAL_SIZE_T nb;
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT))
return malloc_simple(bytes);
#endif
@@ -1522,7 +1522,7 @@
mchunkptr fwd; /* misc temp for linking */
int islr; /* track whether merging with last_remainder */
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
/* free() is a no-op - all the memory will be freed on relocation */
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT))
return;
@@ -1679,7 +1679,7 @@
/* realloc of null is supposed to be same as malloc */
if (oldmem == NULL) return mALLOc(bytes);
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) {
/* This is harder to support and should not be needed */
panic("pre-reloc realloc() is not supported");
@@ -2074,7 +2074,7 @@
return NULL;
else
{
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) {
MALLOC_ZERO(mem, sz);
return mem;
@@ -2375,9 +2375,9 @@
int initf_malloc(void)
{
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
assert(gd->malloc_base); /* Set up by crt0.S */
- gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
+ gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
gd->malloc_ptr = 0;
#endif
diff --git a/common/env_fat.c b/common/env_fat.c
deleted file mode 100644
index 75616d4..0000000
--- a/common/env_fat.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * (c) Copyright 2011 by Tigris Elektronik GmbH
- *
- * Author:
- * Maximilian Schwerin <mvs@tigris.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <search.h>
-#include <errno.h>
-#include <fat.h>
-#include <mmc.h>
-
-char *env_name_spec = "FAT";
-
-env_t *env_ptr;
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
-{
- env_t env_new;
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
- loff_t size;
-
- err = env_export(&env_new);
- if (err)
- return err;
-
- part = blk_get_device_part_str(FAT_ENV_INTERFACE,
- FAT_ENV_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- return 1;
-
- dev = dev_desc->devnum;
- if (fat_set_blk_dev(dev_desc, &info) != 0) {
- printf("\n** Unable to use %s %d:%d for saveenv **\n",
- FAT_ENV_INTERFACE, dev, part);
- return 1;
- }
-
- err = file_fat_write(FAT_ENV_FILE, (void *)&env_new, 0, sizeof(env_t),
- &size);
- if (err == -1) {
- printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
- FAT_ENV_FILE, FAT_ENV_INTERFACE, dev, part);
- return 1;
- }
-
- puts("done\n");
- return 0;
-}
-#endif /* CONFIG_CMD_SAVEENV */
-
-void env_relocate_spec(void)
-{
- ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
- struct blk_desc *dev_desc = NULL;
- disk_partition_t info;
- int dev, part;
- int err;
-
- part = blk_get_device_part_str(FAT_ENV_INTERFACE,
- FAT_ENV_DEVICE_AND_PART,
- &dev_desc, &info, 1);
- if (part < 0)
- goto err_env_relocate;
-
- dev = dev_desc->devnum;
- if (fat_set_blk_dev(dev_desc, &info) != 0) {
- printf("\n** Unable to use %s %d:%d for loading the env **\n",
- FAT_ENV_INTERFACE, dev, part);
- goto err_env_relocate;
- }
-
- err = file_fat_read(FAT_ENV_FILE, buf, CONFIG_ENV_SIZE);
- if (err == -1) {
- printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
- FAT_ENV_FILE, FAT_ENV_INTERFACE, dev, part);
- goto err_env_relocate;
- }
-
- env_import(buf, 1);
- return;
-
-err_env_relocate:
- set_default_env(NULL);
-}
diff --git a/common/env_nowhere.c b/common/env_nowhere.c
deleted file mode 100644
index bdc1ed5..0000000
--- a/common/env_nowhere.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
-
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-env_t *env_ptr;
-
-void env_relocate_spec(void)
-{
-}
-
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited
- */
-int env_init(void)
-{
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 0;
-
- return 0;
-}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 2113b6c..5065ad5 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -49,7 +49,7 @@
/* check for alias */
strcpy(env_alias_name, "fastboot_partition_alias_");
strncat(env_alias_name, name, 32);
- aliased_part_name = getenv(env_alias_name);
+ aliased_part_name = env_get(env_alias_name);
if (aliased_part_name != NULL)
ret = part_get_info_by_name(dev_desc,
aliased_part_name, info);
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 5aa8e34..916a448 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -197,7 +197,7 @@
return err;
}
- serial = getenv("serial#");
+ serial = env_get("serial#");
if (serial) {
err = fdt_setprop(fdt, 0, "serial-number", serial,
strlen(serial) + 1);
@@ -289,7 +289,7 @@
if (nodeoffset < 0)
return nodeoffset;
- str = getenv("bootargs");
+ str = env_get("bootargs");
if (str) {
err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
strlen(str) + 1);
@@ -509,7 +509,7 @@
} else {
continue;
}
- tmp = getenv(mac);
+ tmp = env_get(mac);
if (!tmp)
continue;
@@ -1464,14 +1464,11 @@
u64 fdt_get_base_address(const void *fdt, int node)
{
int size;
- u32 naddr;
const fdt32_t *prop;
- naddr = fdt_address_cells(fdt, node);
+ prop = fdt_getprop(fdt, node, "reg", &size);
- prop = fdt_getprop(fdt, node, "ranges", &size);
-
- return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0;
+ return prop ? fdt_translate_address(fdt, node, prop) : 0;
}
/*
diff --git a/common/hash.c b/common/hash.c
index 771d8fa..dcf016d 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -302,7 +302,7 @@
str_ptr += 2;
}
*str_ptr = '\0';
- setenv(dest, str_output);
+ env_set(dest, str_output);
} else {
ulong addr;
void *buf;
@@ -362,7 +362,7 @@
if (strlen(verify_str) == digits)
vsum_str = verify_str;
else {
- vsum_str = getenv(verify_str);
+ vsum_str = env_get(verify_str);
if (vsum_str == NULL || strlen(vsum_str) != digits) {
printf("Expected %d hex digits in env var\n",
digits);
diff --git a/common/hwconfig.c b/common/hwconfig.c
index 4ae042e..e5186d7 100644
--- a/common/hwconfig.c
+++ b/common/hwconfig.c
@@ -81,7 +81,7 @@
"and before environment is ready\n");
return NULL;
}
- env_hwconfig = getenv("hwconfig");
+ env_hwconfig = env_get("hwconfig");
}
if (env_hwconfig) {
@@ -243,7 +243,7 @@
const char *ret;
size_t len;
- setenv("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
+ env_set("hwconfig", "key1:subkey1=value1,subkey2=value2;key2:value3;;;;"
"key3;:,:=;key4", 1);
ret = hwconfig_arg("key1", &len);
@@ -274,7 +274,7 @@
assert(hwconfig_arg("key4", &len) == NULL);
assert(hwconfig_arg("bogus", &len) == NULL);
- unsetenv("hwconfig");
+ unenv_set("hwconfig");
assert(hwconfig(NULL) == 0);
assert(hwconfig("") == 0);
diff --git a/common/image-android.c b/common/image-android.c
index c668407..e74d0aa 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -72,7 +72,7 @@
len += strlen(hdr->cmdline);
}
- char *bootargs = getenv("bootargs");
+ char *bootargs = env_get("bootargs");
if (bootargs)
len += strlen(bootargs);
@@ -90,7 +90,7 @@
if (*hdr->cmdline)
strcat(newbootargs, hdr->cmdline);
- setenv("bootargs", newbootargs);
+ env_set("bootargs", newbootargs);
if (os_data) {
*os_data = (ulong)hdr;
diff --git a/common/image-fdt.c b/common/image-fdt.c
index c6e8832..da4d007 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -132,7 +132,7 @@
of_len = *of_size + CONFIG_SYS_FDT_PAD;
/* If fdt_high is set use it to select the relocation address */
- fdt_high = getenv("fdt_high");
+ fdt_high = env_get("fdt_high");
if (fdt_high) {
void *desired_addr = (void *)simple_strtoul(fdt_high, NULL, 16);
@@ -156,8 +156,8 @@
} else {
of_start =
(void *)(ulong) lmb_alloc_base(lmb, of_len, 0x1000,
- getenv_bootm_mapsize()
- + getenv_bootm_low());
+ env_get_bootm_mapsize()
+ + env_get_bootm_low());
}
if (of_start == NULL) {
diff --git a/common/image.c b/common/image.c
index 0f88984..a058eb8 100644
--- a/common/image.c
+++ b/common/image.c
@@ -465,9 +465,9 @@
}
U_BOOT_ENV_CALLBACK(loadaddr, on_loadaddr);
-ulong getenv_bootm_low(void)
+ulong env_get_bootm_low(void)
{
- char *s = getenv("bootm_low");
+ char *s = env_get("bootm_low");
if (s) {
ulong tmp = simple_strtoul(s, NULL, 16);
return tmp;
@@ -482,11 +482,11 @@
#endif
}
-phys_size_t getenv_bootm_size(void)
+phys_size_t env_get_bootm_size(void)
{
phys_size_t tmp, size;
phys_addr_t start;
- char *s = getenv("bootm_size");
+ char *s = env_get("bootm_size");
if (s) {
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
return tmp;
@@ -500,7 +500,7 @@
size = gd->bd->bi_memsize;
#endif
- s = getenv("bootm_low");
+ s = env_get("bootm_low");
if (s)
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
else
@@ -509,10 +509,10 @@
return size - (tmp - start);
}
-phys_size_t getenv_bootm_mapsize(void)
+phys_size_t env_get_bootm_mapsize(void)
{
phys_size_t tmp;
- char *s = getenv("bootm_mapsize");
+ char *s = env_get("bootm_mapsize");
if (s) {
tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
return tmp;
@@ -521,7 +521,7 @@
#if defined(CONFIG_SYS_BOOTMAPSZ)
return CONFIG_SYS_BOOTMAPSZ;
#else
- return getenv_bootm_size();
+ return env_get_bootm_size();
#endif
}
@@ -1224,7 +1224,8 @@
ulong initrd_high;
int initrd_copy_to_ram = 1;
- if ((s = getenv("initrd_high")) != NULL) {
+ s = env_get("initrd_high");
+ if (s) {
/* a value of "no" or a similar string will act like 0,
* turning the "load high" feature off. This is intentional.
*/
@@ -1232,7 +1233,7 @@
if (initrd_high == ~0)
initrd_copy_to_ram = 0;
} else {
- initrd_high = getenv_bootm_mapsize() + getenv_bootm_low();
+ initrd_high = env_get_bootm_mapsize() + env_get_bootm_low();
}
@@ -1505,7 +1506,7 @@
* @cmd_end: pointer to a ulong variable, will hold cmdline end
*
* boot_get_cmdline() allocates space for kernel command line below
- * BOOTMAPSZ + getenv_bootm_low() address. If "bootargs" U-Boot environemnt
+ * BOOTMAPSZ + env_get_bootm_low() address. If "bootargs" U-Boot environemnt
* variable is present its contents is copied to allocated kernel
* command line.
*
@@ -1519,12 +1520,13 @@
char *s;
cmdline = (char *)(ulong)lmb_alloc_base(lmb, CONFIG_SYS_BARGSIZE, 0xf,
- getenv_bootm_mapsize() + getenv_bootm_low());
+ env_get_bootm_mapsize() + env_get_bootm_low());
if (cmdline == NULL)
return -1;
- if ((s = getenv("bootargs")) == NULL)
+ s = env_get("bootargs");
+ if (!s)
s = "";
strcpy(cmdline, s);
@@ -1545,7 +1547,7 @@
* @kbd: double pointer to board info data
*
* boot_get_kbd() allocates space for kernel copy of board info data below
- * BOOTMAPSZ + getenv_bootm_low() address and kernel board info is initialized
+ * BOOTMAPSZ + env_get_bootm_low() address and kernel board info is initialized
* with the current u-boot board info data.
*
* returns:
@@ -1555,7 +1557,7 @@
int boot_get_kbd(struct lmb *lmb, bd_t **kbd)
{
*kbd = (bd_t *)(ulong)lmb_alloc_base(lmb, sizeof(bd_t), 0xf,
- getenv_bootm_mapsize() + getenv_bootm_low());
+ env_get_bootm_mapsize() + env_get_bootm_low());
if (*kbd == NULL)
return -1;
diff --git a/common/init/board_init.c b/common/init/board_init.c
index bf4255b..4a391be 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -46,8 +46,8 @@
ulong board_init_f_alloc_reserve(ulong top)
{
/* Reserve early malloc arena */
-#if defined(CONFIG_SYS_MALLOC_F)
- top -= CONFIG_SYS_MALLOC_F_LEN;
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+ top -= CONFIG_VAL(SYS_MALLOC_F_LEN);
#endif
/* LAST : reserve GD (rounded up to a multiple of 16 bytes) */
top = rounddown(top-sizeof(struct global_data), 16);
@@ -121,11 +121,11 @@
* Use gd as it is now properly set for all architectures.
*/
-#if defined(CONFIG_SYS_MALLOC_F)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
/* go down one 'early malloc arena' */
gd->malloc_base = base;
/* next alloc will be higher by one 'early malloc arena' size */
- base += CONFIG_SYS_MALLOC_F_LEN;
+ base += CONFIG_VAL(SYS_MALLOC_F_LEN);
#endif
}
diff --git a/common/lcd.c b/common/lcd.c
index 7e399ce..c3ff959 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -223,7 +223,7 @@
/* Paint the logo and retrieve LCD base address */
debug("[LCD] Drawing the logo...\n");
if (do_splash) {
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s) {
do_splash = 0;
addr = simple_strtoul(s, NULL, 16);
diff --git a/common/main.c b/common/main.c
index 2116a9e..6a11598 100644
--- a/common/main.c
+++ b/common/main.c
@@ -25,7 +25,7 @@
#ifdef CONFIG_PREBOOT
char *p;
- p = getenv("preboot");
+ p = env_get("preboot");
if (p != NULL) {
# ifdef CONFIG_AUTOBOOT_KEYED
int prev = disable_ctrlc(1); /* disable Control C checking */
@@ -48,7 +48,7 @@
bootstage_mark_name(BOOTSTAGE_ID_MAIN_LOOP, "main_loop");
#ifdef CONFIG_VERSION_VARIABLE
- setenv("ver", version_string); /* set version variable */
+ env_set("ver", version_string); /* set version variable */
#endif /* CONFIG_VERSION_VARIABLE */
cli_init();
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 4de8139..582b685 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -18,6 +18,16 @@
if SPL
+config SPL_LDSCRIPT
+ string "Linker script for the SPL stage"
+ default "arch/$(ARCH)/cpu/u-boot-spl.lds"
+ depends on SPL
+ help
+ The SPL stage will usually require a different linker-script
+ (as it runs from a different memory region) than the regular
+ U-Boot stage. Set this to the path of the linker-script to
+ be used for SPL.
+
config SPL_BOARD_INIT
bool "Call board-specific initialization in SPL"
help
@@ -25,6 +35,17 @@
spl_board_init() from board_init_r(). This function should be
provided by the board.
+config SPL_BOOTROM_SUPPORT
+ bool "Support returning to the BOOTROM"
+ help
+ Some platforms (e.g. the Rockchip RK3368) provide support in their
+ ROM for loading the next boot-stage after performing basic setup
+ from the SPL stage.
+
+ Enable this option, to return to the BOOTROM through the
+ BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
+ boot device list, if not implemented for a given board)
+
config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
default n if (ARCH_MX6 && (SPL_MMC_SUPPORT || SPL_SATA_SUPPORT))
@@ -51,6 +72,15 @@
this will make the SPL binary smaller at the cost of more heap
usage as the *_simple malloc functions do not re-use free-ed mem.
+config TPL_SYS_MALLOC_SIMPLE
+ bool
+ prompt "Only use malloc_simple functions in the TPL"
+ help
+ Say Y here to only use the *_simple malloc functions from
+ malloc_simple.c, rather then using the versions from dlmalloc.c;
+ this will make the TPL binary smaller at the cost of more heap
+ usage as the *_simple malloc functions do not re-use free-ed mem.
+
config SPL_STACK_R
bool "Enable SDRAM location for SPL stack"
help
@@ -248,8 +278,8 @@
needed in SPL as it has a much simpler task with less
configuration. But some boards use this to support 'Falcon' boot
on EXT2 and FAT, where SPL boots directly into Linux without
- starting U-Boot first. Enabling this option will make getenv()
- and setenv() available in SPL.
+ starting U-Boot first. Enabling this option will make env_get()
+ and env_set() available in SPL.
config SPL_SAVEENV
bool "Support save environment"
@@ -573,14 +603,6 @@
enable SPI drivers that are needed for other purposes also, such
as a SPI PMIC.
-config SPL_TIMER_SUPPORT
- bool "Support timer drivers"
- help
- Enable support for timer drivers in SPL. These can be used to get
- a timer value when in SPL, or perhaps for implementing a delay
- function. This enables the drivers in drivers/timer as part of an
- SPL build.
-
config SPL_USB_HOST_SUPPORT
bool "Support USB host drivers"
help
@@ -687,6 +709,74 @@
if TPL
+config TPL_LDSCRIPT
+ string "Linker script for the TPL stage"
+ depends on TPL
+ help
+ The TPL stage will usually require a different linker-script
+ (as it runs from a different memory region) than the regular
+ U-Boot stage. Set this to the path of the linker-script to
+ be used for TPL.
+
+ May be left empty to trigger the Makefile infrastructure to
+ fall back to the linker-script used for the SPL stage.
+
+config TPL_NEEDS_SEPARATE_TEXT_BASE
+ bool "TPL needs a separate text-base"
+ default n
+ depends on TPL
+ help
+ Enable, if the TPL stage should not inherit its text-base
+ from the SPL stage. When enabled, a base address for the
+ .text sections of the TPL stage has to be set below.
+
+config TPL_NEEDS_SEPARATE_STACK
+ bool "TPL needs a separate initial stack-pointer"
+ default n
+ depends on TPL
+ help
+ Enable, if the TPL stage should not inherit its initial
+ stack-pointer from the settings for the SPL stage.
+
+config TPL_TEXT_BASE
+ hex "Base address for the .text section of the TPL stage"
+ depends on TPL_NEEDS_SEPARATE_TEXT_BASE
+ help
+ The base address for the .text section of the TPL stage.
+
+config TPL_MAX_SIZE
+ int "Maximum size (in bytes) for the TPL stage"
+ default 0
+ depends on TPL
+ help
+ The maximum size (in bytes) of the TPL stage.
+
+config TPL_STACK
+ hex "Address of the initial stack-pointer for the TPL stage"
+ depends on TPL_NEEDS_SEPARATE_STACK
+ help
+ The address of the initial stack-pointer for the TPL stage.
+ Usually this will be the (aligned) top-of-stack.
+
+config TPL_BOOTROM_SUPPORT
+ bool "Support returning to the BOOTROM (from TPL)"
+ help
+ Some platforms (e.g. the Rockchip RK3368) provide support in their
+ ROM for loading the next boot-stage after performing basic setup
+ from the TPL stage.
+
+ Enable this option, to return to the BOOTROM through the
+ BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
+ boot device list, if not implemented for a given board)
+
+config TPL_DRIVERS_MISC_SUPPORT
+ bool "Support misc drivers in TPL"
+ help
+ Enable miscellaneous drivers in TPL. These drivers perform various
+ tasks that don't fall nicely into other categories, Enable this
+ option to build the drivers in drivers/misc as part of an TPL
+ build, for those that support building in TPL (not all drivers do).
+
config TPL_ENV_SUPPORT
bool "Support an environment"
help
@@ -695,7 +785,7 @@
config TPL_I2C_SUPPORT
bool "Support I2C"
help
- Enable support for the I2C bus in SPL. See SPL_I2C_SUPPORT for
+ Enable support for the I2C bus in TPL. See SPL_I2C_SUPPORT for
details.
config TPL_LIBCOMMON_SUPPORT
@@ -725,24 +815,24 @@
config TPL_NAND_SUPPORT
bool "Support NAND flash"
help
- Enable support for NAND in SPL. See SPL_NAND_SUPPORT for details.
+ Enable support for NAND in TPL. See SPL_NAND_SUPPORT for details.
config TPL_SERIAL_SUPPORT
bool "Support serial"
help
- Enable support for serial in SPL. See SPL_SERIAL_SUPPORT for
+ Enable support for serial in TPL. See SPL_SERIAL_SUPPORT for
details.
config TPL_SPI_FLASH_SUPPORT
bool "Support SPI flash drivers"
help
- Enable support for using SPI flash in SPL. See SPL_SPI_FLASH_SUPPORT
+ Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT
for details.
config TPL_SPI_SUPPORT
bool "Support SPI drivers"
help
- Enable support for using SPI in SPL. See SPL_SPI_SUPPORT for
+ Enable support for using SPI in TPL. See SPL_SPI_SUPPORT for
details.
endif # TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 47a64dd..112b3e6 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -10,23 +10,24 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
-obj-$(CONFIG_SPL_LOAD_FIT) += spl_fit.o
-obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
-obj-$(CONFIG_SPL_XIP_SUPPORT) += spl_xip.o
-obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
+obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
+obj-$(CONFIG_$(SPL_TPL_)SPL_NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_$(SPL_TPL_)SPL_XIP_SUPPORT) += spl_xip.o
+obj-$(CONFIG_$(SPL_TPL_)SPL_YMODEM_SUPPORT) += spl_ymodem.o
ifndef CONFIG_SPL_UBI
-obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
-obj-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += spl_nand.o
+obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
endif
-obj-$(CONFIG_SPL_UBI) += spl_ubi.o
-obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
-obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
-obj-$(CONFIG_SPL_ATF_SUPPORT) += spl_atf.o
-obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
-obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
-obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
-obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
-obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
-obj-$(CONFIG_SPL_SPI_LOAD) += spl_spi.o
-obj-$(CONFIG_SPL_RAM_SUPPORT) += spl_ram.o
+obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
+obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
+obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
+obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
+obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
+obj-$(CONFIG_$(SPL_TPL_)SATA_SUPPORT) += spl_sata.o
+obj-$(CONFIG_$(SPL_TPL_)DFU_SUPPORT) += spl_dfu.o
+obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
+obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 7f3fd92..d245cfc 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -6,6 +6,7 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
+
#include <common.h>
#include <dm.h>
#include <spl.h>
@@ -220,12 +221,12 @@
debug("spl_early_init()\n");
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
if (setup_malloc) {
#ifdef CONFIG_MALLOC_F_ADDR
gd->malloc_base = CONFIG_MALLOC_F_ADDR;
#endif
- gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
+ gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
gd->malloc_ptr = 0;
}
#endif
@@ -243,7 +244,7 @@
return ret;
}
}
- if (IS_ENABLED(CONFIG_SPL_DM)) {
+ if (CONFIG_IS_ENABLED(DM)) {
bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl");
/* With CONFIG_SPL_OF_PLATDATA, bring in all devices */
ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA));
@@ -419,12 +420,12 @@
default:
debug("Unsupported OS image.. Jumping nevertheless..\n");
}
-#if defined(CONFIG_SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
- if (IS_ENABLED(CONFIG_SPL_ATF_SUPPORT)) {
+ if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
debug("loaded - jumping to U-Boot via ATF BL31.\n");
bl31_entry();
}
@@ -486,7 +487,7 @@
gd_t *new_gd;
ulong ptr = CONFIG_SPL_STACK_R_ADDR;
-#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
+#if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN)
if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
gd->malloc_base = ptr;
diff --git a/common/spl/spl_bootrom.c b/common/spl/spl_bootrom.c
new file mode 100644
index 0000000..6804246
--- /dev/null
+++ b/common/spl/spl_bootrom.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+__weak void board_return_to_bootrom(void)
+{
+}
+
+static int spl_return_to_bootrom(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ /*
+ * If the board implements a way to return to its ROM (with
+ * the expectation that the next stage of will be booted by
+ * the ROM), it will implement board_return_to_bootrom() and
+ * should not return from it.
+ */
+ board_return_to_bootrom();
+ return false;
+}
+
+SPL_LOAD_IMAGE_METHOD("BOOTROM", 0, BOOT_DEVICE_BOOTROM, spl_return_to_bootrom);
diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c
index e8d0ba1..2c97473 100644
--- a/common/spl/spl_dfu.c
+++ b/common/spl/spl_dfu.c
@@ -40,13 +40,13 @@
/* set default environment */
set_default_env(0);
- str_env = getenv(dfu_alt_info);
+ str_env = env_get(dfu_alt_info);
if (!str_env) {
error("\"dfu_alt_info\" env variable not defined!\n");
return -EINVAL;
}
- ret = setenv("dfu_alt_info", str_env);
+ ret = env_set("dfu_alt_info", str_env);
if (ret) {
error("unable to set env variable \"dfu_alt_info\"!\n");
return -EINVAL;
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index f17c6b9..559ba0b 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -89,7 +89,7 @@
return -1;
}
#if defined(CONFIG_SPL_ENV_SUPPORT)
- file = getenv("falcon_args_file");
+ file = env_get("falcon_args_file");
if (file) {
err = ext4fs_open(file, &filelen);
if (err < 0) {
@@ -102,7 +102,7 @@
file, err);
goto defaults;
}
- file = getenv("falcon_image_file");
+ file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_ext(spl_image, block_dev,
partition, file);
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 5e31216..60b85f0 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -113,7 +113,7 @@
return err;
#if defined(CONFIG_SPL_ENV_SUPPORT) && defined(CONFIG_SPL_OS_BOOT)
- file = getenv("falcon_args_file");
+ file = env_get("falcon_args_file");
if (file) {
err = file_fat_read(file, (void *)CONFIG_SYS_SPL_ARGS_ADDR, 0);
if (err <= 0) {
@@ -121,7 +121,7 @@
file, err);
goto defaults;
}
- file = getenv("falcon_image_file");
+ file = env_get("falcon_image_file");
if (file) {
err = spl_load_image_fat(spl_image, block_dev,
partition, file);
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index bb48cac..d95f94c 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -115,7 +115,7 @@
static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
{
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
struct udevice *dev;
#endif
int err, mmc_dev;
@@ -132,7 +132,7 @@
return err;
}
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
err = uclass_get_device(UCLASS_MMC, mmc_dev, &dev);
if (!err)
*mmcp = mmc_get_mmc_dev(dev);
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 85fe508..8883109 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -33,14 +33,14 @@
env_init();
env_relocate();
- setenv("autoload", "yes");
+ env_set("autoload", "yes");
rv = eth_initialize();
if (rv == 0) {
printf("No Ethernet devices found\n");
return -ENODEV;
}
if (bootdev->boot_device_name)
- setenv("ethact", bootdev->boot_device_name);
+ env_set("ethact", bootdev->boot_device_name);
rv = net_loop(BOOTP);
if (rv < 0) {
printf("Problem booting with BOOTP\n");
diff --git a/common/splash.c b/common/splash.c
index 89af437..d251b3b 100644
--- a/common/splash.c
+++ b/common/splash.c
@@ -60,7 +60,7 @@
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
void splash_get_pos(int *x, int *y)
{
- char *s = getenv("splashpos");
+ char *s = env_get("splashpos");
if (!s)
return;
diff --git a/common/splash_source.c b/common/splash_source.c
index 867a798..8c0ac58 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -220,7 +220,7 @@
loff_t actread;
char *splash_file;
- splash_file = getenv("splashfile");
+ splash_file = env_get("splashfile");
if (!splash_file)
splash_file = SPLASH_SOURCE_DEFAULT_FILE_NAME;
@@ -286,7 +286,7 @@
if (!locations || size == 0)
return NULL;
- env_splashsource = getenv("splashsource");
+ env_splashsource = env_get("splashsource");
if (env_splashsource == NULL)
return &locations[0];
@@ -383,7 +383,7 @@
char *env_splashimage_value;
u32 bmp_load_addr;
- env_splashimage_value = getenv("splashimage");
+ env_splashimage_value = env_get("splashimage");
if (env_splashimage_value == NULL)
return -ENOENT;
diff --git a/common/update.c b/common/update.c
index 0767fcb..974f465 100644
--- a/common/update.c
+++ b/common/update.c
@@ -59,7 +59,7 @@
/* save used globals and env variable */
saved_timeout_msecs = tftp_timeout_ms;
saved_timeout_count = tftp_timeout_count_max;
- saved_netretry = strdup(getenv("netretry"));
+ saved_netretry = strdup(env_get("netretry"));
saved_bootfile = strdup(net_boot_file_name);
/* set timeouts for auto-update */
@@ -67,7 +67,7 @@
tftp_timeout_count_max = cnt_max;
/* we don't want to retry the connection if errors occur */
- setenv("netretry", "no");
+ env_set("netretry", "no");
/* download the update file */
load_addr = addr;
@@ -83,7 +83,7 @@
tftp_timeout_ms = saved_timeout_msecs;
tftp_timeout_count_max = saved_timeout_count;
- setenv("netretry", saved_netretry);
+ env_set("netretry", saved_netretry);
if (saved_netretry != NULL)
free(saved_netretry);
@@ -254,7 +254,7 @@
printf("Auto-update from TFTP: ");
/* get the file name of the update file */
- filename = getenv(UPDATE_FILE_ENV);
+ filename = env_get(UPDATE_FILE_ENV);
if (filename == NULL) {
printf("failed, env. variable '%s' not found\n",
UPDATE_FILE_ENV);
@@ -264,7 +264,8 @@
printf("trying update file '%s'\n", filename);
/* get load address of downloaded update file */
- if ((env_addr = getenv("loadaddr")) != NULL)
+ env_addr = env_get("loadaddr");
+ if (env_addr)
addr = simple_strtoul(env_addr, NULL, 16);
else
addr = CONFIG_UPDATE_LOAD_ADDR;
diff --git a/common/usb_hub.c b/common/usb_hub.c
index d135526..86a3477 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -55,9 +55,6 @@
struct list_head list;
};
-/* TODO(sjg@chromium.org): Remove this when CONFIG_DM_USB is defined */
-static struct usb_hub_device hub_dev[USB_MAX_HUB];
-static int usb_hub_index;
static LIST_HEAD(usb_scan_list);
__weak void usb_hub_reset_devices(int port)
@@ -65,11 +62,41 @@
return;
}
+static inline bool usb_hub_is_superspeed(struct usb_device *hdev)
+{
+ return hdev->descriptor.bDeviceProtocol == 3;
+}
+
+#ifdef CONFIG_DM_USB
+bool usb_hub_is_root_hub(struct udevice *hub)
+{
+ if (device_get_uclass_id(hub->parent) != UCLASS_USB_HUB)
+ return true;
+
+ return false;
+}
+
+static int usb_set_hub_depth(struct usb_device *dev, int depth)
+{
+ if (depth < 0 || depth > 4)
+ return -EINVAL;
+
+ return usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
+ USB_REQ_SET_HUB_DEPTH, USB_DIR_OUT | USB_RT_HUB,
+ depth, 0, NULL, 0, USB_CNTL_TIMEOUT);
+}
+#endif
+
static int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size)
{
+ unsigned short dtype = USB_DT_HUB;
+
+ if (usb_hub_is_superspeed(dev))
+ dtype = USB_DT_SS_HUB;
+
return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
USB_REQ_GET_DESCRIPTOR, USB_DIR_IN | USB_RT_HUB,
- USB_DT_HUB << 8, 0, data, size, USB_CNTL_TIMEOUT);
+ dtype << 8, 0, data, size, USB_CNTL_TIMEOUT);
}
static int usb_clear_port_feature(struct usb_device *dev, int port, int feature)
@@ -95,9 +122,40 @@
int usb_get_port_status(struct usb_device *dev, int port, void *data)
{
- return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
+ int ret;
+
+ ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port,
- data, sizeof(struct usb_hub_status), USB_CNTL_TIMEOUT);
+ data, sizeof(struct usb_port_status), USB_CNTL_TIMEOUT);
+
+#ifdef CONFIG_DM_USB
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Translate the USB 3.0 hub port status field into the old version
+ * that U-Boot understands. Do this only when the hub is not root hub.
+ * For root hub, the port status field has already been translated
+ * in the host controller driver (see xhci_submit_root() in xhci.c).
+ *
+ * Note: this only supports driver model.
+ */
+
+ if (!usb_hub_is_root_hub(dev->dev) && usb_hub_is_superspeed(dev)) {
+ struct usb_port_status *status = (struct usb_port_status *)data;
+ u16 tmp = (status->wPortStatus) & USB_SS_PORT_STAT_MASK;
+
+ if (status->wPortStatus & USB_SS_PORT_STAT_POWER)
+ tmp |= USB_PORT_STAT_POWER;
+ if ((status->wPortStatus & USB_SS_PORT_STAT_SPEED) ==
+ USB_SS_PORT_STAT_SPEED_5GBPS)
+ tmp |= USB_PORT_STAT_SUPER_SPEED;
+
+ status->wPortStatus = tmp;
+ }
+#endif
+
+ return ret;
}
@@ -131,7 +189,7 @@
* but allow this time to be increased via env variable as some
* devices break the spec and require longer warm-up times
*/
- env = getenv("usb_pgood_delay");
+ env = env_get("usb_pgood_delay");
if (env)
pgood_delay = max(pgood_delay,
(unsigned)simple_strtol(env, NULL, 0));
@@ -154,6 +212,10 @@
max(100, (int)pgood_delay) + 1000);
}
+#ifndef CONFIG_DM_USB
+static struct usb_hub_device hub_dev[USB_MAX_HUB];
+static int usb_hub_index;
+
void usb_hub_reset(void)
{
usb_hub_index = 0;
@@ -170,6 +232,7 @@
printf("ERROR: USB_MAX_HUB (%d) reached\n", USB_MAX_HUB);
return NULL;
}
+#endif
#define MAX_TRIES 5
@@ -195,8 +258,18 @@
return speed_str;
}
-int legacy_hub_port_reset(struct usb_device *dev, int port,
- unsigned short *portstat)
+/**
+ * usb_hub_port_reset() - reset a port given its usb_device pointer
+ *
+ * Reset a hub port and see if a device is present on that port, providing
+ * sufficient time for it to show itself. The port status is returned.
+ *
+ * @dev: USB device to reset
+ * @port: Port number to reset (note ports are numbered from 0 here)
+ * @portstat: Returns port status
+ */
+static int usb_hub_port_reset(struct usb_device *dev, int port,
+ unsigned short *portstat)
{
int err, tries;
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
@@ -269,15 +342,6 @@
return 0;
}
-#ifdef CONFIG_DM_USB
-int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat)
-{
- struct usb_device *udev = dev_get_parent_priv(dev);
-
- return legacy_hub_port_reset(udev, port, portstat);
-}
-#endif
-
int usb_hub_port_connect_change(struct usb_device *dev, int port)
{
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
@@ -311,7 +375,7 @@
}
/* Reset the port */
- ret = legacy_hub_port_reset(dev, port, &portstatus);
+ ret = usb_hub_port_reset(dev, port, &portstatus);
if (ret < 0) {
if (ret != -ENXIO)
printf("cannot reset port %i!?\n", port + 1);
@@ -405,8 +469,15 @@
portchange = le16_to_cpu(portsts->wPortChange);
debug("Port %d Status %X Change %X\n", i + 1, portstatus, portchange);
- /* No connection change happened, wait a bit more. */
- if (!(portchange & USB_PORT_STAT_C_CONNECTION)) {
+ /*
+ * No connection change happened, wait a bit more.
+ *
+ * For some situation, the hub reports no connection change but a
+ * device is connected to the port (eg: CCS bit is set but CSC is not
+ * in the PORTSC register of a root hub), ignore such case.
+ */
+ if (!(portchange & USB_PORT_STAT_C_CONNECTION) &&
+ !(portstatus & USB_PORT_STAT_CONNECTION)) {
if (get_timer(0) >= hub->connect_timeout) {
debug("devnum=%d port=%d: timeout\n",
dev->devnum, i + 1);
@@ -418,10 +489,6 @@
return 0;
}
- /* Test if the connection came up, and if not exit */
- if (!(portstatus & USB_PORT_STAT_CONNECTION))
- return 0;
-
/* A new USB device is ready at this point */
debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
@@ -530,6 +597,20 @@
return ret;
}
+static struct usb_hub_device *usb_get_hub_device(struct usb_device *dev)
+{
+ struct usb_hub_device *hub;
+
+#ifndef CONFIG_DM_USB
+ /* "allocate" Hub device */
+ hub = usb_hub_allocate();
+#else
+ hub = dev_get_uclass_priv(dev->dev);
+#endif
+
+ return hub;
+}
+
static int usb_hub_configure(struct usb_device *dev)
{
int i, length;
@@ -541,11 +622,11 @@
__maybe_unused struct usb_hub_status *hubsts;
int ret;
- /* "allocate" Hub device */
- hub = usb_hub_allocate();
+ hub = usb_get_hub_device(dev);
if (hub == NULL)
return -ENOMEM;
hub->pusb_dev = dev;
+
/* Get the the hub descriptor */
ret = usb_get_hub_descriptor(dev, buffer, 4);
if (ret < 0) {
@@ -570,17 +651,19 @@
&descriptor->wHubCharacteristics)),
&hub->desc.wHubCharacteristics);
/* set the bitmap */
- bitmap = (unsigned char *)&hub->desc.DeviceRemovable[0];
+ bitmap = (unsigned char *)&hub->desc.u.hs.DeviceRemovable[0];
/* devices not removable by default */
memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8);
- bitmap = (unsigned char *)&hub->desc.PortPowerCtrlMask[0];
+ bitmap = (unsigned char *)&hub->desc.u.hs.PortPowerCtrlMask[0];
memset(bitmap, 0xff, (USB_MAXCHILDREN+1+7)/8); /* PowerMask = 1B */
for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
- hub->desc.DeviceRemovable[i] = descriptor->DeviceRemovable[i];
+ hub->desc.u.hs.DeviceRemovable[i] =
+ descriptor->u.hs.DeviceRemovable[i];
for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7)/8); i++)
- hub->desc.PortPowerCtrlMask[i] = descriptor->PortPowerCtrlMask[i];
+ hub->desc.u.hs.PortPowerCtrlMask[i] =
+ descriptor->u.hs.PortPowerCtrlMask[i];
dev->maxchild = descriptor->bNbrPorts;
debug("%d ports detected\n", dev->maxchild);
@@ -617,6 +700,56 @@
break;
}
+ switch (dev->descriptor.bDeviceProtocol) {
+ case USB_HUB_PR_FS:
+ break;
+ case USB_HUB_PR_HS_SINGLE_TT:
+ debug("Single TT\n");
+ break;
+ case USB_HUB_PR_HS_MULTI_TT:
+ ret = usb_set_interface(dev, 0, 1);
+ if (ret == 0) {
+ debug("TT per port\n");
+ hub->tt.multi = true;
+ } else {
+ debug("Using single TT (err %d)\n", ret);
+ }
+ break;
+ case USB_HUB_PR_SS:
+ /* USB 3.0 hubs don't have a TT */
+ break;
+ default:
+ debug("Unrecognized hub protocol %d\n",
+ dev->descriptor.bDeviceProtocol);
+ break;
+ }
+
+ /* Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns */
+ switch (hubCharacteristics & HUB_CHAR_TTTT) {
+ case HUB_TTTT_8_BITS:
+ if (dev->descriptor.bDeviceProtocol != 0) {
+ hub->tt.think_time = 666;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 8, hub->tt.think_time);
+ }
+ break;
+ case HUB_TTTT_16_BITS:
+ hub->tt.think_time = 666 * 2;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 16, hub->tt.think_time);
+ break;
+ case HUB_TTTT_24_BITS:
+ hub->tt.think_time = 666 * 3;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 24, hub->tt.think_time);
+ break;
+ case HUB_TTTT_32_BITS:
+ hub->tt.think_time = 666 * 4;
+ debug("TT requires at most %d FS bit times (%d ns)\n",
+ 32, hub->tt.think_time);
+ break;
+ }
+
debug("power on to power good time: %dms\n",
descriptor->bPwrOn2PwrGood * 2);
debug("hub controller current requirement: %dmA\n",
@@ -624,7 +757,7 @@
for (i = 0; i < dev->maxchild; i++)
debug("port %d is%s removable\n", i + 1,
- hub->desc.DeviceRemovable[(i + 1) / 8] & \
+ hub->desc.u.hs.DeviceRemovable[(i + 1) / 8] & \
(1 << ((i + 1) % 8)) ? " not" : "");
if (sizeof(struct usb_hub_status) > USB_BUFSIZ) {
@@ -653,6 +786,59 @@
debug("%sover-current condition exists\n",
(le16_to_cpu(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? \
"" : "no ");
+
+#ifdef CONFIG_DM_USB
+ /*
+ * Update USB host controller's internal representation of this hub
+ * after the hub descriptor is fetched.
+ */
+ ret = usb_update_hub_device(dev);
+ if (ret < 0 && ret != -ENOSYS) {
+ debug("%s: failed to update hub device for HCD (%x)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /*
+ * A maximum of seven tiers are allowed in a USB topology, and the
+ * root hub occupies the first tier. The last tier ends with a normal
+ * USB device. USB 3.0 hubs use a 20-bit field called 'route string'
+ * to route packets to the designated downstream port. The hub uses a
+ * hub depth value multiplied by four as an offset into the 'route
+ * string' to locate the bits it uses to determine the downstream
+ * port number.
+ */
+ if (usb_hub_is_root_hub(dev->dev)) {
+ hub->hub_depth = -1;
+ } else {
+ struct udevice *hdev;
+ int depth = 0;
+
+ hdev = dev->dev->parent;
+ while (!usb_hub_is_root_hub(hdev)) {
+ depth++;
+ hdev = hdev->parent;
+ }
+
+ hub->hub_depth = depth;
+
+ if (usb_hub_is_superspeed(dev)) {
+ debug("set hub (%p) depth to %d\n", dev, depth);
+ /*
+ * This request sets the value that the hub uses to
+ * determine the index into the 'route string index'
+ * for this hub.
+ */
+ ret = usb_set_hub_depth(dev, depth);
+ if (ret < 0) {
+ debug("%s: failed to set hub depth (%lX)\n",
+ __func__, dev->status);
+ return ret;
+ }
+ }
+ }
+#endif
+
usb_hub_power_on(hub);
/*
@@ -777,6 +963,7 @@
.child_pre_probe = usb_child_pre_probe,
.per_child_auto_alloc_size = sizeof(struct usb_device),
.per_child_platdata_auto_alloc_size = sizeof(struct usb_dev_platdata),
+ .per_device_auto_alloc_size = sizeof(struct usb_hub_device),
};
static const struct usb_device_id hub_id_table[] = {
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index d2d29cc..8cbdba6 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -515,7 +515,7 @@
if (error)
return error;
- stdinname = getenv("stdin");
+ stdinname = env_get("stdin");
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
error = iomux_doenv(stdin, stdinname);
if (error)
@@ -582,7 +582,7 @@
if (stdio_deregister_dev(dev, force) != 0)
return 1;
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
- if (iomux_doenv(stdin, getenv("stdin")) != 0)
+ if (iomux_doenv(stdin, env_get("stdin")) != 0)
return 1;
#endif
#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
@@ -627,7 +627,7 @@
goto err;
}
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
- if (iomux_doenv(stdin, getenv("stdin"))) {
+ if (iomux_doenv(stdin, env_get("stdin"))) {
ret = -ENOLINK;
goto err;
}
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 465edc5..7cb9ffb 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -27,6 +27,7 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_ALTERA_QSPI=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ALTERA_TSE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig
index 601b0b5..df744ea 100644
--- a/configs/3c120_defconfig
+++ b/configs/3c120_defconfig
@@ -27,6 +27,7 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_CFI_FLASH=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ALTERA_TSE=y
CONFIG_DM_SERIAL=y
CONFIG_ALTERA_JTAG_UART=y
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 9143022..d76ddcf 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -18,8 +18,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index 15c6879..08fe531 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -17,10 +17,10 @@
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index f7b600b..8c53790 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -13,20 +13,20 @@
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_SCSI=y
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index 182a8f5..1bc0b7f 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -16,9 +16,9 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index ae98e41..009c4aa 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -19,9 +19,9 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 61fe5e6..c2fe2d2 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -20,10 +20,10 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index e078add..55bb395 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -20,8 +20,8 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,9 +31,12 @@
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index eb21541..a751e91 100644
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -11,8 +11,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index 074e94d..77690f3 100644
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -10,8 +10,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index d90be54..fa1af87 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -20,8 +20,8 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,9 +31,12 @@
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index e679d0a..f756d00 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -11,8 +11,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index e66c7d0..643c5d9 100644
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -11,8 +11,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index 21bcae4..b194cc4 100644
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -13,8 +13,8 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index 2452337..b8de046 100644
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -10,8 +10,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index 12a242f..e8ee82f 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -7,7 +7,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -15,8 +15,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,8 +26,10 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index 6c82346..a8f897d 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -7,7 +7,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -15,8 +14,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,8 +25,10 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index 073317b..a10a011 100644
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -12,8 +12,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,6 +25,7 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index 49026c1..8593d93 100644
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -12,8 +12,8 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,6 +25,7 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index aea470c..d86d7b1 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index a40e9bb..9935600 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -7,15 +7,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100_DDR_100"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_100"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,9 +25,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index 51e1994..d23952f 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index 0e5a1c4..ad07acb 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -7,15 +7,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND,SYS_CLK_100_DDR_133"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_133"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,9 +25,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index cea3cb4..69b9a06 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index eeb28b1..716ab84 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index c5642ab..14885dc 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index 98d92e7..4260c5c 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index e8c5482..4bbea52 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index d6cffb2..4a5c18b 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 3afb011..7a7e56d 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index ec389d0..ff1f68d 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index c5d17bc..3c684a0 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index b8e90a2..4837fc8 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index ba0772c..dd801ab 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index 29e4f7b..e77cea9 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index 8c409fa..a35d4bf 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -14,6 +14,6 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
-CONFIG_SCSI=y
CONFIG_AXP_DLDO4_VOLT=2500
CONFIG_AXP_ELDO3_VOLT=1200
+CONFIG_SCSI=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 352a18e..4e8e1e1 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -17,8 +17,8 @@
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 4218d5a..214c0d8 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -19,9 +19,9 @@
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_NETCONSOLE=y
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
CONFIG_AXP_ALDO4_VOLT=2500
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index dcfbbf6..5efaf24 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -20,20 +18,25 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index 99e2b33..89d6fc3 100644
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -11,8 +11,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
@@ -22,7 +22,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index 26544f4..cd366a7 100644
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -12,8 +12,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
@@ -23,7 +23,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig
index 96e5b34..ef6557b 100644
--- a/configs/C29XPCIE_SPIFLASH_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_defconfig
@@ -11,8 +11,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
@@ -22,7 +22,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig
index cd6bffd..aee9cd0 100644
--- a/configs/C29XPCIE_defconfig
+++ b/configs/C29XPCIE_defconfig
@@ -10,8 +10,8 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
@@ -21,7 +21,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index f9033bc..df6371a 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -13,13 +13,14 @@
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:256k(spl),256k(spl-backup),2m(uboot),2m(uboot-backup),-(UBI)"
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_SUNXI=y
CONFIG_AXP_ALDO3_VOLT=3300
CONFIG_AXP_ALDO4_VOLT=3300
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index dc2722a..0a0f95d 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -15,7 +15,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index f83a691..a15c831 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -15,6 +15,6 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index cbd535c..f10d4d1 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -15,18 +15,18 @@
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_SCSI=y
CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 149fa4e..7f3f899 100644
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -14,8 +14,8 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,6 +24,9 @@
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index 23dbaee..6a864b8 100644
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -14,8 +14,8 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,6 +24,9 @@
# CONFIG_CMD_HASH is not set
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index bab25b4..6e6f5b2 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -15,7 +15,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 2ec0847..65ccb64 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -17,8 +17,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 1e61cd2..c6682b8 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -17,8 +17,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index 6f4a02f..fb81bad 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -15,7 +15,9 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
+CONFIG_DM_MMC=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index 42a031a..3fa3e65 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -6,9 +6,9 @@
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index caade1d..e9eb22e 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -5,9 +5,9 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index ee8ba64..2769f71 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -5,9 +5,10 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index d3bbf21..b8afd65 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -5,9 +5,10 @@
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index 245546e..e19fe6f 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -4,9 +4,9 @@
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 67dfe0b..b5caeed 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -3,6 +3,8 @@
CONFIG_TARGET_M53017EVB=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index 1b4431a..ab69366 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -6,6 +6,7 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index cca6780..6346c89 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -6,6 +6,7 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index cc8b440..6dd1d71 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -6,6 +6,7 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index bf0b34f..07f8913 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig
index ba7cb9f..9c4ae39 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig
index 6abe98a..31d199a 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index 3860716..00e6fb1 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig
index 47a786a..3d879c5 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig
index bf0b34f..07f8913 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -3,13 +3,15 @@
CONFIG_TARGET_M54418TWR=y
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="-> "
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 5f6382d..53eec4f 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
CONFIG_SYS_PROMPT="-> "
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 0f7a87c..e3a2021 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -4,11 +4,13 @@
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index 11ed3c6..563b9df 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 9c90ca5..94777de 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -4,13 +4,15 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index d5cdf73..e3f7ffa 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index 1580242..b8e85bd 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index dac5f6f..e5225b6 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -4,12 +4,14 @@
CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig
index 07ec2a9..8361ae9 100644
--- a/configs/M5475AFE_defconfig
+++ b/configs/M5475AFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig
index 7333833..ce2fafa 100644
--- a/configs/M5475BFE_defconfig
+++ b/configs/M5475BFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig
index deb3d6f..b13cf26 100644
--- a/configs/M5475CFE_defconfig
+++ b/configs/M5475CFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig
index 9a036cf..de269c7 100644
--- a/configs/M5475DFE_defconfig
+++ b/configs/M5475DFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig
index 0f6c3d6..eb86f49 100644
--- a/configs/M5475EFE_defconfig
+++ b/configs/M5475EFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig
index 4f8b4bb..757385f 100644
--- a/configs/M5475FFE_defconfig
+++ b/configs/M5475FFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig
index 90e9192..b9a4c3c 100644
--- a/configs/M5475GFE_defconfig
+++ b/configs/M5475GFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig
index d49a6be..f4e7879 100644
--- a/configs/M5485AFE_defconfig
+++ b/configs/M5485AFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig
index e0d619e..6774f47 100644
--- a/configs/M5485BFE_defconfig
+++ b/configs/M5485BFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig
index f0674e3..164aeb3 100644
--- a/configs/M5485CFE_defconfig
+++ b/configs/M5485CFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig
index be8990a..63f2aaf 100644
--- a/configs/M5485DFE_defconfig
+++ b/configs/M5485DFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig
index 9961be4..989415a 100644
--- a/configs/M5485EFE_defconfig
+++ b/configs/M5485EFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig
index 8edd4b9..9d8a37a 100644
--- a/configs/M5485FFE_defconfig
+++ b/configs/M5485FFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig
index 8794f45..6100c0a 100644
--- a/configs/M5485GFE_defconfig
+++ b/configs/M5485GFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig
index 9a4f23d..9ccf266 100644
--- a/configs/M5485HFE_defconfig
+++ b/configs/M5485HFE_defconfig
@@ -5,6 +5,7 @@
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="-> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 7aaf339..943a6b9 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -39,6 +39,8 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="ubi.mtd=4 root=ubi0:rootfs rw rootfstype=ubifs rootflags=sync console=ttyCPM0,115200N8 ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="S3K> "
CONFIG_AUTOBOOT_KEYED=y
@@ -49,10 +51,10 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 10ff9cf..27d4e96 100644
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -8,8 +8,9 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -17,5 +18,6 @@
CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index b26731a..6790dd5 100644
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -7,8 +7,10 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -17,5 +19,6 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index 00598d4..0bd9850 100644
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -7,8 +7,10 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -17,5 +19,6 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 7ba4378..eb72a6a 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -5,13 +5,15 @@
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -20,5 +22,7 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index 21b8afa..45f3f44 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -5,13 +5,15 @@
CONFIG_TARGET_MPC8313ERDB=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=6
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -20,5 +22,7 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index 78e9b33..5e6944a 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -7,8 +7,10 @@
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,6 +19,7 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index 097fb09..6ac618b 100644
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -9,6 +9,7 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig
index f48e608..db36b07 100644
--- a/configs/MPC832XEMDS_HOST_33_defconfig
+++ b/configs/MPC832XEMDS_HOST_33_defconfig
@@ -8,6 +8,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig
index 60431ad..cf0fc32 100644
--- a/configs/MPC832XEMDS_HOST_66_defconfig
+++ b/configs/MPC832XEMDS_HOST_66_defconfig
@@ -8,6 +8,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig
index 7379e9a..df5af99 100644
--- a/configs/MPC832XEMDS_SLAVE_defconfig
+++ b/configs/MPC832XEMDS_SLAVE_defconfig
@@ -8,6 +8,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 8b27b27..aaa4bae 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -13,6 +13,7 @@
CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index fc672be..3b90e15 100644
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -5,9 +5,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitxgp:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> "
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -15,5 +19,6 @@
CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index c7f093e..e61dc0a 100644
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -5,12 +5,16 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -20,6 +24,7 @@
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index e508b3d..63d8dca 100644
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -5,12 +5,16 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
CONFIG_BOOTDELAY=6
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="MPC8349E-mITX> "
CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -20,6 +24,7 @@
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 00fc9e8..f39d203 100644
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -6,8 +6,10 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
@@ -16,6 +18,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index 64e5767..e78d8f0 100644
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -6,8 +6,9 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -15,6 +16,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 0373e0e..c0ebf17 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -6,10 +6,11 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,6 +18,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index 1d40e2f..5dc284d 100644
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -11,9 +11,10 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index 8fda7bc..7d428a9 100644
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -11,9 +11,10 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index bdbb8c0..1f26779 100644
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -11,9 +11,10 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index 65a1f9e..f53bf4b 100644
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -10,9 +10,10 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig
index 2d4647a..2d8845a 100644
--- a/configs/MPC8541CDS_defconfig
+++ b/configs/MPC8541CDS_defconfig
@@ -7,11 +7,14 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig
index cbf9eff..d7650c1 100644
--- a/configs/MPC8541CDS_legacy_defconfig
+++ b/configs/MPC8541CDS_legacy_defconfig
@@ -8,11 +8,14 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig
index 3e75be9..3e75de7 100644
--- a/configs/MPC8544DS_defconfig
+++ b/configs/MPC8544DS_defconfig
@@ -9,7 +9,9 @@
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -18,7 +20,9 @@
CONFIG_CMD_EXT2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_RTL8139=y
CONFIG_SCSI=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index fd3b8d6..a138e52 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -8,13 +8,16 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index e090a5b..f49ddbc 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -7,13 +7,16 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 4ea1b9d..9c1421c 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -8,12 +8,15 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig
index 8410fa4..54ab7e1 100644
--- a/configs/MPC8555CDS_defconfig
+++ b/configs/MPC8555CDS_defconfig
@@ -7,11 +7,14 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig
index 3ac6035..f6a4877 100644
--- a/configs/MPC8555CDS_legacy_defconfig
+++ b/configs/MPC8555CDS_legacy_defconfig
@@ -8,11 +8,14 @@
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig
index b5fb4c2..99e6cbd 100644
--- a/configs/MPC8568MDS_defconfig
+++ b/configs/MPC8568MDS_defconfig
@@ -8,12 +8,15 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig
index b713db4..cca2701 100644
--- a/configs/MPC8569MDS_ATM_defconfig
+++ b/configs/MPC8569MDS_ATM_defconfig
@@ -9,8 +9,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig
index 96f7755..c01ca60 100644
--- a/configs/MPC8569MDS_defconfig
+++ b/configs/MPC8569MDS_defconfig
@@ -8,8 +8,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig
index 521badc..4a3a7e0 100644
--- a/configs/MPC8572DS_36BIT_defconfig
+++ b/configs/MPC8572DS_36BIT_defconfig
@@ -10,7 +10,9 @@
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -19,7 +21,9 @@
CONFIG_SYS_FSL_DDR2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig
index 2821c8c..9af509f 100644
--- a/configs/MPC8572DS_defconfig
+++ b/configs/MPC8572DS_defconfig
@@ -9,7 +9,9 @@
CONFIG_BOOTDELAY=10
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -18,7 +20,9 @@
CONFIG_SYS_FSL_DDR2=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index 57d8583..c71d5b1 100644
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -8,6 +8,7 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index 074c333..9949e8b 100644
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -9,6 +9,7 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
@@ -16,6 +17,7 @@
CONFIG_DOS_PARTITION=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index aa2a464..c8440d2 100644
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -8,6 +8,7 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -16,6 +17,7 @@
CONFIG_DOS_PARTITION=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
index 516a16f..015b4d5 100644
--- a/configs/Marsboard_A10_defconfig
+++ b/configs/Marsboard_A10_defconfig
@@ -11,7 +11,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_NO_PMIC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index 0c9e8d1..1ca92e0 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -15,6 +15,6 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_SUN4I_EMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 400a165..d316c75 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -16,7 +16,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig
index 091045f..760e57e 100644
--- a/configs/MigoR_defconfig
+++ b/configs/MigoR_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_MIGOR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -13,6 +15,7 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -20,4 +23,5 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index ed3e678..5602d3c 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -19,8 +19,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 56f405c..5808d5d 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -21,8 +21,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 28029b8..97c5e85 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 75f62d9..00cc88b 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -12,20 +11,22 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,9 +35,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index f9109e4..fa07a21 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index cc71f04..70ce486 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -11,9 +11,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 1ff9d69..c1bf680 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -21,9 +21,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index a5cec4b..be3545c 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index a76a1ab..3e79a22 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -22,9 +22,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index d720c22..7aa6433 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 744ebbd..e20bc7f 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -11,20 +10,22 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index d473d6d..f026bda 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -11,9 +11,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 24d7139..a313c93 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -10,9 +10,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 4fe4186..5c7953b 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index aa94431..ecf5252 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 1b8ba8f..900ea19 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -21,9 +21,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index 137a9ff..f57c4f4 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index c22bd10..95d07c2 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -12,20 +11,22 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,9 +35,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index d1c728b..c7920ad 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 6c7a3b1..93295bb 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -11,9 +11,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 6bf7344..a907d4d 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -21,9 +21,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 2c1f471..121504d 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index b9dff3e..88af7ab 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -22,9 +22,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 765e460..7612cc2 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 27fa96e..749d4f5 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
@@ -11,21 +10,22 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_TPL=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 76f28fd..f1e3a14 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -11,9 +11,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index b2dc667..0b02ad3 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -10,9 +10,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index e671aa6..6c91540 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index a0c9a71..2b22ab5 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index e7d9ed4..fef4527 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -21,9 +21,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index 6ea2041..a6ed6bc 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -20,8 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -30,7 +31,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index 6d3eaeb..41a693a 100644
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -11,8 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -21,7 +22,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index 1dec735..1d90f1a 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -19,8 +19,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -29,7 +30,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index d8680d1..951c326 100644
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -10,8 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -20,7 +21,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 5872353..65b8b05 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -12,7 +11,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -21,10 +19,12 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +33,12 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index a8d8152..933efc4 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 13ecc32..19d5e92 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -21,9 +21,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 32f1025..ca060bc 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 4ae1180..d949956 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,12 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,9 +32,12 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 1ee299f..2c23c8f 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +32,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index d97be67..8904b0e 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 5cbd2fc..da83805 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index d08904b..fc9c491 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,12 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +33,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index bdbc5d6..e315c5a 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index f8a1a58..605b537 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 5894dd1..ea61eb6 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index 3c1f414..befca45 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -20,8 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -30,7 +31,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index 8dcef03..5c20a62 100644
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -11,8 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -21,7 +22,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index 95cb9fd..383adc7 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -19,8 +19,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -29,7 +30,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index 2998129..81a380d 100644
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -10,8 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -20,7 +21,9 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index c579499..5b42386 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -12,7 +11,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -21,10 +19,13 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,9 +35,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index f5e620b..398d68f 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -20,9 +20,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 581a46b..b96a85e 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -21,9 +21,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,7 +36,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index d8138f2..e15b498 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 378fd8e..753863f 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,13 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 9bd5df5..aeff813 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -19,9 +19,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index 306d610..fb8b617 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -20,9 +20,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index 48565f1..3d43443 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -10,9 +10,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index 538b710..a204077 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,15 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,9 +35,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index ed744c7..0d3159f 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -19,9 +19,12 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index 5442b14..7ed4778 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -20,9 +20,12 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +36,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index 79dc16d..440b687 100644
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -10,9 +10,12 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index a635847..2ca4b57 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1022DS=y
@@ -10,7 +9,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,14 @@
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 1b31852..5e242fc 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -18,9 +18,12 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index ee254b5..17d3efe 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -19,9 +19,12 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index 6d11a4a..64c9d0d 100644
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -9,9 +9,12 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -22,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig
index d7aac82..ddb1acf 100644
--- a/configs/P1023RDB_defconfig
+++ b/configs/P1023RDB_defconfig
@@ -10,8 +10,11 @@
CONFIG_BOOTDELAY=-1
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_EEPROM is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -20,7 +23,9 @@
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index 08d0f77..56b354f 100644
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index 6a01a85..b6b8195 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,12 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,9 +32,12 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index dee57c4..a030809 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +32,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index 3f7604c..82797b3 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index f0696d5..e3f755a 100644
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index bd4d916..ad5a933 100644
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -11,9 +11,11 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 5b3d421..c1ea44a 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -21,10 +19,13 @@
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +34,12 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index 2225e82..0e5b919 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -19,9 +19,11 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index da036c1..a4b781a 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -20,9 +20,11 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index 2f1603b..e50e5f2 100644
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -10,9 +10,11 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index c342fc4..5f71732 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -12,7 +11,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -22,10 +20,12 @@
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,9 +35,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 8e52781..fdb56a5 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -20,9 +20,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 032c836..59f131d 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -21,9 +21,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,7 +36,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index a51b631..347340d 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 26a583a..b58fae4 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -2,7 +2,6 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_MPC85xx=y
# CONFIG_CMD_ERRATA is not set
@@ -11,7 +10,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
@@ -20,10 +18,13 @@
CONFIG_TPL_ENV_SUPPORT=y
CONFIG_TPL_I2C_SUPPORT=y
CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_TPL_NAND_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index e446515..3c9485a 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -19,9 +19,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index c596b68..6df108d 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -20,9 +20,10 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 0430762..d533c8e 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -10,9 +10,10 @@
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 8f1f308..13eb21c 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -5,15 +5,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,9 +22,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 7419eae..7de73da 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 1bc514c..386c1b8 100644
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 76ee4d0..3c661b4 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
index 8b5e4de..2fd2cff 100644
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
@@ -13,9 +13,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 7324279..bec6ba8 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index 1aad2a6..0139522 100644
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -7,14 +7,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,9 +23,12 @@
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 13d4ddf..5916759 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -5,15 +5,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,9 +22,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index d9d8b4f..5dc43f7 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index c5766ce..5bf425f 100644
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 657abb3..0f5f5c5 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index 3ea5f5c..28dbdb9 100644
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -13,9 +13,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index b248e98..d2942de 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index c7aad06..0ca0afa 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index 81b14dd..97f05b5 100644
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index e72def9..176c4b1 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -11,9 +11,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
index 5f79200..ed91c77 100644
--- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
@@ -13,9 +13,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index d3addc8..1ee58d8 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 0200c18..40924af 100644
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -7,14 +7,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,9 +24,12 @@
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig
index ff352c9..e8bb666 100644
--- a/configs/P5020DS_NAND_defconfig
+++ b/configs/P5020DS_NAND_defconfig
@@ -5,15 +5,16 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,9 +23,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig
index d025b0e..3d983ba 100644
--- a/configs/P5020DS_SDCARD_defconfig
+++ b/configs/P5020DS_SDCARD_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 03b1843..20bad18 100644
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig
index f1eb865..edc2b9b5 100644
--- a/configs/P5020DS_SPIFLASH_defconfig
+++ b/configs/P5020DS_SPIFLASH_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
index bb71c77..115fa76 100644
--- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
@@ -13,9 +13,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +26,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig
index 426775e..5440f2c 100644
--- a/configs/P5020DS_defconfig
+++ b/configs/P5020DS_defconfig
@@ -10,9 +10,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index 3c0335e..3b7934c 100644
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -7,14 +7,15 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,9 +24,12 @@
CONFIG_CMD_FAT=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index a3f17da..d2ee9b0 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -5,15 +5,16 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,9 +23,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index dbc81f7..de0cd85 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 5d7e1d0..814a9a2 100644
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 9e3abd6..63db5c8 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -11,9 +11,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index c9d9238..d8f28de 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -10,9 +10,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index d1b5b22..c11c3a6 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -15,8 +15,8 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index eca89cf..2a0ec83 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -23,9 +23,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,9 +36,12 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index 60477d3..e50eb7a 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -23,9 +23,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,7 +38,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index 92adbe8..0c81e91 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -12,9 +12,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,7 +27,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index d3d3941..1a55c96 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -24,9 +24,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -39,7 +39,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index 22dd2dc..a6fd4b1 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -11,9 +11,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 19f1000..8ec0206 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -15,9 +15,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index 6294ce3..353cdb9 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,6 +31,7 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_USB=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index 82f4a40..f855574 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -11,7 +11,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,11 +38,14 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 3d6fc50..2c2a287 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -42,7 +42,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index f1d0488..20b1e3d 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -15,9 +15,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -33,7 +33,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 04efc8d..d7fbaa7 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -25,9 +25,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -43,7 +43,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index ac7b316..cdf6af5 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index e76d88a..959aa31 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -23,9 +23,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,9 +36,12 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index ecf54d8..a9f8e0b 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -23,9 +23,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,7 +38,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index 968d8a8..0daabfc 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -14,9 +14,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -29,7 +29,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index b481c8c..020b92c 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -24,9 +24,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -39,7 +39,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 2cfcaed..ee46114 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -13,9 +13,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -28,7 +28,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index 010bc6c..b3dc1ae 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -22,9 +22,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -34,9 +34,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index f0cb20b..2397846 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -22,9 +22,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,7 +36,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 4758257..91bc7a0 100644
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,7 +27,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 8e7dd1d..c35a9b9 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -23,9 +23,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -37,7 +37,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index 961b33b..2eb8701 100644
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -12,9 +12,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 1e3d0b1..a6bc013 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index a75ee03..9910f24 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -15,9 +15,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -34,7 +34,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 7521e72..ae97b4d 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -33,7 +33,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 28277a2..0bffdf8 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -22,9 +22,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,9 +35,12 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index f4bef13..202fa67 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -22,9 +22,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -37,7 +37,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index f16834b..f6cf68f 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -28,7 +28,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index f09f7b4..be7cf06 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -23,9 +23,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,7 +38,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index 395a6cd..6385528 100644
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -12,9 +12,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,7 +27,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index f83f43e..3d955eb 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -11,7 +11,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,9 +36,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 45949fd..6999639 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,7 +38,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 4a94e30..1692b47 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -15,9 +15,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -29,7 +29,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 6e6b6a1..9ef95eb 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -25,9 +25,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -39,7 +39,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 8daff4d..227d131 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -28,7 +28,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 513bfd3..3a8e7e7 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -12,7 +12,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_BOOTDELAY=0
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
@@ -26,9 +26,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -41,9 +41,12 @@
CONFIG_SPL_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 0606e0c..836b651 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -11,7 +11,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SILENT_CONSOLE=y
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,9 +38,12 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index 70ab39b..3c7c972 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -24,9 +24,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -40,7 +40,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index ad88f27..3e6fc50 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -25,9 +25,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -41,7 +41,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 5c3cfc7..cc1d51b 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -14,9 +14,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,7 +30,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index cdea785..b43bfdd 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -13,9 +13,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,7 +27,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index 8ce7440..157ee0a 100644
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -12,9 +12,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index d39399d..a8fae86 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,11 +31,14 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index a6cda56..4e24dfc 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,7 +35,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index e1e8c72..5b341aa 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 406715a..25e1354 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,7 +36,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 3044236..6a45691 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -12,9 +12,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 89def59..f10e842 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index a97a28f..3a70533 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,9 +32,12 @@
# CONFIG_CMD_IRQ is not set
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 122f43b..640e381 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -34,7 +34,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index 5cc601d..ec6f975 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 63b2098..62828c6 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,7 +35,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
index 32feff1..d73b32f 100644
--- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
@@ -12,9 +12,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 8822537..eb53659 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index e1e0ef4..44af90c 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,11 +31,14 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index 980d1e8..793a400 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,7 +35,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index fc760db..9b92fc9 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -20,9 +20,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,7 +36,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
index a49aff5..beb3e1a 100644
--- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
@@ -12,9 +12,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,7 +26,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index 6fb0910..4ae727a 100644
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,7 +25,9 @@
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 605076e..8144484 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,9 +30,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index a5b0d41..16f7ecd 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index ea79cc2..1d13bcf 100644
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig
index 6caffd8..3aa3aee 100644
--- a/configs/T4160QDS_defconfig
+++ b/configs/T4160QDS_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,7 +22,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig
index a1c60b2..eb223e7 100644
--- a/configs/T4160RDB_defconfig
+++ b/configs/T4160RDB_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,7 +22,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index fe35461..54836ea 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -10,7 +10,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,9 +30,12 @@
CONFIG_CMD_FAT=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index a7d681d..3a0b7fd 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 3219b0c..367ca86 100644
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -10,9 +10,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,7 +23,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
index b198ccf..9e98245 100644
--- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
@@ -12,9 +12,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +24,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig
index 9632076..65401c3 100644
--- a/configs/T4240QDS_defconfig
+++ b/configs/T4240QDS_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,7 +22,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 98d6c76..a8aa25c 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -19,9 +19,9 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,7 +32,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 1c0aa91..ad56583 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=10
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,7 +22,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index e31caca..d755fa6 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -9,6 +9,7 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -19,5 +20,6 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index e48b9bc..c892bff 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -12,8 +12,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -22,7 +23,9 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index e03ba47..2fb2dc6 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -12,12 +12,14 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
+CONFIG_CMD_MMC_SPI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,7 +33,9 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 13eef4e..8ba5948 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -12,12 +12,14 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b"
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+# CONFIG_CMD_NAND is not set
+CONFIG_CMD_MMC_SPI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,7 +33,9 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index 2a2f26d..5ee19bc 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -19,8 +19,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SCSI=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
+CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index 84f6f12..34af5d2 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 09e028f..cbe69f5 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -14,7 +14,6 @@
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -32,13 +31,14 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -51,7 +51,10 @@
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig
index 516ad70..ecf55d6 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -6,6 +6,7 @@
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -23,6 +24,7 @@
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_DFU_TFTP=y
@@ -31,7 +33,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 33da1fa..570c668 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -9,6 +9,7 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -26,6 +27,7 @@
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
@@ -37,8 +39,11 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 4ea5617..9f88a42 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -6,8 +6,6 @@
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
@@ -21,7 +19,10 @@
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_OF_CONTROL=y
@@ -34,10 +35,14 @@
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig
index 49040a6..6cccf5e 100644
--- a/configs/am335x_evm_nor_defconfig
+++ b/configs/am335x_evm_nor_defconfig
@@ -1,11 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_NOR=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
@@ -16,31 +15,25 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_FASTBOOT=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_NAND=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
@@ -50,7 +43,6 @@
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
-CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig
index f121e2f..2aa67b0 100644
--- a/configs/am335x_evm_norboot_defconfig
+++ b/configs/am335x_evm_norboot_defconfig
@@ -1,11 +1,13 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x08000000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_NOR=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_NOR_BOOT=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -24,7 +26,9 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index 5cbfa8e..2a55d35 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -9,6 +9,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT"
CONFIG_SPI_BOOT=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -29,7 +30,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig
index 51d1042..666b632 100644
--- a/configs/am335x_evm_usbspl_defconfig
+++ b/configs/am335x_evm_usbspl_defconfig
@@ -5,8 +5,6 @@
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
@@ -23,16 +21,22 @@
CONFIG_FASTBOOT_BUF_ADDR=0x81000000
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00080000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_NAND=y
CONFIG_DFU_RAM=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 2b1acb7..dabfcbb 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -11,18 +11,18 @@
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
+# CONFIG_SPL_ENV_SUPPORT is not set
# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_SPL_MTD_SUPPORT=y
# CONFIG_SPL_YMODEM_SUPPORT is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
# CONFIG_SPL_EFI_PARTITION is not set
@@ -36,10 +36,14 @@
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index 2e7962f..e63fa1b 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -29,13 +29,15 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -50,8 +52,11 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 9b4802e..dcf4189 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -30,16 +30,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 637306d..9a7274d 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -30,16 +30,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 5c0c912..d404125 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -31,16 +31,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
index e5903de..833eaaa 100644
--- a/configs/am335x_shc_prompt_defconfig
+++ b/configs/am335x_shc_prompt_defconfig
@@ -28,16 +28,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index c8f7632..f5a4a9c 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -30,16 +30,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
index c8f7632..f5a4a9c 100644
--- a/configs/am335x_shc_sdboot_prompt_defconfig
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -30,16 +30,18 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_DOS_PARTITION=y
CONFIG_ISO_PARTITION=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 5d5c68e..5013720 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -29,18 +29,21 @@
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_LZO=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
index 2102956..4ddde09 100644
--- a/configs/am3517_crane_defconfig
+++ b/configs/am3517_crane_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_AM3517_CRANE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -12,10 +13,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index eddeb5e..e37d8cf 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -1,9 +1,9 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_AM3517_EVM=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
CONFIG_VERSION_VARIABLE=y
@@ -17,12 +17,13 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -35,6 +36,7 @@
CONFIG_CMD_UBI=y
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 7a7a0b0..15c25d3 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -6,8 +6,7 @@
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
-CONFIG_ENV_IS_IN_FAT=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
@@ -16,7 +15,11 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_ISO_PARTITION=y
@@ -30,8 +33,11 @@
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig
index 9892653..fc3e1b7 100644
--- a/configs/am43xx_evm_ethboot_defconfig
+++ b/configs/am43xx_evm_ethboot_defconfig
@@ -1,7 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_AM43XX=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -15,18 +15,22 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -42,8 +46,10 @@
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
@@ -59,5 +65,4 @@
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0403
CONFIG_G_DNL_PRODUCT_NUM=0xbd00
-CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index eefad6c..5a8d684 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -14,16 +14,16 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -40,6 +40,7 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index f4c0f84..6cdbc8d 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -6,7 +6,7 @@
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -19,18 +19,22 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -52,8 +56,11 @@
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
@@ -72,4 +79,3 @@
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0403
CONFIG_G_DNL_PRODUCT_NUM=0xbd00
-CONFIG_FAT_WRITE=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 5306c26..a4d23e1 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -14,8 +14,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
-CONFIG_ENV_IS_IN_FAT=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
@@ -31,6 +30,7 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_ISO_PARTITION=y
@@ -44,8 +44,11 @@
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index d6e293c..11be1ad 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -32,6 +33,7 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_PMIC is not set
@@ -52,6 +54,7 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PALMAS=y
CONFIG_DM_REGULATOR=y
diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig
index 0a898de..a6ad0d3 100644
--- a/configs/am57xx_evm_nodt_defconfig
+++ b/configs/am57xx_evm_nodt_defconfig
@@ -24,16 +24,17 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -48,6 +49,7 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 50a19b3..91baa2b 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -56,6 +57,7 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PALMAS=y
CONFIG_DM_REGULATOR=y
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index afe6c96..d76cb65 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="ap121 # "
@@ -18,9 +20,9 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index ca77e79..ba62fb4 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="ap143 # "
@@ -19,9 +21,9 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MTDPARTS=y
diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig
index ebefe3c..52f806b 100644
--- a/configs/ap325rxa_defconfig
+++ b/configs/ap325rxa_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_AP325RXA=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,38400"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,8 +14,9 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -24,4 +27,5 @@
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig
index c08ae4f..6f4651c 100644
--- a/configs/ap_sh4a_4a_defconfig
+++ b/configs/ap_sh4a_4a_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_AP_SH4A_4A=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,9 +14,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -23,4 +26,6 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index 9179aaf..c93a0f7 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -13,14 +13,15 @@
CONFIG_SYS_PROMPT="Apalis TK1 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_DM=y
@@ -32,7 +33,10 @@
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_DM_PMIC=y
CONFIG_PMIC_AS3722=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 4d88e70..468a1fc 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -27,13 +27,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -42,6 +42,10 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig
index 5dbc960..ff234e5 100644
--- a/configs/apalis_imx6_nospl_com_defconfig
+++ b/configs/apalis_imx6_nospl_com_defconfig
@@ -20,13 +20,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +35,10 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig
index e216781..7de6308 100644
--- a/configs/apalis_imx6_nospl_it_defconfig
+++ b/configs/apalis_imx6_nospl_it_defconfig
@@ -20,13 +20,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +35,10 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index aaf1bfb..e8e5e35 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -11,14 +11,15 @@
CONFIG_SYS_PROMPT="Apalis T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 6d7c198..7d453b6 100644
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -6,6 +6,8 @@
CONFIG_IDENT_STRING=" apf27 patch 3.10"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySMX0,115200 mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs) ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
@@ -14,8 +16,11 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index f5b18e0..ca70c8b 100644
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -15,6 +15,7 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 264762d..7971b10 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -14,11 +14,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +37,10 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index 3c88986..1cd3502 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -14,11 +14,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +37,10 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index 525aff4..fbe8269 100644
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -14,11 +14,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +37,8 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig
index c5a6524..6abcb70 100644
--- a/configs/armadillo-800eva_defconfig
+++ b/configs/armadillo-800eva_defconfig
@@ -15,9 +15,10 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -27,4 +28,6 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
# CONFIG_MMC is not set
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig
index 66ffefd..6ddf351 100644
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@@ -13,10 +13,10 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="ARNDALE # "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index 888bb33..f76df63 100644
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -1,15 +1,18 @@
CONFIG_M68K=y
CONFIG_TARGET_ASTRO_MCF5373L=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="URMEL > "
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGA_LOADMK=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
+CONFIG_FPGA_ALTERA=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig
index b239fd9..e7883ab 100644
--- a/configs/at91rm9200ek_defconfig
+++ b/configs/at91rm9200ek_defconfig
@@ -10,8 +10,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig
index 1bb2003..64b722d 100644
--- a/configs/at91rm9200ek_ram_defconfig
+++ b/configs/at91rm9200ek_ram_defconfig
@@ -11,8 +11,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index d0aff37..8661d9f 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 1aa7c17..4c0595d 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 36c48cc..d8c9819 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -7,15 +7,19 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index a044dd0..b87255f 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 19a7333..be221a6 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index bcb9614..78faadf 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index b5cf909..a4a65c9 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -5,8 +5,10 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -44,6 +52,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index b5cf909..a4a65c9 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -5,8 +5,10 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -44,6 +52,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index 771dacb..13ba9de 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -44,6 +52,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index ac7d368..f08e7ae 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -16,10 +16,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -34,6 +36,10 @@
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -45,6 +51,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index a3b0a4b..5281159 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -16,10 +16,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -34,6 +36,10 @@
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -45,6 +51,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 8b6edd9..8854b55 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 1597d0e..23d6c89 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 18bff85..127c7b7 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -1,9 +1,14 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_AT91SAM9261EK=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
+CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -11,16 +16,38 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_DEBUG_UART_ATMEL=y
+CONFIG_DEBUG_UART_BASE=0xfffff200
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 5cbba37..bac13a3 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -7,16 +7,20 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -30,6 +34,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -41,6 +49,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index 90266fe..c1d5214 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -7,16 +7,20 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -30,6 +34,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -41,6 +49,8 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index c7192a7..8a7d877 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 6ace30a..170242b 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index fdfe92e..8715728 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -7,15 +7,19 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index ed9e9c2..e51a827 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,11 +18,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -50,4 +53,3 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index c6e75fd..9c36b6b 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,11 +18,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 16e9c4c..1e5d78f 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -15,10 +15,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -50,4 +52,3 @@
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 3407fd3..9f7a3aa 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -15,10 +15,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index eb17acf..9fa6894 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -15,10 +15,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index a104fba..9eec6e8 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -5,8 +5,10 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,9 +18,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
@@ -42,4 +50,6 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_LCD=y
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index 69ff8e6..af7643d 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,9 +18,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
@@ -42,5 +50,6 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index a599777..7a756f6 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,9 +18,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
@@ -33,6 +37,10 @@
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
@@ -42,4 +50,6 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_LCD=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 8fc457b..2e94039 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 1b76127..98612dd 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -55,4 +59,3 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 23ef807..6a007fd 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index 48c2559..9f09997 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -7,6 +7,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -16,10 +18,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 34e5681..c69d27f 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 8a3500a..cf734a5 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -5,17 +5,21 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
CONFIG_DEBUG_UART=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index 7a7facf..226e54f 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -7,15 +7,19 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -28,6 +32,10 @@
CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -39,5 +47,7 @@
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 7b26d45..8ecd268 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -15,6 +15,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="\0addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}::off\0addtest=setenv bootargs ${bootargs} loglevel=4 test\0baudrate=115200\0boot_file=setenv bootfile /${project_dir}/kernel/uImage\0boot_retries=0\0bootcmd=run flash_self\0bootdelay=3\0ethact=macb0\0flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0flash_self=run nand_kernel;run setbootargs;upgrade_available;bootm ${kernel_ram};reset\0flash_self_test=run nand_kernel;run setbootargs addtest; upgrade_available;bootm ${kernel_ram};reset\0hostname=systemone\0kernel_Off=0x00200000\0kernel_Off_fallback=0x03800000\0kernel_ram=0x21500000\0kernel_size=0x00400000\0kernel_size_fallback=0x00400000\0loads_echo=1\0nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} ${kernel_size}\0net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0netdev=eth0\0nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs rw nfsroot=${serverip}:${rootpath} at91sam9_wdt.wdt_timeout=16\0partitionset_active=A\0preboot=echo;echo Type 'run flash_self' to use kernel and root filesystem on memory;echo Type 'run flash_nfs' to use kernel from memory and root filesystem over NFS;echo Type 'run net_nfs' to get Kernel over TFTP and mount root filesystem over NFS;echo\0project_dir=systemone\0root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0rootfs=/dev/mtdblock5\0rootfs_fallback=/dev/mtdblock7\0setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops root=${rootfs} rootfstype=jffs2 panic=7 at91sam9_wdt.wdt_timeout=16\0stderr=serial\0stdin=serial\0stdout=serial\0upgrade_available=0\0"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
@@ -23,10 +25,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -36,4 +39,5 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_USE_TINY_PRINTF=y
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 4e5f2e5..edaa992 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -4,12 +4,17 @@
CONFIG_SYS_CLK_FREQ=750000000
CONFIG_DEFAULT_DEVICE_TREE="axs101"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -25,6 +30,7 @@
CONFIG_MMC=y
CONFIG_MMC_DW=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index ff0bf19..0fda716 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -4,12 +4,17 @@
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_DEFAULT_DEVICE_TREE="axs103"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -25,6 +30,7 @@
CONFIG_MMC=y
CONFIG_MMC_DW=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 03a71ed..b17113f 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -3,8 +3,6 @@
CONFIG_DEFAULT_DEVICE_TREE="bayleybay"
CONFIG_TARGET_BAYLEYBAY=y
CONFIG_INTERNAL_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_VGA_BIOS_ADDR=0xfffa0000
@@ -15,20 +13,20 @@
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
-CONFIG_ARCH_MISC_INIT=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -43,33 +41,12 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig
index 30c8670..60f809e 100644
--- a/configs/bcm11130_defconfig
+++ b/configs/bcm11130_defconfig
@@ -11,9 +11,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig
index 5ee6682..72235e6 100644
--- a/configs/bcm11130_nand_defconfig
+++ b/configs/bcm11130_nand_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_TARGET_BCM28155_AP=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -11,9 +10,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
@@ -24,6 +23,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig
index 321a350..1005684 100644
--- a/configs/bcm23550_w1d_defconfig
+++ b/configs/bcm23550_w1d_defconfig
@@ -17,9 +17,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig
index fcf76bd..ff2efbc 100644
--- a/configs/bcm28155_ap_defconfig
+++ b/configs/bcm28155_ap_defconfig
@@ -18,9 +18,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig
index 374d58b..6aaed9b 100644
--- a/configs/bcm28155_w1d_defconfig
+++ b/configs/bcm28155_w1d_defconfig
@@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_TARGET_BCM28155_AP=y
-CONFIG_SYS_EXTRA_OPTIONS="BCM_SF2_ETH,BCM_SF2_ETH_GMAC"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -12,11 +11,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
@@ -25,6 +23,9 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_KONA=y
+CONFIG_NETDEVICES=y
+CONFIG_BCM_SF2_ETH=y
+CONFIG_BCM_SF2_ETH_GMAC=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 71d6cd5..a61fd62 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -9,22 +9,24 @@
CONFIG_SYS_PROMPT="Tegra30 (Beaver) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index 01012c8..1adc675 100644
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -6,6 +6,8 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
@@ -15,9 +17,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index c5d15c6..1d575a1 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -26,19 +26,20 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -54,7 +55,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index 31e077c..786848e 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -26,19 +26,20 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -54,7 +55,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index fe988f0..008a100 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -12,10 +12,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,6 +33,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_SPI=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index ccd0d8f..a4f02fe 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -9,6 +9,7 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -21,3 +22,4 @@
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 6d93edc..48983f5 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -14,9 +14,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
@@ -37,3 +38,4 @@
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 9e494ee..0e1cf29 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -15,9 +15,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
@@ -38,3 +39,4 @@
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 6913d2b..5010a0e 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -15,9 +15,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
@@ -38,3 +39,4 @@
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 10ccc54..ae090bf 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -16,9 +16,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_LINK_LOCAL=y
@@ -39,3 +40,4 @@
CONFIG_PCI_XILINX=y
CONFIG_SYS_NS16550=y
CONFIG_LZ4=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 4aded16..dc2985a 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -31,14 +31,14 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -51,6 +51,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_NETCONSOLE=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig
index e128fb4..c9d0b2d 100644
--- a/configs/brppt1_nand_defconfig
+++ b/configs/brppt1_nand_defconfig
@@ -9,7 +9,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-2
# CONFIG_CONSOLE_MUX is not set
@@ -31,14 +31,14 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -52,6 +52,8 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_NETCONSOLE=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index 1e156ca..b844875 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -34,16 +34,16 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -60,7 +60,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 3dac8a9..d45aa88 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -33,14 +33,14 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -52,6 +52,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_NETCONSOLE=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig
index b062dcd..3bdcb8d 100644
--- a/configs/caddy2_defconfig
+++ b/configs/caddy2_defconfig
@@ -8,6 +8,8 @@
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_TSI148=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index 5d26532..4eb6cef 100644
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_OMAP3_CAIRO=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-2
@@ -13,14 +14,18 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -34,6 +39,8 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index f771a05..8a9d386 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -10,13 +10,14 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 1a5e47d..08cc1d0 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -9,16 +9,17 @@
CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -36,7 +37,10 @@
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_DM_PMIC=y
CONFIG_PMIC_AS3722=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
CONFIG_USB=y
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index e20e5f8..c8a7797 100644
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -26,15 +26,15 @@
CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -47,6 +47,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_MMC=y
CONFIG_DFU_SF=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index e14ef5d..89c5e2c 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -23,10 +23,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -39,7 +40,10 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 01032e7..4b335ab 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -14,12 +14,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index b9d4fc9..019e077 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -16,12 +16,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 11ceb76..f058e56 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -11,7 +11,6 @@
CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
CONFIG_TARGET_CHROMEBOOK_LINK64=y
CONFIG_DEBUG_UART=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
@@ -19,25 +18,27 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_CPU_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_PCI_SUPPORT=y
CONFIG_SPL_PCH_SUPPORT=y
CONFIG_SPL_RTC_SUPPORT=y
-CONFIG_SPL_TIMER_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -51,44 +52,28 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
-CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
CONFIG_TPM_TIS_LPC=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_VIDEO_IVYBRIDGE_IGD=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 461266d..7fcddba 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -4,24 +4,25 @@
CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
CONFIG_TARGET_CHROMEBOOK_LINK=y
CONFIG_DEBUG_UART=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -38,40 +39,23 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
CONFIG_TPM_TIS_LPC=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_VIDEO_IVYBRIDGE_IGD=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index fb955e4..a5e6240 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -15,12 +15,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig
index 19c96c0..2c294bd 100644
--- a/configs/chromebook_samus_defconfig
+++ b/configs/chromebook_samus_defconfig
@@ -4,24 +4,25 @@
CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus"
CONFIG_TARGET_CHROMEBOOK_SAMUS=y
CONFIG_DEBUG_UART=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_HAVE_REFCODE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -38,35 +39,19 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_INTEL_BROADWELL_GPIO=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
CONFIG_TPM_TIS_LPC=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
-CONFIG_VIDEO_BROADWELL_IGD=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TPM=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index e447431..a81a9cc 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -2,22 +2,23 @@
CONFIG_VENDOR_GOOGLE=y
CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther"
CONFIG_TARGET_CHROMEBOX_PANTHER=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_HAVE_MRC=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -34,34 +35,16 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_BLK=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_RTL8169=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
CONFIG_TPM_TIS_LPC=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TPM=y
diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig
index 0d1f614..c2f6be5 100644
--- a/configs/cl-som-am57x_defconfig
+++ b/configs/cl-som-am57x_defconfig
@@ -16,14 +16,14 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -34,6 +34,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ISO_PARTITION=y
+CONFIG_CMD_PCA953X=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
@@ -50,6 +51,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 89c0976..b582c88 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -19,10 +19,11 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -34,6 +35,8 @@
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index c96285b..bbe82a6 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -27,16 +27,17 @@
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -57,6 +58,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index 8176a65..e9bd6b7 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -28,10 +28,11 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -44,6 +45,7 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
+CONFIG_CMD_PCA953X=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
@@ -51,6 +53,8 @@
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index d37b693..69d1cc5 100644
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_CM_T3517=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
@@ -14,11 +15,12 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3"
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -36,6 +38,7 @@
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_STORAGE=y
diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index ba76463..4c7e2b5 100644
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_CM_T35=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
@@ -16,11 +17,12 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3"
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -38,6 +40,7 @@
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index a9f3af4..749c5e0 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -30,15 +30,16 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
@@ -53,6 +54,7 @@
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_ATMEL=y
@@ -63,8 +65,10 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index 4aed572..956f358 100644
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -21,12 +21,12 @@
CONFIG_CMD_EEPROM_LAYOUT=y
CONFIG_EEPROM_LAYOUT_HELP_STRING="v2, v3"
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -42,6 +42,7 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index a23975f..edbd87f 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -27,13 +27,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -42,6 +42,8 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig
index bed38dc..96472ce 100644
--- a/configs/colibri_imx6_nospl_defconfig
+++ b/configs/colibri_imx6_nospl_defconfig
@@ -20,13 +20,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +35,8 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index ac07103..ef433b0 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -21,14 +21,16 @@
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_NAND_TORTURE=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -44,6 +46,8 @@
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig
index 040408b..41c2d2b 100644
--- a/configs/colibri_pxa270_defconfig
+++ b/configs/colibri_pxa270_defconfig
@@ -1,17 +1,19 @@
CONFIG_ARM=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="$ "
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index c4c60b4..7f416b0 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -11,14 +11,15 @@
CONFIG_SYS_PROMPT="Colibri T20 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 4c5a248..90255b75 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -11,14 +11,14 @@
CONFIG_SYS_PROMPT="Colibri T30 # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 5fac13d..8f02d06 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -17,13 +17,13 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -42,6 +42,8 @@
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_SPI=y
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index f856752..52e9d6c 100644
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -24,9 +24,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index 27fcc8e..3a1aea9 100644
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -24,8 +24,8 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index 97f1c62..1326f7e 100644
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -24,9 +24,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index a0cce75..89ba0b6 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -4,8 +4,6 @@
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
@@ -16,19 +14,21 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda2 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_ARCH_MISC_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -43,38 +43,17 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_114=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index 26eed7c..0edacb8 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -2,32 +2,33 @@
CONFIG_VENDOR_CONGATEC=y
CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
-CONFIG_DEBUG_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda2 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_ARCH_MISC_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -42,38 +43,15 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_DEBUG_UART_BASE=0x3f8
-CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_114=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index 87d212a..fed0e1e 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -16,14 +16,16 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@@ -34,6 +36,7 @@
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index ec98183..8524c8e 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -16,14 +16,16 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@@ -34,6 +36,7 @@
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
CONFIG_TPM_AUTH_SESSIONS=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index af79b6c..fe74727 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -20,10 +20,11 @@
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -45,6 +46,8 @@
CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index ab7f0d6..badfbfb 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -4,14 +4,15 @@
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -31,26 +32,10 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_TIMER=y
CONFIG_TPM_TIS_LPC=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_COREBOOT=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_TPM=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index af0beb2..ecfd70b 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
@@ -22,11 +24,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -39,6 +42,7 @@
CONFIG_AT91_UTMI=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
+CONFIG_PHYLIB=y
# CONFIG_SPL_DM_SERIAL is not set
CONFIG_ATMEL_USART=y
CONFIG_USB=y
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index 3a4ef1c..f7eca76 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -2,18 +2,19 @@
CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2"
CONFIG_TARGET_COUGARCANYON2=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_CONSOLE_MUX=y
+# CONFIG_ENABLE_MRC_CACHE is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -27,19 +28,9 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_USE_PRIVATE_LIBGCC=y
+# CONFIG_VIDEO_VESA is not set
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index dde07f7..93f96b0 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -8,18 +8,20 @@
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_FIT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -33,34 +35,11 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_PCH_GBE=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 0b3769e..78679b0 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="d2v2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index e3320e6..7e056e8 100644
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -9,6 +9,8 @@
CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index a49ef71..0135e7d 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -9,6 +9,8 @@
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 0a5c636..5c6ae25 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index cafb34d..57806a5 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -10,16 +10,16 @@
CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 3494bac..aa6e593 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -18,9 +18,9 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -38,10 +38,10 @@
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_GIGE=y
CONFIG_MVPP2=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index ab42498..81fac43 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -18,10 +18,10 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -41,11 +41,14 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=200000000
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 6c6083d..3cee221 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -18,10 +18,11 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -44,6 +45,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 99533b9..9458f8c 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -17,11 +17,12 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_SATA=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -38,10 +39,13 @@
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_SPL_OF_TRANSLATE=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/dbau1000_defconfig b/configs/dbau1000_defconfig
index 0a6f233..b24abec 100644
--- a/configs/dbau1000_defconfig
+++ b/configs/dbau1000_defconfig
@@ -7,11 +7,11 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/dbau1100_defconfig b/configs/dbau1100_defconfig
index 1b71108..bdab8b1 100644
--- a/configs/dbau1100_defconfig
+++ b/configs/dbau1100_defconfig
@@ -7,11 +7,11 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/dbau1500_defconfig b/configs/dbau1500_defconfig
index 7ffe04e..f7abed9 100644
--- a/configs/dbau1500_defconfig
+++ b/configs/dbau1500_defconfig
@@ -7,11 +7,11 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index c17e7ec..41f473e 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -6,17 +6,20 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -29,6 +32,7 @@
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index f5e5317..c644b49 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_DEVKIT8000=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -9,11 +10,16 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x680000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,5 +31,6 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig
index c86e0a9..6dcc2fe 100644
--- a/configs/dfi-bt700-q7x-151_defconfig
+++ b/configs/dfi-bt700-q7x-151_defconfig
@@ -1,32 +1,32 @@
CONFIG_X86=y
CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151"
-CONFIG_TARGET_DFI_BT700=y
-CONFIG_DEBUG_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sda1 ro quiet"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -41,37 +41,14 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_DEBUG_UART_BASE=0x3f8
-CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_114=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
index 12c39ba..e3886d9 100644
--- a/configs/dms-ba16-1g_defconfig
+++ b/configs/dms-ba16-1g_defconfig
@@ -15,12 +15,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,6 +32,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_GADGET=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
index dd3428e..a0a0f63 100644
--- a/configs/dms-ba16_defconfig
+++ b/configs/dms-ba16_defconfig
@@ -14,12 +14,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,6 +31,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_GADGET=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index f4303c8..151c2bc 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -8,8 +8,9 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 90afa46..c222bca 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -8,6 +8,7 @@
CONFIG_SYS_PROMPT="DockStar> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 979f3ec..4fff0cf 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -31,6 +32,7 @@
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_ISO_PARTITION=y
@@ -58,7 +60,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_SPL_PHY=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PALMAS=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 8292bdf..5572472 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_BOARD_SETUP=y
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -61,7 +62,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_SPL_PHY=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PALMAS=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 763e96b..44d7ab8 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -31,13 +32,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -51,11 +53,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index c78b4a6..b0b2eb5 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -4,6 +4,8 @@
CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="dragonboard410c => "
@@ -12,10 +14,10 @@
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
CONFIG_CLK=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 640096b..4c01736 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -7,8 +7,8 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index d8c7ebe..ab8db8f 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -4,10 +4,10 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index bde54b6..026dfa8 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -10,14 +10,17 @@
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_DEBUG_UART=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -35,6 +38,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig
index ced8156..d291c40 100644
--- a/configs/duovero_defconfig
+++ b/configs/duovero_defconfig
@@ -14,11 +14,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -26,6 +26,7 @@
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig
index 2e264bc..ff0a2a6 100644
--- a/configs/e2220-1170_defconfig
+++ b/configs/e2220-1170_defconfig
@@ -8,16 +8,16 @@
CONFIG_SYS_PROMPT="Tegra210 (E2220-1170) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index 7e73c98..3d2d4a3 100644
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -18,10 +18,11 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index b04d4ab..979dd0e 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -7,8 +7,8 @@
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="\nEB+CPU5282> "
-# CONFIG_CMD_LOADB is not set
CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index b498f2d..bb5f2d1 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -6,8 +6,8 @@
CONFIG_BOOTDELAY=5
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMD_LOADB is not set
CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index 0bcc75b..28725c8 100644
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_ECO5PK=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
@@ -11,9 +12,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -23,6 +25,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig
index 7fb14ab..24a3112 100644
--- a/configs/ecovec_defconfig
+++ b/configs/ecovec_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_ECOVEC=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,11 +14,12 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -27,6 +30,8 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig
index adc9a68..ebcd0f5 100644
--- a/configs/edb9315a_defconfig
+++ b/configs/edb9315a_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_EDB93XX=y
CONFIG_SYS_EXTRA_OPTIONS="MK_edb9315a"
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -9,8 +11,8 @@
CONFIG_SYS_PROMPT="EDB9315A> "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_EXT2=y
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
new file mode 100644
index 0000000..0aa7a45
--- /dev/null
+++ b/configs/edison_defconfig
@@ -0,0 +1,39 @@
+CONFIG_X86=y
+CONFIG_VENDOR_INTEL=y
+CONFIG_DEFAULT_DEVICE_TREE="edison"
+CONFIG_TARGET_EDISON=y
+CONFIG_SMP=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_ENV_CALLBACK=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_CPU=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Intel"
+CONFIG_G_DNL_VENDOR_NUM=0x8087
+CONFIG_G_DNL_PRODUCT_NUM=0x0a99
+CONFIG_FAT_WRITE=y
+CONFIG_SHA1=y
diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index d28812a..218b838 100644
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -5,22 +5,22 @@
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_ENV_IS_NOWHERE=y
-CONFIG_CONSOLE_MUX=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
+# CONFIG_CMD_SF_TEST is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
@@ -30,16 +30,11 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
-CONFIG_DM_PCI=y
+# CONFIG_DM_ETH is not set
CONFIG_DEBUG_EFI_CONSOLE=y
CONFIG_DEBUG_UART_BASE=0
CONFIG_DEBUG_UART_CLOCK=0
CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
CONFIG_EFI=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/espt_defconfig b/configs/espt_defconfig
index a7f50ef..e60b4a3 100644
--- a/configs/espt_defconfig
+++ b/configs/espt_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_ESPT=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,9 +14,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -23,4 +26,6 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index ab3ef75..d35b730 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -31,13 +32,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -51,11 +53,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 2bf06ad..241aab9 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -1,22 +1,28 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_ETHERNUT5=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="ethernut5"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SAVES=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_RARP=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,9 +36,24 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
+CONFIG_CMD_REISER=y
CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index ae650fc..95ddc9c 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -5,6 +5,8 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb"
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_PRE_CON_BUF_ADDR=0x1e720000
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index dae5094..72e492f 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_TARGET_EVB_PX5=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 8d73f88..65c0624 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -1,19 +1,23 @@
CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_EVB_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
CONFIG_DEBUG_UART=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
CONFIG_ENV_IS_NOWHERE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -31,10 +35,11 @@
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
+# CONFIG_SPL_DM_SERIAL is not set
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
+CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 8b9a288..f4ad4c2 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -4,7 +4,7 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 98addee..bf4accd 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -2,24 +2,23 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SILENT_CONSOLE=y
-CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -62,6 +61,11 @@
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 6081411..55757d2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -66,6 +66,7 @@
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 9d2b319..49713f2 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FENNEC_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
@@ -14,13 +14,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 3b605f4..ae724ea 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@@ -13,13 +13,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -41,6 +41,7 @@
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEYBOARD=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
@@ -68,6 +69,8 @@
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index 75a97e3..15eee78 100644
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -8,8 +8,9 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="flea3 U-Boot > "
-CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -18,6 +19,8 @@
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_EFI_LOADER is not set
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 6da437c..6ad7f1b 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -2,27 +2,26 @@
CONFIG_VENDOR_INTEL=y
CONFIG_DEFAULT_DEVICE_TREE="galileo"
CONFIG_TARGET_GALILEO=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_ACPI_TABLE=y
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_CONSOLE_MUX=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_ARCH_MISC_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -37,28 +36,9 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig
index 278857e..4a8d5ce 100644
--- a/configs/ge_b450v3_defconfig
+++ b/configs/ge_b450v3_defconfig
@@ -12,11 +12,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig
index ded0fb1..ae32577 100644
--- a/configs/ge_b650v3_defconfig
+++ b/configs/ge_b650v3_defconfig
@@ -12,11 +12,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig
index 574e916..0a56243 100644
--- a/configs/ge_b850v3_defconfig
+++ b/configs/ge_b850v3_defconfig
@@ -12,11 +12,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig
index a1944b4..0fd89d2 100644
--- a/configs/geekbox_defconfig
+++ b/configs/geekbox_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_TARGET_GEEKBOX=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox"
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 5308da9..fe1a8d5 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -8,8 +8,9 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="GoFlexHome> "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index b579826..f26ba40 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig
index 262eef7..6404dd8 100644
--- a/configs/gplugd_defconfig
+++ b/configs/gplugd_defconfig
@@ -7,8 +7,8 @@
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index d90dbe6..1a27fcf 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -12,15 +12,17 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_PART=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 51f7d5b..be2f846 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -8,8 +8,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index cdf3e92..f835bf1 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -32,12 +32,15 @@
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index c5b5232..e48c6e4 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -32,12 +32,15 @@
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 2de3355..936ec62 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -33,12 +33,17 @@
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig
index cdc059a..6330b02 100644
--- a/configs/h2200_defconfig
+++ b/configs/h2200_defconfig
@@ -3,6 +3,8 @@
CONFIG_FIT=y
# CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/ram0 ro console=ttyS0,115200n8"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -17,9 +19,9 @@
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_MEMORY is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index 4077e58..b90eaee 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -10,10 +10,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
index 6df04de..d9bba7c 100644
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@@ -4,19 +4,22 @@
CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_UNZIP=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_K3=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
-CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 10dbb7d..a65fe60 100644
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -15,14 +15,16 @@
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 48456b2..0ef2459 100644
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -14,13 +14,15 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index eb3dfbd..d09f4e8 100644
--- a/configs/hsdk_defconfig
+++ b/configs/hsdk_defconfig
@@ -5,6 +5,10 @@
CONFIG_SYS_CLK_FREQ=1000000000
CONFIG_DEFAULT_DEVICE_TREE="hsdk"
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="hsdk# "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index a0a70b2..73e82bc 100644
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -24,8 +24,8 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 015f7ce..cdef8c6 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -9,8 +9,8 @@
CONFIG_SYS_PROMPT="ib62x0 => "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 554b571..bea86ef 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -8,6 +8,7 @@
CONFIG_SYS_PROMPT="iconnect => "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 85c09f8..3872ae9 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -15,8 +15,10 @@
CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n"
CONFIG_AUTOBOOT_DELAY_STR="ids"
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,6 +29,7 @@
CONFIG_CMD_UBI=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig
index 7f8663e..600434a 100644
--- a/configs/igep0020_defconfig
+++ b/configs/igep0020_defconfig
@@ -16,12 +16,15 @@
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
@@ -36,8 +39,10 @@
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig
index 7719cd6..abf83c2 100644
--- a/configs/igep0030_defconfig
+++ b/configs/igep0030_defconfig
@@ -16,12 +16,15 @@
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
@@ -36,7 +39,9 @@
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig
index 758b795..516fb58 100644
--- a/configs/igep0032_defconfig
+++ b/configs/igep0032_defconfig
@@ -15,12 +15,15 @@
CONFIG_SPL_ONENAND_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_ONENAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
@@ -28,7 +31,9 @@
# CONFIG_CMD_UBIFS is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig
index 4bc558b..e7acb21 100644
--- a/configs/imx31_phycore_eet_defconfig
+++ b/configs/imx31_phycore_eet_defconfig
@@ -6,8 +6,8 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 03c278a..1070f89 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -13,10 +13,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,7 +32,9 @@
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
+CONFIG_PHYLIB=y
CONFIG_FEC_MXC=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig
index d1a2756..090480a 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -24,9 +24,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index 52f691a..86216c8 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -21,10 +21,9 @@
CONFIG_SYS_PROMPT="icorem6qdl> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -37,6 +36,7 @@
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig
index 80205fe..78128a0 100644
--- a/configs/imx6qdl_icore_rqs_defconfig
+++ b/configs/imx6qdl_icore_rqs_defconfig
@@ -22,9 +22,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -39,7 +39,6 @@
# CONFIG_DM_MMC_OPS is not set
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ9021=y
CONFIG_FEC_MXC=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index c956f07..dfeb083 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -22,9 +22,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index 1f0cc60..ed81f61 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -21,10 +21,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -36,6 +35,7 @@
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index 467a18c..318deb6 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -22,8 +22,8 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig
index 4bb75f7..8abfbab 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -22,9 +22,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index fce0b0d..ad11ac3 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -21,10 +21,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -36,6 +35,7 @@
# CONFIG_BLK is not set
CONFIG_SYS_I2C_MXC=y
# CONFIG_DM_MMC_OPS is not set
+CONFIG_NAND=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index e494071..4c290c9 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig
index 0685dca..d103792 100644
--- a/configs/integratorap_cm720t_defconfig
+++ b/configs/integratorap_cm720t_defconfig
@@ -3,11 +3,14 @@
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM720T=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig
index 9c27bdb..ff5ae63 100644
--- a/configs/integratorap_cm920t_defconfig
+++ b/configs/integratorap_cm920t_defconfig
@@ -3,11 +3,14 @@
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM920T=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig
index 77aa6a8..6e00e08 100644
--- a/configs/integratorap_cm926ejs_defconfig
+++ b/configs/integratorap_cm926ejs_defconfig
@@ -3,11 +3,14 @@
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM926EJ_S=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig
index 55bfe3a..68d3a82 100644
--- a/configs/integratorap_cm946es_defconfig
+++ b/configs/integratorap_cm946es_defconfig
@@ -3,11 +3,14 @@
CONFIG_ARCH_INTEGRATOR_AP=y
CONFIG_CM946ES=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Integrator-AP # "
CONFIG_CMD_ARMFLASH=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig
index 1536005..8f315fb 100644
--- a/configs/integratorcp_cm1136_defconfig
+++ b/configs/integratorcp_cm1136_defconfig
@@ -2,6 +2,8 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM1136=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig
index 4e43b4f..47b44f1 100644
--- a/configs/integratorcp_cm920t_defconfig
+++ b/configs/integratorcp_cm920t_defconfig
@@ -2,6 +2,8 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM920T=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig
index 037cd4d..f39f021 100644
--- a/configs/integratorcp_cm926ejs_defconfig
+++ b/configs/integratorcp_cm926ejs_defconfig
@@ -2,6 +2,8 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM926EJ_S=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig
index b19162f..c9c4d98 100644
--- a/configs/integratorcp_cm946es_defconfig
+++ b/configs/integratorcp_cm946es_defconfig
@@ -2,6 +2,8 @@
CONFIG_ARCH_INTEGRATOR=y
CONFIG_ARCH_INTEGRATOR_CP=y
CONFIG_CM946ES=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig
index 4709084..80d9f47 100644
--- a/configs/ipam390_defconfig
+++ b/configs/ipam390_defconfig
@@ -17,9 +17,14 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00180000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 65a5832..b3d860c 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -9,22 +9,24 @@
CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
@@ -36,7 +38,10 @@
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_TEGRA=y
+CONFIG_DM_PMIC=y
CONFIG_PMIC_AS3722=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_AS3722=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA114_SPI=y
CONFIG_USB=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index b3763e4..754c15c 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -22,10 +22,10 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -38,6 +38,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
index b8bd57c..614099b 100644
--- a/configs/k2e_hs_evm_defconfig
+++ b/configs/k2e_hs_evm_defconfig
@@ -11,10 +11,10 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -27,6 +27,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 332c4d1..2b29bf4 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -10,7 +10,6 @@
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_OF_BOARD_SETUP=y
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DTB_RESELECT=y
CONFIG_FIT_EMBED=y
@@ -22,9 +21,9 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -40,6 +39,8 @@
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_REMOTEPROC_TI_POWER=y
CONFIG_DM_SERIAL=y
diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
index 2e2b18c..52c1c63 100644
--- a/configs/k2g_hs_evm_defconfig
+++ b/configs/k2g_hs_evm_defconfig
@@ -5,15 +5,14 @@
CONFIG_TARGET_K2G_EVM=y
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_OF_BOARD_SETUP=y
-CONFIG_ENV_IS_IN_FAT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
CONFIG_CMD_REMOTEPROC=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -28,6 +27,8 @@
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_REMOTEPROC_TI_POWER=y
CONFIG_DM_SERIAL=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 59cd9ef..26f1334 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -22,10 +22,10 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -38,6 +38,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
index a85f029..9fc513e 100644
--- a/configs/k2hk_hs_evm_defconfig
+++ b/configs/k2hk_hs_evm_defconfig
@@ -11,10 +11,10 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -27,6 +27,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index db45fe1..80e6d8b 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -22,10 +22,10 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
# CONFIG_CMD_MMC is not set
CONFIG_CMD_NAND=y
-# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -38,6 +38,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig
index c680bb1..e91f068 100644
--- a/configs/kc1_defconfig
+++ b/configs/kc1_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_OMAP44XX=y
CONFIG_TARGET_KC1=y
# CONFIG_SPL_NAND_SUPPORT is not set
@@ -14,11 +15,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index e3b52b0..52d2980 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index c7d7422..84e5aa7 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 080d649..8dad336 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig
index 564c5ae..c234c81 100644
--- a/configs/kmcoge4_defconfig
+++ b/configs/kmcoge4_defconfig
@@ -18,8 +18,8 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index 25185d6..03b8c14 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -14,6 +14,7 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 5c82421..8347013 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig
index 4b25ade..adeab8f 100644
--- a/configs/kmlion1_defconfig
+++ b/configs/kmlion1_defconfig
@@ -18,8 +18,8 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,7 +33,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_SYS_NS16550=y
CONFIG_FSL_ESPI=y
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 57aa3a8..08850cb 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig
index bf5c1e5..c3b5378 100644
--- a/configs/kmsugp1_defconfig
+++ b/configs/kmsugp1_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig
index 3c44f6b..e9b7a07 100644
--- a/configs/kmsuv31_defconfig
+++ b/configs/kmsuv31_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index 02e78b4..650c96f 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -13,6 +13,7 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index a28326b..0382b24 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index c0faf85..7d91e08 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -1,18 +1,22 @@
CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_KYLIN_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -20,7 +24,6 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
@@ -32,9 +35,11 @@
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_DM_REGULATOR_FIXED=y
+# CONFIG_SPL_DM_SERIAL is not set
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
+CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig
index 0ee7f4b..f620480 100644
--- a/configs/kzm9g_defconfig
+++ b/configs/kzm9g_defconfig
@@ -4,6 +4,8 @@
CONFIG_TARGET_KZM9G=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200"
CONFIG_VERSION_VARIABLE=y
CONFIG_SYS_PROMPT="KZM-A9-GT# "
CONFIG_CMD_BOOTZ=y
@@ -14,5 +16,6 @@
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
# CONFIG_FAT_WRITE is not set
CONFIG_OF_LIBFDT=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index f4c4389..799f80a 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
new file mode 100644
index 0000000..73547f8
--- /dev/null
+++ b/configs/lion-rk3368_defconfig
@@ -0,0 +1,94 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3368=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
+CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
+CONFIG_ENV_IS_IN_MMC=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_SPL=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF_TEXT_BASE=0x10000
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3368=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DEBUG_UART_BASE=0xFF180000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_TPL_TIMER=y
+CONFIG_ROCKCHIP_TIMER=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="rockchip"
diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig
index 2be4819..274855a 100644
--- a/configs/liteboard_defconfig
+++ b/configs/liteboard_defconfig
@@ -17,9 +17,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -28,5 +28,6 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig
index 09110f6..66c7dd3 100644
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -11,12 +11,14 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 15a73fc..ff58a74 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -11,14 +11,17 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -31,7 +34,6 @@
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
-CONFIG_SCSI=y
# CONFIG_BLK is not set
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
index ec6ed37..777a451 100644
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -10,13 +10,16 @@
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig
index 5eb35df..6a15022 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -11,13 +11,16 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index ed8681a..dee0269 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -12,7 +12,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index b1d1fad..1b5da4b 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -16,7 +16,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 07e5cb9..57adc9a 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -14,11 +14,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -31,7 +32,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 00d6368..254ad04 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -15,11 +15,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -32,7 +33,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 2107709..a9d8f56 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -28,11 +28,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -47,7 +48,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -55,6 +58,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 6b5477f..b45e05d 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -15,11 +15,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -32,7 +33,9 @@
CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -40,6 +43,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index a124ab5..65e641f 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -14,11 +14,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -32,7 +33,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 61b0f44..a193993 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -15,11 +15,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -33,7 +34,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index b776ea0..cedf9b5 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -17,12 +17,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -37,7 +37,9 @@
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -48,6 +50,7 @@
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index c36a632..7986470 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -26,11 +26,12 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -45,7 +46,9 @@
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -53,6 +56,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index ae55f00..7924cbd 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -27,12 +27,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -48,7 +48,9 @@
CONFIG_SYS_FSL_DDR3=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -59,6 +61,7 @@
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index cf99770..20f2092 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -3,35 +3,33 @@
CONFIG_SECURE_BOOT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -39,6 +37,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index cdbf5a2..be55cfe 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -2,36 +2,34 @@
CONFIG_TARGET_LS1021ATWR=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -40,6 +38,7 @@
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index bbc73ad..4d06a3f 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -9,17 +9,19 @@
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -32,7 +34,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -41,6 +45,7 @@
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 7fcb1e3..3a5e504 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -10,6 +10,8 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -17,12 +19,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -37,7 +39,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -48,6 +52,7 @@
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index d13652a..e0483e0 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -9,12 +9,15 @@
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_BOOTDELAY=0
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -26,27 +29,22 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -54,6 +52,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index b87a6d3..3074689 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -7,6 +7,7 @@
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -15,6 +16,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -24,27 +27,22 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -52,6 +50,7 @@
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 9ab9e25..0df54d8 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -7,6 +7,7 @@
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
@@ -15,6 +16,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -24,23 +27,16 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
@@ -48,7 +44,9 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
@@ -59,6 +57,7 @@
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 392ebf9..3454ad4 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -6,15 +6,18 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -28,6 +31,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 40dd554..4dbb8e1 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -7,15 +7,18 @@
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -29,6 +32,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index c0b1170..abdacb2 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -14,6 +14,8 @@
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
@@ -23,12 +25,13 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -43,6 +46,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index d5628e7..734b5be 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -6,15 +6,18 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -29,6 +32,7 @@
CONFIG_SYS_FSL_DDR3=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 4ffd150..183dabf 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -8,16 +8,18 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -30,6 +32,7 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index f328dbd..a521ea5 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -14,6 +14,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
@@ -23,12 +25,13 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -43,6 +46,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index af06553..fed5a73 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -14,6 +14,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
@@ -24,12 +26,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -43,6 +45,7 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index d914be2..80ab13b 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -3,27 +3,26 @@
CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 4050737..94e321e 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -2,29 +2,28 @@
CONFIG_TARGET_LS1043ARDB=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 957f2c7..5c8599e 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -14,6 +14,8 @@
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
@@ -23,9 +25,10 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -40,7 +43,9 @@
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index c055097e..a9aa9a2 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -14,6 +14,8 @@
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
@@ -22,9 +24,10 @@
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PXE=y
@@ -39,7 +42,9 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 4e959bf..bdd7ea7 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -9,11 +9,14 @@
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
@@ -21,26 +24,22 @@
CONFIG_SPL_HASH_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 93704f7..8f8bb4b 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -9,37 +9,36 @@
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
-CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PXE=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index cead5af..f2d698c 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -6,15 +6,20 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,6 +30,7 @@
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index ea00690..5b8d20b 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -6,15 +6,20 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -26,6 +31,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 5498c01..288331a 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -7,15 +7,19 @@
CONFIG_SYS_EXTRA_OPTIONS="LPUART"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -27,6 +31,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index a7ae7e5..6fd5359 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -8,6 +8,8 @@
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -15,12 +17,15 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,6 +37,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index 3a3cff6..eb2877d 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -7,16 +7,20 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -27,6 +31,7 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 274f91e..65918c0 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -8,6 +8,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -15,12 +17,15 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +38,7 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index fd916a5..853b5ea 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -8,6 +8,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -16,12 +18,14 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +37,7 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 5fac89b..5a0bc4a 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -8,6 +8,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -15,9 +17,12 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -29,7 +34,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index de14dc1..cd45df0 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -4,26 +4,28 @@
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index f4ff5d6..9be3458 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -3,28 +3,30 @@
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
-CONFIG_HUSH_PARSER=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 5162c2c..dbdae33 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -3,34 +3,36 @@
CONFIG_SECURE_BOOT=y
CONFIG_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
CONFIG_SPL_CRYPTO_SUPPORT=y
CONFIG_SPL_HASH_SUPPORT=y
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index 904116c..666b892 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -3,34 +3,36 @@
CONFIG_FSL_LS_PPA=y
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig
index 04e6433..89169b4 100644
--- a/configs/ls2080a_emu_defconfig
+++ b/configs/ls2080a_emu_defconfig
@@ -8,6 +8,8 @@
CONFIG_SYS_EXTRA_OPTIONS="EMU"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
@@ -15,9 +17,9 @@
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig
index 6b2f3fb..604f64e 100644
--- a/configs/ls2080a_simu_defconfig
+++ b/configs/ls2080a_simu_defconfig
@@ -8,6 +8,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SIMU"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
@@ -15,10 +17,11 @@
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 617c522..c80a837 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -8,12 +8,16 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -24,7 +28,9 @@
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index c176589..39e1522 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -8,12 +8,16 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -25,7 +29,9 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index b8c6e6a..b8e16b2 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -10,10 +10,11 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
@@ -21,9 +22,11 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -35,8 +38,11 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_NAND=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 8277a3b..9f5b8ad 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -9,12 +9,16 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -26,7 +30,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 64682b0..d59fa6f 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -14,6 +14,8 @@
CONFIG_SD_BOOT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
@@ -21,9 +23,11 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -33,7 +37,9 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 70839e6..4a462ce 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -8,12 +8,16 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -23,7 +27,9 @@
CONFIG_DM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index 0689a40..3a66f84 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -8,12 +8,16 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -24,7 +28,9 @@
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index c4a56be..ac2ab22 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -10,10 +10,11 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_NAND_BOOT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
@@ -21,8 +22,10 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -32,7 +35,10 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index 7fcfdd4..5532d8d 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -10,12 +10,15 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -24,7 +27,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 3a02233..fddcba0 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -10,12 +10,15 @@
CONFIG_QSPI_BOOT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -24,7 +27,9 @@
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 8a645a0..704cb71 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -5,14 +5,16 @@
CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 1c9dc80..9ddec4f 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -7,12 +7,14 @@
CONFIG_API=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index 5fc5dd3..5edf2ac 100644
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -8,6 +8,8 @@
CONFIG_FIT=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
@@ -20,11 +22,13 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 4d35673..a3d86f5 100644
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -12,6 +12,8 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aries/m53evk/imximage.cfg"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc1,115200"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
@@ -22,10 +24,12 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -36,6 +40,8 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_VIDEO_SW_CURSOR is not set
diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index c18f759..6449318 100644
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -11,6 +11,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS3,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -21,14 +23,14 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
-# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index a342bec..9a4ef27 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -6,10 +6,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -20,3 +21,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index ac56046..1d076d4 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -7,10 +7,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -21,3 +22,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index e4e21d0..6c7034e 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -5,10 +5,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -19,3 +20,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 0b9f665..c19f925 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -6,10 +6,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
# CONFIG_AUTOBOOT is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -20,3 +21,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
CONFIG_SYS_NS16550=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
index 080815d..f329635 100644
--- a/configs/marsboard_defconfig
+++ b/configs/marsboard_defconfig
@@ -11,16 +11,17 @@
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 81d6c92..131d5e1 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -16,9 +16,9 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -32,6 +32,8 @@
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 449804b..2e23e54 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -14,11 +14,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,6 +34,10 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 653f258..587a23b 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -15,11 +15,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +35,10 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index 5a9d7cc..d46ed4c 100644
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
# CONFIG_SPL_GPIO_SUPPORT is not set
CONFIG_TARGET_MCX=y
CONFIG_VIDEO=y
@@ -15,11 +16,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,6 +34,7 @@
CONFIG_CMD_JFFS2=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index 28fad94..d52aeab 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -11,10 +11,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 146838e..d327ed9 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -1,19 +1,37 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index e7cb977..db5bf60 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_MEESC=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
@@ -10,10 +12,27 @@
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig
index 669f9dd..60e017b 100644
--- a/configs/mgcoge3un_defconfig
+++ b/configs/mgcoge3un_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 3d84cf2..953801e 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -12,6 +12,8 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=romfs"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL=y
CONFIG_SPL_BOARD_INIT=y
@@ -21,8 +23,10 @@
CONFIG_SYS_OS_BASE=0x2c060000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot-mONStR> "
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVES=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -33,9 +37,12 @@
# CONFIG_CMD_UBIFS is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
+CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NETCONSOLE=y
CONFIG_SPL_DM=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_XILINX_AXIEMAC=y
CONFIG_XILINX_EMACLITE=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 81e8253..ad97ad0 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -4,8 +4,6 @@
CONFIG_TARGET_MINNOWMAX=y
CONFIG_INTERNAL_UART=y
CONFIG_DEBUG_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
@@ -17,19 +15,20 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_ARCH_MISC_INIT=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -44,36 +43,14 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_RTL8169=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index a7c796d..78d460c 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
@@ -13,13 +13,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index 0dcdd3b..deee406 100644
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -7,11 +7,13 @@
CONFIG_BOOTDELAY=5
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/mpr2_defconfig b/configs/mpr2_defconfig
index ea33237..8dd63ab 100644
--- a/configs/mpr2_defconfig
+++ b/configs/mpr2_defconfig
@@ -1,5 +1,7 @@
CONFIG_SH=y
CONFIG_TARGET_MPR2=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
@@ -11,9 +13,9 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -23,4 +25,5 @@
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ms7720se_defconfig b/configs/ms7720se_defconfig
index 30e5269..24c0598 100644
--- a/configs/ms7720se_defconfig
+++ b/configs/ms7720se_defconfig
@@ -1,5 +1,7 @@
CONFIG_SH=y
CONFIG_TARGET_MS7720SE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
@@ -11,10 +13,12 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCMCIA=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -26,4 +30,5 @@
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig
index 633a087..4c46c35 100644
--- a/configs/ms7722se_defconfig
+++ b/configs/ms7722se_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_MS7722SE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,9 +14,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -23,4 +26,5 @@
# CONFIG_CMD_MISC is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig
index 9fabcd9..8cc895e 100644
--- a/configs/ms7750se_defconfig
+++ b/configs/ms7750se_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_MS7750SE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,38400"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -12,9 +14,9 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_MEMORY is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -24,4 +26,5 @@
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index ef7d153..c4bad66 100644
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_MT_VENTOUX=y
CONFIG_VIDEO=y
CONFIG_ENV_IS_IN_NAND=y
@@ -14,11 +15,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -29,6 +31,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index f0b196a..faa87b1 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -14,14 +14,14 @@
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -51,6 +51,7 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_37XX=y
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index 7f4ee05..3ca4c56 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -16,13 +16,14 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -50,6 +51,7 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MARVELL=y
+CONFIG_PHY_GIGE=y
CONFIG_MVPP2=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index beaa1cf..bfcb2de 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -14,13 +14,13 @@
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -49,6 +49,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_MVEBU_COMPHY_SUPPORT=y
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DEBUG_MVEBU_A3700_UART=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index b533f73..00c47b2 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -16,14 +16,15 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -54,6 +55,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_PCIE_DW_MVEBU=y
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index 169cd6a..66cb3e2 100644
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -13,9 +13,9 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index c70035d..5b54cad 100644
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -17,9 +17,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index 4f3516f..08840e8 100644
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -8,8 +8,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index 4945947..48d62fd 100644
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -18,11 +18,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index b85b8b5..a3220de 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -18,11 +18,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 43d7599..b2ad223 100644
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -17,11 +17,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 80b9ad2..c861da7 100644
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -17,11 +17,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index 5b8523a..5fd9f12 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index 11bc00c..82c6212 100644
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -6,9 +6,10 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 2ea2e67..1ba68aa 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -12,10 +12,10 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_FUSE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_FUSE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 1a70cb2..bda59d6 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -9,8 +9,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index 23cc9d9..5c273f7 100644
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -6,8 +6,8 @@
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index d920aad..0967d14 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -14,8 +14,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index 636bfa6..f5e6a33 100644
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -7,8 +7,8 @@
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index f0b6679..820364a 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -21,14 +21,15 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_DM=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig
index 4a6d98b..a7cd16c 100644
--- a/configs/mx6dlarm2_defconfig
+++ b/configs/mx6dlarm2_defconfig
@@ -10,9 +10,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig
index cae9678..42f5196 100644
--- a/configs/mx6dlarm2_lpddr2_defconfig
+++ b/configs/mx6dlarm2_lpddr2_defconfig
@@ -10,9 +10,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig
index 851359d..cadd612 100644
--- a/configs/mx6qarm2_defconfig
+++ b/configs/mx6qarm2_defconfig
@@ -10,9 +10,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig
index 3f00ffa..b624244 100644
--- a/configs/mx6qarm2_lpddr2_defconfig
+++ b/configs/mx6qarm2_lpddr2_defconfig
@@ -10,9 +10,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 47c2b15..378493b 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -14,13 +14,13 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +35,10 @@
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 27577d6..64062be 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -21,14 +21,16 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -42,6 +44,7 @@
CONFIG_DFU_SF=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 627bf52..7949c5e 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -22,13 +22,16 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -40,6 +43,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_PCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 5676da1..ee27daa 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -11,11 +11,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,6 +35,7 @@
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index 9260677..354eae3 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -12,11 +12,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,6 +36,7 @@
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index a241ade..f70a839 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -19,11 +19,11 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -36,6 +36,7 @@
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig
index f60e2f9..916fa091 100644
--- a/configs/mx6sllevk_defconfig
+++ b/configs/mx6sllevk_defconfig
@@ -11,10 +11,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig
index 85e3341..12f8657 100644
--- a/configs/mx6sllevk_plugin_defconfig
+++ b/configs/mx6sllevk_plugin_defconfig
@@ -12,10 +12,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index f9c2af9..a8144fe 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -9,11 +9,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -36,6 +38,7 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 2522eb7..2f0c45d 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -11,10 +11,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -29,6 +30,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
+CONFIG_PHYLIB=y
CONFIG_PCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index 90daa96..169eb73 100644
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -21,10 +21,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,6 +39,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_PCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index 87419cd..f4b95f3 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -22,11 +22,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@@ -39,6 +39,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index c58f6dc..dfb029f 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -22,11 +22,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@@ -39,6 +39,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig
index 133cda7..2c03f8c 100644
--- a/configs/mx6ull_14x14_evk_defconfig
+++ b/configs/mx6ull_14x14_evk_defconfig
@@ -10,9 +10,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig
index 9349155..1a5bbb6 100644
--- a/configs/mx6ull_14x14_evk_plugin_defconfig
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -11,9 +11,9 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index dfe55ac..7c99420 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -20,12 +20,12 @@
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -48,6 +48,7 @@
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
+CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig
index c678e75..ea087d2 100644
--- a/configs/mx7dsabresd_secure_defconfig
+++ b/configs/mx7dsabresd_secure_defconfig
@@ -21,13 +21,13 @@
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -50,6 +50,7 @@
# CONFIG_DM_MMC_OPS is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
+CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig
index bbd5ca9..5918f3c 100644
--- a/configs/mx7ulp_evk_defconfig
+++ b/configs/mx7ulp_evk_defconfig
@@ -5,9 +5,9 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig
index bbd5ca9..5918f3c 100644
--- a/configs/mx7ulp_evk_plugin_defconfig
+++ b/configs/mx7ulp_evk_plugin_defconfig
@@ -5,9 +5,9 @@
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_HUSH_PARSER=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_DM=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index 111207d..19bd043 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -8,8 +8,9 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nas220> "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index 8135b86..362875b 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="2big2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index e353794..9eb2f3c 100644
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -23,9 +23,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 9020a36..1d14f24a 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 741b4a5..aec12f4 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 569e016..864fdf5 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 64a83a4..f028fef 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -5,16 +5,18 @@
CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
+CONFIG_CMD_IDE=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 9b8914b..76945e0 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +33,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 21a8f3a..e4ca549 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +33,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 5c11254..0449c9e 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -14,13 +14,13 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,6 +34,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 33c9cdb..96e3562 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -14,13 +14,13 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -34,6 +34,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 944afc5..c326ba9 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +33,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index e8c1968..a56aa82 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,6 +33,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index eb47bc1..4a7f965 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_NOKIA_RX51=y
CONFIG_VIDEO=y
CONFIG_ENV_IS_NOWHERE=y
@@ -15,10 +16,10 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
@@ -27,5 +28,6 @@
CONFIG_CMD_FAT=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_CFB_CONSOLE_ANSI=y
# CONFIG_VGA_AS_SINGLE_DEVICE is not set
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 23c186b..d6717a1 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -16,6 +16,8 @@
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc1,115200 "
CONFIG_VERSION_VARIABLE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
@@ -25,15 +27,20 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_PCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 276df2f..ad9880e 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -8,8 +8,8 @@
CONFIG_SYS_PROMPT="nsa310s => "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig
index fabae32..59aabfb 100644
--- a/configs/nsim_700_defconfig
+++ b/configs/nsim_700_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig
index 021735f..dc54a04 100644
--- a/configs/nsim_700be_defconfig
+++ b/configs/nsim_700be_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig
index db17239..5a9ef36 100644
--- a/configs/nsim_hs38_defconfig
+++ b/configs/nsim_hs38_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig
index 8ffbb85..7d62206 100644
--- a/configs/nsim_hs38be_defconfig
+++ b/configs/nsim_hs38be_defconfig
@@ -7,6 +7,8 @@
CONFIG_DEFAULT_DEVICE_TREE="nsim"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyARC0,115200n8"
CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 8183856..c8cad61 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -15,16 +15,16 @@
CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
@@ -38,6 +38,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIVE=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
@@ -50,6 +51,7 @@
CONFIG_DM_PMIC=y
CONFIG_PMIC_AS3722=y
CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_AS3722=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_TEGRA=y
CONFIG_DEBUG_UART_BASE=0x70006000
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 121dcf2..214545e 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -11,10 +11,10 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MMC=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index ffcecd5..7aadc44 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -12,12 +12,13 @@
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_PROMPT="ODROID-XU3 # "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index 22e86e2..9c00245 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -6,6 +6,8 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
@@ -13,15 +15,16 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index 72a4ef1..c97dfed 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -1,8 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_OMAP3_BEAGLE=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -10,13 +10,16 @@
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
@@ -33,7 +36,9 @@
CONFIG_LED_STATUS_GREEN=2
CONFIG_LED_STATUS_CMD=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index d7bbf2d..a07ea0fd5 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,31 +1,63 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
# CONFIG_SPL_EXT_SUPPORT is not set
-CONFIG_HUSH_PARSER=y
+CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SYS_PROMPT="OMAP3_EVM # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FAT_WRITE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index c51309c..5c019a3 100644
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_TAO3530=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA"
CONFIG_ENV_IS_IN_NAND=y
@@ -11,10 +12,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -24,6 +26,7 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 58b5ecd..cff886a 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -5,7 +5,7 @@
CONFIG_TARGET_OMAP3_LOGIC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit"
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
+# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -18,10 +18,14 @@
CONFIG_SYS_PROMPT="OMAP Logic # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_USB is not set
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+# CONFIG_CMD_USB is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
@@ -31,7 +35,9 @@
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP36XX_PINS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig
index be2447b..fbc0553 100644
--- a/configs/omap3_overo_defconfig
+++ b/configs/omap3_overo_defconfig
@@ -16,15 +16,18 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -40,7 +43,9 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig
index 466564b..f5aa8e6 100644
--- a/configs/omap3_pandora_defconfig
+++ b/configs/omap3_pandora_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_OMAP3_PANDORA=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_NAND=y
@@ -11,11 +12,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
@@ -23,6 +25,8 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig
index bf1ef98..20bbfeb 100644
--- a/configs/omap3_zoom1_defconfig
+++ b/configs/omap3_zoom1_defconfig
@@ -11,12 +11,14 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,6 +32,8 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index 22fe337..3d4f0cb 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -5,6 +5,8 @@
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
@@ -13,20 +15,21 @@
# CONFIG_SPL_I2C_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 04198e5..218cf35 100644
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -16,15 +16,16 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig
index 635bdf7..343125a 100644
--- a/configs/omap5_uevm_defconfig
+++ b/configs/omap5_uevm_defconfig
@@ -13,16 +13,17 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,9 +36,11 @@
CONFIG_ISO_PARTITION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_CMD_TCA642X=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_DWC3=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 282725f..6323b07 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -22,10 +22,12 @@
# CONFIG_CMD_EEPROM is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DIAG=y
CONFIG_CMD_UBI=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
CONFIG_SPI_FLASH=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 10fcec6..ccd9a50 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -8,9 +8,10 @@
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 7faa43d..d74bc77 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -8,9 +8,10 @@
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 185173e..4bfc524 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -8,9 +8,10 @@
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index b9dab54..f4511af2 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -12,6 +12,8 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttymxc0,115200"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
@@ -30,14 +32,14 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 573c9e2..298e7a4 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -12,12 +12,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig
index 3ae27da..41ec12d 100644
--- a/configs/ot1200_defconfig
+++ b/configs/ot1200_defconfig
@@ -10,11 +10,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -25,11 +25,13 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DM=y
+CONFIG_CMD_PCA953X=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
index 50be468..3d3f6b6 100644
--- a/configs/ot1200_spl_defconfig
+++ b/configs/ot1200_spl_defconfig
@@ -18,11 +18,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -33,11 +33,13 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DM=y
+CONFIG_CMD_PCA953X=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index 0dbcef9..277f302 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -9,16 +9,16 @@
CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index d04f052..9d143c9 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -9,19 +9,21 @@
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_LIVE=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index a268f38..c8270c7 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -9,16 +9,16 @@
CONFIG_SYS_PROMPT="Tegra210 (P2571) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig
index edf6ce4..c55fd65 100644
--- a/configs/p2771-0000-000_defconfig
+++ b/configs/p2771-0000-000_defconfig
@@ -9,13 +9,14 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig
index c3870c3..193d178 100644
--- a/configs/p2771-0000-500_defconfig
+++ b/configs/p2771-0000-500_defconfig
@@ -9,13 +9,14 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index d0c2b72..c309a69 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -10,10 +10,10 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/pb1000_defconfig b/configs/pb1000_defconfig
index a9c5ede..4514038 100644
--- a/configs/pb1000_defconfig
+++ b/configs/pb1000_defconfig
@@ -7,10 +7,10 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index 6571876..e468de6 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -28,16 +28,17 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -52,7 +53,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index a622359..432c7fd 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -28,16 +28,17 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -52,7 +53,9 @@
CONFIG_MMC_OMAP_HS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 42ef626..05f88f6 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -12,9 +12,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -27,5 +28,7 @@
CONFIG_VYBRID_GPIO=y
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index dc3fed7..e1881f6 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -25,10 +25,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -47,5 +49,9 @@
CONFIG_MTD=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_DM_THERMAL=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index b84c3de..f22bb49 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -12,12 +12,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="Peach-Pi # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index a0f443e..082ba33 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -12,12 +12,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="Peach-Pit # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index f94f0f9..46add36 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -29,15 +29,18 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x240000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -52,7 +55,10 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig
index 106be0d..a1c3565 100644
--- a/configs/pepper_defconfig
+++ b/configs/pepper_defconfig
@@ -23,11 +23,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -40,6 +40,11 @@
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig
index 1729e5e..bcd83ed 100644
--- a/configs/pfla02_defconfig
+++ b/configs/pfla02_defconfig
@@ -24,10 +24,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -46,5 +46,10 @@
CONFIG_MTD=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
+CONFIG_FEC_MXC=y
CONFIG_DM_THERMAL=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 618d983..70dc3f7 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
@@ -16,13 +16,13 @@
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index 5d08a33..a9ba13f 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -11,14 +11,14 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SAVEENV is not set
CONFIG_LOOPW=y
-CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_RARP=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index f19b2fe..f42f895 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -11,12 +11,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -27,6 +27,8 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_MMC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index f011b5c..114c397 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -9,12 +9,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
@@ -22,6 +22,7 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MXC_USB_OTG_HACTIVE=y
diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig
index 326158d..25bd4d4 100644
--- a/configs/picosam9g45_defconfig
+++ b/configs/picosam9g45_defconfig
@@ -12,6 +12,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -23,11 +25,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -36,5 +38,4 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index d39d686..3a31f46 100644
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -22,10 +22,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,6 +40,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index 356c6ed..81f0cb6 100644
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -22,10 +22,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -38,6 +40,10 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index a9d7625..a5b970f 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -12,10 +12,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index 4c35f41..8db19a5 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PM9261=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -12,15 +16,33 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 01baaa1..ce49404 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -1,9 +1,13 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_PM9263=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -11,16 +15,32 @@
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_JFFS2=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_LCD=y
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index 4e52c7b..658c336 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="fbcon=rotate:3 console=tty0 console=ttyS0,115200 root=/dev/mtdblock4 mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,1664k(env),2M(linux)ro,-(root) rw rootfstype=jffs2"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -11,8 +13,9 @@
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index 09a65f7..aae0a61 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -8,6 +8,7 @@
CONFIG_SYS_PROMPT="PogoE02> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index cfa2205..1ad1852 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
@@ -14,13 +14,13 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index d74a954..c6d3644 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig
index e98ac23..e027f6d 100644
--- a/configs/portl2_defconfig
+++ b/configs/portl2_defconfig
@@ -15,8 +15,9 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 67d1615..366f2a9 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -24,10 +24,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_BMP=y
@@ -54,7 +54,6 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ9031=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index ac2d4bb..523e49b 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -34,13 +35,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -55,11 +57,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index f905f35..c48b22e 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -11,10 +11,12 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_PCI=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
# CONFIG_CMD_HASH is not set
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index fc1c70d..3f7bbe4 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -5,7 +5,6 @@
CONFIG_MAX_CPUS=2
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_X86_RUN_64BIT=y
CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
@@ -19,9 +18,9 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_CPU_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
@@ -29,13 +28,13 @@
CONFIG_SPL_PCI_SUPPORT=y
CONFIG_SPL_PCH_SUPPORT=y
CONFIG_SPL_RTC_SUPPORT=y
-CONFIG_SPL_TIMER_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -51,7 +50,6 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
@@ -59,25 +57,11 @@
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_CPU=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
+CONFIG_SPL_TIMER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_111=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 26e5687..aba7f1e 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -8,15 +8,16 @@
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -35,27 +36,12 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
+CONFIG_NVME=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_111=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/qemu-x86_efi_payload32_defconfig b/configs/qemu-x86_efi_payload32_defconfig
index ba5c009..5c0f129 100644
--- a/configs/qemu-x86_efi_payload32_defconfig
+++ b/configs/qemu-x86_efi_payload32_defconfig
@@ -5,15 +5,16 @@
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -32,29 +33,13 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_111=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_EFI=y
CONFIG_EFI_STUB=y
diff --git a/configs/qemu-x86_efi_payload64_defconfig b/configs/qemu-x86_efi_payload64_defconfig
index 796c3c1..8a2e243 100644
--- a/configs/qemu-x86_efi_payload64_defconfig
+++ b/configs/qemu-x86_efi_payload64_defconfig
@@ -5,16 +5,17 @@
CONFIG_FIT=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
-CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -33,30 +34,14 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_111=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_EFI=y
CONFIG_EFI_STUB=y
CONFIG_EFI_STUB_64BIT=y
diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig
index 6835cf1..4262934 100644
--- a/configs/qemu_mips64_defconfig
+++ b/configs/qemu_mips64_defconfig
@@ -16,3 +16,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig
index 60bd616..6027835 100644
--- a/configs/qemu_mips64el_defconfig
+++ b/configs/qemu_mips64el_defconfig
@@ -17,3 +17,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig
index c6f08b4..cedb906 100644
--- a/configs/qemu_mips_defconfig
+++ b/configs/qemu_mips_defconfig
@@ -14,3 +14,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig
index b8c2069..5bb84da 100644
--- a/configs/qemu_mipsel_defconfig
+++ b/configs/qemu_mipsel_defconfig
@@ -15,3 +15,4 @@
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_LZMA=y
+CONFIG_ENV_IS_IN_FLASH=y
diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig
index a6f6a93..bf88dd7 100644
--- a/configs/r0p7734_defconfig
+++ b/configs/r0p7734_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_R0P7734=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC3,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,9 +14,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -23,4 +26,6 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 32a1272..9bd36dd 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -2,7 +2,10 @@
CONFIG_TARGET_R2DPLUS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_CMD_IDE=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -12,4 +15,5 @@
CONFIG_NETDEVICES=y
CONFIG_RTL8139=y
CONFIG_PCI=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig
index c5fa3f3..e4b8fb4 100644
--- a/configs/r7780mp_defconfig
+++ b/configs/r7780mp_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_R7780MP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -11,10 +13,12 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -25,4 +29,5 @@
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig
index c95dc4c..f517e0e 100644
--- a/configs/r8a7795_salvator-x_defconfig
+++ b/configs/r8a7795_salvator-x_defconfig
@@ -3,21 +3,31 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SALVATOR_X=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x"
+CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig
new file mode 100644
index 0000000..8b6b03b
--- /dev/null
+++ b/configs/r8a7795_ulcb_defconfig
@@ -0,0 +1,30 @@
+CONFIG_ARM=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_RCAR_GEN3=y
+CONFIG_TARGET_ULCB=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
+CONFIG_VERSION_VARIABLE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_SH_SDHI=y
+CONFIG_DM_ETH=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig
index 53ad5a8..247f878 100644
--- a/configs/r8a7796_salvator-x_defconfig
+++ b/configs/r8a7796_salvator-x_defconfig
@@ -4,21 +4,31 @@
CONFIG_RCAR_GEN3=y
CONFIG_R8A7796=y
CONFIG_TARGET_SALVATOR_X=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a7796-salvator-x"
+CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
CONFIG_SH_SDHI=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig
new file mode 100644
index 0000000..bc995de
--- /dev/null
+++ b/configs/r8a7796_ulcb_defconfig
@@ -0,0 +1,31 @@
+CONFIG_ARM=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_RCAR_GEN3=y
+CONFIG_R8A7796=y
+CONFIG_TARGET_ULCB=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a7796-m3ulcb"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
+CONFIG_VERSION_VARIABLE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_SH_SDHI=y
+CONFIG_DM_ETH=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index cc40f91..10b9e99 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -31,13 +32,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -51,11 +53,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index fb9e9b0..4d5ae95 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -11,16 +11,17 @@
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index cca855c..fba7fba 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
@@ -13,12 +13,12 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 2ad6a6c..5fd8021 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -4,7 +4,8 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3188=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK=y
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
@@ -14,10 +15,10 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -49,5 +50,6 @@
CONFIG_SYS_NS16550=y
CONFIG_SYSRESET=y
CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index a6f3cd7..63d1e40 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -4,15 +4,17 @@
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 1cbbb2c..343cb19 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -5,15 +5,17 @@
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 80e6681..6c9f2e3 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -5,15 +5,17 @@
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 5d344fd..6b3cec5 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -4,15 +4,17 @@
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_ENV_FAT_INTERFACE="mmc"
+CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_BCM2835=y
diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig
index 1aeb78a..1aa4676 100644
--- a/configs/rsk7203_defconfig
+++ b/configs/rsk7203_defconfig
@@ -1,5 +1,7 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7203=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
@@ -11,9 +13,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -22,4 +25,5 @@
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig
index b07e48c..9a1db16 100644
--- a/configs/rsk7264_defconfig
+++ b/configs/rsk7264_defconfig
@@ -1,6 +1,9 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7264=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC3,115200"
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig
index ed4fe21..4a78cb6 100644
--- a/configs/rsk7269_defconfig
+++ b/configs/rsk7269_defconfig
@@ -1,6 +1,9 @@
CONFIG_SH=y
CONFIG_TARGET_RSK7269=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC7,115200"
# CONFIG_CMD_SETEXPR is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 9220458..4a00178 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -35,13 +36,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -56,11 +58,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig
index be4b716..e227152 100644
--- a/configs/s32v234evb_defconfig
+++ b/configs/s32v234evb_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_MALLOC_F=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyLF0 root=/dev/ram rw"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_CMD_BOOTZ=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index 9c66a18..90f815d 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -3,18 +3,22 @@
CONFIG_TARGET_S5P_GONI=y
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Goni # "
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_DFU=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index 021e6c5..16352ad 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -3,6 +3,8 @@
CONFIG_ARCH_EXYNOS4=y
CONFIG_TARGET_S5PC210_UNIVERSAL=y
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
@@ -10,13 +12,14 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index 8b5d7f4..a482f8f 100644
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -24,9 +24,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig
index cb69022..817d6ae 100644
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -9,14 +9,18 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig
index c588e6b..5ac759e 100644
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -10,14 +10,18 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_SF=y
CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index e9a65cc..2bfd61b 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -23,13 +25,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
@@ -75,4 +77,3 @@
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 8b9c0cc..07fb71b 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -15,19 +15,21 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index d99baad..6cc9bb6 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -8,6 +8,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -15,10 +17,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -50,4 +54,3 @@
CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index 4307f3a..6c24a0d 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -8,6 +8,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -15,10 +17,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 53bab32..168bf19 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -8,6 +8,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -15,10 +17,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index acd7499..e8a9ee9 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -23,11 +25,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -66,4 +70,3 @@
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index af8d1ef..f3c338c 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -14,17 +14,21 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 1836e53..32b4c42 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -24,11 +26,13 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -75,4 +79,3 @@
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index c1860bd..c1ddfd0 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -14,6 +14,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -21,11 +23,13 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 41bf96c..823cdcc 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -15,18 +15,22 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 094e5e1..09da2e0 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_SPL_SEPARATE_BSS=y
@@ -23,12 +25,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
@@ -57,7 +60,7 @@
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
-CONFIG_DEBUG_UART_CLOCK=88000000
+CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
@@ -69,4 +72,3 @@
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index a096aa9..5ac5d08 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -14,18 +14,21 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
@@ -54,7 +57,7 @@
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
-CONFIG_DEBUG_UART_CLOCK=88000000
+CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index bd884b7..131d0e5 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -15,18 +15,21 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
@@ -56,7 +59,7 @@
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ATMEL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
-CONFIG_DEBUG_UART_CLOCK=88000000
+CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index a3909a0..395a017 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
CONFIG_ENV_IS_IN_FAT=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -25,12 +27,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
@@ -73,4 +76,3 @@
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
-CONFIG_FAT_WRITE=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index c3d076e..9eab7f7 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -14,6 +14,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -22,12 +24,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 7c6c8f2..f25ca9c 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -15,18 +15,21 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index fd0b952..070262f 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -26,20 +26,22 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
@@ -61,6 +63,7 @@
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
CONFIG_MAC_PARTITION=y
CONFIG_AMIGA_PARTITION=y
CONFIG_OF_CONTROL=y
@@ -68,9 +71,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 3d21662..1eecf1e 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -22,19 +22,20 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
@@ -58,9 +59,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 0b82439..612aed5 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -24,21 +24,22 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
@@ -72,9 +73,7 @@
CONFIG_OF_HOSTFILE=y
CONFIG_NETCONSOLE=y
CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
CONFIG_DEVRES=y
CONFIG_DEBUG_DEVRES=y
CONFIG_ADC=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 09e078e..d1ccdfe 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -33,20 +33,21 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ENV_CALLBACK=y
CONFIG_CMD_ENV_FLAGS=y
-CONFIG_CMD_MD5SUM=y
CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MX_CYCLIC=y
-CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DEMO=y
-CONFIG_CMD_IDE=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTPSRV=y
CONFIG_CMD_RARP=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index 0da8d52..5de4e16 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -7,6 +7,8 @@
CONFIG_VIDEO=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
@@ -18,9 +20,9 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index a79908a..2f09918 100644
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -7,10 +7,12 @@
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index 0d43ba4..880f6da 100644
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -7,10 +7,12 @@
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index 5dd1603..7795518 100644
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -11,6 +11,7 @@
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig
index 6348f7d..21d172d 100644
--- a/configs/sbc8548_PCI_33_PCIE_defconfig
+++ b/configs/sbc8548_PCI_33_PCIE_defconfig
@@ -10,6 +10,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,5 +18,6 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig
index acb3092..ac4a37b 100644
--- a/configs/sbc8548_PCI_33_defconfig
+++ b/configs/sbc8548_PCI_33_defconfig
@@ -10,6 +10,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,5 +18,6 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig
index 195d472..826d888 100644
--- a/configs/sbc8548_PCI_66_PCIE_defconfig
+++ b/configs/sbc8548_PCI_66_PCIE_defconfig
@@ -10,6 +10,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,5 +18,6 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig
index c107213..77ec0c8 100644
--- a/configs/sbc8548_PCI_66_defconfig
+++ b/configs/sbc8548_PCI_66_defconfig
@@ -10,6 +10,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -17,5 +18,6 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig
index 185825e..c31ee2e 100644
--- a/configs/sbc8548_defconfig
+++ b/configs/sbc8548_defconfig
@@ -16,6 +16,7 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
# CONFIG_PCI is not set
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig
index 200500f..6bb2ed6 100644
--- a/configs/sbc8641d_defconfig
+++ b/configs/sbc8641d_defconfig
@@ -7,10 +7,12 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_DOS_PARTITION=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig
index 4320421..3abed05 100644
--- a/configs/sc_sps_1_defconfig
+++ b/configs/sc_sps_1_defconfig
@@ -6,6 +6,8 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
@@ -14,9 +16,9 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -24,6 +26,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MMC_MXS=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 2196d31..2a3360e 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -9,11 +9,12 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig
index f06f322..be321c6 100644
--- a/configs/secomx6quq7_defconfig
+++ b/configs/secomx6quq7_defconfig
@@ -12,8 +12,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -23,4 +23,8 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index 537fee7..37a85cc 100644
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -25,8 +25,8 @@
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_MISC is not set
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index 1271ea0..71512eb 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -3,6 +3,8 @@
CONFIG_TARGET_SH7752EVB=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -13,11 +15,12 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -32,4 +35,6 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 06a95bc..d2085c1 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_SH7753EVB=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,11 +14,12 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -31,4 +34,6 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index 09ed1b3..fda7cb1 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -3,6 +3,8 @@
CONFIG_TARGET_SH7757LCR=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -13,11 +15,12 @@
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MD5SUM=y
-# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -31,4 +34,6 @@
CONFIG_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig
index 9334f6b..1e96c98 100644
--- a/configs/sh7763rdp_defconfig
+++ b/configs/sh7763rdp_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_SH7763RDP=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC2,115200 root=1f01"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,9 +14,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -24,4 +27,6 @@
# CONFIG_CMD_MISC is not set
CONFIG_CMD_JFFS2=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig
index 59e6067..aea5dae 100644
--- a/configs/sh7785lcr_32bit_defconfig
+++ b/configs/sh7785lcr_32bit_defconfig
@@ -3,6 +3,8 @@
CONFIG_TARGET_SH7785LCR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -12,10 +14,12 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -27,6 +31,7 @@
CONFIG_MAC_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig
index cf9c305..a7b4171 100644
--- a/configs/sh7785lcr_defconfig
+++ b/configs/sh7785lcr_defconfig
@@ -2,6 +2,8 @@
CONFIG_TARGET_SH7785LCR=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC1,115200 root=/dev/nfs ip=dhcp"
CONFIG_VERSION_VARIABLE=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
@@ -11,10 +13,12 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -26,6 +30,7 @@
CONFIG_MAC_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_PCI=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index be00fad..da6b93a 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_ROCKCHIP_RK3368=y
CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
CONFIG_DEBUG_UART=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 95a9ec5..6a92b44 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -8,8 +8,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_IDE=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig
index dffff11..0c5fe39 100644
--- a/configs/shmin_defconfig
+++ b/configs/shmin_defconfig
@@ -1,5 +1,7 @@
CONFIG_SH=y
CONFIG_TARGET_SHMIN=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_VERSION_VARIABLE=y
# CONFIG_AUTOBOOT is not set
# CONFIG_CMD_BDI is not set
@@ -11,9 +13,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SDRAM=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -21,4 +24,5 @@
CONFIG_CMD_PING=y
# CONFIG_CMD_MISC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index cf20114..be0e9a2 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index b111cf7..22d9b56 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -10,6 +10,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_ENV_IS_IN_NAND=y
@@ -24,10 +25,11 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -40,6 +42,7 @@
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index 356600f..15bc524 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -15,12 +15,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="SMDK5250 # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index 6a2ea20..23219ab 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -13,12 +13,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="SMDK5420 # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index ef8510d..76cefed 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -5,10 +5,13 @@
CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
CONFIG_ENV_IS_IN_ONENAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SMDKC100 # "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index 5e9f181..ae37498 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -9,10 +9,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_MII=y
diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index 468267e..e262fd9 100644
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -5,24 +5,28 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Snapper> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index c439933..ce2b3e4 100644
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -5,23 +5,27 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 ip=any"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index f56274e..47cbd8b 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_SNIPER=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_ENV_IS_NOWHERE=y
@@ -15,11 +16,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 5a197d1..4870e0c 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -15,12 +15,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="snow # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 3acdf44..9c7b0ea 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -5,15 +5,18 @@
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
CONFIG_SPL=y
+CONFIG_SPL_FPGA_SUPPORT=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
@@ -23,6 +26,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_MMC=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index c105e63..ada18ea 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -20,15 +20,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -41,6 +41,7 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -51,6 +52,8 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 108f195..2238f11 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -20,15 +20,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -41,6 +41,7 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -51,6 +52,8 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index dabdb97..03e05c1 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -20,15 +20,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -40,11 +40,14 @@
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 547eb3f..26addc3 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -20,14 +20,14 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -38,11 +38,14 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index b693ac1..c2781ca 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -24,11 +24,11 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -39,11 +39,14 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_DM=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 371c630..a5f804f 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
CONFIG_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
@@ -19,10 +21,10 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -35,6 +37,7 @@
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -42,6 +45,8 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 932c976..a09f816 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
CONFIG_FIT=y
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
@@ -19,15 +21,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -39,12 +41,14 @@
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 2918b60..678a8c3 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -20,15 +20,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -41,6 +41,7 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -51,6 +52,8 @@
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 8bf6164..92a1b0a 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -20,15 +20,15 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -42,6 +42,7 @@
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -51,6 +52,8 @@
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index a6ecfa3..cb88c18 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -24,11 +24,11 @@
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -41,6 +41,7 @@
CONFIG_CMD_UBI=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
@@ -51,6 +52,7 @@
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 8a49b8b..6e9a3be 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -7,6 +7,8 @@
CONFIG_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
@@ -21,15 +23,15 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -46,6 +48,7 @@
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
+CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_LED_STATUS=y
@@ -66,6 +69,8 @@
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index f0578a5..7418420 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -11,7 +11,11 @@
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -26,6 +30,7 @@
# CONFIG_CMD_IRQ is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
# CONFIG_USB_EHCI_HCD is not set
diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig
index 47daca0..fdb83e1 100644
--- a/configs/som-db5800-som-6867_defconfig
+++ b/configs/som-db5800-som-6867_defconfig
@@ -3,8 +3,6 @@
CONFIG_TARGET_SOM_DB5800_SOM_6867=y
CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867"
CONFIG_DEBUG_UART=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y
@@ -15,17 +13,19 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_ARCH_MISC_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -40,32 +40,14 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig
index 3a303a2..a11a3c0 100644
--- a/configs/spear300_defconfig
+++ b/configs/spear300_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR300"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig
index 48e37cd..dce9c76 100644
--- a/configs/spear300_nand_defconfig
+++ b/configs/spear300_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig
index 9cef783..2485499 100644
--- a/configs/spear300_usbtty_defconfig
+++ b/configs/spear300_usbtty_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig
index fa6cd8f..4705498 100644
--- a/configs/spear300_usbtty_nand_defconfig
+++ b/configs/spear300_usbtty_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR300=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig
index 695ed2f..f7fa2e4 100644
--- a/configs/spear310_defconfig
+++ b/configs/spear310_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig
index e8827a8..331dbb6 100644
--- a/configs/spear310_nand_defconfig
+++ b/configs/spear310_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig
index 326fa10..b650485 100644
--- a/configs/spear310_pnor_defconfig
+++ b/configs/spear310_pnor_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig
index eb3282b..09a7155 100644
--- a/configs/spear310_usbtty_defconfig
+++ b/configs/spear310_usbtty_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig
index 74653f8..b1f0f5b 100644
--- a/configs/spear310_usbtty_nand_defconfig
+++ b/configs/spear310_usbtty_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR310=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig
index 7c7dc69..cd25dae 100644
--- a/configs/spear310_usbtty_pnor_defconfig
+++ b/configs/spear310_usbtty_pnor_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig
index c206f38..40077d9 100644
--- a/configs/spear320_defconfig
+++ b/configs/spear320_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig
index b16ddd3..ac6100e 100644
--- a/configs/spear320_nand_defconfig
+++ b/configs/spear320_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig
index 3d926f1..20bea9c 100644
--- a/configs/spear320_pnor_defconfig
+++ b/configs/spear320_pnor_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig
index 2becc82..c415d78 100644
--- a/configs/spear320_usbtty_defconfig
+++ b/configs/spear320_usbtty_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig
index b055fce..a00bd4c 100644
--- a/configs/spear320_usbtty_nand_defconfig
+++ b/configs/spear320_usbtty_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR320=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig
index 2759f37..d6bb662 100644
--- a/configs/spear320_usbtty_pnor_defconfig
+++ b/configs/spear320_usbtty_pnor_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,FLASH_PNOR"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index 3c5c0e6..5493cf2 100644
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -4,12 +4,15 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR600"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -18,4 +21,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index 48e5ca8..43f3513 100644
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index 34a308b..e0ff475 100644
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -4,9 +4,12 @@
CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -15,4 +18,5 @@
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index ff11c91..7945f05 100644
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_TARGET_SPEAR600=y
CONFIG_IDENT_STRING="-SPEAr"
-CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=-1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -14,5 +17,7 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_NAND=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index 9384d9e..fcbb923 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -15,12 +15,12 @@
CONFIG_SPL=y
CONFIG_SYS_PROMPT="spring # "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index e29c29b..998602c 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -5,6 +5,8 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="stih410-b2260 => "
# CONFIG_CMD_IMLS is not set
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index f16ca37..bff1b1b 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -4,6 +4,8 @@
CONFIG_TARGET_STM32F429_DISCOVERY=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 0daadde..261b180 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -6,6 +6,8 @@
CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -15,8 +17,8 @@
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_SF=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -43,6 +45,7 @@
CONFIG_PINCTRL_STM32=y
CONFIG_RAM=y
CONFIG_STM32_SDRAM=y
+CONFIG_STM32X7_SERIAL=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 063b33c..0d4ff5c 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -9,10 +9,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -24,7 +25,10 @@
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_BAUDRATE=38400
+CONFIG_SCIF_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index d293d39..9c92fa5 100644
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -16,14 +16,16 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index e0040e9..030f3f5 100644
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -16,14 +16,16 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index 7d372ff..22bd3fa 100644
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -16,14 +16,16 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 5d304b3..6530134 100644
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -16,14 +16,16 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FPGAD=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_DOS_PARTITION=y
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 6940696..f03e659 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -23,6 +23,7 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_CADENCE_QSPI=y
diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index a572db2..77725cc 100644
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_TAO3530=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
@@ -11,10 +12,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -24,6 +26,7 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_MMC_OMAP_HS=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 262237d..6fecaf8 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL=y
@@ -25,12 +27,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_NAND=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -45,6 +48,7 @@
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index 011c876..9dd7ff2 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_PROMPT="[tb100]:~# "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
@@ -15,6 +17,7 @@
CONFIG_OF_EMBED=y
CONFIG_DM=y
CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 15531e4..0e4bbe0 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -16,13 +16,14 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -36,6 +37,7 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_EFI_PARTITION=y
CONFIG_DM=y
+CONFIG_PHYLIB=y
CONFIG_PCI=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index f6ab7a2..6aae968 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -11,13 +11,13 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index 77b6c47..46a2086 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -11,10 +11,11 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
new file mode 100644
index 0000000..31b187d
--- /dev/null
+++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
@@ -0,0 +1,55 @@
+CONFIG_X86=y
+CONFIG_VENDOR_CONGATEC=y
+CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y
+CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
+CONFIG_INTERNAL_UART=y
+CONFIG_FLASH_DESCRIPTOR_FILE="descriptor-pcie-x4.bin"
+CONFIG_SMP=y
+CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_SEABIOS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_ISO_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CPU=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_INTEL=y
+CONFIG_WINBOND_W83627=y
+CONFIG_E1000=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
+CONFIG_FRAMEBUFFER_VESA_MODE_114=y
+CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig
new file mode 100644
index 0000000..569e750
--- /dev/null
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -0,0 +1,54 @@
+CONFIG_X86=y
+CONFIG_VENDOR_CONGATEC=y
+CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y
+CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845"
+CONFIG_INTERNAL_UART=y
+CONFIG_SMP=y
+CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_SEABIOS=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MAC_PARTITION=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CPU=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_INTEL=y
+CONFIG_WINBOND_W83627=y
+CONFIG_E1000=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
+CONFIG_FRAMEBUFFER_VESA_MODE_114=y
+CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig
index 1703cee..8ccb957 100644
--- a/configs/theadorable-x86-dfi-bt700_defconfig
+++ b/configs/theadorable-x86-dfi-bt700_defconfig
@@ -1,31 +1,31 @@
CONFIG_X86=y
CONFIG_VENDOR_DFI=y
CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700"
-CONFIG_TARGET_DFI_BT700=y
-CONFIG_HAVE_INTEL_ME=y
-CONFIG_ENABLE_MRC_CACHE=y
+CONFIG_TARGET_THEADORABLE_X86_DFI_BT700=y
CONFIG_SMP=y
CONFIG_HAVE_VGA_BIOS=y
+CONFIG_VGA_BIOS_ADDR=0xfffa0000
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
@@ -40,35 +40,14 @@
CONFIG_MAC_PARTITION=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
-CONFIG_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
-CONFIG_MMC=y
-CONFIG_MMC_PCI=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
CONFIG_E1000=y
-CONFIG_DM_PCI=y
-CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
-CONFIG_ICH_SPI=y
-CONFIG_TIMER=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
-CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_114=y
CONFIG_CONSOLE_SCROLL_LINES=5
-CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index ada88e7..a394979 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -22,11 +22,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -44,11 +45,14 @@
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_FPGA_ALTERA=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig
index a9b5fab..0639f81 100644
--- a/configs/theadorable_defconfig
+++ b/configs/theadorable_defconfig
@@ -22,8 +22,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
@@ -38,6 +38,7 @@
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_FPGA_ALTERA=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index e4e99be..9a8c73b 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -31,13 +32,14 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -51,11 +53,14 @@
CONFIG_OF_EMBED=y
CONFIG_DFU_NAND=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index 2c7a5a6..7e7cd8e 100644
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEBUG_UART=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait rw root=/dev/sda2 coherent_pool=16M"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index d314e50..442af05 100644
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -32,5 +32,6 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 959f079..eceec34 100644
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -13,9 +13,10 @@
CONFIG_SPL_FAT_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm"
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -25,10 +26,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
@@ -38,6 +40,9 @@
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
+CONFIG_OMAP3_SPI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index be93799..44963e6 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -2,7 +2,7 @@
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
@@ -15,13 +15,13 @@
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index e27cd45..15306d0 100644
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -10,10 +10,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,6 +28,10 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_UBI=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 1873791..db60f51 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -13,13 +13,14 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index db859a7..db88c32 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -13,13 +13,14 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index 93e0292..35557e7 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -13,13 +13,14 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="zynq-uboot> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index 3caa1d4..51c7a32 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_VERSION_VARIABLE=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -13,10 +15,10 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
# CONFIG_ISO_PARTITION is not set
@@ -35,6 +37,7 @@
CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_AG7XXX=y
CONFIG_PINCTRL=y
CONFIG_DM_SERIAL=y
diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig
index 4e918a8..d2bf7e3 100644
--- a/configs/tqma6dl_mba6_mmc_defconfig
+++ b/configs/tqma6dl_mba6_mmc_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,6 +31,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig
index 35b26a3..c9c9a74 100644
--- a/configs/tqma6dl_mba6_spi_defconfig
+++ b/configs/tqma6dl_mba6_spi_defconfig
@@ -15,12 +15,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,6 +32,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index 75a8874..f850d79 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -13,12 +13,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -30,6 +30,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index e273809..8a5c09e 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,6 +31,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index ba5525b..7015903 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -31,6 +31,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index dac174d..8512727 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -15,12 +15,12 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -32,6 +32,10 @@
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig
index 8cde18b..3b81bc7 100644
--- a/configs/tqma6s_wru4_mmc_defconfig
+++ b/configs/tqma6s_wru4_mmc_defconfig
@@ -18,10 +18,10 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -53,6 +53,7 @@
CONFIG_LED_STATUS_STATE5=2
CONFIG_LED_STATUS_CMD=y
CONFIG_PCA9551_LED=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 16ac27f..bcc73d4 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -6,6 +6,8 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
@@ -13,13 +15,14 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 0f2445b..3f0c59b 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -5,6 +5,8 @@
CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="Please use defined boot"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_HUSH_PARSER=y
@@ -12,13 +14,14 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index dc3a572..18da9f6 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_TRICORDER=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=0
@@ -11,9 +12,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index 6e45252..b355d53 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TARGET_TRICORDER=y
CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD"
CONFIG_ENV_IS_NOWHERE=y
@@ -11,9 +12,11 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index a904e4b..230aecc 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -11,13 +11,14 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
index 41ff4d5..58156c4 100644
--- a/configs/ts4800_defconfig
+++ b/configs/ts4800_defconfig
@@ -14,4 +14,5 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_PHYLIB=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 2eb3d84..f68a1a0 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -18,10 +18,11 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
@@ -32,6 +33,8 @@
CONFIG_ATSHA204A=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MV=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_GIGE=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index 7d80a41..2ee4936 100644
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_SYS_TEXT_BASE=0x80008000
CONFIG_TARGET_TWISTER=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=10
@@ -10,12 +11,16 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="twister => "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_NAND_OFS=0x00800000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -25,6 +30,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_UBI=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index 794e00c..f2a0e80 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -18,8 +18,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -31,5 +31,9 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DM=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_NETDEVICES=y
CONFIG_DM_THERMAL=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index ecc03fc..02897eb 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -17,10 +17,12 @@
CONFIG_SPL_EXT_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index c3b1234..be0ae70 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -16,13 +16,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index 72bd99a..5ba8879 100644
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -15,13 +15,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index a409872..22c2154 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -16,13 +16,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index b9d89ef..35f8421 100644
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -16,13 +16,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index d71b8b7..066685f 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -11,12 +11,12 @@
CONFIG_CMD_CONFIG=y
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index edadef3..5178c6b 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -1,21 +1,42 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_USB_A9263=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="usb_a9263"
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
-CONFIG_ENV_IS_IN_DATAFLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock1 mtdparts=mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2) rw rootfstype=jffs2"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
+CONFIG_DM_GPIO=y
+CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_OF_LIBFDT=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AT91=y
+CONFIG_DM_SERIAL=y
+CONFIG_ATMEL_USART=y
+CONFIG_DM_SPI=y
+CONFIG_ATMEL_SPI=y
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
index 4ae7045..94b4d06 100644
--- a/configs/usbarmory_defconfig
+++ b/configs/usbarmory_defconfig
@@ -6,10 +6,10 @@
CONFIG_ENV_IS_IN_MMC=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_FUSE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig
index 4c1615c..d7c5a3c 100644
--- a/configs/vct_platinum_onenand_defconfig
+++ b/configs/vct_platinum_onenand_defconfig
@@ -10,6 +10,7 @@
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig
index 20c0863..a362084 100644
--- a/configs/vct_platinum_onenand_small_defconfig
+++ b/configs/vct_platinum_onenand_small_defconfig
@@ -12,9 +12,10 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig
index dfb8f04..77aa4dd 100644
--- a/configs/vct_platinumavc_onenand_defconfig
+++ b/configs/vct_platinumavc_onenand_defconfig
@@ -10,6 +10,7 @@
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig
index de7b500..fe1c8a7 100644
--- a/configs/vct_platinumavc_onenand_small_defconfig
+++ b/configs/vct_platinumavc_onenand_small_defconfig
@@ -12,9 +12,10 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig
index ba43e0e..71b6911 100644
--- a/configs/vct_premium_onenand_defconfig
+++ b/configs/vct_premium_onenand_defconfig
@@ -10,6 +10,7 @@
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
+CONFIG_CMD_ONENAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig
index cc9998f..41e5a3d 100644
--- a/configs/vct_premium_onenand_small_defconfig
+++ b/configs/vct_premium_onenand_small_defconfig
@@ -12,9 +12,10 @@
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_ONENAND=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 0a31551..8a23bee 100644
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -7,11 +7,14 @@
CONFIG_BOOTDELAY=6
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index e4a48ec..392af09 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -9,16 +9,16 @@
CONFIG_SYS_PROMPT="Tegra124 (Venice2) # "
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_FPGA is not set
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_EXT4_WRITE=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index baefcd0..55e1b12 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -9,10 +9,10 @@
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PMIC=y
diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig
index 60eea03..ce3c2ee 100644
--- a/configs/vexpress_aemv8a_dram_defconfig
+++ b/configs/vexpress_aemv8a_dram_defconfig
@@ -5,6 +5,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
@@ -15,9 +17,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index d7414d4..bdfba73 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -5,6 +5,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlyprintk=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
@@ -15,9 +17,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index b92e87f..2fd1f9b 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -5,6 +5,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 loglevel=9"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
@@ -15,9 +17,9 @@
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig
index 3dfe2e8..e71be4c 100644
--- a/configs/vexpress_ca15_tc2_defconfig
+++ b/configs/vexpress_ca15_tc2_defconfig
@@ -11,10 +11,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig
index 507290b..3027336 100644
--- a/configs/vexpress_ca5x2_defconfig
+++ b/configs/vexpress_ca5x2_defconfig
@@ -10,10 +10,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index 851f034..557dcbf 100644
--- a/configs/vexpress_ca9x4_defconfig
+++ b/configs/vexpress_ca9x4_defconfig
@@ -10,10 +10,10 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
-# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 8d75b58..30a035c 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -9,10 +9,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,5 +27,7 @@
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index fc4dd89..af86c34 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -9,10 +9,11 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -26,5 +27,7 @@
CONFIG_NAND_VF610_NFC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index cb2040e..1d1abb3 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
@@ -11,13 +13,13 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_FPGA is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index 0099cab..e041b7a 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -10,11 +10,12 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -27,6 +28,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_EFI_PARTITION=y
+CONFIG_PHYLIB=y
CONFIG_PCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 244dc7e..cc782bf 100644
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -7,12 +7,15 @@
CONFIG_BOOTDELAY=6
CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_TSI148=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_BAUDRATE=9600
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index 68916a4..6d3e5eb 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -22,14 +22,15 @@
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM=y
+CONFIG_PHYLIB=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index db1c7cb..99fe800 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -13,12 +13,12 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_CACHE=y
diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig
index b80e1a6..8beda72 100644
--- a/configs/warp7_secure_defconfig
+++ b/configs/warp7_secure_defconfig
@@ -14,12 +14,12 @@
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index c99ad88..4b415b3 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -9,14 +9,14 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
-CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index f01b3b4..4535483 100644
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -6,10 +6,11 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="woodburn U-Boot > "
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,3 +23,5 @@
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index 996247b..4d94258 100644
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -16,10 +16,11 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="woodburn U-Boot > "
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -33,3 +34,5 @@
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 816aec1..1fc26b2 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -5,8 +5,11 @@
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_CMD_HD44760=y
+CONFIG_CMD_MAX6957=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS2,115200n8"
CONFIG_VERSION_VARIABLE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -17,9 +20,10 @@
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_SPI=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -30,5 +34,6 @@
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
# CONFIG_MMC is not set
+CONFIG_PHYLIB=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/x600_defconfig b/configs/x600_defconfig
index d766614..73ddd03 100644
--- a/configs/x600_defconfig
+++ b/configs/x600_defconfig
@@ -19,10 +19,12 @@
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_LOOPW=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -35,6 +37,8 @@
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_NETDEVICES=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_USB=y
diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index 5a49db2..50c9732 100644
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -7,6 +7,8 @@
CONFIG_VIDEO=y
CONFIG_ENV_IS_NOWHERE=y
CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8 "
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_VERSION_VARIABLE=y
@@ -17,9 +19,9 @@
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
-CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index 992a6f1..f72ae81 100644
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -21,19 +21,20 @@
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
@@ -47,8 +48,6 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
@@ -59,11 +58,15 @@
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=25000000
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 8c4931f..d3e0d83 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -20,15 +20,16 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -54,6 +55,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index 89b5215..55232db 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -21,15 +21,16 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -48,11 +49,13 @@
CONFIG_SYS_I2C_CADENCE=y
# CONFIG_MMC is not set
CONFIG_DM_MMC=y
+CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SST=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index 8d0752a..ca3f15b 100644
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -20,8 +20,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -41,6 +41,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
index 1710139..773f123 100644
--- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
@@ -20,8 +20,8 @@
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
similarity index 93%
rename from configs/xilinx_zynqmp_zcu102_defconfig
rename to configs/xilinx_zynqmp_zcu102_revA_defconfig
index 4d0f73f..24ccdb5 100644
--- a/configs/xilinx_zynqmp_zcu102_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -5,7 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102"
CONFIG_ZYNQMP_USB=y
-CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -20,16 +20,17 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -40,13 +41,12 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
+CONFIG_CMD_PCA953X=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -56,7 +56,10 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index bc9b14e..93c32e2 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -20,16 +20,17 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -40,13 +41,12 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SATA_CEVA=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
+CONFIG_CMD_PCA953X=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
@@ -56,7 +56,10 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index 2788db08..d714c67 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -10,6 +10,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -18,8 +20,10 @@
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_IRQ=y
+CONFIG_CMD_PCA953X=y
CONFIG_DS4510=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index 904f7b9..b04063a 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -11,6 +11,8 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -20,7 +22,9 @@
# CONFIG_CMD_HASH is not set
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index 45fe128..657fdcc 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -8,9 +8,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_REGINFO=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -21,8 +23,10 @@
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
CONFIG_SYS_FSL_DDR2=y
+CONFIG_CMD_PCA953X=y
CONFIG_DS4510=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index 63ce8b2..9b2eb18 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -11,6 +11,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -21,8 +22,10 @@
# CONFIG_CMD_HASH is not set
CONFIG_CMD_JFFS2=y
# CONFIG_CMD_IRQ is not set
+CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
+CONFIG_PHYLIB=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig
index 1954815..249ceab 100644
--- a/configs/xpress_defconfig
+++ b/configs/xpress_defconfig
@@ -10,8 +10,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -22,6 +22,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig
index 9991725..eeee732 100644
--- a/configs/xpress_spl_defconfig
+++ b/configs/xpress_spl_defconfig
@@ -20,8 +20,8 @@
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -32,6 +32,7 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig
index e52e62b..f28c05f 100644
--- a/configs/xtfpga_defconfig
+++ b/configs/xtfpga_defconfig
@@ -10,6 +10,7 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_SAVES=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DIAG=y
diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig
index d61ed77..bfd51fd 100644
--- a/configs/zc5202_defconfig
+++ b/configs/zc5202_defconfig
@@ -19,10 +19,11 @@
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig
index 8b7b4a9..444c089 100644
--- a/configs/zc5601_defconfig
+++ b/configs/zc5601_defconfig
@@ -19,12 +19,13 @@
CONFIG_SPL=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
CONFIG_OF_LIBFDT=y
diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig
index 6da257c..1567aab 100644
--- a/configs/zipitz2_defconfig
+++ b/configs/zipitz2_defconfig
@@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_TARGET_ZIPITZ2=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=tty0 console=ttyS2,115200 fbcon=rotate:3"
# CONFIG_CONSOLE_MUX is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index ec8eafb..11d4dba 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -12,16 +12,17 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index f5155b2..167ab34 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -9,15 +9,16 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
new file mode 100644
index 0000000..6a9977b
--- /dev/null
+++ b/configs/zynq_z_turn_defconfig
@@ -0,0 +1,60 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Xilinx"
+CONFIG_G_DNL_VENDOR_NUM=0x03FD
+CONFIG_G_DNL_PRODUCT_NUM=0x0300
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index b850af9..49b6edc 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -14,18 +14,19 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 35722e9..d457ca7 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -13,18 +13,19 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 9023b2e..fafe60e 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -14,13 +14,13 @@
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 581998c..f77e914 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -15,12 +15,12 @@
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@@ -30,5 +30,6 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_MMC is not set
+CONFIG_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_ZYNQ_GEM=y
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 762d475..2ae98da 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -12,16 +12,17 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 4392361..fca2b12 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -14,18 +14,19 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
diff --git a/disk/part.c b/disk/part.c
index 491b02d..c67fdac 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -132,6 +132,7 @@
case IF_TYPE_SD:
case IF_TYPE_MMC:
case IF_TYPE_USB:
+ case IF_TYPE_NVME:
printf ("Vendor: %s Rev: %s Prod: %s\n",
dev_desc->vendor,
dev_desc->revision,
@@ -263,7 +264,10 @@
puts ("MMC");
break;
case IF_TYPE_HOST:
- puts("HOST");
+ puts ("HOST");
+ break;
+ case IF_TYPE_NVME:
+ puts ("NVMe");
break;
default:
puts ("UNKNOWN");
@@ -388,7 +392,6 @@
#define PART_UNSPECIFIED -2
#define PART_AUTO -1
-#define MAX_SEARCH_PARTITIONS 16
int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
struct blk_desc **dev_desc,
disk_partition_t *info, int allow_whole_dev)
@@ -452,7 +455,7 @@
/* If no dev_part_str, use bootdevice environment variable */
if (!dev_part_str || !strlen(dev_part_str) ||
!strcmp(dev_part_str, "-"))
- dev_part_str = getenv("bootdevice");
+ dev_part_str = env_get("bootdevice");
/* If still no dev_part_str, it's an error */
if (!dev_part_str) {
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index 25fe56c..f8dae00 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -132,7 +132,7 @@
int limit;
char *s;
- s = getenv("amiga_scanlimit");
+ s = env_get("amiga_scanlimit");
if (s)
limit = simple_strtoul(s, NULL, 10);
else
@@ -172,7 +172,7 @@
int limit;
char *s;
- s = getenv("amiga_scanlimit");
+ s = env_get("amiga_scanlimit");
if (s)
limit = simple_strtoul(s, NULL, 10);
else
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 1b7ba27..71c3cb3 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -178,12 +178,43 @@
* Public Functions (include/part.h)
*/
+/*
+ * UUID is displayed as 32 hexadecimal digits, in 5 groups,
+ * separated by hyphens, in the form 8-4-4-4-12 for a total of 36 characters
+ */
+int get_disk_guid(struct blk_desc * dev_desc, char *guid)
+{
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
+ gpt_entry *gpt_pte = NULL;
+ unsigned char *guid_bin;
+
+ /* This function validates AND fills in the GPT header and PTE */
+ if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
+ gpt_head, &gpt_pte) != 1) {
+ printf("%s: *** ERROR: Invalid GPT ***\n", __func__);
+ if (is_gpt_valid(dev_desc, dev_desc->lba - 1,
+ gpt_head, &gpt_pte) != 1) {
+ printf("%s: *** ERROR: Invalid Backup GPT ***\n",
+ __func__);
+ return -EINVAL;
+ } else {
+ printf("%s: *** Using Backup GPT ***\n",
+ __func__);
+ }
+ }
+
+ guid_bin = gpt_head->disk_guid.b;
+ uuid_bin_to_str(guid_bin, guid, UUID_STR_FORMAT_GUID);
+
+ return 0;
+}
+
void part_print_efi(struct blk_desc *dev_desc)
{
ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
gpt_entry *gpt_pte = NULL;
int i = 0;
- char uuid[37];
+ char uuid[UUID_STR_LEN + 1];
unsigned char *uuid_bin;
/* This function validates AND fills in the GPT header and PTE */
diff --git a/doc/README.enetaddr b/doc/README.enetaddr
index 50e4899..f926485 100644
--- a/doc/README.enetaddr
+++ b/doc/README.enetaddr
@@ -84,7 +84,7 @@
eth_parse_enetaddr(addr, enetaddr);
/* enetaddr now equals { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 } */
- * int eth_getenv_enetaddr(char *name, uchar *enetaddr);
+ * int eth_env_get_enetaddr(char *name, uchar *enetaddr);
Look up an environment variable and convert the stored address. If the address
is valid, then the function returns 1. Otherwise, the function returns 0. In
@@ -92,18 +92,18 @@
then it is set to all zeros. The common function is_valid_ethaddr() is used
to determine address validity.
uchar enetaddr[6];
-if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
/* "ethaddr" is not set in the environment */
... try and setup "ethaddr" in the env ...
}
/* enetaddr is now set to the value stored in the ethaddr env var */
- * int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
+ * int eth_env_set_enetaddr(char *name, const uchar *enetaddr);
Store the MAC address into the named environment variable. The return value is
-the same as the setenv() function.
+the same as the env_set() function.
uchar enetaddr[6] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 };
-eth_setenv_enetaddr("ethaddr", enetaddr);
+eth_env_set_enetaddr("ethaddr", enetaddr);
/* the "ethaddr" env var should now be set to "00:11:22:33:44:55" */
* the %pM format modifier
diff --git a/doc/README.gpt b/doc/README.gpt
index c0acc8a..517df55 100644
--- a/doc/README.gpt
+++ b/doc/README.gpt
@@ -156,10 +156,10 @@
To restore GUID partition table one needs to:
1. Define partition layout in the environment.
Format of partitions layout:
- "partitions=uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+ "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
name=kernel,size=60MiB,uuid=...;"
or
- "partitions=uuid_disk=${uuid_gpt_disk};name=${uboot_name},
+ "uuid_disk=${uuid_gpt_disk};name=${uboot_name},
size=${uboot_size},uuid=${uboot_uuid};"
The fields 'name' and 'size' are mandatory for every partition.
@@ -171,7 +171,8 @@
The fields 'uuid' and 'uuid_disk' are optional if CONFIG_RANDOM_UUID is
enabled. A random uuid will be used if omitted or they point to an empty/
non-existent environment variable. The environment variable will be set to
- the generated UUID.
+ the generated UUID. The 'gpt guid' command reads the current value of the
+ uuid_disk from the GPT.
The field 'bootable' is optional, it is used to mark the GPT partition
bootable (set attribute flags "Legacy BIOS bootable").
@@ -209,6 +210,24 @@
U-BOOT> gpt verify mmc 0 $partitions
U-BOOT> if test $? = 0; then echo "GPT OK"; else echo "GPT ERR"; fi
+Renaming GPT partitions from U-Boot:
+====================================
+
+GPT partition names are a mechanism via which userspace and U-Boot can
+communicate about software updates and boot failure. The 'gpt guid',
+'gpt read', 'gpt rename' and 'gpt swap' commands facilitate
+programmatic renaming of partitions from bootscripts by generating and
+modifying the partitions layout string. Here is an illustration of
+employing 'swap' to exchange 'primary' and 'backup' partition names:
+
+U-BOOT> gpt swap mmc 0 primary backup
+
+Afterwards, all partitions previously named 'primary' will be named
+'backup', and vice-versa. Alternatively, single partitions may be
+renamed. In this example, mmc0's first partition will be renamed
+'primary':
+
+U-BOOT> gpt rename mmc 0 1 primary
The GPT functionality may be tested with the 'sandbox' board by
creating a disk image as described under 'Block Device Emulation' in
@@ -220,6 +239,16 @@
=> gpt flip host 0
[ . . . ]
+The GPT functionality may be tested with the 'sandbox' board by
+creating a disk image as described under 'Block Device Emulation' in
+board/sandbox/README.sandbox:
+
+=>host bind 0 ./disk.raw
+=> gpt read host 0
+[ . . . ]
+=> gpt swap host 0 name othername
+[ . . . ]
+
Partition type GUID:
====================
@@ -229,7 +258,7 @@
If you define 'CONFIG_PARTITION_TYPE_GUID', a optionnal parameter 'type'
can specify a other partition type guid:
- "partitions=uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+ "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
name=kernel,size=60MiB,uuid=...,
type=0FC63DAF-8483-4772-8E79-3D69D8477DE4;"
@@ -251,7 +280,7 @@
"lvm" = PARTITION_LINUX_LVM_GUID
(E6D6D379-F507-44C2-A23C-238F2A3DF928)
- "partitions=uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+ "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
name=kernel,size=60MiB,uuid=...,type=linux;"
They are also used to display the type of partition in "part list" command.
diff --git a/doc/README.nvme b/doc/README.nvme
new file mode 100644
index 0000000..3afa912
--- /dev/null
+++ b/doc/README.nvme
@@ -0,0 +1,86 @@
+#
+# Copyright (C) 2017 NXP Semiconductors
+# Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+What is NVMe
+============
+
+NVM Express (NVMe) is a register level interface that allows host software to
+communicate with a non-volatile memory subsystem. This interface is optimized
+for enterprise and client solid state drives, typically attached to the PCI
+express interface. It is a scalable host controller interface designed to
+address the needs of enterprise and client systems that utilize PCI express
+based solid state drives (SSD). The interface provides optimized command
+submission and completion paths. It includes support for parallel operation by
+supporting up to 64K I/O queues with up to 64K commands per I/O queue.
+
+The device is comprised of some number of controllers, where each controller
+is comprised of some number of namespaces, where each namespace is comprised
+of some number of logical blocks. A namespace is a quantity of non-volatile
+memory that is formatted into logical blocks. An NVMe namespace is equivalent
+to a SCSI LUN. Each namespace is operated as an independent "device".
+
+How it works
+------------
+There is an NVMe uclass driver (driver name "nvme"), an NVMe host controller
+driver (driver name "nvme") and an NVMe namespace block driver (driver name
+"nvme-blk"). The host controller driver is supposed to probe the hardware and
+do necessary initialization to put the controller into a ready state at which
+it is able to scan all available namespaces attached to it. Scanning namespace
+is triggered by the NVMe uclass driver and the actual work is done in the NVMe
+namespace block driver.
+
+Status
+------
+It only support basic block read/write functions in the NVMe driver.
+
+Config options
+--------------
+CONFIG_NVME Enable NVMe device support
+CONFIG_CMD_NVME Enable basic NVMe commands
+
+Usage in U-Boot
+---------------
+To use an NVMe hard disk from U-Boot shell, a 'nvme scan' command needs to
+be executed for all NVMe hard disks attached to the NVMe controller to be
+identified.
+
+To list all of the NVMe hard disks, try:
+
+ => nvme list
+ Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN
+ Type: Hard Disk
+ Capacity: 381554.0 MB = 372.6 GB (781422768 x 512)
+
+and print out detailed information for controller and namespaces via:
+
+ => nvme info
+
+Raw block read/write to can be done via the 'nvme read/write' commands:
+
+ => nvme read a0000000 0 11000
+
+ => tftp 80000000 /tftpboot/kernel.itb
+ => nvme write 80000000 0 11000
+
+Of course, file system command can be used on the NVMe hard disk as well:
+
+ => fatls nvme 0:1
+ 32376967 kernel.itb
+ 22929408 100m
+
+ 2 file(s), 0 dir(s)
+
+ => fatload nvme 0:1 a0000000 /kernel.itb
+ => bootm a0000000
+
+Testing NVMe with QEMU x86
+--------------------------
+QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running
+U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86.
+
+Example command line to call QEMU x86 below with emulated NVMe device:
+$ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom
diff --git a/doc/README.rockchip b/doc/README.rockchip
index dbeb8be..12fec38 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -130,7 +130,7 @@
Therefore RK3288 has another loading sequence like RK3036. The option of
U-Boot is controlled with this setting in U-Boot:
- #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+ #define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
You can create the image via the following operations:
diff --git a/doc/README.x86 b/doc/README.x86
index c69dc1c..c542a69 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -18,6 +18,8 @@
work with minimal adjustments on other x86 boards since coreboot deals with
most of the low-level details.
+U-Boot is a main bootloader on Intel Edison board.
+
U-Boot also supports booting directly from x86 reset vector, without coreboot.
In this case, known as bare mode, from the fact that it runs on the
'bare metal', U-Boot acts like a BIOS replacement. The following platforms
@@ -61,6 +63,16 @@
to point to a new board. You can also change the Cache-As-RAM (CAR) related
settings here if the default values do not fit your new board.
+Build Instructions for U-Boot as main bootloader
+------------------------------------------------
+
+Intel Edison instructions:
+
+Simple you can build U-Boot and obtain u-boot.bin
+
+$ make edison_defconfig
+$ make all
+
Build Instructions for U-Boot as BIOS replacement (bare mode)
-------------------------------------------------------------
Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
@@ -455,6 +467,33 @@
=> zboot 01000000 - 04000000 1b1ab50
+Updating U-Boot on Edison
+-------------------------
+By default Intel Edison boards are shipped with preinstalled heavily
+patched U-Boot v2014.04. Though it supports DFU which we may be able to
+use.
+
+1. Prepare u-boot.bin as described in chapter above. You still need one
+more step (if and only if you have original U-Boot), i.e. run the
+following command:
+
+$ truncate -s %4096 u-boot.bin
+
+2. Run your board and interrupt booting to U-Boot console. In the console
+call:
+
+ => run do_force_flash_os
+
+3. Wait for few seconds, it will prepare environment variable and runs
+DFU. Run DFU command from the host system:
+
+$ dfu-util -v -d 8087:0a99 --alt u-boot0 -D u-boot.bin
+
+4. Return to U-Boot console and following hint. i.e. push Ctrl+C, and
+reset the board:
+
+ => reset
+
CPU Microcode
-------------
Modern CPUs usually require a special bit stream called microcode [8] to be
@@ -753,11 +792,7 @@
You can also bake this behaviour into your build by hard-coding the
environment variables if you add this to minnowmax.h:
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda2 ro"
#define CONFIG_BOOTCOMMAND \
"ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
"ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
@@ -766,6 +801,10 @@
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
+and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to:
+
+CONFIG_BOOTARGS="root=/dev/sda2 ro"
+
Test with SeaBIOS
-----------------
SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt
new file mode 100644
index 0000000..8e7357d
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt
@@ -0,0 +1,67 @@
+RK3368 dynamic memory controller driver
+=======================================
+
+The RK3368 DMC (dynamic memory controller) driver supports setup/initialisation
+during TPL using configuration data from the DTS (i.e. OF_PLATDATA), based on
+the following key configuration data:
+ (a) a target-frequency (i.e. operating point) for the memory operation
+ (b) a speed-bin (as defined in JESD-79) for the DDR3 used in hardware
+ (c) a memory-schedule (i.e. mapping from physical addresses to the address
+ pins of the memory bus)
+
+Required properties
+-------------------
+
+- compatible: "rockchip,rk3368-dmc"
+- reg
+ protocol controller (PCTL) address and PHY controller (DDRPHY) address
+- rockchip,ddr-speed-bin
+ the DDR3 device's speed-bin (as specified according to JESD-79)
+ DDR3_800D (5-5-5)
+ DDR3_800E (6-6-6)
+ DDR3_1066E (6-6-6)
+ DDR3_1066F (7-7-7)
+ DDR3_1066G (8-8-8)
+ DDR3_1333F (7-7-7)
+ DDR3_1333G (8-8-8)
+ DDR3_1333H (9-9-9)
+ DDR3_1333J (10-10-10)
+ DDR3_1600G (8-8-8)
+ DDR3_1600H (9-9-9)
+ DDR3_1600J (10-10-10)
+ DDR3_1600K (11-11-11)
+ DDR3_1866J (10-10-10)
+ DDR3_1866K (11-11-11)
+ DDR3_1866L (12-12-12)
+ DDR3_1866M (13-13-13)
+ DDR3_2133K (11-11-11)
+ DDR3_2133L (12-12-12)
+ DDR3_2133M (13-13-13)
+ DDR3_2133N (14-14-14)
+- rockchip,ddr-frequency:
+ target DDR clock frequency in Hz (not all frequencies may be supported,
+ as there's some cooperation from the clock-driver required)
+- rockchip,memory-schedule:
+ controls the decoding of physical addresses to DRAM addressing (i.e. how
+ the physical address maps onto the address pins/chip-select of the device)
+ DMC_MSCH_CBDR: column -> bank -> device -> row
+ DMC_MSCH_CBRD: column -> band -> row -> device
+ DMC_MSCH_CRBD: column -> row -> band -> device
+
+Example (for DDR3-1600K and 800MHz)
+-----------------------------------
+
+ #include <dt-bindings/memory/rk3368-dmc.h>
+
+ dmc: dmc@ff610000 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3368-dmc";
+ reg = <0 0xff610000 0 0x400
+ 0 0xff620000 0 0x400>;
+ };
+
+ &dmc {
+ rockchip,ddr-speed-bin = <DDR3_1600K>;
+ rockchip,ddr-frequency = <800000000>;
+ rockchip,memory-schedule = <DMC_MSCH_CBRD>;
+ };
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 2e03133..613e602 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -50,6 +50,8 @@
source "drivers/net/Kconfig"
+source "drivers/nvme/Kconfig"
+
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 8624bd8..dab5c18 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -2,33 +2,35 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_$(SPL_TPL_)DM) += core/
-obj-$(CONFIG_$(SPL_)CLK) += clk/
-obj-$(CONFIG_$(SPL_)LED) += led/
-obj-$(CONFIG_$(SPL_)PHY) += phy/
-obj-$(CONFIG_$(SPL_)PINCTRL) += pinctrl/
-obj-$(CONFIG_$(SPL_)RAM) += ram/
+obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
+obj-$(CONFIG_$(SPL_TPL_)DM) += core/
+obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
+obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
+obj-$(CONFIG_$(SPL_TPL_)LED) += led/
+obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
+obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/
+obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
+obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
+obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
+obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
+obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
+obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
+obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
+ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/
obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
-obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/
obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/
-obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/
-obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
-obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
-obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
-obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/
obj-$(CONFIG_SPL_UBI) += mtd/ubispl/
obj-$(CONFIG_SPL_DMA_SUPPORT) += dma/
obj-$(CONFIG_SPL_ETH_SUPPORT) += net/
@@ -37,7 +39,6 @@
obj-$(CONFIG_SPL_PCI_SUPPORT) += pci/
obj-$(CONFIG_SPL_PCH_SUPPORT) += pch/
obj-$(CONFIG_SPL_RTC_SUPPORT) += rtc/
-obj-$(CONFIG_SPL_TIMER_SUPPORT) += timer/
obj-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += usb/musb-new/
obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/
obj-$(CONFIG_SPL_USB_GADGET_SUPPORT) += usb/gadget/udc/
@@ -48,18 +49,14 @@
obj-$(CONFIG_SPL_SATA_SUPPORT) += ata/ scsi/
obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
+obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
+
+endif
endif
ifdef CONFIG_TPL_BUILD
-obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/
-obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
-obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
-obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/
-obj-$(CONFIG_TPL_SERIAL_SUPPORT) += serial/
-obj-$(CONFIG_TPL_SPI_FLASH_SUPPORT) += mtd/spi/
-obj-$(CONFIG_TPL_SPI_SUPPORT) += spi/
endif
@@ -77,6 +74,7 @@
obj-$(CONFIG_FPGA) += fpga/
obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
+obj-$(CONFIG_NVME) += nvme/
obj-y += pcmcia/
obj-y += dfu/
obj-$(CONFIG_X86) += pch/
@@ -86,7 +84,6 @@
obj-y += sound/
obj-y += spmi/
obj-y += sysreset/
-obj-y += timer/
obj-y += tpm/
obj-y += video/
obj-y += watchdog/
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6427f1b..803064a 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -20,26 +20,14 @@
See also CMD_SATA which provides command-line support.
-config SCSI
- bool "Support SCSI controllers"
- help
- This enables support for SCSI (Small Computer System Interface),
- a parallel interface widely used with storage peripherals such as
- hard drives and optical drives. The SCSI standards define physical
- interfaces as well as protocols for controlling devices and
- tranferring data.
-
-config DM_SCSI
- bool "Support SCSI controllers with driver model"
- depends on BLK
- help
- This option enables the SCSI (Small Computer System Interface) uclass
- which supports SCSI and SATA HDDs. For every device configuration
- (IDs/LUNs) a block device is created with RAW read/write and
- filesystem support.
-
menu "SATA/SCSI device support"
+config AHCI_PCI
+ bool "Support for PCI-based AHCI controller"
+ depends on DM_SCSI
+ help
+ Enables support for the PCI-based AHCI controller.
+
config SATA_CEVA
bool "Ceva Sata controller"
depends on AHCI
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index c48184c..4e2de93 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -7,6 +7,7 @@
obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
obj-$(CONFIG_AHCI) += ahci-uclass.o
+obj-$(CONFIG_AHCI_PCI) += ahci-pci.o
obj-$(CONFIG_SCSI_AHCI) += ahci.o
obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
obj-$(CONFIG_FSL_SATA) += fsl_sata.o
diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c
new file mode 100644
index 0000000..5a45edc
--- /dev/null
+++ b/drivers/ata/ahci-pci.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <ahci.h>
+#include <dm.h>
+#include <pci.h>
+
+static int ahci_pci_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+
+ return ahci_bind_scsi(dev, &scsi_dev);
+}
+
+static int ahci_pci_probe(struct udevice *dev)
+{
+ return ahci_probe_scsi_pci(dev);
+}
+
+static const struct udevice_id ahci_pci_ids[] = {
+ { .compatible = "ahci-pci" },
+ { }
+};
+
+U_BOOT_DRIVER(ahci_pci) = {
+ .name = "ahci_pci",
+ .id = UCLASS_AHCI,
+ .of_match = ahci_pci_ids,
+ .bind = ahci_pci_bind,
+ .probe = ahci_pci_probe,
+};
+
+static struct pci_device_id ahci_pci_supported[] = {
+ { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, ~0) },
+ {},
+};
+
+U_BOOT_PCI_DEVICE(ahci_pci, ahci_pci_supported);
diff --git a/drivers/ata/ahci-uclass.c b/drivers/ata/ahci-uclass.c
index 7b8c326..71600fe 100644
--- a/drivers/ata/ahci-uclass.c
+++ b/drivers/ata/ahci-uclass.c
@@ -6,9 +6,11 @@
*/
#include <common.h>
+#include <ahci.h>
#include <dm.h>
UCLASS_DRIVER(ahci) = {
.id = UCLASS_AHCI,
.name = "ahci",
+ .per_device_auto_alloc_size = sizeof(struct ahci_uc_priv),
};
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 6da412d..5e4df19 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -431,7 +431,7 @@
cap2 & (1 << 0) ? "boh " : "");
}
-#ifndef CONFIG_SCSI_AHCI_PLAT
+#if defined(CONFIG_DM_SCSI) || !defined(CONFIG_SCSI_AHCI_PLAT)
# if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI)
static int ahci_init_one(struct ahci_uc_priv *uc_priv, struct udevice *dev)
# else
@@ -935,7 +935,7 @@
{
struct ahci_uc_priv *uc_priv;
#ifdef CONFIG_DM_SCSI
- uc_priv = dev_get_uclass_priv(dev);
+ uc_priv = dev_get_uclass_priv(dev->parent);
#else
uc_priv = probe_ent;
#endif
@@ -1158,11 +1158,8 @@
return 0;
}
-int ahci_probe_scsi(struct udevice *ahci_dev)
+int ahci_probe_scsi(struct udevice *ahci_dev, ulong base)
{
-#ifdef CONFIG_SCSI_AHCI_PLAT
- return -ENOSYS; /* TODO(sjg@chromium.org): Support non-PCI AHCI */
-#else
struct ahci_uc_priv *uc_priv;
struct scsi_platdata *uc_plat;
struct udevice *dev;
@@ -1172,11 +1169,11 @@
if (!dev)
return -ENODEV;
uc_plat = dev_get_uclass_platdata(dev);
- uc_plat->base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5,
- PCI_REGION_MEM);
+ uc_plat->base = base;
uc_plat->max_lun = 1;
uc_plat->max_id = 2;
- uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv = dev_get_uclass_priv(ahci_dev);
ret = ahci_init_one(uc_priv, dev);
if (ret)
return ret;
@@ -1184,15 +1181,21 @@
if (ret)
return ret;
- debug("Scanning %s\n", dev->name);
- ret = scsi_scan_dev(dev, true);
- if (ret)
- return ret;
-#endif
-
return 0;
}
+#ifdef CONFIG_DM_PCI
+int ahci_probe_scsi_pci(struct udevice *ahci_dev)
+{
+ ulong base;
+
+ base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5,
+ PCI_REGION_MEM);
+
+ return ahci_probe_scsi(ahci_dev, base);
+}
+#endif
+
struct scsi_ops scsi_ops = {
.exec = ahci_scsi_exec,
.bus_reset = ahci_scsi_bus_reset,
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index ca7692d..2676089 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -10,6 +10,18 @@
be partitioned into several areas, called 'partitions' in U-Boot.
A filesystem can be placed in each partition.
+config SPL_BLK
+ bool "Support block devices in SPL"
+ depends on SPL_DM && BLK
+ default y
+ help
+ Enable support for block devices, such as SCSI, MMC and USB
+ flash sticks. These provide a block-level interface which permits
+ reading, writing and (in some cases) erasing blocks. Block
+ devices often have a partition table which allows the device to
+ be partitioned into several areas, called 'partitions' in U-Boot.
+ A filesystem can be placed in each partition.
+
config BLOCK_CACHE
bool "Use block device cache"
default n
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a5e7307..dea2c15 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -5,9 +5,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_BLK) += blk-uclass.o
+obj-$(CONFIG_$(SPL_)BLK) += blk-uclass.o
-ifndef CONFIG_BLK
+ifndef CONFIG_$(SPL_)BLK
obj-y += blk_legacy.o
endif
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 23f131b..a3737ba 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -22,6 +22,7 @@
[IF_TYPE_SATA] = "sata",
[IF_TYPE_HOST] = "host",
[IF_TYPE_SYSTEMACE] = "ace",
+ [IF_TYPE_NVME] = "nvme",
};
static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -34,6 +35,7 @@
[IF_TYPE_SD] = UCLASS_INVALID,
[IF_TYPE_SATA] = UCLASS_AHCI,
[IF_TYPE_HOST] = UCLASS_ROOT,
+ [IF_TYPE_NVME] = UCLASS_NVME,
[IF_TYPE_SYSTEMACE] = UCLASS_INVALID,
};
diff --git a/drivers/block/ide.c b/drivers/block/ide.c
index 308ad73..edcf87b 100644
--- a/drivers/block/ide.c
+++ b/drivers/block/ide.c
@@ -469,7 +469,9 @@
device = dev_desc->devnum;
dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
+#ifndef CONFIG_BLK
dev_desc->block_read = atapi_read;
+#endif
memset(ccb, 0, sizeof(ccb));
memset(iobuf, 0, sizeof(iobuf));
diff --git a/drivers/bootcount/bootcount_env.c b/drivers/bootcount/bootcount_env.c
index 2d6e8db..c3618d3 100644
--- a/drivers/bootcount/bootcount_env.c
+++ b/drivers/bootcount/bootcount_env.c
@@ -6,24 +6,25 @@
*/
#include <common.h>
+#include <environment.h>
void bootcount_store(ulong a)
{
- int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+ int upgrade_available = env_get_ulong("upgrade_available", 10, 0);
if (upgrade_available) {
- setenv_ulong("bootcount", a);
- saveenv();
+ env_set_ulong("bootcount", a);
+ env_save();
}
}
ulong bootcount_load(void)
{
- int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+ int upgrade_available = env_get_ulong("upgrade_available", 10, 0);
ulong val = 0;
if (upgrade_available)
- val = getenv_ulong("bootcount", 10, 0);
+ val = env_get_ulong("bootcount", 10, 0);
return val;
}
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 44da716..7765148 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -12,7 +12,7 @@
config SPL_CLK
bool "Enable clock support in SPL"
- depends on CLK
+ depends on CLK && SPL_DM
help
The clock subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use clock drivers in
@@ -20,6 +20,16 @@
setting up clocks within SPL, and allows the same drivers to be
used as U-Boot proper.
+config TPL_CLK
+ bool "Enable clock support in TPL"
+ depends on CLK && TPL_DM
+ help
+ The clock subsystem adds a small amount of overhead to the image.
+ If this is acceptable and you have a need to use clock drivers in
+ SPL, enable this option. It might provide a cleaner interface to
+ setting up clocks within TPL, and allows the same drivers to be
+ used as U-Boot proper.
+
config CLK_BCM6345
bool "Clock controller driver for BCM6345"
depends on CLK && ARCH_BMIPS
@@ -55,5 +65,6 @@
source "drivers/clk/uniphier/Kconfig"
source "drivers/clk/exynos/Kconfig"
source "drivers/clk/at91/Kconfig"
+source "drivers/clk/renesas/Kconfig"
endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 2746a80..b773593 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -5,11 +5,12 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_CLK) += clk-uclass.o clk_fixed_rate.o
+obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_SANDBOX) += clk_sandbox.o
obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
+obj-$(CONFIG_CLK_RENESAS) += renesas/
obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 83b6328..e68d927 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -65,6 +65,8 @@
debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
assert(clk);
+ clk->dev = NULL;
+
ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
index, &args);
if (ret) {
@@ -102,6 +104,7 @@
int index;
debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
+ clk->dev = NULL;
index = dev_read_stringlist_search(dev, "clock-names", name);
if (index < 0) {
@@ -111,6 +114,30 @@
return clk_get_by_index(dev, index, clk);
}
+
+int clk_release_all(struct clk *clk, int count)
+{
+ int i, ret;
+
+ for (i = 0; i < count; i++) {
+ debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
+
+ /* check if clock has been previously requested */
+ if (!clk[i].dev)
+ continue;
+
+ ret = clk_disable(&clk[i]);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ ret = clk_free(&clk[i]);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ }
+
+ return 0;
+}
+
#endif /* OF_CONTROL */
int clk_request(struct udevice *dev, struct clk *clk)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index 50eaf31..bcc6290 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -10,217 +10,616 @@
#include <linux/bitops.h>
#include <clk-uclass.h>
#include <clk.h>
+#include <asm/arch/sys_proto.h>
#include <dm.h>
-#define ZYNQMP_GEM0_REF_CTRL 0xFF5E0050
-#define ZYNQMP_IOPLL_CTRL 0xFF5E0020
-#define ZYNQMP_RPLL_CTRL 0xFF5E0030
-#define ZYNQMP_DPLL_CTRL 0xFD1A002C
-#define ZYNQMP_SIP_SVC_MMIO_WRITE 0xC2000013
-#define ZYNQMP_SIP_SVC_MMIO_WRITE 0xC2000013
-#define ZYNQMP_SIP_SVC_MMIO_WRITE 0xC2000013
-#define ZYNQMP_SIP_SVC_MMIO_READ 0xC2000014
-#define ZYNQMP_DIV_MAX_VAL 0x3F
-#define ZYNQMP_DIV1_SHFT 8
-#define ZYNQMP_DIV1_SHFT 8
-#define ZYNQMP_DIV2_SHFT 16
-#define ZYNQMP_DIV_MASK 0x3F
-#define ZYNQMP_PLL_CTRL_FBDIV_MASK 0x7F
-#define ZYNQMP_PLL_CTRL_FBDIV_SHFT 8
-#define ZYNQMP_GEM_REF_CTRL_SRC_MASK 0x7
-#define ZYNQMP_GEM0_CLK_ID 45
-#define ZYNQMP_GEM1_CLK_ID 46
-#define ZYNQMP_GEM2_CLK_ID 47
-#define ZYNQMP_GEM3_CLK_ID 48
+DECLARE_GLOBAL_DATA_PTR;
-static unsigned long pss_ref_clk;
+static const resource_size_t zynqmp_crf_apb_clkc_base = 0xfd1a0020;
+static const resource_size_t zynqmp_crl_apb_clkc_base = 0xff5e0020;
-static int zynqmp_calculate_divisors(unsigned long req_rate,
- unsigned long parent_rate,
- u32 *div1, u32 *div2)
+/* Full power domain clocks */
+#define CRF_APB_APLL_CTRL (zynqmp_crf_apb_clkc_base + 0x00)
+#define CRF_APB_DPLL_CTRL (zynqmp_crf_apb_clkc_base + 0x0c)
+#define CRF_APB_VPLL_CTRL (zynqmp_crf_apb_clkc_base + 0x18)
+#define CRF_APB_PLL_STATUS (zynqmp_crf_apb_clkc_base + 0x24)
+#define CRF_APB_APLL_TO_LPD_CTRL (zynqmp_crf_apb_clkc_base + 0x28)
+#define CRF_APB_DPLL_TO_LPD_CTRL (zynqmp_crf_apb_clkc_base + 0x2c)
+#define CRF_APB_VPLL_TO_LPD_CTRL (zynqmp_crf_apb_clkc_base + 0x30)
+/* Peripheral clocks */
+#define CRF_APB_ACPU_CTRL (zynqmp_crf_apb_clkc_base + 0x40)
+#define CRF_APB_DBG_TRACE_CTRL (zynqmp_crf_apb_clkc_base + 0x44)
+#define CRF_APB_DBG_FPD_CTRL (zynqmp_crf_apb_clkc_base + 0x48)
+#define CRF_APB_DP_VIDEO_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x50)
+#define CRF_APB_DP_AUDIO_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x54)
+#define CRF_APB_DP_STC_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x5c)
+#define CRF_APB_DDR_CTRL (zynqmp_crf_apb_clkc_base + 0x60)
+#define CRF_APB_GPU_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x64)
+#define CRF_APB_SATA_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x80)
+#define CRF_APB_PCIE_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x94)
+#define CRF_APB_GDMA_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x98)
+#define CRF_APB_DPDMA_REF_CTRL (zynqmp_crf_apb_clkc_base + 0x9c)
+#define CRF_APB_TOPSW_MAIN_CTRL (zynqmp_crf_apb_clkc_base + 0xa0)
+#define CRF_APB_TOPSW_LSBUS_CTRL (zynqmp_crf_apb_clkc_base + 0xa4)
+#define CRF_APB_GTGREF0_REF_CTRL (zynqmp_crf_apb_clkc_base + 0xa8)
+#define CRF_APB_DBG_TSTMP_CTRL (zynqmp_crf_apb_clkc_base + 0xd8)
+
+/* Low power domain clocks */
+#define CRL_APB_IOPLL_CTRL (zynqmp_crl_apb_clkc_base + 0x00)
+#define CRL_APB_RPLL_CTRL (zynqmp_crl_apb_clkc_base + 0x10)
+#define CRL_APB_PLL_STATUS (zynqmp_crl_apb_clkc_base + 0x20)
+#define CRL_APB_IOPLL_TO_FPD_CTRL (zynqmp_crl_apb_clkc_base + 0x24)
+#define CRL_APB_RPLL_TO_FPD_CTRL (zynqmp_crl_apb_clkc_base + 0x28)
+/* Peripheral clocks */
+#define CRL_APB_USB3_DUAL_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x2c)
+#define CRL_APB_GEM0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x30)
+#define CRL_APB_GEM1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x34)
+#define CRL_APB_GEM2_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x38)
+#define CRL_APB_GEM3_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x3c)
+#define CRL_APB_USB0_BUS_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x40)
+#define CRL_APB_USB1_BUS_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x44)
+#define CRL_APB_QSPI_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x48)
+#define CRL_APB_SDIO0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x4c)
+#define CRL_APB_SDIO1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x50)
+#define CRL_APB_UART0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x54)
+#define CRL_APB_UART1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x58)
+#define CRL_APB_SPI0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x5c)
+#define CRL_APB_SPI1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x60)
+#define CRL_APB_CAN0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x64)
+#define CRL_APB_CAN1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x68)
+#define CRL_APB_CPU_R5_CTRL (zynqmp_crl_apb_clkc_base + 0x70)
+#define CRL_APB_IOU_SWITCH_CTRL (zynqmp_crl_apb_clkc_base + 0x7c)
+#define CRL_APB_CSU_PLL_CTRL (zynqmp_crl_apb_clkc_base + 0x80)
+#define CRL_APB_PCAP_CTRL (zynqmp_crl_apb_clkc_base + 0x84)
+#define CRL_APB_LPD_SWITCH_CTRL (zynqmp_crl_apb_clkc_base + 0x88)
+#define CRL_APB_LPD_LSBUS_CTRL (zynqmp_crl_apb_clkc_base + 0x8c)
+#define CRL_APB_DBG_LPD_CTRL (zynqmp_crl_apb_clkc_base + 0x90)
+#define CRL_APB_NAND_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x94)
+#define CRL_APB_ADMA_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x98)
+#define CRL_APB_PL0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xa0)
+#define CRL_APB_PL1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xa4)
+#define CRL_APB_PL2_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xa8)
+#define CRL_APB_PL3_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xac)
+#define CRL_APB_PL0_THR_CNT (zynqmp_crl_apb_clkc_base + 0xb4)
+#define CRL_APB_PL1_THR_CNT (zynqmp_crl_apb_clkc_base + 0xbc)
+#define CRL_APB_PL2_THR_CNT (zynqmp_crl_apb_clkc_base + 0xc4)
+#define CRL_APB_PL3_THR_CNT (zynqmp_crl_apb_clkc_base + 0xdc)
+#define CRL_APB_GEM_TSU_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xe0)
+#define CRL_APB_DLL_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xe4)
+#define CRL_APB_AMS_REF_CTRL (zynqmp_crl_apb_clkc_base + 0xe8)
+#define CRL_APB_I2C0_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x100)
+#define CRL_APB_I2C1_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x104)
+#define CRL_APB_TIMESTAMP_REF_CTRL (zynqmp_crl_apb_clkc_base + 0x108)
+
+#define ZYNQ_CLK_MAXDIV 0x3f
+#define CLK_CTRL_DIV1_SHIFT 16
+#define CLK_CTRL_DIV1_MASK (ZYNQ_CLK_MAXDIV << CLK_CTRL_DIV1_SHIFT)
+#define CLK_CTRL_DIV0_SHIFT 8
+#define CLK_CTRL_DIV0_MASK (ZYNQ_CLK_MAXDIV << CLK_CTRL_DIV0_SHIFT)
+#define CLK_CTRL_SRCSEL_SHIFT 0
+#define CLK_CTRL_SRCSEL_MASK (0x3 << CLK_CTRL_SRCSEL_SHIFT)
+#define PLLCTRL_FBDIV_MASK 0x7f00
+#define PLLCTRL_FBDIV_SHIFT 8
+#define PLLCTRL_RESET_MASK 1
+#define PLLCTRL_RESET_SHIFT 0
+#define PLLCTRL_BYPASS_MASK 0x8
+#define PLLCTRL_BYPASS_SHFT 3
+#define PLLCTRL_POST_SRC_SHFT 24
+#define PLLCTRL_POST_SRC_MASK (0x7 << PLLCTRL_POST_SRC_SHFT)
+
+
+#define NUM_MIO_PINS 77
+
+enum zynqmp_clk {
+ iopll, rpll,
+ apll, dpll, vpll,
+ iopll_to_fpd, rpll_to_fpd, apll_to_lpd, dpll_to_lpd, vpll_to_lpd,
+ acpu, acpu_half,
+ dbg_fpd, dbg_lpd, dbg_trace, dbg_tstmp,
+ dp_video_ref, dp_audio_ref,
+ dp_stc_ref, gdma_ref, dpdma_ref,
+ ddr_ref, sata_ref, pcie_ref,
+ gpu_ref, gpu_pp0_ref, gpu_pp1_ref,
+ topsw_main, topsw_lsbus,
+ gtgref0_ref,
+ lpd_switch, lpd_lsbus,
+ usb0_bus_ref, usb1_bus_ref, usb3_dual_ref, usb0, usb1,
+ cpu_r5, cpu_r5_core,
+ csu_spb, csu_pll, pcap,
+ iou_switch,
+ gem_tsu_ref, gem_tsu,
+ gem0_ref, gem1_ref, gem2_ref, gem3_ref,
+ gem0_rx, gem1_rx, gem2_rx, gem3_rx,
+ qspi_ref,
+ sdio0_ref, sdio1_ref,
+ uart0_ref, uart1_ref,
+ spi0_ref, spi1_ref,
+ nand_ref,
+ i2c0_ref, i2c1_ref, can0_ref, can1_ref, can0, can1,
+ dll_ref,
+ adma_ref,
+ timestamp_ref,
+ ams_ref,
+ pl0, pl1, pl2, pl3,
+ wdt,
+ clk_max,
+};
+
+static const char * const clk_names[clk_max] = {
+ "iopll", "rpll", "apll", "dpll",
+ "vpll", "iopll_to_fpd", "rpll_to_fpd",
+ "apll_to_lpd", "dpll_to_lpd", "vpll_to_lpd",
+ "acpu", "acpu_half", "dbf_fpd", "dbf_lpd",
+ "dbg_trace", "dbg_tstmp", "dp_video_ref",
+ "dp_audio_ref", "dp_stc_ref", "gdma_ref",
+ "dpdma_ref", "ddr_ref", "sata_ref", "pcie_ref",
+ "gpu_ref", "gpu_pp0_ref", "gpu_pp1_ref",
+ "topsw_main", "topsw_lsbus", "gtgref0_ref",
+ "lpd_switch", "lpd_lsbus", "usb0_bus_ref",
+ "usb1_bus_ref", "usb3_dual_ref", "usb0",
+ "usb1", "cpu_r5", "cpu_r5_core", "csu_spb",
+ "csu_pll", "pcap", "iou_switch", "gem_tsu_ref",
+ "gem_tsu", "gem0_ref", "gem1_ref", "gem2_ref",
+ "gem3_ref", "gem0_tx", "gem1_tx", "gem2_tx",
+ "gem3_tx", "qspi_ref", "sdio0_ref", "sdio1_ref",
+ "uart0_ref", "uart1_ref", "spi0_ref",
+ "spi1_ref", "nand_ref", "i2c0_ref", "i2c1_ref",
+ "can0_ref", "can1_ref", "can0", "can1",
+ "dll_ref", "adma_ref", "timestamp_ref",
+ "ams_ref", "pl0", "pl1", "pl2", "pl3", "wdt"
+};
+
+struct zynqmp_clk_priv {
+ unsigned long ps_clk_freq;
+ unsigned long video_clk;
+ unsigned long pss_alt_ref_clk;
+ unsigned long gt_crx_ref_clk;
+ unsigned long aux_ref_clk;
+};
+
+static u32 zynqmp_clk_get_register(enum zynqmp_clk id)
{
- u32 req_div = 1;
- u32 i;
+ switch (id) {
+ case iopll:
+ return CRL_APB_IOPLL_CTRL;
+ case rpll:
+ return CRL_APB_RPLL_CTRL;
+ case apll:
+ return CRF_APB_APLL_CTRL;
+ case dpll:
+ return CRF_APB_DPLL_CTRL;
+ case vpll:
+ return CRF_APB_VPLL_CTRL;
+ case acpu:
+ return CRF_APB_ACPU_CTRL;
+ case ddr_ref:
+ return CRF_APB_DDR_CTRL;
+ case qspi_ref:
+ return CRL_APB_QSPI_REF_CTRL;
+ case gem0_ref:
+ return CRL_APB_GEM0_REF_CTRL;
+ case gem1_ref:
+ return CRL_APB_GEM1_REF_CTRL;
+ case gem2_ref:
+ return CRL_APB_GEM2_REF_CTRL;
+ case gem3_ref:
+ return CRL_APB_GEM3_REF_CTRL;
+ case uart0_ref:
+ return CRL_APB_UART0_REF_CTRL;
+ case uart1_ref:
+ return CRL_APB_UART1_REF_CTRL;
+ case sdio0_ref:
+ return CRL_APB_SDIO0_REF_CTRL;
+ case sdio1_ref:
+ return CRL_APB_SDIO1_REF_CTRL;
+ case spi0_ref:
+ return CRL_APB_SPI0_REF_CTRL;
+ case spi1_ref:
+ return CRL_APB_SPI1_REF_CTRL;
+ case nand_ref:
+ return CRL_APB_NAND_REF_CTRL;
+ case i2c0_ref:
+ return CRL_APB_I2C0_REF_CTRL;
+ case i2c1_ref:
+ return CRL_APB_I2C1_REF_CTRL;
+ case can0_ref:
+ return CRL_APB_CAN0_REF_CTRL;
+ case can1_ref:
+ return CRL_APB_CAN1_REF_CTRL;
+ default:
+ debug("Invalid clk id%d\n", id);
+ }
+ return 0;
+}
- /*
- * calculate two divisors to get
- * required rate and each divisor
- * should be less than 63
- */
- req_div = DIV_ROUND_UP(parent_rate, req_rate);
+static enum zynqmp_clk zynqmp_clk_get_cpu_pll(u32 clk_ctrl)
+{
+ u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >>
+ CLK_CTRL_SRCSEL_SHIFT;
- for (i = 1; i <= req_div; i++) {
- if ((req_div % i) == 0) {
- *div1 = req_div / i;
- *div2 = i;
- if ((*div1 < ZYNQMP_DIV_MAX_VAL) &&
- (*div2 < ZYNQMP_DIV_MAX_VAL))
- return 0;
+ switch (srcsel) {
+ case 2:
+ return dpll;
+ case 3:
+ return vpll;
+ case 0 ... 1:
+ default:
+ return apll;
+ }
+}
+
+static enum zynqmp_clk zynqmp_clk_get_ddr_pll(u32 clk_ctrl)
+{
+ u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >>
+ CLK_CTRL_SRCSEL_SHIFT;
+
+ switch (srcsel) {
+ case 1:
+ return vpll;
+ case 0:
+ default:
+ return dpll;
+ }
+}
+
+static enum zynqmp_clk zynqmp_clk_get_peripheral_pll(u32 clk_ctrl)
+{
+ u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >>
+ CLK_CTRL_SRCSEL_SHIFT;
+
+ switch (srcsel) {
+ case 2:
+ return rpll;
+ case 3:
+ return dpll;
+ case 0 ... 1:
+ default:
+ return iopll;
+ }
+}
+
+static ulong zynqmp_clk_get_pll_src(ulong clk_ctrl,
+ struct zynqmp_clk_priv *priv,
+ bool is_pre_src)
+{
+ u32 src_sel;
+
+ if (is_pre_src)
+ src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >>
+ PLLCTRL_POST_SRC_SHFT;
+ else
+ src_sel = (clk_ctrl & PLLCTRL_POST_SRC_MASK) >>
+ PLLCTRL_POST_SRC_SHFT;
+
+ switch (src_sel) {
+ case 4:
+ return priv->video_clk;
+ case 5:
+ return priv->pss_alt_ref_clk;
+ case 6:
+ return priv->aux_ref_clk;
+ case 7:
+ return priv->gt_crx_ref_clk;
+ case 0 ... 3:
+ default:
+ return priv->ps_clk_freq;
+ }
+}
+
+static ulong zynqmp_clk_get_pll_rate(struct zynqmp_clk_priv *priv,
+ enum zynqmp_clk id)
+{
+ u32 clk_ctrl, reset, mul;
+ ulong freq;
+ int ret;
+
+ ret = zynqmp_mmio_read(zynqmp_clk_get_register(id), &clk_ctrl);
+ if (ret) {
+ printf("%s mio read fail\n", __func__);
+ return -EIO;
+ }
+
+ if (clk_ctrl & PLLCTRL_BYPASS_MASK)
+ freq = zynqmp_clk_get_pll_src(clk_ctrl, priv, 0);
+ else
+ freq = zynqmp_clk_get_pll_src(clk_ctrl, priv, 1);
+
+ reset = (clk_ctrl & PLLCTRL_RESET_MASK) >> PLLCTRL_RESET_SHIFT;
+ if (reset && !(clk_ctrl & PLLCTRL_BYPASS_MASK))
+ return 0;
+
+ mul = (clk_ctrl & PLLCTRL_FBDIV_MASK) >> PLLCTRL_FBDIV_SHIFT;
+
+ freq *= mul;
+
+ if (clk_ctrl & (1 << 16))
+ freq /= 2;
+
+ return freq;
+}
+
+static ulong zynqmp_clk_get_cpu_rate(struct zynqmp_clk_priv *priv,
+ enum zynqmp_clk id)
+{
+ u32 clk_ctrl, div;
+ enum zynqmp_clk pll;
+ int ret;
+ unsigned long pllrate;
+
+ ret = zynqmp_mmio_read(CRF_APB_ACPU_CTRL, &clk_ctrl);
+ if (ret) {
+ printf("%s mio read fail\n", __func__);
+ return -EIO;
+ }
+
+ div = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT;
+
+ pll = zynqmp_clk_get_cpu_pll(clk_ctrl);
+ pllrate = zynqmp_clk_get_pll_rate(priv, pll);
+ if (IS_ERR_VALUE(pllrate))
+ return pllrate;
+
+ return DIV_ROUND_CLOSEST(pllrate, div);
+}
+
+static ulong zynqmp_clk_get_ddr_rate(struct zynqmp_clk_priv *priv)
+{
+ u32 clk_ctrl, div;
+ enum zynqmp_clk pll;
+ int ret;
+ ulong pllrate;
+
+ ret = zynqmp_mmio_read(CRF_APB_DDR_CTRL, &clk_ctrl);
+ if (ret) {
+ printf("%s mio read fail\n", __func__);
+ return -EIO;
+ }
+
+ div = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT;
+
+ pll = zynqmp_clk_get_ddr_pll(clk_ctrl);
+ pllrate = zynqmp_clk_get_pll_rate(priv, pll);
+ if (IS_ERR_VALUE(pllrate))
+ return pllrate;
+
+ return DIV_ROUND_CLOSEST(pllrate, div);
+}
+
+static ulong zynqmp_clk_get_peripheral_rate(struct zynqmp_clk_priv *priv,
+ enum zynqmp_clk id, bool two_divs)
+{
+ enum zynqmp_clk pll;
+ u32 clk_ctrl, div0;
+ u32 div1 = 1;
+ int ret;
+ ulong pllrate;
+
+ ret = zynqmp_mmio_read(zynqmp_clk_get_register(id), &clk_ctrl);
+ if (ret) {
+ printf("%s mio read fail\n", __func__);
+ return -EIO;
+ }
+
+ div0 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT;
+ if (!div0)
+ div0 = 1;
+
+ if (two_divs) {
+ div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT;
+ if (!div1)
+ div1 = 1;
+ }
+
+ pll = zynqmp_clk_get_peripheral_pll(clk_ctrl);
+ pllrate = zynqmp_clk_get_pll_rate(priv, pll);
+ if (IS_ERR_VALUE(pllrate))
+ return pllrate;
+
+ return
+ DIV_ROUND_CLOSEST(
+ DIV_ROUND_CLOSEST(pllrate, div0), div1);
+}
+
+static unsigned long zynqmp_clk_calc_peripheral_two_divs(ulong rate,
+ ulong pll_rate,
+ u32 *div0, u32 *div1)
+{
+ long new_err, best_err = (long)(~0UL >> 1);
+ ulong new_rate, best_rate = 0;
+ u32 d0, d1;
+
+ for (d0 = 1; d0 <= ZYNQ_CLK_MAXDIV; d0++) {
+ for (d1 = 1; d1 <= ZYNQ_CLK_MAXDIV >> 1; d1++) {
+ new_rate = DIV_ROUND_CLOSEST(
+ DIV_ROUND_CLOSEST(pll_rate, d0), d1);
+ new_err = abs(new_rate - rate);
+
+ if (new_err < best_err) {
+ *div0 = d0;
+ *div1 = d1;
+ best_err = new_err;
+ best_rate = new_rate;
+ }
}
}
- return -1;
+ return best_rate;
}
-static int zynqmp_get_periph_id(unsigned long id)
+static ulong zynqmp_clk_set_peripheral_rate(struct zynqmp_clk_priv *priv,
+ enum zynqmp_clk id, ulong rate,
+ bool two_divs)
{
- int periph_id;
+ enum zynqmp_clk pll;
+ u32 clk_ctrl, div0 = 0, div1 = 0;
+ ulong pll_rate, new_rate;
+ u32 reg;
+ int ret;
+ u32 mask;
+
+ reg = zynqmp_clk_get_register(id);
+ ret = zynqmp_mmio_read(reg, &clk_ctrl);
+ if (ret) {
+ printf("%s mio read fail\n", __func__);
+ return -EIO;
+ }
+
+ pll = zynqmp_clk_get_peripheral_pll(clk_ctrl);
+ pll_rate = zynqmp_clk_get_pll_rate(priv, pll);
+ if (IS_ERR_VALUE(pll_rate))
+ return pll_rate;
+
+ clk_ctrl &= ~CLK_CTRL_DIV0_MASK;
+ if (two_divs) {
+ clk_ctrl &= ~CLK_CTRL_DIV1_MASK;
+ new_rate = zynqmp_clk_calc_peripheral_two_divs(rate, pll_rate,
+ &div0, &div1);
+ clk_ctrl |= div1 << CLK_CTRL_DIV1_SHIFT;
+ } else {
+ div0 = DIV_ROUND_CLOSEST(pll_rate, rate);
+ if (div0 > ZYNQ_CLK_MAXDIV)
+ div0 = ZYNQ_CLK_MAXDIV;
+ new_rate = DIV_ROUND_CLOSEST(rate, div0);
+ }
+ clk_ctrl |= div0 << CLK_CTRL_DIV0_SHIFT;
+
+ mask = (ZYNQ_CLK_MAXDIV << CLK_CTRL_DIV0_SHIFT) |
+ (ZYNQ_CLK_MAXDIV << CLK_CTRL_DIV1_SHIFT);
+
+ ret = zynqmp_mmio_write(reg, mask, clk_ctrl);
+ if (ret) {
+ printf("%s mio write fail\n", __func__);
+ return -EIO;
+ }
+
+ return new_rate;
+}
+
+static ulong zynqmp_clk_get_rate(struct clk *clk)
+{
+ struct zynqmp_clk_priv *priv = dev_get_priv(clk->dev);
+ enum zynqmp_clk id = clk->id;
+ bool two_divs = false;
switch (id) {
- case ZYNQMP_GEM0_CLK_ID:
- periph_id = 0;
- break;
- case ZYNQMP_GEM1_CLK_ID:
- periph_id = 1;
- break;
- case ZYNQMP_GEM2_CLK_ID:
- periph_id = 2;
- break;
- case ZYNQMP_GEM3_CLK_ID:
- periph_id = 3;
- break;
+ case iopll ... vpll:
+ return zynqmp_clk_get_pll_rate(priv, id);
+ case acpu:
+ return zynqmp_clk_get_cpu_rate(priv, id);
+ case ddr_ref:
+ return zynqmp_clk_get_ddr_rate(priv);
+ case gem0_ref ... gem3_ref:
+ case qspi_ref ... can1_ref:
+ two_divs = true;
+ return zynqmp_clk_get_peripheral_rate(priv, id, two_divs);
default:
- printf("%s, Invalid clock id:%ld\n", __func__, id);
- return -EINVAL;
+ return -ENXIO;
}
-
- return periph_id;
}
-static int zynqmp_set_clk(unsigned long id, u32 div1, u32 div2)
+static ulong zynqmp_clk_set_rate(struct clk *clk, ulong rate)
{
- struct pt_regs regs;
- ulong reg;
- u32 mask, value;
+ struct zynqmp_clk_priv *priv = dev_get_priv(clk->dev);
+ enum zynqmp_clk id = clk->id;
+ bool two_divs = true;
- id = zynqmp_get_periph_id(id);
- if (id < 0)
- return -EINVAL;
-
- reg = (ulong)((u32 *)ZYNQMP_GEM0_REF_CTRL + id);
- mask = (ZYNQMP_DIV_MASK << ZYNQMP_DIV1_SHFT) |
- (ZYNQMP_DIV_MASK << ZYNQMP_DIV2_SHFT);
- value = (div1 << ZYNQMP_DIV1_SHFT) | (div2 << ZYNQMP_DIV2_SHFT);
-
- debug("%s: reg:0x%lx, mask:0x%x, value:0x%x\n", __func__, reg, mask,
- value);
-
- regs.regs[0] = ZYNQMP_SIP_SVC_MMIO_WRITE;
- regs.regs[1] = ((u64)mask << 32) | reg;
- regs.regs[2] = value;
- regs.regs[3] = 0;
-
- smc_call(®s);
-
- return regs.regs[0];
-}
-
-static unsigned long zynqmp_clk_get_rate(struct clk *clk)
-{
- struct pt_regs regs;
- ulong reg;
- unsigned long value;
- int id;
-
- id = zynqmp_get_periph_id(clk->id);
- if (id < 0)
- return -EINVAL;
-
- reg = (ulong)((u32 *)ZYNQMP_GEM0_REF_CTRL + id);
-
- regs.regs[0] = ZYNQMP_SIP_SVC_MMIO_READ;
- regs.regs[1] = reg;
- regs.regs[2] = 0;
- regs.regs[3] = 0;
-
- smc_call(®s);
-
- value = upper_32_bits(regs.regs[0]);
-
- value &= ZYNQMP_GEM_REF_CTRL_SRC_MASK;
-
- switch (value) {
- case 0:
- regs.regs[1] = ZYNQMP_IOPLL_CTRL;
- break;
- case 2:
- regs.regs[1] = ZYNQMP_RPLL_CTRL;
- break;
- case 3:
- regs.regs[1] = ZYNQMP_DPLL_CTRL;
- break;
+ switch (id) {
+ case gem0_ref ... gem3_ref:
+ case qspi_ref ... can1_ref:
+ return zynqmp_clk_set_peripheral_rate(priv, id,
+ rate, two_divs);
default:
- return -EINVAL;
+ return -ENXIO;
}
-
- regs.regs[0] = ZYNQMP_SIP_SVC_MMIO_READ;
- regs.regs[2] = 0;
- regs.regs[3] = 0;
-
- smc_call(®s);
-
- value = upper_32_bits(regs.regs[0]) &
- (ZYNQMP_PLL_CTRL_FBDIV_MASK <<
- ZYNQMP_PLL_CTRL_FBDIV_SHFT);
- value >>= ZYNQMP_PLL_CTRL_FBDIV_SHFT;
- value *= pss_ref_clk;
-
- return value;
}
-static ulong zynqmp_clk_set_rate(struct clk *clk, unsigned long clk_rate)
+int soc_clk_dump(void)
{
- int ret;
- u32 div1 = 0;
- u32 div2 = 0;
- unsigned long input_clk;
+ struct udevice *dev;
+ int i, ret;
- input_clk = zynqmp_clk_get_rate(clk);
- if (IS_ERR_VALUE(input_clk)) {
- dev_err(dev, "failed to get input_clk\n");
- return -EINVAL;
- }
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(zynqmp_clk), &dev);
+ if (ret)
+ return ret;
- debug("%s: i/p CLK %ld, clk_rate:0x%ld\n", __func__, input_clk,
- clk_rate);
+ printf("clk\t\tfrequency\n");
+ for (i = 0; i < clk_max; i++) {
+ const char *name = clk_names[i];
+ if (name) {
+ struct clk clk;
+ unsigned long rate;
- ret = zynqmp_calculate_divisors(clk_rate, input_clk, &div1, &div2);
- if (ret) {
- dev_err(dev, "failed to proper divisors\n");
- return -EINVAL;
- }
+ clk.id = i;
+ ret = clk_request(dev, &clk);
+ if (ret < 0)
+ return ret;
- debug("%s: Div1:%d, Div2:%d\n", __func__, div1, div2);
+ rate = clk_get_rate(&clk);
- ret = zynqmp_set_clk(clk->id, div1, div2);
- if (ret) {
- dev_err(dev, "failed to set gem clk\n");
- return -EINVAL;
+ clk_free(&clk);
+
+ if ((rate == (unsigned long)-ENOSYS) ||
+ (rate == (unsigned long)-ENXIO) ||
+ (rate == (unsigned long)-EIO))
+ printf("%10s%20s\n", name, "unknown");
+ else
+ printf("%10s%20lu\n", name, rate);
+ }
}
return 0;
}
-static int zynqmp_clk_probe(struct udevice *dev)
+static int zynqmp_get_freq_by_name(char *name, struct udevice *dev, ulong *freq)
{
struct clk clk;
int ret;
- debug("%s\n", __func__);
- ret = clk_get_by_name(dev, "pss_ref_clk", &clk);
+ ret = clk_get_by_name(dev, name, &clk);
if (ret < 0) {
- dev_err(dev, "failed to get pss_ref_clk\n");
+ dev_err(dev, "failed to get %s\n", name);
return ret;
}
- pss_ref_clk = clk_get_rate(&clk);
- if (IS_ERR_VALUE(pss_ref_clk)) {
- dev_err(dev, "failed to get rate pss_ref_clk\n");
+ *freq = clk_get_rate(&clk);
+ if (IS_ERR_VALUE(*freq)) {
+ dev_err(dev, "failed to get rate %s\n", name);
return -EINVAL;
}
return 0;
}
+static int zynqmp_clk_probe(struct udevice *dev)
+{
+ int ret;
+ struct zynqmp_clk_priv *priv = dev_get_priv(dev);
+
+ debug("%s\n", __func__);
+ ret = zynqmp_get_freq_by_name("pss_ref_clk", dev, &priv->ps_clk_freq);
+ if (ret < 0)
+ return -EINVAL;
+
+ ret = zynqmp_get_freq_by_name("video_clk", dev, &priv->video_clk);
+ if (ret < 0)
+ return -EINVAL;
+
+ ret = zynqmp_get_freq_by_name("pss_alt_ref_clk", dev,
+ &priv->pss_alt_ref_clk);
+ if (ret < 0)
+ return -EINVAL;
+
+ ret = zynqmp_get_freq_by_name("aux_ref_clk", dev, &priv->aux_ref_clk);
+ if (ret < 0)
+ return -EINVAL;
+
+ ret = zynqmp_get_freq_by_name("gt_crx_ref_clk", dev,
+ &priv->gt_crx_ref_clk);
+ if (ret < 0)
+ return -EINVAL;
+
+ return 0;
+}
static struct clk_ops zynqmp_clk_ops = {
.set_rate = zynqmp_clk_set_rate,
@@ -238,4 +637,5 @@
.of_match = zynqmp_clk_ids,
.probe = zynqmp_clk_probe,
.ops = &zynqmp_clk_ops,
+ .priv_auto_alloc_size = sizeof(struct zynqmp_clk_priv),
};
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
new file mode 100644
index 0000000..07640d1
--- /dev/null
+++ b/drivers/clk/renesas/Kconfig
@@ -0,0 +1,13 @@
+config CLK_RENESAS
+ bool "Renesas clock drivers"
+ depends on CLK && ARCH_RMOBILE
+ help
+ Enable support for clock present on Renesas RCar SoCs.
+
+config CLK_RCAR_GEN3
+ bool "Renesas RCar Gen3 R8A7795/R8A7796 clock driver"
+ def_bool y if RCAR_GEN3
+ depends on CLK_RENESAS
+ help
+ Enable this to support the clocks on Renesas RCar Gen3
+ R8A7795 and R8A7796 SoC.
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
new file mode 100644
index 0000000..bd63505
--- /dev/null
+++ b/drivers/clk/renesas/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_CLK_RCAR_GEN3) += clk-rcar-gen3.o
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
new file mode 100644
index 0000000..5ea7d9a
--- /dev/null
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -0,0 +1,951 @@
+/*
+ * Renesas RCar Gen3 R8A7795/R8A7796 CPG MSSR driver
+ *
+ * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on the following driver from Linux kernel:
+ * r8a7796 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2016 Glider bvba
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <wait_bit.h>
+#include <asm/io.h>
+
+#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
+#include <dt-bindings/clock/r8a7796-cpg-mssr.h>
+
+#define CPG_RST_MODEMR 0x0060
+
+#define CPG_PLL0CR 0x00d8
+#define CPG_PLL2CR 0x002c
+#define CPG_PLL4CR 0x01f4
+
+/*
+ * Module Standby and Software Reset register offets.
+ *
+ * If the registers exist, these are valid for SH-Mobile, R-Mobile,
+ * R-Car Gen2, R-Car Gen3, and RZ/G1.
+ * These are NOT valid for R-Car Gen1 and RZ/A1!
+ */
+
+/*
+ * Module Stop Status Register offsets
+ */
+
+static const u16 mstpsr[] = {
+ 0x030, 0x038, 0x040, 0x048, 0x04C, 0x03C, 0x1C0, 0x1C4,
+ 0x9A0, 0x9A4, 0x9A8, 0x9AC,
+};
+
+#define MSTPSR(i) mstpsr[i]
+
+
+/*
+ * System Module Stop Control Register offsets
+ */
+
+static const u16 smstpcr[] = {
+ 0x130, 0x134, 0x138, 0x13C, 0x140, 0x144, 0x148, 0x14C,
+ 0x990, 0x994, 0x998, 0x99C,
+};
+
+#define SMSTPCR(i) smstpcr[i]
+
+
+/* Realtime Module Stop Control Register offsets */
+#define RMSTPCR(i) (smstpcr[i] - 0x20)
+
+/* Modem Module Stop Control Register offsets (r8a73a4) */
+#define MMSTPCR(i) (smstpcr[i] + 0x20)
+
+/* Software Reset Clearing Register offsets */
+#define SRSTCLR(i) (0x940 + (i) * 4)
+
+struct gen3_clk_priv {
+ void __iomem *base;
+ struct clk clk_extal;
+ struct clk clk_extalr;
+ const struct rcar_gen3_cpg_pll_config *cpg_pll_config;
+ const struct mssr_mod_clk *mod_clk;
+ u32 mod_clk_size;
+};
+
+/*
+ * Definitions of CPG Core Clocks
+ *
+ * These include:
+ * - Clock outputs exported to DT
+ * - External input clocks
+ * - Internal CPG clocks
+ */
+struct cpg_core_clk {
+ /* Common */
+ const char *name;
+ unsigned int id;
+ unsigned int type;
+ /* Depending on type */
+ unsigned int parent; /* Core Clocks only */
+ unsigned int div;
+ unsigned int mult;
+ unsigned int offset;
+};
+
+enum clk_types {
+ /* Generic */
+ CLK_TYPE_IN, /* External Clock Input */
+ CLK_TYPE_FF, /* Fixed Factor Clock */
+
+ /* Custom definitions start here */
+ CLK_TYPE_CUSTOM,
+};
+
+#define DEF_TYPE(_name, _id, _type...) \
+ { .name = _name, .id = _id, .type = _type }
+#define DEF_BASE(_name, _id, _type, _parent...) \
+ DEF_TYPE(_name, _id, _type, .parent = _parent)
+
+#define DEF_INPUT(_name, _id) \
+ DEF_TYPE(_name, _id, CLK_TYPE_IN)
+#define DEF_FIXED(_name, _id, _parent, _div, _mult) \
+ DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
+#define DEF_GEN3_SD(_name, _id, _parent, _offset) \
+ DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
+
+/*
+ * Definitions of Module Clocks
+ */
+struct mssr_mod_clk {
+ const char *name;
+ unsigned int id;
+ unsigned int parent; /* Add MOD_CLK_BASE for Module Clocks */
+};
+
+/* Convert from sparse base-100 to packed index space */
+#define MOD_CLK_PACK(x) ((x) - ((x) / 100) * (100 - 32))
+
+#define MOD_CLK_ID(x) (MOD_CLK_BASE + MOD_CLK_PACK(x))
+
+#define DEF_MOD(_name, _mod, _parent...) \
+ { .name = _name, .id = MOD_CLK_ID(_mod), .parent = _parent }
+
+enum rcar_gen3_clk_types {
+ CLK_TYPE_GEN3_MAIN = CLK_TYPE_CUSTOM,
+ CLK_TYPE_GEN3_PLL0,
+ CLK_TYPE_GEN3_PLL1,
+ CLK_TYPE_GEN3_PLL2,
+ CLK_TYPE_GEN3_PLL3,
+ CLK_TYPE_GEN3_PLL4,
+ CLK_TYPE_GEN3_SD,
+ CLK_TYPE_GEN3_R,
+};
+
+struct rcar_gen3_cpg_pll_config {
+ unsigned int extal_div;
+ unsigned int pll1_mult;
+ unsigned int pll3_mult;
+};
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A7796_CLK_OSC,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_EXTALR,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL2,
+ CLK_PLL3,
+ CLK_PLL4,
+ CLK_PLL1_DIV2,
+ CLK_PLL1_DIV4,
+ CLK_S0,
+ CLK_S1,
+ CLK_S2,
+ CLK_S3,
+ CLK_SDSRC,
+ CLK_SSPSRC,
+ CLK_RINT,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk gen3_core_clks[] = {
+ /* External Clock Inputs */
+ DEF_INPUT("extal", CLK_EXTAL),
+ DEF_INPUT("extalr", CLK_EXTALR),
+
+ /* Internal Core Clocks */
+ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+ DEF_BASE(".pll2", CLK_PLL2, CLK_TYPE_GEN3_PLL2, CLK_MAIN),
+ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+ DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
+ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
+ DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
+
+ /* Core Clock Outputs */
+ DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+ DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED("zx", R8A7796_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED("s0d1", R8A7796_CLK_S0D1, CLK_S0, 1, 1),
+ DEF_FIXED("s0d2", R8A7796_CLK_S0D2, CLK_S0, 2, 1),
+ DEF_FIXED("s0d3", R8A7796_CLK_S0D3, CLK_S0, 3, 1),
+ DEF_FIXED("s0d4", R8A7796_CLK_S0D4, CLK_S0, 4, 1),
+ DEF_FIXED("s0d6", R8A7796_CLK_S0D6, CLK_S0, 6, 1),
+ DEF_FIXED("s0d8", R8A7796_CLK_S0D8, CLK_S0, 8, 1),
+ DEF_FIXED("s0d12", R8A7796_CLK_S0D12, CLK_S0, 12, 1),
+ DEF_FIXED("s1d1", R8A7796_CLK_S1D1, CLK_S1, 1, 1),
+ DEF_FIXED("s1d2", R8A7796_CLK_S1D2, CLK_S1, 2, 1),
+ DEF_FIXED("s1d4", R8A7796_CLK_S1D4, CLK_S1, 4, 1),
+ DEF_FIXED("s2d1", R8A7796_CLK_S2D1, CLK_S2, 1, 1),
+ DEF_FIXED("s2d2", R8A7796_CLK_S2D2, CLK_S2, 2, 1),
+ DEF_FIXED("s2d4", R8A7796_CLK_S2D4, CLK_S2, 4, 1),
+ DEF_FIXED("s3d1", R8A7796_CLK_S3D1, CLK_S3, 1, 1),
+ DEF_FIXED("s3d2", R8A7796_CLK_S3D2, CLK_S3, 2, 1),
+ DEF_FIXED("s3d4", R8A7796_CLK_S3D4, CLK_S3, 4, 1),
+
+ DEF_GEN3_SD("sd0", R8A7796_CLK_SD0, CLK_SDSRC, 0x074),
+ DEF_GEN3_SD("sd1", R8A7796_CLK_SD1, CLK_SDSRC, 0x078),
+ DEF_GEN3_SD("sd2", R8A7796_CLK_SD2, CLK_SDSRC, 0x268),
+ DEF_GEN3_SD("sd3", R8A7796_CLK_SD3, CLK_SDSRC, 0x26c),
+
+ DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1),
+ DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1),
+
+ /* NOTE: HDMI, CSI, CAN etc. clock are missing */
+
+ DEF_BASE("r", R8A7796_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
+};
+
+static const struct mssr_mod_clk r8a7795_mod_clks[] = {
+ DEF_MOD("fdp1-2", 117, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
+ DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
+ DEF_MOD("scif5", 202, R8A7795_CLK_S3D4),
+ DEF_MOD("scif4", 203, R8A7795_CLK_S3D4),
+ DEF_MOD("scif3", 204, R8A7795_CLK_S3D4),
+ DEF_MOD("scif1", 206, R8A7795_CLK_S3D4),
+ DEF_MOD("scif0", 207, R8A7795_CLK_S3D4),
+ DEF_MOD("msiof3", 208, R8A7795_CLK_MSO),
+ DEF_MOD("msiof2", 209, R8A7795_CLK_MSO),
+ DEF_MOD("msiof1", 210, R8A7795_CLK_MSO),
+ DEF_MOD("msiof0", 211, R8A7795_CLK_MSO),
+ DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S0D3),
+ DEF_MOD("sys-dmac1", 218, R8A7795_CLK_S0D3),
+ DEF_MOD("sys-dmac0", 219, R8A7795_CLK_S0D3),
+ DEF_MOD("cmt3", 300, R8A7795_CLK_R),
+ DEF_MOD("cmt2", 301, R8A7795_CLK_R),
+ DEF_MOD("cmt1", 302, R8A7795_CLK_R),
+ DEF_MOD("cmt0", 303, R8A7795_CLK_R),
+ DEF_MOD("scif2", 310, R8A7795_CLK_S3D4),
+ DEF_MOD("sdif3", 311, R8A7795_CLK_SD3),
+ DEF_MOD("sdif2", 312, R8A7795_CLK_SD2),
+ DEF_MOD("sdif1", 313, R8A7795_CLK_SD1),
+ DEF_MOD("sdif0", 314, R8A7795_CLK_SD0),
+ DEF_MOD("pcie1", 318, R8A7795_CLK_S3D1),
+ DEF_MOD("pcie0", 319, R8A7795_CLK_S3D1),
+ DEF_MOD("usb-dmac30", 326, R8A7795_CLK_S3D1),
+ DEF_MOD("usb3-if1", 327, R8A7795_CLK_S3D1), /* ES1.x */
+ DEF_MOD("usb3-if0", 328, R8A7795_CLK_S3D1),
+ DEF_MOD("usb-dmac31", 329, R8A7795_CLK_S3D1),
+ DEF_MOD("usb-dmac0", 330, R8A7795_CLK_S3D1),
+ DEF_MOD("usb-dmac1", 331, R8A7795_CLK_S3D1),
+ DEF_MOD("rwdt", 402, R8A7795_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A7795_CLK_CP),
+ DEF_MOD("intc-ap", 408, R8A7795_CLK_S3D1),
+ DEF_MOD("audmac1", 501, R8A7795_CLK_S0D3),
+ DEF_MOD("audmac0", 502, R8A7795_CLK_S0D3),
+ DEF_MOD("drif7", 508, R8A7795_CLK_S3D2),
+ DEF_MOD("drif6", 509, R8A7795_CLK_S3D2),
+ DEF_MOD("drif5", 510, R8A7795_CLK_S3D2),
+ DEF_MOD("drif4", 511, R8A7795_CLK_S3D2),
+ DEF_MOD("drif3", 512, R8A7795_CLK_S3D2),
+ DEF_MOD("drif2", 513, R8A7795_CLK_S3D2),
+ DEF_MOD("drif1", 514, R8A7795_CLK_S3D2),
+ DEF_MOD("drif0", 515, R8A7795_CLK_S3D2),
+ DEF_MOD("hscif4", 516, R8A7795_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A7795_CLK_S3D1),
+ DEF_MOD("hscif2", 518, R8A7795_CLK_S3D1),
+ DEF_MOD("hscif1", 519, R8A7795_CLK_S3D1),
+ DEF_MOD("hscif0", 520, R8A7795_CLK_S3D1),
+ DEF_MOD("thermal", 522, R8A7795_CLK_CP),
+ DEF_MOD("pwm", 523, R8A7795_CLK_S0D12),
+ DEF_MOD("fcpvd3", 600, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fcpvd2", 601, R8A7795_CLK_S0D2),
+ DEF_MOD("fcpvd1", 602, R8A7795_CLK_S0D2),
+ DEF_MOD("fcpvd0", 603, R8A7795_CLK_S0D2),
+ DEF_MOD("fcpvb1", 606, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpvb0", 607, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpvi2", 609, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fcpvi1", 610, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpvi0", 611, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpf2", 613, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fcpf1", 614, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpf0", 615, R8A7795_CLK_S0D1),
+ DEF_MOD("fcpci1", 616, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fcpci0", 617, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("fcpcs", 619, R8A7795_CLK_S0D1),
+ DEF_MOD("vspd3", 620, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("vspd2", 621, R8A7795_CLK_S0D2),
+ DEF_MOD("vspd1", 622, R8A7795_CLK_S0D2),
+ DEF_MOD("vspd0", 623, R8A7795_CLK_S0D2),
+ DEF_MOD("vspbc", 624, R8A7795_CLK_S0D1),
+ DEF_MOD("vspbd", 626, R8A7795_CLK_S0D1),
+ DEF_MOD("vspi2", 629, R8A7795_CLK_S2D1), /* ES1.x */
+ DEF_MOD("vspi1", 630, R8A7795_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A7795_CLK_S0D1),
+ DEF_MOD("ehci3", 700, R8A7795_CLK_S3D4),
+ DEF_MOD("ehci2", 701, R8A7795_CLK_S3D4),
+ DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4),
+ DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4),
+ DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4),
+ DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4),
+ DEF_MOD("csi21", 713, R8A7795_CLK_CSI0), /* ES1.x */
+ DEF_MOD("csi20", 714, R8A7795_CLK_CSI0),
+ DEF_MOD("csi41", 715, R8A7795_CLK_CSI0),
+ DEF_MOD("csi40", 716, R8A7795_CLK_CSI0),
+ DEF_MOD("du3", 721, R8A7795_CLK_S2D1),
+ DEF_MOD("du2", 722, R8A7795_CLK_S2D1),
+ DEF_MOD("du1", 723, R8A7795_CLK_S2D1),
+ DEF_MOD("du0", 724, R8A7795_CLK_S2D1),
+ DEF_MOD("lvds", 727, R8A7795_CLK_S0D4),
+ DEF_MOD("hdmi1", 728, R8A7795_CLK_HDMI),
+ DEF_MOD("hdmi0", 729, R8A7795_CLK_HDMI),
+ DEF_MOD("vin7", 804, R8A7795_CLK_S0D2),
+ DEF_MOD("vin6", 805, R8A7795_CLK_S0D2),
+ DEF_MOD("vin5", 806, R8A7795_CLK_S0D2),
+ DEF_MOD("vin4", 807, R8A7795_CLK_S0D2),
+ DEF_MOD("vin3", 808, R8A7795_CLK_S0D2),
+ DEF_MOD("vin2", 809, R8A7795_CLK_S0D2),
+ DEF_MOD("vin1", 810, R8A7795_CLK_S0D2),
+ DEF_MOD("vin0", 811, R8A7795_CLK_S0D2),
+ DEF_MOD("etheravb", 812, R8A7795_CLK_S0D6),
+ DEF_MOD("sata0", 815, R8A7795_CLK_S3D2),
+ DEF_MOD("imr3", 820, R8A7795_CLK_S0D2),
+ DEF_MOD("imr2", 821, R8A7795_CLK_S0D2),
+ DEF_MOD("imr1", 822, R8A7795_CLK_S0D2),
+ DEF_MOD("imr0", 823, R8A7795_CLK_S0D2),
+ DEF_MOD("gpio7", 905, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio5", 907, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio4", 908, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio3", 909, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio2", 910, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio1", 911, R8A7795_CLK_S3D4),
+ DEF_MOD("gpio0", 912, R8A7795_CLK_S3D4),
+ DEF_MOD("can-fd", 914, R8A7795_CLK_S3D2),
+ DEF_MOD("can-if1", 915, R8A7795_CLK_S3D4),
+ DEF_MOD("can-if0", 916, R8A7795_CLK_S3D4),
+ DEF_MOD("i2c6", 918, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c5", 919, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c-dvfs", 926, R8A7795_CLK_CP),
+ DEF_MOD("i2c4", 927, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c3", 928, R8A7795_CLK_S0D6),
+ DEF_MOD("i2c2", 929, R8A7795_CLK_S3D2),
+ DEF_MOD("i2c1", 930, R8A7795_CLK_S3D2),
+ DEF_MOD("i2c0", 931, R8A7795_CLK_S3D2),
+ DEF_MOD("ssi-all", 1005, R8A7795_CLK_S3D4),
+ DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
+ DEF_MOD("scu-all", 1017, R8A7795_CLK_S3D4),
+ DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
+};
+
+static const struct mssr_mod_clk r8a7796_mod_clks[] = {
+ DEF_MOD("scif5", 202, R8A7796_CLK_S3D4),
+ DEF_MOD("scif4", 203, R8A7796_CLK_S3D4),
+ DEF_MOD("scif3", 204, R8A7796_CLK_S3D4),
+ DEF_MOD("scif1", 206, R8A7796_CLK_S3D4),
+ DEF_MOD("scif0", 207, R8A7796_CLK_S3D4),
+ DEF_MOD("msiof3", 208, R8A7796_CLK_MSO),
+ DEF_MOD("msiof2", 209, R8A7796_CLK_MSO),
+ DEF_MOD("msiof1", 210, R8A7796_CLK_MSO),
+ DEF_MOD("msiof0", 211, R8A7796_CLK_MSO),
+ DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3),
+ DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3),
+ DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3),
+ DEF_MOD("cmt3", 300, R8A7796_CLK_R),
+ DEF_MOD("cmt2", 301, R8A7796_CLK_R),
+ DEF_MOD("cmt1", 302, R8A7796_CLK_R),
+ DEF_MOD("cmt0", 303, R8A7796_CLK_R),
+ DEF_MOD("scif2", 310, R8A7796_CLK_S3D4),
+ DEF_MOD("sdif3", 311, R8A7796_CLK_SD3),
+ DEF_MOD("sdif2", 312, R8A7796_CLK_SD2),
+ DEF_MOD("sdif1", 313, R8A7796_CLK_SD1),
+ DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
+ DEF_MOD("pcie1", 318, R8A7796_CLK_S3D1),
+ DEF_MOD("pcie0", 319, R8A7796_CLK_S3D1),
+ DEF_MOD("usb-dmac0", 330, R8A7796_CLK_S3D1),
+ DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1),
+ DEF_MOD("rwdt", 402, R8A7796_CLK_R),
+ DEF_MOD("intc-ex", 407, R8A7796_CLK_CP),
+ DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
+ DEF_MOD("audmac1", 501, R8A7796_CLK_S0D3),
+ DEF_MOD("audmac0", 502, R8A7796_CLK_S0D3),
+ DEF_MOD("drif7", 508, R8A7796_CLK_S3D2),
+ DEF_MOD("drif6", 509, R8A7796_CLK_S3D2),
+ DEF_MOD("drif5", 510, R8A7796_CLK_S3D2),
+ DEF_MOD("drif4", 511, R8A7796_CLK_S3D2),
+ DEF_MOD("drif3", 512, R8A7796_CLK_S3D2),
+ DEF_MOD("drif2", 513, R8A7796_CLK_S3D2),
+ DEF_MOD("drif1", 514, R8A7796_CLK_S3D2),
+ DEF_MOD("drif0", 515, R8A7796_CLK_S3D2),
+ DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1),
+ DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1),
+ DEF_MOD("thermal", 522, R8A7796_CLK_CP),
+ DEF_MOD("pwm", 523, R8A7796_CLK_S0D12),
+ DEF_MOD("fcpvd2", 601, R8A7796_CLK_S0D2),
+ DEF_MOD("fcpvd1", 602, R8A7796_CLK_S0D2),
+ DEF_MOD("fcpvd0", 603, R8A7796_CLK_S0D2),
+ DEF_MOD("fcpvb0", 607, R8A7796_CLK_S0D1),
+ DEF_MOD("fcpvi0", 611, R8A7796_CLK_S0D1),
+ DEF_MOD("fcpf0", 615, R8A7796_CLK_S0D1),
+ DEF_MOD("fcpci0", 617, R8A7796_CLK_S0D2),
+ DEF_MOD("fcpcs", 619, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd2", 621, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd1", 622, R8A7796_CLK_S0D2),
+ DEF_MOD("vspd0", 623, R8A7796_CLK_S0D2),
+ DEF_MOD("vspb", 626, R8A7796_CLK_S0D1),
+ DEF_MOD("vspi0", 631, R8A7796_CLK_S0D1),
+ DEF_MOD("ehci1", 702, R8A7796_CLK_S3D4),
+ DEF_MOD("ehci0", 703, R8A7796_CLK_S3D4),
+ DEF_MOD("hsusb", 704, R8A7796_CLK_S3D4),
+ DEF_MOD("csi20", 714, R8A7796_CLK_CSI0),
+ DEF_MOD("csi40", 716, R8A7796_CLK_CSI0),
+ DEF_MOD("du2", 722, R8A7796_CLK_S2D1),
+ DEF_MOD("du1", 723, R8A7796_CLK_S2D1),
+ DEF_MOD("du0", 724, R8A7796_CLK_S2D1),
+ DEF_MOD("lvds", 727, R8A7796_CLK_S2D1),
+ DEF_MOD("hdmi0", 729, R8A7796_CLK_HDMI),
+ DEF_MOD("vin7", 804, R8A7796_CLK_S0D2),
+ DEF_MOD("vin6", 805, R8A7796_CLK_S0D2),
+ DEF_MOD("vin5", 806, R8A7796_CLK_S0D2),
+ DEF_MOD("vin4", 807, R8A7796_CLK_S0D2),
+ DEF_MOD("vin3", 808, R8A7796_CLK_S0D2),
+ DEF_MOD("vin2", 809, R8A7796_CLK_S0D2),
+ DEF_MOD("vin1", 810, R8A7796_CLK_S0D2),
+ DEF_MOD("vin0", 811, R8A7796_CLK_S0D2),
+ DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6),
+ DEF_MOD("imr1", 822, R8A7796_CLK_S0D2),
+ DEF_MOD("imr0", 823, R8A7796_CLK_S0D2),
+ DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio6", 906, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio5", 907, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio4", 908, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio3", 909, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio2", 910, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio1", 911, R8A7796_CLK_S3D4),
+ DEF_MOD("gpio0", 912, R8A7796_CLK_S3D4),
+ DEF_MOD("can-fd", 914, R8A7796_CLK_S3D2),
+ DEF_MOD("can-if1", 915, R8A7796_CLK_S3D4),
+ DEF_MOD("can-if0", 916, R8A7796_CLK_S3D4),
+ DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6),
+ DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6),
+ DEF_MOD("i2c-dvfs", 926, R8A7796_CLK_CP),
+ DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6),
+ DEF_MOD("i2c3", 928, R8A7796_CLK_S0D6),
+ DEF_MOD("i2c2", 929, R8A7796_CLK_S3D2),
+ DEF_MOD("i2c1", 930, R8A7796_CLK_S3D2),
+ DEF_MOD("i2c0", 931, R8A7796_CLK_S3D2),
+ DEF_MOD("ssi-all", 1005, R8A7796_CLK_S3D4),
+ DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)),
+ DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)),
+ DEF_MOD("scu-all", 1017, R8A7796_CLK_S3D4),
+ DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)),
+ DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)),
+};
+
+/*
+ * CPG Clock Data
+ */
+
+/*
+ * MD EXTAL PLL0 PLL1 PLL2 PLL3 PLL4
+ * 14 13 19 17 (MHz)
+ *-------------------------------------------------------------------
+ * 0 0 0 0 16.66 x 1 x180 x192 x144 x192 x144
+ * 0 0 0 1 16.66 x 1 x180 x192 x144 x128 x144
+ * 0 0 1 0 Prohibited setting
+ * 0 0 1 1 16.66 x 1 x180 x192 x144 x192 x144
+ * 0 1 0 0 20 x 1 x150 x160 x120 x160 x120
+ * 0 1 0 1 20 x 1 x150 x160 x120 x106 x120
+ * 0 1 1 0 Prohibited setting
+ * 0 1 1 1 20 x 1 x150 x160 x120 x160 x120
+ * 1 0 0 0 25 x 1 x120 x128 x96 x128 x96
+ * 1 0 0 1 25 x 1 x120 x128 x96 x84 x96
+ * 1 0 1 0 Prohibited setting
+ * 1 0 1 1 25 x 1 x120 x128 x96 x128 x96
+ * 1 1 0 0 33.33 / 2 x180 x192 x144 x192 x144
+ * 1 1 0 1 33.33 / 2 x180 x192 x144 x128 x144
+ * 1 1 1 0 Prohibited setting
+ * 1 1 1 1 33.33 / 2 x180 x192 x144 x192 x144
+ */
+#define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \
+ (((md) & BIT(13)) >> 11) | \
+ (((md) & BIT(19)) >> 18) | \
+ (((md) & BIT(17)) >> 17))
+
+static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = {
+ /* EXTAL div PLL1 mult PLL3 mult */
+ { 1, 192, 192, },
+ { 1, 192, 128, },
+ { 0, /* Prohibited setting */ },
+ { 1, 192, 192, },
+ { 1, 160, 160, },
+ { 1, 160, 106, },
+ { 0, /* Prohibited setting */ },
+ { 1, 160, 160, },
+ { 1, 128, 128, },
+ { 1, 128, 84, },
+ { 0, /* Prohibited setting */ },
+ { 1, 128, 128, },
+ { 2, 192, 192, },
+ { 2, 192, 128, },
+ { 0, /* Prohibited setting */ },
+ { 2, 192, 192, },
+};
+
+/*
+ * SDn Clock
+ */
+#define CPG_SD_STP_HCK BIT(9)
+#define CPG_SD_STP_CK BIT(8)
+
+#define CPG_SD_STP_MASK (CPG_SD_STP_HCK | CPG_SD_STP_CK)
+#define CPG_SD_FC_MASK (0x7 << 2 | 0x3 << 0)
+
+#define CPG_SD_DIV_TABLE_DATA(stp_hck, stp_ck, sd_srcfc, sd_fc, sd_div) \
+{ \
+ .val = ((stp_hck) ? CPG_SD_STP_HCK : 0) | \
+ ((stp_ck) ? CPG_SD_STP_CK : 0) | \
+ ((sd_srcfc) << 2) | \
+ ((sd_fc) << 0), \
+ .div = (sd_div), \
+}
+
+struct sd_div_table {
+ u32 val;
+ unsigned int div;
+};
+
+/* SDn divider
+ * sd_srcfc sd_fc div
+ * stp_hck stp_ck (div) (div) = sd_srcfc x sd_fc
+ *-------------------------------------------------------------------
+ * 0 0 0 (1) 1 (4) 4
+ * 0 0 1 (2) 1 (4) 8
+ * 1 0 2 (4) 1 (4) 16
+ * 1 0 3 (8) 1 (4) 32
+ * 1 0 4 (16) 1 (4) 64
+ * 0 0 0 (1) 0 (2) 2
+ * 0 0 1 (2) 0 (2) 4
+ * 1 0 2 (4) 0 (2) 8
+ * 1 0 3 (8) 0 (2) 16
+ * 1 0 4 (16) 0 (2) 32
+ */
+static const struct sd_div_table cpg_sd_div_table[] = {
+/* CPG_SD_DIV_TABLE_DATA(stp_hck, stp_ck, sd_srcfc, sd_fc, sd_div) */
+ CPG_SD_DIV_TABLE_DATA(0, 0, 0, 1, 4),
+ CPG_SD_DIV_TABLE_DATA(0, 0, 1, 1, 8),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 2, 1, 16),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 3, 1, 32),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 4, 1, 64),
+ CPG_SD_DIV_TABLE_DATA(0, 0, 0, 0, 2),
+ CPG_SD_DIV_TABLE_DATA(0, 0, 1, 0, 4),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 2, 0, 8),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 3, 0, 16),
+ CPG_SD_DIV_TABLE_DATA(1, 0, 4, 0, 32),
+};
+
+static bool gen3_clk_is_mod(struct clk *clk)
+{
+ return (clk->id >> 16) == CPG_MOD;
+}
+
+static int gen3_clk_get_mod(struct clk *clk, const struct mssr_mod_clk **mssr)
+{
+ struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
+ const unsigned long clkid = clk->id & 0xffff;
+ int i;
+
+ if (!gen3_clk_is_mod(clk))
+ return -EINVAL;
+
+ for (i = 0; i < priv->mod_clk_size; i++) {
+ if (priv->mod_clk[i].id != MOD_CLK_ID(clkid))
+ continue;
+
+ *mssr = &priv->mod_clk[i];
+ return 0;
+ }
+
+ return -ENODEV;
+}
+
+static int gen3_clk_get_core(struct clk *clk, const struct cpg_core_clk **core)
+{
+ const unsigned long clkid = clk->id & 0xffff;
+ int i;
+
+ if (gen3_clk_is_mod(clk))
+ return -EINVAL;
+
+ for (i = 0; i < ARRAY_SIZE(gen3_core_clks); i++) {
+ if (gen3_core_clks[i].id != clkid)
+ continue;
+
+ *core = &gen3_core_clks[i];
+ return 0;
+ }
+
+ return -ENODEV;
+}
+
+static int gen3_clk_get_parent(struct clk *clk, struct clk *parent)
+{
+ const struct cpg_core_clk *core;
+ const struct mssr_mod_clk *mssr;
+ int ret;
+
+ if (gen3_clk_is_mod(clk)) {
+ ret = gen3_clk_get_mod(clk, &mssr);
+ if (ret)
+ return ret;
+
+ parent->id = mssr->parent;
+ } else {
+ ret = gen3_clk_get_core(clk, &core);
+ if (ret)
+ return ret;
+
+ if (core->type == CLK_TYPE_IN)
+ parent->id = ~0; /* Top-level clock */
+ else
+ parent->id = core->parent;
+ }
+
+ parent->dev = clk->dev;
+
+ return 0;
+}
+
+static int gen3_clk_endisable(struct clk *clk, bool enable)
+{
+ struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
+ const unsigned long clkid = clk->id & 0xffff;
+ const unsigned int reg = clkid / 100;
+ const unsigned int bit = clkid % 100;
+ const u32 bitmask = BIT(bit);
+
+ if (!gen3_clk_is_mod(clk))
+ return -EINVAL;
+
+ debug("%s[%i] MSTP %lu=%02u/%02u %s\n", __func__, __LINE__,
+ clkid, reg, bit, enable ? "ON" : "OFF");
+
+ if (enable) {
+ clrbits_le32(priv->base + SMSTPCR(reg), bitmask);
+ return wait_for_bit("MSTP", priv->base + MSTPSR(reg),
+ bitmask, 0, 100, 0);
+ } else {
+ setbits_le32(priv->base + SMSTPCR(reg), bitmask);
+ return 0;
+ }
+}
+
+static int gen3_clk_enable(struct clk *clk)
+{
+ return gen3_clk_endisable(clk, true);
+}
+
+static int gen3_clk_disable(struct clk *clk)
+{
+ return gen3_clk_endisable(clk, false);
+}
+
+static ulong gen3_clk_get_rate(struct clk *clk)
+{
+ struct gen3_clk_priv *priv = dev_get_priv(clk->dev);
+ struct clk parent;
+ const struct cpg_core_clk *core;
+ const struct rcar_gen3_cpg_pll_config *pll_config =
+ priv->cpg_pll_config;
+ u32 value, mult, rate = 0;
+ int i, ret;
+
+ debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id);
+
+ ret = gen3_clk_get_parent(clk, &parent);
+ if (ret) {
+ printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret);
+ return ret;
+ }
+
+ if (gen3_clk_is_mod(clk)) {
+ rate = gen3_clk_get_rate(&parent);
+ debug("%s[%i] MOD clk: parent=%lu => rate=%u\n",
+ __func__, __LINE__, parent.id, rate);
+ return rate;
+ }
+
+ ret = gen3_clk_get_core(clk, &core);
+ if (ret)
+ return ret;
+
+ switch (core->type) {
+ case CLK_TYPE_IN:
+ if (core->id == CLK_EXTAL) {
+ rate = clk_get_rate(&priv->clk_extal);
+ debug("%s[%i] EXTAL clk: rate=%u\n",
+ __func__, __LINE__, rate);
+ return rate;
+ }
+
+ if (core->id == CLK_EXTALR) {
+ rate = clk_get_rate(&priv->clk_extalr);
+ debug("%s[%i] EXTALR clk: rate=%u\n",
+ __func__, __LINE__, rate);
+ return rate;
+ }
+
+ return -EINVAL;
+
+ case CLK_TYPE_GEN3_MAIN:
+ rate = gen3_clk_get_rate(&parent) / pll_config->extal_div;
+ debug("%s[%i] MAIN clk: parent=%i extal_div=%i => rate=%u\n",
+ __func__, __LINE__,
+ core->parent, pll_config->extal_div, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_PLL0:
+ value = readl(priv->base + CPG_PLL0CR);
+ mult = (((value >> 24) & 0x7f) + 1) * 2;
+ rate = gen3_clk_get_rate(&parent) * mult;
+ debug("%s[%i] PLL0 clk: parent=%i mult=%u => rate=%u\n",
+ __func__, __LINE__, core->parent, mult, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_PLL1:
+ rate = gen3_clk_get_rate(&parent) * pll_config->pll1_mult;
+ debug("%s[%i] PLL1 clk: parent=%i mul=%i => rate=%u\n",
+ __func__, __LINE__,
+ core->parent, pll_config->pll1_mult, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_PLL2:
+ value = readl(priv->base + CPG_PLL2CR);
+ mult = (((value >> 24) & 0x7f) + 1) * 2;
+ rate = gen3_clk_get_rate(&parent) * mult;
+ debug("%s[%i] PLL2 clk: parent=%i mult=%u => rate=%u\n",
+ __func__, __LINE__, core->parent, mult, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_PLL3:
+ rate = gen3_clk_get_rate(&parent) * pll_config->pll3_mult;
+ debug("%s[%i] PLL3 clk: parent=%i mul=%i => rate=%u\n",
+ __func__, __LINE__,
+ core->parent, pll_config->pll3_mult, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_PLL4:
+ value = readl(priv->base + CPG_PLL4CR);
+ mult = (((value >> 24) & 0x7f) + 1) * 2;
+ rate = gen3_clk_get_rate(&parent) * mult;
+ debug("%s[%i] PLL4 clk: parent=%i mult=%u => rate=%u\n",
+ __func__, __LINE__, core->parent, mult, rate);
+ return rate;
+
+ case CLK_TYPE_FF:
+ rate = (gen3_clk_get_rate(&parent) * core->mult) / core->div;
+ debug("%s[%i] FIXED clk: parent=%i div=%i mul=%i => rate=%u\n",
+ __func__, __LINE__,
+ core->parent, core->mult, core->div, rate);
+ return rate;
+
+ case CLK_TYPE_GEN3_SD: /* FIXME */
+ value = readl(priv->base + core->offset);
+ value &= CPG_SD_STP_MASK | CPG_SD_FC_MASK;
+
+ for (i = 0; i < ARRAY_SIZE(cpg_sd_div_table); i++) {
+ if (cpg_sd_div_table[i].val != value)
+ continue;
+
+ rate = gen3_clk_get_rate(&parent) /
+ cpg_sd_div_table[i].div;
+ debug("%s[%i] SD clk: parent=%i div=%i => rate=%u\n",
+ __func__, __LINE__,
+ core->parent, cpg_sd_div_table[i].div, rate);
+
+ return rate;
+ }
+
+ return -EINVAL;
+ }
+
+ printf("%s[%i] unknown fail\n", __func__, __LINE__);
+
+ return -ENOENT;
+}
+
+static ulong gen3_clk_set_rate(struct clk *clk, ulong rate)
+{
+ return gen3_clk_get_rate(clk);
+}
+
+static int gen3_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
+{
+ if (args->args_count != 2) {
+ debug("Invaild args_count: %d\n", args->args_count);
+ return -EINVAL;
+ }
+
+ clk->id = (args->args[0] << 16) | args->args[1];
+
+ return 0;
+}
+
+static const struct clk_ops gen3_clk_ops = {
+ .enable = gen3_clk_enable,
+ .disable = gen3_clk_disable,
+ .get_rate = gen3_clk_get_rate,
+ .set_rate = gen3_clk_set_rate,
+ .of_xlate = gen3_clk_of_xlate,
+};
+
+enum gen3_clk_model {
+ CLK_R8A7795,
+ CLK_R8A7796,
+};
+
+static int gen3_clk_probe(struct udevice *dev)
+{
+ struct gen3_clk_priv *priv = dev_get_priv(dev);
+ enum gen3_clk_model model = dev_get_driver_data(dev);
+ fdt_addr_t rst_base;
+ u32 cpg_mode;
+ int ret;
+
+ priv->base = (struct gen3_base *)devfdt_get_addr(dev);
+ if (!priv->base)
+ return -EINVAL;
+
+ switch (model) {
+ case CLK_R8A7795:
+ priv->mod_clk = r8a7795_mod_clks;
+ priv->mod_clk_size = ARRAY_SIZE(r8a7795_mod_clks);
+ ret = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
+ "renesas,r8a7795-rst");
+ if (ret < 0)
+ return ret;
+ break;
+ case CLK_R8A7796:
+ priv->mod_clk = r8a7796_mod_clks;
+ priv->mod_clk_size = ARRAY_SIZE(r8a7796_mod_clks);
+ ret = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
+ "renesas,r8a7796-rst");
+ if (ret < 0)
+ return ret;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ rst_base = fdtdec_get_addr(gd->fdt_blob, ret, "reg");
+ if (rst_base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ cpg_mode = readl(rst_base + CPG_RST_MODEMR);
+
+ priv->cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+ if (!priv->cpg_pll_config->extal_div)
+ return -EINVAL;
+
+ ret = clk_get_by_name(dev, "extal", &priv->clk_extal);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_get_by_name(dev, "extalr", &priv->clk_extalr);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id gen3_clk_ids[] = {
+ { .compatible = "renesas,r8a7795-cpg-mssr", .data = CLK_R8A7795 },
+ { .compatible = "renesas,r8a7796-cpg-mssr", .data = CLK_R8A7796 },
+ { }
+};
+
+U_BOOT_DRIVER(clk_gen3) = {
+ .name = "clk_gen3",
+ .id = UCLASS_CLK,
+ .of_match = gen3_clk_ids,
+ .priv_auto_alloc_size = sizeof(struct gen3_clk_priv),
+ .ops = &gen3_clk_ops,
+ .probe = gen3_clk_probe,
+};
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 5ecf512..83f4ae6 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -235,7 +235,7 @@
}
src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
- return DIV_TO_RATE(src_rate, div);
+ return DIV_TO_RATE(src_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,
@@ -247,10 +247,11 @@
debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
/* mmc clock auto divide 2 in internal */
- src_clk_div = (clk_general_rate / 2 + freq - 1) / freq;
+ src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
- if (src_clk_div > 0x7f) {
- src_clk_div = (OSC_HZ / 2 + freq - 1) / freq;
+ if (src_clk_div > 128) {
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div - 1 < 128);
mux = EMMC_SEL_24M;
} else {
mux = EMMC_SEL_GPLL;
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 6f30332..8c2c9bc 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -71,9 +71,6 @@
SOCSTS_GPLL_LOCK = 1 << 8,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) {\
@@ -287,7 +284,7 @@
return -EINVAL;
}
- return DIV_TO_RATE(gclk_rate, div);
+ return DIV_TO_RATE(gclk_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk3188_cru *cru, uint gclk_rate,
@@ -296,7 +293,8 @@
int src_clk_div;
debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1;
assert(src_clk_div <= 0x3f);
switch (periph) {
@@ -350,8 +348,9 @@
static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate,
int periph, uint freq)
{
- int src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ int src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
+ assert(src_clk_div < 128);
switch (periph) {
case SCLK_SPI0:
assert(src_clk_div <= SPI0_DIV_MASK);
@@ -400,8 +399,8 @@
* reparent aclk_cpu_pre from apll to gpll
* set up dependent divisors for PCLK/HCLK and ACLK clocks.
*/
- aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
- assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+ aclk_div = DIV_ROUND_UP(GPLL_HZ, CPU_ACLK_HZ) - 1;
+ assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
rk_clrsetreg(&cru->cru_clksel_con[0],
CPU_ACLK_PLL_MASK << CPU_ACLK_PLL_SHIFT |
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index fdeb816..d7f6a3c 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -26,9 +26,6 @@
OUTPUT_MIN_HZ = 24 * 1000000,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
@@ -239,7 +236,7 @@
}
src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
- return DIV_TO_RATE(src_rate, div);
+ return DIV_TO_RATE(src_rate, div) / 2;
}
static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
@@ -250,11 +247,12 @@
debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
- /* mmc clock auto divide 2 in internal */
- src_clk_div = (clk_general_rate / 2 + freq - 1) / freq;
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
- if (src_clk_div > 0x7f) {
- src_clk_div = (OSC_HZ / 2 + freq - 1) / freq;
+ if (src_clk_div > 128) {
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div - 1 < 128);
mux = EMMC_SEL_24M;
} else {
mux = EMMC_SEL_GPLL;
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 792ee76..478195b 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -118,9 +118,6 @@
SOCSTS_NPLL_LOCK = 1 << 9,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) {\
@@ -530,10 +527,12 @@
int mux;
debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ /* mmc clock default div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq);
if (src_clk_div > 0x3f) {
- src_clk_div = RATE_TO_DIV(OSC_HZ, freq);
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+ assert(src_clk_div < 0x40);
mux = EMMC_PLL_SELECT_24MHZ;
assert((int)EMMC_PLL_SELECT_24MHZ ==
(int)MMC0_PLL_SELECT_24MHZ);
@@ -607,7 +606,8 @@
int src_clk_div;
debug("%s: clk_general_rate=%u\n", __func__, gclk_rate);
- src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+ src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
+ assert(src_clk_div < 128);
switch (periph) {
case SCLK_SPI0:
rk_clrsetreg(&cru->cru_clksel_con[25],
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 2065a8a..c3a6650 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -412,9 +412,9 @@
if ((con & CLK_EMMC_PLL_MASK) >> CLK_EMMC_PLL_SHIFT
== CLK_EMMC_PLL_SEL_24M)
- return DIV_TO_RATE(OSC_HZ, div);
+ return DIV_TO_RATE(OSC_HZ, div) / 2;
else
- return DIV_TO_RATE(GPLL_HZ, div);
+ return DIV_TO_RATE(GPLL_HZ, div) / 2;
}
static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
@@ -436,11 +436,12 @@
return -EINVAL;
}
/* Select clk_sdmmc/emmc source from GPLL by default */
- src_clk_div = GPLL_HZ / set_rate;
+ /* mmc clock defaulg div 2 internal, need provide double in cru */
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
if (src_clk_div > 127) {
/* use 24MHz source for 400KHz clock */
- src_clk_div = OSC_HZ / set_rate;
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
rk_clrsetreg(&cru->clksel_con[con_id],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 52cad38..2be1f57 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -1,13 +1,16 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
* SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
+#include <dt-structs.h>
#include <errno.h>
+#include <mapmem.h>
#include <syscon.h>
#include <asm/arch/clock.h>
#include <asm/arch/cru_rk3368.h>
@@ -18,6 +21,12 @@
DECLARE_GLOBAL_DATA_PTR;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+struct rk3368_clk_plat {
+ struct dtd_rockchip_rk3368_cru dtd;
+};
+#endif
+
struct pll_div {
u32 nr;
u32 nf;
@@ -30,9 +39,6 @@
#define GPLL_HZ (576 * 1000 * 1000)
#define CPLL_HZ (400 * 1000 * 1000)
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _nr, _no) { \
@@ -41,10 +47,16 @@
(_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \
"divisors on line " __stringify(__LINE__));
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static const struct pll_div apll_l_init_cfg = PLL_DIVISORS(APLL_L_HZ, 12, 2);
static const struct pll_div apll_b_init_cfg = PLL_DIVISORS(APLL_B_HZ, 1, 2);
+#if !defined(CONFIG_TPL_BUILD)
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
+#endif
+#endif
+
+static ulong rk3368_clk_get_rate(struct clk *clk);
/* Get pll rate by id */
static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
@@ -73,8 +85,9 @@
}
}
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
- const struct pll_div *div, bool has_bwadj)
+ const struct pll_div *div)
{
struct rk3368_pll *pll = &cru->pll[pll_id];
/* All PLLs have same VCO and output frequency range restrictions*/
@@ -92,6 +105,12 @@
((div->nr - 1) << PLL_NR_SHIFT) |
((div->no - 1) << PLL_OD_SHIFT));
writel((div->nf - 1) << PLL_NF_SHIFT, &pll->con1);
+ /*
+ * BWADJ should be set to NF / 2 to ensure the nominal bandwidth.
+ * Compare the RK3368 TRM, section "3.6.4 PLL Bandwidth Adjustment".
+ */
+ clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
udelay(10);
/* return from reset */
@@ -106,15 +125,23 @@
return 0;
}
+#endif
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
static void rkclk_init(struct rk3368_cru *cru)
{
u32 apllb, aplll, dpll, cpll, gpll;
- rkclk_set_pll(cru, APLLB, &apll_b_init_cfg, false);
- rkclk_set_pll(cru, APLLL, &apll_l_init_cfg, false);
- rkclk_set_pll(cru, GPLL, &gpll_init_cfg, false);
- rkclk_set_pll(cru, CPLL, &cpll_init_cfg, false);
+ rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
+ rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
+#if !defined(CONFIG_TPL_BUILD)
+ /*
+ * If we plan to return to the boot ROM, we can't increase the
+ * GPLL rate from the SPL stage.
+ */
+ rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
+ rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
+#endif
apllb = rkclk_pll_get_rate(cru, APLLB);
aplll = rkclk_pll_get_rate(cru, APLLL);
@@ -125,17 +152,19 @@
debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
__func__, apllb, aplll, dpll, cpll, gpll);
}
+#endif
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)
{
u32 div, con, con_id, rate;
u32 pll_rate;
switch (clk_id) {
- case SCLK_SDMMC:
+ case HCLK_SDMMC:
con_id = 50;
break;
- case SCLK_EMMC:
+ case HCLK_EMMC:
con_id = 51;
break;
case SCLK_SDIO0:
@@ -146,7 +175,7 @@
}
con = readl(&cru->clksel_con[con_id]);
- switch ((con & MMC_PLL_SEL_MASK) >> MMC_PLL_SEL_SHIFT) {
+ switch (con & MMC_PLL_SEL_MASK) {
case MMC_PLL_SEL_GPLL:
pll_rate = rkclk_pll_get_rate(cru, GPLL);
break;
@@ -154,6 +183,8 @@
pll_rate = OSC_HZ;
break;
case MMC_PLL_SEL_CPLL:
+ pll_rate = rkclk_pll_get_rate(cru, CPLL);
+ break;
case MMC_PLL_SEL_USBPHY_480M:
default:
return -EINVAL;
@@ -161,23 +192,76 @@
div = (con & MMC_CLK_DIV_MASK) >> MMC_CLK_DIV_SHIFT;
rate = DIV_TO_RATE(pll_rate, div);
+ debug("%s: raw rate %d (post-divide by 2)\n", __func__, rate);
return rate >> 1;
}
-static ulong rk3368_mmc_set_clk(struct rk3368_cru *cru,
- ulong clk_id, ulong rate)
+static ulong rk3368_mmc_find_best_rate_and_parent(struct clk *clk,
+ ulong rate,
+ u32 *best_mux,
+ u32 *best_div)
{
- u32 div;
- u32 con_id;
- u32 gpll_rate = rkclk_pll_get_rate(cru, GPLL);
+ int i;
+ ulong best_rate = 0;
+ const ulong MHz = 1000000;
+ const struct {
+ u32 mux;
+ ulong rate;
+ } parents[] = {
+ { .mux = MMC_PLL_SEL_CPLL, .rate = CPLL_HZ },
+ { .mux = MMC_PLL_SEL_GPLL, .rate = GPLL_HZ },
+ { .mux = MMC_PLL_SEL_24M, .rate = 24 * MHz }
+ };
- div = RATE_TO_DIV(gpll_rate, rate << 1);
+ debug("%s: target rate %ld\n", __func__, rate);
+ for (i = 0; i < ARRAY_SIZE(parents); ++i) {
+ /*
+ * Find the largest rate no larger than the target-rate for
+ * the current parent.
+ */
+ ulong parent_rate = parents[i].rate;
+ u32 div = DIV_ROUND_UP(parent_rate, rate);
+ u32 adj_div = div;
+ ulong new_rate = parent_rate / adj_div;
+
+ debug("%s: rate %ld, parent-mux %d, parent-rate %ld, div %d\n",
+ __func__, rate, parents[i].mux, parents[i].rate, div);
+
+ /* Skip, if not representable */
+ if ((div - 1) > MMC_CLK_DIV_MASK)
+ continue;
+
+ /* Skip, if we already have a better (or equal) solution */
+ if (new_rate <= best_rate)
+ continue;
+
+ /* This is our new best rate. */
+ best_rate = new_rate;
+ *best_mux = parents[i].mux;
+ *best_div = div - 1;
+ }
+
+ debug("%s: best_mux = %x, best_div = %d, best_rate = %ld\n",
+ __func__, *best_mux, *best_div, best_rate);
+
+ return best_rate;
+}
+
+static ulong rk3368_mmc_set_clk(struct clk *clk, ulong rate)
+{
+ struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+ struct rk3368_cru *cru = priv->cru;
+ ulong clk_id = clk->id;
+ u32 con_id, mux = 0, div = 0;
+
+ /* Find the best parent and rate */
+ rk3368_mmc_find_best_rate_and_parent(clk, rate << 1, &mux, &div);
switch (clk_id) {
- case SCLK_SDMMC:
+ case HCLK_SDMMC:
con_id = 50;
break;
- case SCLK_EMMC:
+ case HCLK_EMMC:
con_id = 51;
break;
case SCLK_SDIO0:
@@ -187,33 +271,154 @@
return -EINVAL;
}
- if (div > 0x3f) {
- div = RATE_TO_DIV(OSC_HZ, rate);
- rk_clrsetreg(&cru->clksel_con[con_id],
- MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
- (MMC_PLL_SEL_24M << MMC_PLL_SEL_SHIFT) |
- (div << MMC_CLK_DIV_SHIFT));
- } else {
- rk_clrsetreg(&cru->clksel_con[con_id],
- MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
- (MMC_PLL_SEL_GPLL << MMC_PLL_SEL_SHIFT) |
- div << MMC_CLK_DIV_SHIFT);
- }
+ rk_clrsetreg(&cru->clksel_con[con_id],
+ MMC_PLL_SEL_MASK | MMC_CLK_DIV_MASK,
+ mux | div);
return rk3368_mmc_get_clk(cru, clk_id);
}
+#endif
+
+#if IS_ENABLED(CONFIG_TPL_BUILD)
+static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
+{
+ const struct pll_div *dpll_cfg = NULL;
+ const ulong MHz = 1000000;
+
+ /* Fout = ((Fin /NR) * NF )/ NO */
+ static const struct pll_div dpll_1200 = PLL_DIVISORS(1200 * MHz, 1, 1);
+ static const struct pll_div dpll_1332 = PLL_DIVISORS(1332 * MHz, 2, 1);
+ static const struct pll_div dpll_1600 = PLL_DIVISORS(1600 * MHz, 3, 2);
+
+ switch (set_rate) {
+ case 1200*MHz:
+ dpll_cfg = &dpll_1200;
+ break;
+ case 1332*MHz:
+ dpll_cfg = &dpll_1332;
+ break;
+ case 1600*MHz:
+ dpll_cfg = &dpll_1600;
+ break;
+ default:
+ error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+ }
+ rkclk_set_pll(cru, DPLL, dpll_cfg);
+
+ return set_rate;
+}
+#endif
+
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
+ ulong clk_id, ulong set_rate)
+{
+ /*
+ * This models the 'assigned-clock-parents = <&ext_gmac>' from
+ * the DTS and switches to the 'ext_gmac' clock parent.
+ */
+ rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+ return set_rate;
+}
+#endif
+
+/*
+ * RK3368 SPI clocks have a common divider-width (7 bits) and a single bit
+ * to select either CPLL or GPLL as the clock-parent. The location within
+ * the enclosing CLKSEL_CON (i.e. div_shift and sel_shift) are variable.
+ */
+
+struct spi_clkreg {
+ uint8_t reg; /* CLKSEL_CON[reg] register in CRU */
+ uint8_t div_shift;
+ uint8_t sel_shift;
+};
+
+/*
+ * The entries are numbered relative to their offset from SCLK_SPI0.
+ */
+static const struct spi_clkreg spi_clkregs[] = {
+ [0] = { .reg = 45, .div_shift = 0, .sel_shift = 7, },
+ [1] = { .reg = 45, .div_shift = 8, .sel_shift = 15, },
+ [2] = { .reg = 46, .div_shift = 8, .sel_shift = 15, },
+};
+
+static inline u32 extract_bits(u32 val, unsigned width, unsigned shift)
+{
+ return (val >> shift) & ((1 << width) - 1);
+}
+
+static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+ const struct spi_clkreg *spiclk = NULL;
+ u32 div, val;
+
+ switch (clk_id) {
+ case SCLK_SPI0 ... SCLK_SPI2:
+ spiclk = &spi_clkregs[clk_id - SCLK_SPI0];
+ break;
+
+ default:
+ error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+ return -EINVAL;
+ }
+
+ val = readl(&cru->clksel_con[spiclk->reg]);
+ div = extract_bits(val, 7, spiclk->div_shift);
+
+ debug("%s: div 0x%x\n", __func__, div);
+ return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
+{
+ const struct spi_clkreg *spiclk = NULL;
+ int src_clk_div;
+
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+ assert(src_clk_div < 127);
+
+ switch (clk_id) {
+ case SCLK_SPI0 ... SCLK_SPI2:
+ spiclk = &spi_clkregs[clk_id - SCLK_SPI0];
+ break;
+
+ default:
+ error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+ return -EINVAL;
+ }
+
+ rk_clrsetreg(&cru->clksel_con[spiclk->reg],
+ ((0x7f << spiclk->div_shift) |
+ (0x1 << spiclk->sel_shift)),
+ ((src_clk_div << spiclk->div_shift) |
+ (1 << spiclk->sel_shift)));
+
+ return rk3368_spi_get_clk(cru, clk_id);
+}
static ulong rk3368_clk_get_rate(struct clk *clk)
{
struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
ulong rate = 0;
- debug("%s id:%ld\n", __func__, clk->id);
+ debug("%s: id %ld\n", __func__, clk->id);
switch (clk->id) {
+ case PLL_CPLL:
+ rate = rkclk_pll_get_rate(priv->cru, CPLL);
+ break;
+ case PLL_GPLL:
+ rate = rkclk_pll_get_rate(priv->cru, GPLL);
+ break;
+ case SCLK_SPI0 ... SCLK_SPI2:
+ rate = rk3368_spi_get_clk(priv->cru, clk->id);
+ break;
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
case HCLK_SDMMC:
case HCLK_EMMC:
rate = rk3368_mmc_get_clk(priv->cru, clk->id);
break;
+#endif
default:
return -ENOENT;
}
@@ -223,15 +428,31 @@
static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
{
- struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+ __maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
ulong ret = 0;
debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate);
switch (clk->id) {
- case SCLK_SDMMC:
- case SCLK_EMMC:
- ret = rk3368_mmc_set_clk(priv->cru, clk->id, rate);
+ case SCLK_SPI0 ... SCLK_SPI2:
+ ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
break;
+#if IS_ENABLED(CONFIG_TPL_BUILD)
+ case CLK_DDR:
+ ret = rk3368_ddr_set_clk(priv->cru, rate);
+ break;
+#endif
+#if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
+ case HCLK_SDMMC:
+ case HCLK_EMMC:
+ ret = rk3368_mmc_set_clk(clk, rate);
+ break;
+#endif
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case SCLK_MAC:
+ /* select the external clock */
+ ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
+ break;
+#endif
default:
return -ENOENT;
}
@@ -246,18 +467,26 @@
static int rk3368_clk_probe(struct udevice *dev)
{
- struct rk3368_clk_priv *priv = dev_get_priv(dev);
+ struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rk3368_clk_plat *plat = dev_get_platdata(dev);
+ priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+#endif
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
rkclk_init(priv->cru);
+#endif
return 0;
}
static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3368_clk_priv *priv = dev_get_priv(dev);
priv->cru = (struct rk3368_cru *)devfdt_get_addr(dev);
+#endif
return 0;
}
@@ -283,7 +512,10 @@
.name = "rockchip_rk3368_cru",
.id = UCLASS_CLK,
.of_match = rk3368_clk_ids,
- .priv_auto_alloc_size = sizeof(struct rk3368_cru),
+ .priv_auto_alloc_size = sizeof(struct rk3368_clk_priv),
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ .platdata_auto_alloc_size = sizeof(struct rk3368_clk_plat),
+#endif
.ofdata_to_platdata = rk3368_clk_ofdata_to_platdata,
.ops = &rk3368_clk_ops,
.bind = rk3368_clk_bind,
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 53d2a3f..3edafea 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -676,8 +676,8 @@
const struct spi_clkreg *spiclk = NULL;
int src_clk_div;
- src_clk_div = RATE_TO_DIV(GPLL_HZ, hz);
- assert(src_clk_div < 127);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+ assert(src_clk_div < 128);
switch (clk_id) {
case SCLK_SPI1 ... SCLK_SPI5:
@@ -750,18 +750,21 @@
case HCLK_SDMMC:
case SCLK_SDMMC:
con = readl(&cru->clksel_con[16]);
+ /* dwmmc controller have internal div 2 */
+ div = 2;
break;
case SCLK_EMMC:
con = readl(&cru->clksel_con[21]);
+ div = 1;
break;
default:
return -EINVAL;
}
- div = (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT;
+ div *= (con & CLK_EMMC_DIV_CON_MASK) >> CLK_EMMC_DIV_CON_SHIFT;
if ((con & CLK_EMMC_PLL_MASK) >> CLK_EMMC_PLL_SHIFT
== CLK_EMMC_PLL_SEL_24M)
- return DIV_TO_RATE(24*1000*1000, div);
+ return DIV_TO_RATE(OSC_HZ, div);
else
return DIV_TO_RATE(GPLL_HZ, div);
}
@@ -776,11 +779,13 @@
case HCLK_SDMMC:
case SCLK_SDMMC:
/* Select clk_sdmmc source from GPLL by default */
- src_clk_div = GPLL_HZ / set_rate;
+ /* mmc clock defaulg div 2 internal, provide double in cru */
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
- if (src_clk_div > 127) {
+ if (src_clk_div > 128) {
/* use 24MHz source for 400KHz clock */
- src_clk_div = 24*1000*1000 / set_rate;
+ src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+ assert(src_clk_div - 1 < 128);
rk_clrsetreg(&cru->clksel_con[16],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
@@ -794,8 +799,8 @@
break;
case SCLK_EMMC:
/* Select aclk_emmc source from GPLL */
- src_clk_div = GPLL_HZ / aclk_emmc;
- assert(src_clk_div - 1 < 31);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ , aclk_emmc);
+ assert(src_clk_div - 1 < 32);
rk_clrsetreg(&cru->clksel_con[21],
ACLK_EMMC_PLL_SEL_MASK | ACLK_EMMC_DIV_CON_MASK,
@@ -803,8 +808,8 @@
(src_clk_div - 1) << ACLK_EMMC_DIV_CON_SHIFT);
/* Select clk_emmc source from GPLL too */
- src_clk_div = GPLL_HZ / set_rate;
- assert(src_clk_div - 1 < 127);
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, set_rate);
+ assert(src_clk_div - 1 < 128);
rk_clrsetreg(&cru->clksel_con[22],
CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 818293d..cf966bb 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -25,9 +25,6 @@
OUTPUT_MIN_HZ = 24 * 1000000,
};
-#define RATE_TO_DIV(input_rate, output_rate) \
- ((input_rate) / (output_rate) - 1);
-
#define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1))
#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index fb5c4e8..7afef1f 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -16,10 +16,10 @@
suitable malloc() implementation. If you are not using the
full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
- must provide CONFIG_SYS_MALLOC_F_LEN to set the size.
+ must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
In most cases driver model will only allocate a few uclasses
and devices in SPL, so 1KB should be enable. See
- CONFIG_SYS_MALLOC_F_LEN for more details on how to enable it.
+ CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
config TPL_DM
bool "Enable Driver Model for TPL"
@@ -29,10 +29,10 @@
suitable malloc() implementation. If you are not using the
full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
- must provide CONFIG_SYS_MALLOC_F_LEN to set the size.
+ must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
In most cases driver model will only allocate a few uclasses
and devices in SPL, so 1KB should be enough. See
- CONFIG_SYS_MALLOC_F_LEN for more details on how to enable it.
+ CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
Disable this for very small implementations.
config DM_WARN
@@ -97,7 +97,17 @@
config SPL_REGMAP
bool "Support register maps in SPL"
- depends on DM
+ depends on SPL_DM
+ help
+ Hardware peripherals tend to have one or more sets of registers
+ which can be accessed to control the hardware. A register map
+ models this with a simple read/write interface. It can in principle
+ support any bus type (I2C, SPI) but so far this only supports
+ direct memory access.
+
+config TPL_REGMAP
+ bool "Support register maps in TPL"
+ depends on TPL_DM
help
Hardware peripherals tend to have one or more sets of registers
which can be accessed to control the hardware. A register map
@@ -116,7 +126,16 @@
config SPL_SYSCON
bool "Support system controllers in SPL"
- depends on REGMAP
+ depends on SPL_REGMAP
+ help
+ Many SoCs have a number of system controllers which are dealt with
+ as a group by a single driver. Some common functionality is provided
+ by this uclass, including accessing registers via regmap and
+ assigning a unique number to each.
+
+config TPL_SYSCON
+ bool "Support system controllers in TPL"
+ depends on TPL_REGMAP
help
Many SoCs have a number of system controllers which are dealt with
as a group by a single driver. Some common functionality is provided
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index fd2d4de..3d68c70 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -9,8 +9,8 @@
obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_$(SPL_)SIMPLE_BUS) += simple-bus.o
obj-$(CONFIG_DM) += dump.o
-obj-$(CONFIG_$(SPL_)REGMAP) += regmap.o
-obj-$(CONFIG_$(SPL_)SYSCON) += syscon-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)REGMAP) += regmap.o
+obj-$(CONFIG_$(SPL_TPL_)SYSCON) += syscon-uclass.o
obj-$(CONFIG_OF_LIVE) += of_access.o of_addr.o
ifndef CONFIG_DM_DEV_READ_INLINE
obj-$(CONFIG_OF_CONTROL) += read.o
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 2bb23ee..c31cba7 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -665,6 +665,13 @@
index, out_args);
}
+int of_count_phandle_with_args(const struct device_node *np,
+ const char *list_name, const char *cells_name)
+{
+ return __of_parse_phandle_with_args(np, list_name, cells_name, 0,
+ -1, NULL);
+}
+
static void of_alias_add(struct alias_prop *ap, struct device_node *np,
int id, const char *stem, int stem_len)
{
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index fd068b0..c1a2e9f 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -14,6 +14,7 @@
#include <dm/of_addr.h>
#include <dm/ofnode.h>
#include <linux/err.h>
+#include <linux/ioport.h>
int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
{
@@ -198,13 +199,14 @@
const __be32 *prop_val;
uint flags;
u64 size;
+ int na;
- prop_val = of_get_address(
- (struct device_node *)ofnode_to_np(node), index,
- &size, &flags);
+ prop_val = of_get_address(ofnode_to_np(node), index, &size,
+ &flags);
if (!prop_val)
return FDT_ADDR_T_NONE;
- return be32_to_cpup(prop_val);
+ na = of_n_addr_cells(ofnode_to_np(node));
+ return of_read_number(prop_val, na);
} else {
return fdt_get_base_address(gd->fdt_blob,
ofnode_to_offset(node));
@@ -313,6 +315,18 @@
return 0;
}
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+ const char *cells_name)
+{
+ if (ofnode_is_np(node))
+ return of_count_phandle_with_args(ofnode_to_np(node),
+ list_name, cells_name);
+ else
+ return fdtdec_parse_phandle_with_args(gd->fdt_blob,
+ ofnode_to_offset(node), list_name, cells_name,
+ 0, -1, NULL);
+}
+
ofnode ofnode_path(const char *path)
{
if (of_live_active())
@@ -593,3 +607,23 @@
return false;
}
+
+int ofnode_read_resource(ofnode node, uint index, struct resource *res)
+{
+ if (ofnode_is_np(node)) {
+ return of_address_to_resource(ofnode_to_np(node), index, res);
+ } else {
+ struct fdt_resource fres;
+ int ret;
+
+ ret = fdt_get_resource(gd->fdt_blob, ofnode_to_offset(node),
+ "reg", index, &fres);
+ if (ret < 0)
+ return -EINVAL;
+ memset(res, '\0', sizeof(*res));
+ res->start = fres.start;
+ res->end = fres.end;
+
+ return 0;
+ }
+}
diff --git a/drivers/core/read.c b/drivers/core/read.c
index eafe727..fe40bed 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -114,7 +114,7 @@
return fdt_get_phandle(gd->fdt_blob, ofnode_to_offset(node));
}
-const u32 *dev_read_prop(struct udevice *dev, const char *propname, int *lenp)
+const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp)
{
return ofnode_get_property(dev_ofnode(dev), propname, lenp);
}
@@ -159,3 +159,8 @@
return fdtdec_get_is_enabled(gd->fdt_blob,
ofnode_to_offset(node));
}
+
+int dev_read_resource(struct udevice *dev, uint index, struct resource *res)
+{
+ return ofnode_read_resource(dev_ofnode(dev), index, res);
+}
diff --git a/drivers/core/read_extra.c b/drivers/core/read_extra.c
index a6d2f34..e94648f 100644
--- a/drivers/core/read_extra.c
+++ b/drivers/core/read_extra.c
@@ -11,27 +11,4 @@
#include <dm/read.h>
#include <linux/ioport.h>
-int dev_read_resource(struct udevice *dev, uint index, struct resource *res)
-{
- ofnode node = dev_ofnode(dev);
-
-#ifdef CONFIG_OF_LIVE
- if (ofnode_is_np(node)) {
- return of_address_to_resource(ofnode_to_np(node), index, res);
- } else
-#endif
- {
- struct fdt_resource fres;
- int ret;
-
- ret = fdt_get_resource(gd->fdt_blob, ofnode_to_offset(node),
- "reg", index, &fres);
- if (ret < 0)
- return -EINVAL;
- memset(res, '\0', sizeof(*res));
- res->start = fres.start;
- res->end = fres.end;
-
- return 0;
- }
-}
+/* This file can hold non-inlined dev_read_...() functions */
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 3349fc5..058c9b9 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -469,7 +469,7 @@
#define CTLR_INTLV_MASK 0x20000000
/* Perform build-in test on memory. Three-way interleaving is not yet
* supported by this code. */
- if (getenv_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) {
+ if (env_get_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) {
puts("Running BIST test. This will take a while...");
cs0_config = ddr_in32(&ddr->cs0_config);
cs0_bnds = ddr_in32(&ddr->cs0_bnds);
diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c
index 653bbab..c99bd2f 100644
--- a/drivers/ddr/fsl/interactive.c
+++ b/drivers/ddr/fsl/interactive.c
@@ -1861,7 +1861,7 @@
{
char buffer[CONFIG_SYS_CBSIZE];
- if (getenv_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
+ if (env_get_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
return 1;
return 0;
@@ -1891,11 +1891,11 @@
};
if (var_is_set) {
- if (getenv_f("ddr_interactive", buffer2, CONFIG_SYS_CBSIZE) > 0) {
+ if (env_get_f("ddr_interactive", buffer2,
+ CONFIG_SYS_CBSIZE) > 0)
p = buffer2;
- } else {
+ else
var_is_set = 0;
- }
}
/*
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index 20edd2d..a7eaed1 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -18,7 +18,7 @@
* Use our own stack based buffer before relocation to allow accessing longer
* hwconfig strings that might be in the environment before we've relocated.
* This is pretty fragile on both the use of stack and if the buffer is big
- * enough. However we will get a warning from getenv_f for the later.
+ * enough. However we will get a warning from env_get_f() for the latter.
*/
/* Board-specific functions defined in each board's ddr.c */
@@ -755,7 +755,7 @@
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
#if defined(CONFIG_SYS_FSL_DDR3) || \
@@ -1399,7 +1399,7 @@
* Extract hwconfig from environment since we have not properly setup
* the environment but need it for ddr config params
*/
- if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
/* if hwconfig is not enabled, or "sdram" is not defined, use spd */
diff --git a/drivers/ddr/marvell/a38x/ddr3_debug.c b/drivers/ddr/marvell/a38x/ddr3_debug.c
index 12b5b04..a704a3e 100644
--- a/drivers/ddr/marvell/a38x/ddr3_debug.c
+++ b/drivers/ddr/marvell/a38x/ddr3_debug.c
@@ -327,8 +327,6 @@
u32 if_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- mem_addr = mem_addr;
-
#ifndef EXCLUDE_SWITCH_DEBUG
if ((is_validate_window_per_if != 0) ||
(is_validate_window_per_pup != 0)) {
@@ -820,7 +818,6 @@
u32 tmp_val = 0, if_id = 0, pup_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
*ptr = NULL;
switch (flag_id) {
@@ -1169,8 +1166,6 @@
u32 i, j;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
-
for (j = 0; j < tm->num_of_bus_per_interface; j++) {
VALIDATE_ACTIVE(tm->bus_act_mask, j);
for (i = 0; i < MAX_INTERFACE_NUM; i++) {
@@ -1229,8 +1224,6 @@
u32 reg_addr = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- mem_addr = mem_addr;
-
if (test_type == 0) {
reg_addr = 1;
ui_mask_bit = 0x3f;
@@ -1301,8 +1294,6 @@
u32 max_cs = hws_ddr3_tip_max_cs_get();
struct hws_topology_map *tm = ddr3_get_topology_map();
- repeat_num = repeat_num;
-
if (mode == 1) {
/* per pup */
start_pup = 0;
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
index 9d216da..2909ae3 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
@@ -697,8 +697,6 @@
u32 if_id = 0, bus_id = 0;
struct hws_topology_map *tm = ddr3_get_topology_map();
- dev_num = dev_num;
-
printf("Centralization Results\n");
printf("I/F0 Result[0 - success 1-fail 2 - state_2 3 - state_3] ...\n");
for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) {
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index ceb33e3..ff732ac 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -62,7 +62,7 @@
#ifdef CONFIG_SET_DFU_ALT_INFO
set_dfu_alt_info(interface, devstr);
#endif
- str_env = getenv("dfu_alt_info");
+ str_env = env_get("dfu_alt_info");
if (!str_env) {
error("\"dfu_alt_info\" env variable not defined!\n");
return -EINVAL;
@@ -101,7 +101,7 @@
if (dfu_buf != NULL)
return dfu_buf;
- s = getenv("dfu_bufsiz");
+ s = env_get("dfu_bufsiz");
if (s)
dfu_buf_size = (unsigned long)simple_strtol(s, NULL, 0);
@@ -123,7 +123,7 @@
{
char *s;
- s = getenv("dfu_hash_algo");
+ s = env_get("dfu_hash_algo");
if (!s)
return NULL;
@@ -165,18 +165,48 @@
return ret;
}
-void dfu_write_transaction_cleanup(struct dfu_entity *dfu)
+void dfu_transaction_cleanup(struct dfu_entity *dfu)
{
/* clear everything */
dfu->crc = 0;
dfu->offset = 0;
dfu->i_blk_seq_num = 0;
- dfu->i_buf_start = dfu_buf;
- dfu->i_buf_end = dfu_buf;
+ dfu->i_buf_start = dfu_get_buf(dfu);
+ dfu->i_buf_end = dfu->i_buf_start;
dfu->i_buf = dfu->i_buf_start;
+ dfu->r_left = 0;
+ dfu->b_left = 0;
+ dfu->bad_skip = 0;
+
dfu->inited = 0;
}
+int dfu_transaction_initiate(struct dfu_entity *dfu, bool read)
+{
+ int ret = 0;
+
+ if (dfu->inited)
+ return 0;
+
+ dfu_transaction_cleanup(dfu);
+
+ if (dfu->i_buf_start == NULL)
+ return -ENOMEM;
+
+ dfu->i_buf_end = dfu->i_buf_start + dfu_get_buf_size();
+
+ if (read) {
+ ret = dfu->get_medium_size(dfu, &dfu->r_left);
+ if (ret < 0)
+ return ret;
+ debug("%s: %s %lld [B]\n", __func__, dfu->name, dfu->r_left);
+ }
+
+ dfu->inited = 1;
+
+ return 0;
+}
+
int dfu_flush(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
{
int ret = 0;
@@ -192,7 +222,7 @@
printf("\nDFU complete %s: 0x%08x\n", dfu_hash_algo->name,
dfu->crc);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
@@ -205,25 +235,14 @@
__func__, dfu->name, buf, size, blk_seq_num, dfu->offset,
(unsigned long)(dfu->i_buf - dfu->i_buf_start));
- if (!dfu->inited) {
- /* initial state */
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->bad_skip = 0;
- dfu->i_blk_seq_num = 0;
- dfu->i_buf_start = dfu_get_buf(dfu);
- if (dfu->i_buf_start == NULL)
- return -ENOMEM;
- dfu->i_buf_end = dfu_get_buf(dfu) + dfu_buf_size;
- dfu->i_buf = dfu->i_buf_start;
-
- dfu->inited = 1;
- }
+ ret = dfu_transaction_initiate(dfu, false);
+ if (ret < 0)
+ return ret;
if (dfu->i_blk_seq_num != blk_seq_num) {
printf("%s: Wrong sequence number! [%d] [%d]\n",
__func__, dfu->i_blk_seq_num, blk_seq_num);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return -1;
}
@@ -247,7 +266,7 @@
if ((dfu->i_buf + size) > dfu->i_buf_end) {
ret = dfu_write_buffer_drain(dfu);
if (ret) {
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
}
@@ -256,7 +275,7 @@
if ((dfu->i_buf + size) > dfu->i_buf_end) {
error("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
size, dfu->i_buf_end);
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return -1;
}
@@ -267,7 +286,7 @@
if (size == 0 || (dfu->i_buf + size) > dfu->i_buf_end) {
ret = dfu_write_buffer_drain(dfu);
if (ret) {
- dfu_write_transaction_cleanup(dfu);
+ dfu_transaction_cleanup(dfu);
return ret;
}
}
@@ -334,28 +353,9 @@
debug("%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x i_buf: 0x%p\n",
__func__, dfu->name, buf, size, blk_seq_num, dfu->i_buf);
- if (!dfu->inited) {
- dfu->i_buf_start = dfu_get_buf(dfu);
- if (dfu->i_buf_start == NULL)
- return -ENOMEM;
-
- dfu->r_left = dfu->get_medium_size(dfu);
- if (dfu->r_left < 0)
- return dfu->r_left;
-
- debug("%s: %s %ld [B]\n", __func__, dfu->name, dfu->r_left);
-
- dfu->i_blk_seq_num = 0;
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->i_buf_end = dfu_get_buf(dfu) + dfu_buf_size;
- dfu->i_buf = dfu->i_buf_start;
- dfu->b_left = 0;
-
- dfu->bad_skip = 0;
-
- dfu->inited = 1;
- }
+ ret = dfu_transaction_initiate(dfu, true);
+ if (ret < 0)
+ return ret;
if (dfu->i_blk_seq_num != blk_seq_num) {
printf("%s: Wrong sequence number! [%d] [%d]\n",
@@ -377,17 +377,7 @@
dfu_hash_algo->name, dfu->crc);
puts("\nUPLOAD ... done\nCtrl+C to exit ...\n");
- dfu->i_blk_seq_num = 0;
- dfu->crc = 0;
- dfu->offset = 0;
- dfu->i_buf_start = dfu_buf;
- dfu->i_buf_end = dfu_buf;
- dfu->i_buf = dfu->i_buf_start;
- dfu->b_left = 0;
-
- dfu->bad_skip = 0;
-
- dfu->inited = 0;
+ dfu_transaction_cleanup(dfu);
}
return ret;
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 926ccbd..39e10b1 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -17,7 +17,7 @@
#include <mmc.h>
static unsigned char *dfu_file_buf;
-static long dfu_file_buf_len;
+static u64 dfu_file_buf_len;
static long dfu_file_buf_filled;
static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
@@ -107,7 +107,7 @@
}
static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,
- void *buf, long *len)
+ void *buf, u64 *len)
{
const char *fsname, *opname;
char cmd_buf[DFU_CMD_BUF_SIZE];
@@ -150,7 +150,7 @@
sprintf(cmd_buf + strlen(cmd_buf), " %s", dfu->name);
if (op == DFU_OP_WRITE)
- sprintf(cmd_buf + strlen(cmd_buf), " %lx", *len);
+ sprintf(cmd_buf + strlen(cmd_buf), " %llx", *len);
debug("%s: %s 0x%p\n", __func__, cmd_buf, cmd_buf);
@@ -161,7 +161,7 @@
}
if (op != DFU_OP_WRITE) {
- str_env = getenv("filesize");
+ str_env = env_get("filesize");
if (str_env == NULL) {
puts("dfu: Wrong file size!\n");
return -1;
@@ -209,23 +209,23 @@
return ret;
}
-long dfu_get_medium_size_mmc(struct dfu_entity *dfu)
+int dfu_get_medium_size_mmc(struct dfu_entity *dfu, u64 *size)
{
int ret;
- long len;
switch (dfu->layout) {
case DFU_RAW_ADDR:
- return dfu->data.mmc.lba_size * dfu->data.mmc.lba_blk_size;
+ *size = dfu->data.mmc.lba_size * dfu->data.mmc.lba_blk_size;
+ return 0;
case DFU_FS_FAT:
case DFU_FS_EXT4:
dfu_file_buf_filled = -1;
- ret = mmc_file_op(DFU_OP_SIZE, dfu, NULL, &len);
+ ret = mmc_file_op(DFU_OP_SIZE, dfu, NULL, size);
if (ret < 0)
return ret;
- if (len > CONFIG_SYS_DFU_MAX_FILE_SIZE)
+ if (*size > CONFIG_SYS_DFU_MAX_FILE_SIZE)
return -1;
- return len;
+ return 0;
default:
printf("%s: Layout (%s) not (yet) supported!\n", __func__,
dfu_get_layout(dfu->layout));
@@ -237,7 +237,7 @@
long *len)
{
int ret;
- long file_len;
+ u64 file_len;
if (dfu_file_buf_filled == -1) {
ret = mmc_file_op(DFU_OP_READ, dfu, dfu_file_buf, &file_len);
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 97cd608..6dc9ff7 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -114,9 +114,11 @@
return ret;
}
-long dfu_get_medium_size_nand(struct dfu_entity *dfu)
+int dfu_get_medium_size_nand(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.nand.size;
+ *size = dfu->data.nand.size;
+
+ return 0;
}
static int dfu_read_medium_nand(struct dfu_entity *dfu, u64 offset, void *buf,
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
index c1b0021..6e3f531 100644
--- a/drivers/dfu/dfu_ram.c
+++ b/drivers/dfu/dfu_ram.c
@@ -41,9 +41,11 @@
return dfu_transfer_medium_ram(DFU_OP_WRITE, dfu, offset, buf, len);
}
-long dfu_get_medium_size_ram(struct dfu_entity *dfu)
+int dfu_get_medium_size_ram(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.ram.size;
+ *size = dfu->data.ram.size;
+
+ return 0;
}
static int dfu_read_medium_ram(struct dfu_entity *dfu, u64 offset,
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index b6d5fe2..2d2586d 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -12,9 +12,11 @@
#include <spi.h>
#include <spi_flash.h>
-static long dfu_get_medium_size_sf(struct dfu_entity *dfu)
+static int dfu_get_medium_size_sf(struct dfu_entity *dfu, u64 *size)
{
- return dfu->data.sf.size;
+ *size = dfu->data.sf.size;
+
+ return 0;
}
static int dfu_read_medium_sf(struct dfu_entity *dfu, u64 offset, void *buf,
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index a760944..6b2c866 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -13,6 +13,14 @@
Enable Altera FPGA specific functions which includes bitstream
(in BIT format), fpga and device validation.
+config FPGA_SOCFPGA
+ bool "Enable Gen5 and Arria10 common FPGA drivers"
+ select FPGA_ALTERA
+ help
+ Say Y here to enable the Gen5 and Arria10 common FPGA driver
+
+ This provides common functionality for Gen5 and Arria10 devices.
+
config FPGA_CYCLON2
bool "Enable Altera FPGA driver for Cyclone II"
depends on FPGA_ALTERA
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 777706f..08c9ff8 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -20,4 +20,6 @@
obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
obj-$(CONFIG_FPGA_STRATIX_V) += stratixv.o
obj-$(CONFIG_FPGA_SOCFPGA) += socfpga.o
+obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += socfpga_gen5.o
+obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += socfpga_arria10.o
endif
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index f1b2f2c..28fa16b 100644
--- a/drivers/fpga/socfpga.c
+++ b/drivers/fpga/socfpga.c
@@ -19,18 +19,8 @@
static struct socfpga_fpga_manager *fpgamgr_regs =
(struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
-static struct socfpga_system_manager *sysmgr_regs =
- (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
-/* Set CD ratio */
-static void fpgamgr_set_cd_ratio(unsigned long ratio)
-{
- clrsetbits_le32(&fpgamgr_regs->ctrl,
- 0x3 << FPGAMGRREGS_CTRL_CDRATIO_LSB,
- (ratio & 0x3) << FPGAMGRREGS_CTRL_CDRATIO_LSB);
-}
-
-static int fpgamgr_dclkcnt_set(unsigned long cnt)
+int fpgamgr_dclkcnt_set(unsigned long cnt)
{
unsigned long i;
@@ -53,98 +43,8 @@
return -ETIMEDOUT;
}
-/* Start the FPGA programming by initialize the FPGA Manager */
-static int fpgamgr_program_init(void)
-{
- unsigned long msel, i;
-
- /* Get the MSEL value */
- msel = readl(&fpgamgr_regs->stat);
- msel &= FPGAMGRREGS_STAT_MSEL_MASK;
- msel >>= FPGAMGRREGS_STAT_MSEL_LSB;
-
- /*
- * Set the cfg width
- * If MSEL[3] = 1, cfg width = 32 bit
- */
- if (msel & 0x8) {
- setbits_le32(&fpgamgr_regs->ctrl,
- FPGAMGRREGS_CTRL_CFGWDTH_MASK);
-
- /* To determine the CD ratio */
- /* MSEL[1:0] = 0, CD Ratio = 1 */
- if ((msel & 0x3) == 0x0)
- fpgamgr_set_cd_ratio(CDRATIO_x1);
- /* MSEL[1:0] = 1, CD Ratio = 4 */
- else if ((msel & 0x3) == 0x1)
- fpgamgr_set_cd_ratio(CDRATIO_x4);
- /* MSEL[1:0] = 2, CD Ratio = 8 */
- else if ((msel & 0x3) == 0x2)
- fpgamgr_set_cd_ratio(CDRATIO_x8);
-
- } else { /* MSEL[3] = 0 */
- clrbits_le32(&fpgamgr_regs->ctrl,
- FPGAMGRREGS_CTRL_CFGWDTH_MASK);
-
- /* To determine the CD ratio */
- /* MSEL[1:0] = 0, CD Ratio = 1 */
- if ((msel & 0x3) == 0x0)
- fpgamgr_set_cd_ratio(CDRATIO_x1);
- /* MSEL[1:0] = 1, CD Ratio = 2 */
- else if ((msel & 0x3) == 0x1)
- fpgamgr_set_cd_ratio(CDRATIO_x2);
- /* MSEL[1:0] = 2, CD Ratio = 4 */
- else if ((msel & 0x3) == 0x2)
- fpgamgr_set_cd_ratio(CDRATIO_x4);
- }
-
- /* To enable FPGA Manager configuration */
- clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCE_MASK);
-
- /* To enable FPGA Manager drive over configuration line */
- setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_EN_MASK);
-
- /* Put FPGA into reset phase */
- setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK);
-
- /* (1) wait until FPGA enter reset phase */
- for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
- if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_RESETPHASE)
- break;
- }
-
- /* If not in reset state, return error */
- if (fpgamgr_get_mode() != FPGAMGRREGS_MODE_RESETPHASE) {
- puts("FPGA: Could not reset\n");
- return -1;
- }
-
- /* Release FPGA from reset phase */
- clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK);
-
- /* (2) wait until FPGA enter configuration phase */
- for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
- if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_CFGPHASE)
- break;
- }
-
- /* If not in configuration state, return error */
- if (fpgamgr_get_mode() != FPGAMGRREGS_MODE_CFGPHASE) {
- puts("FPGA: Could not configure\n");
- return -2;
- }
-
- /* Clear all interrupts in CB Monitor */
- writel(0xFFF, &fpgamgr_regs->gpio_porta_eoi);
-
- /* Enable AXI configuration */
- setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_AXICFGEN_MASK);
-
- return 0;
-}
-
/* Write the RBF data to FPGA Manager */
-static void fpgamgr_program_write(const void *rbf_data, unsigned long rbf_size)
+void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)
{
uint32_t src = (uint32_t)rbf_data;
uint32_t dst = SOCFPGA_FPGAMGRDATA_ADDRESS;
@@ -171,134 +71,3 @@
: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc");
}
-/* Ensure the FPGA entering config done */
-static int fpgamgr_program_poll_cd(void)
-{
- const uint32_t mask = FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK |
- FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK;
- unsigned long reg, i;
-
- /* (3) wait until full config done */
- for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
- reg = readl(&fpgamgr_regs->gpio_ext_porta);
-
- /* Config error */
- if (!(reg & mask)) {
- printf("FPGA: Configuration error.\n");
- return -3;
- }
-
- /* Config done without error */
- if (reg & mask)
- break;
- }
-
- /* Timeout happened, return error */
- if (i == FPGA_TIMEOUT_CNT) {
- printf("FPGA: Timeout waiting for program.\n");
- return -4;
- }
-
- /* Disable AXI configuration */
- clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_AXICFGEN_MASK);
-
- return 0;
-}
-
-/* Ensure the FPGA entering init phase */
-static int fpgamgr_program_poll_initphase(void)
-{
- unsigned long i;
-
- /* Additional clocks for the CB to enter initialization phase */
- if (fpgamgr_dclkcnt_set(0x4))
- return -5;
-
- /* (4) wait until FPGA enter init phase or user mode */
- for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
- if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_INITPHASE)
- break;
- if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_USERMODE)
- break;
- }
-
- /* If not in configuration state, return error */
- if (i == FPGA_TIMEOUT_CNT)
- return -6;
-
- return 0;
-}
-
-/* Ensure the FPGA entering user mode */
-static int fpgamgr_program_poll_usermode(void)
-{
- unsigned long i;
-
- /* Additional clocks for the CB to exit initialization phase */
- if (fpgamgr_dclkcnt_set(0x5000))
- return -7;
-
- /* (5) wait until FPGA enter user mode */
- for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
- if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_USERMODE)
- break;
- }
- /* If not in configuration state, return error */
- if (i == FPGA_TIMEOUT_CNT)
- return -8;
-
- /* To release FPGA Manager drive over configuration line */
- clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_EN_MASK);
-
- return 0;
-}
-
-/*
- * FPGA Manager to program the FPGA. This is the interface used by FPGA driver.
- * Return 0 for sucess, non-zero for error.
- */
-int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
-{
- unsigned long status;
-
- if ((uint32_t)rbf_data & 0x3) {
- puts("FPGA: Unaligned data, realign to 32bit boundary.\n");
- return -EINVAL;
- }
-
- /* Prior programming the FPGA, all bridges need to be shut off */
-
- /* Disable all signals from hps peripheral controller to fpga */
- writel(0, &sysmgr_regs->fpgaintfgrp_module);
-
- /* Disable all signals from FPGA to HPS SDRAM */
-#define SDR_CTRLGRP_FPGAPORTRST_ADDRESS 0x5080
- writel(0, SOCFPGA_SDR_ADDRESS + SDR_CTRLGRP_FPGAPORTRST_ADDRESS);
-
- /* Disable all axi bridge (hps2fpga, lwhps2fpga & fpga2hps) */
- socfpga_bridges_reset(1);
-
- /* Unmap the bridges from NIC-301 */
- writel(0x1, SOCFPGA_L3REGS_ADDRESS);
-
- /* Initialize the FPGA Manager */
- status = fpgamgr_program_init();
- if (status)
- return status;
-
- /* Write the RBF data to FPGA Manager */
- fpgamgr_program_write(rbf_data, rbf_size);
-
- /* Ensure the FPGA entering config done */
- status = fpgamgr_program_poll_cd();
- if (status)
- return status;
-
- /* Ensure the FPGA entering init phase */
- status = fpgamgr_program_poll_initphase();
- if (status)
- return status;
-
- /* Ensure the FPGA entering user mode */
- return fpgamgr_program_poll_usermode();
-}
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
new file mode 100644
index 0000000..5c1a68a
--- /dev/null
+++ b/drivers/fpga/socfpga_arria10.c
@@ -0,0 +1,479 @@
+/*
+ * Copyright (C) 2017 Intel Corporation <www.intel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <asm/io.h>
+#include <asm/arch/fpga_manager.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/arch/system_manager.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/misc.h>
+#include <altera.h>
+#include <common.h>
+#include <errno.h>
+#include <wait_bit.h>
+#include <watchdog.h>
+
+#define CFGWDTH_32 1
+#define MIN_BITSTREAM_SIZECHECK 230
+#define ENCRYPTION_OFFSET 69
+#define COMPRESSION_OFFSET 229
+#define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */
+#define FPGA_TIMEOUT_CNT 0x1000000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_fpga_manager *fpga_manager_base =
+ (void *)SOCFPGA_FPGAMGRREGS_ADDRESS;
+
+static const struct socfpga_system_manager *system_manager_base =
+ (void *)SOCFPGA_SYSMGR_ADDRESS;
+
+static void fpgamgr_set_cd_ratio(unsigned long ratio);
+
+static uint32_t fpgamgr_get_msel(void)
+{
+ u32 reg;
+
+ reg = readl(&fpga_manager_base->imgcfg_stat);
+ reg = (reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SET_MSD) >>
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_LSB;
+
+ return reg;
+}
+
+static void fpgamgr_set_cfgwdth(int width)
+{
+ if (width)
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SET_MSK);
+ else
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SET_MSK);
+}
+
+int is_fpgamgr_user_mode(void)
+{
+ return (readl(&fpga_manager_base->imgcfg_stat) &
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK) != 0;
+}
+
+static int wait_for_user_mode(void)
+{
+ return wait_for_bit(__func__,
+ &fpga_manager_base->imgcfg_stat,
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK,
+ 1, FPGA_TIMEOUT_MSEC, false);
+}
+
+static int is_fpgamgr_early_user_mode(void)
+{
+ return (readl(&fpga_manager_base->imgcfg_stat) &
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK) != 0;
+}
+
+int fpgamgr_wait_early_user_mode(void)
+{
+ u32 sync_data = 0xffffffff;
+ u32 i = 0;
+ unsigned start = get_timer(0);
+ unsigned long cd_ratio;
+
+ /* Getting existing CDRATIO */
+ cd_ratio = (readl(&fpga_manager_base->imgcfg_ctrl_02) &
+ ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK) >>
+ ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_LSB;
+
+ /* Using CDRATIO_X1 for better compatibility */
+ fpgamgr_set_cd_ratio(CDRATIO_x1);
+
+ while (!is_fpgamgr_early_user_mode()) {
+ if (get_timer(start) > FPGA_TIMEOUT_MSEC)
+ return -ETIMEDOUT;
+ fpgamgr_program_write((const long unsigned int *)&sync_data,
+ sizeof(sync_data));
+ udelay(FPGA_TIMEOUT_MSEC);
+ i++;
+ }
+
+ debug("Additional %i sync word needed\n", i);
+
+ /* restoring original CDRATIO */
+ fpgamgr_set_cd_ratio(cd_ratio);
+
+ return 0;
+}
+
+/* Read f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted */
+static int wait_for_nconfig_pin_and_nstatus_pin(void)
+{
+ unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
+
+ /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
+ * timeout at 1000ms
+ */
+ return wait_for_bit(__func__,
+ &fpga_manager_base->imgcfg_stat,
+ mask,
+ false, FPGA_TIMEOUT_MSEC, false);
+}
+
+static int wait_for_f2s_nstatus_pin(unsigned long value)
+{
+ /* Poll until f2s to specific value, timeout at 1000ms */
+ return wait_for_bit(__func__,
+ &fpga_manager_base->imgcfg_stat,
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK,
+ value, FPGA_TIMEOUT_MSEC, false);
+}
+
+/* set CD ratio */
+static void fpgamgr_set_cd_ratio(unsigned long ratio)
+{
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK);
+
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ (ratio << ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_LSB) &
+ ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK);
+}
+
+/* get the MSEL value, verify we are set for FPP configuration mode */
+static int fpgamgr_verify_msel(void)
+{
+ u32 msel = fpgamgr_get_msel();
+
+ if (msel & ~BIT(0)) {
+ printf("Fail: read msel=%d\n", msel);
+ return -EPERM;
+ }
+
+ return 0;
+}
+
+/*
+ * Write cdratio and cdwidth based on whether the bitstream is compressed
+ * and/or encoded
+ */
+static int fpgamgr_set_cdratio_cdwidth(unsigned int cfg_width, u32 *rbf_data,
+ size_t rbf_size)
+{
+ unsigned int cd_ratio;
+ bool encrypt, compress;
+
+ /*
+ * According to the bitstream specification,
+ * both encryption and compression status are
+ * in location before offset 230 of the buffer.
+ */
+ if (rbf_size < MIN_BITSTREAM_SIZECHECK)
+ return -EINVAL;
+
+ encrypt = (rbf_data[ENCRYPTION_OFFSET] >> 2) & 3;
+ encrypt = encrypt != 0;
+
+ compress = (rbf_data[COMPRESSION_OFFSET] >> 1) & 1;
+ compress = !compress;
+
+ debug("header word %d = %08x\n", 69, rbf_data[69]);
+ debug("header word %d = %08x\n", 229, rbf_data[229]);
+ debug("read from rbf header: encrypt=%d compress=%d\n", encrypt, compress);
+
+ /*
+ * from the register map description of cdratio in imgcfg_ctrl_02:
+ * Normal Configuration : 32bit Passive Parallel
+ * Partial Reconfiguration : 16bit Passive Parallel
+ */
+
+ /*
+ * cd ratio is dependent on cfg width and whether the bitstream
+ * is encrypted and/or compressed.
+ *
+ * | width | encr. | compr. | cd ratio |
+ * | 16 | 0 | 0 | 1 |
+ * | 16 | 0 | 1 | 4 |
+ * | 16 | 1 | 0 | 2 |
+ * | 16 | 1 | 1 | 4 |
+ * | 32 | 0 | 0 | 1 |
+ * | 32 | 0 | 1 | 8 |
+ * | 32 | 1 | 0 | 4 |
+ * | 32 | 1 | 1 | 8 |
+ */
+ if (!compress && !encrypt) {
+ cd_ratio = CDRATIO_x1;
+ } else {
+ if (compress)
+ cd_ratio = CDRATIO_x4;
+ else
+ cd_ratio = CDRATIO_x2;
+
+ /* if 32 bit, double the cd ratio (so register
+ field setting is incremented) */
+ if (cfg_width == CFGWDTH_32)
+ cd_ratio += 1;
+ }
+
+ fpgamgr_set_cfgwdth(cfg_width);
+ fpgamgr_set_cd_ratio(cd_ratio);
+
+ return 0;
+}
+
+static int fpgamgr_reset(void)
+{
+ unsigned long reg;
+
+ /* S2F_NCONFIG = 0 */
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK);
+
+ /* Wait for f2s_nstatus == 0 */
+ if (wait_for_f2s_nstatus_pin(0))
+ return -ETIME;
+
+ /* S2F_NCONFIG = 1 */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK);
+
+ /* Wait for f2s_nstatus == 1 */
+ if (wait_for_f2s_nstatus_pin(1))
+ return -ETIME;
+
+ /* read and confirm f2s_condone_pin = 0 and f2s_condone_oe = 1 */
+ reg = readl(&fpga_manager_base->imgcfg_stat);
+ if ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK) != 0)
+ return -EPERM;
+
+ if ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_OE_SET_MSK) == 0)
+ return -EPERM;
+
+ return 0;
+}
+
+/* Start the FPGA programming by initialize the FPGA Manager */
+int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size)
+{
+ int ret;
+
+ /* Step 1 */
+ if (fpgamgr_verify_msel())
+ return -EPERM;
+
+ /* Step 2 */
+ if (fpgamgr_set_cdratio_cdwidth(CFGWDTH_32, rbf_data, rbf_size))
+ return -EPERM;
+
+ /*
+ * Step 3:
+ * Make sure no other external devices are trying to interfere with
+ * programming:
+ */
+ if (wait_for_nconfig_pin_and_nstatus_pin())
+ return -ETIME;
+
+ /*
+ * Step 4:
+ * Deassert the signal drives from HPS
+ *
+ * S2F_NCE = 1
+ * S2F_PR_REQUEST = 0
+ * EN_CFG_CTRL = 0
+ * EN_CFG_DATA = 0
+ * S2F_NCONFIG = 1
+ * S2F_NSTATUS_OE = 0
+ * S2F_CONDONE_OE = 0
+ */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSK);
+
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST_SET_MSK);
+
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSK);
+
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK);
+
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTATUS_OE_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK);
+
+ /*
+ * Step 5:
+ * Enable overrides
+ * S2F_NENABLE_CONFIG = 0
+ * S2F_NENABLE_NCONFIG = 0
+ */
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG_SET_MSK);
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG_SET_MSK);
+
+ /*
+ * Disable driving signals that HPS doesn't need to drive.
+ * S2F_NENABLE_NSTATUS = 1
+ * S2F_NENABLE_CONDONE = 1
+ */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE_SET_MSK);
+
+ /*
+ * Step 6:
+ * Drive chip select S2F_NCE = 0
+ */
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSK);
+
+ /* Step 7 */
+ if (wait_for_nconfig_pin_and_nstatus_pin())
+ return -ETIME;
+
+ /* Step 8 */
+ ret = fpgamgr_reset();
+
+ if (ret)
+ return ret;
+
+ /*
+ * Step 9:
+ * EN_CFG_CTRL and EN_CFG_DATA = 1
+ */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSK);
+
+ return 0;
+}
+
+/* Ensure the FPGA entering config done */
+static int fpgamgr_program_poll_cd(void)
+{
+ unsigned long reg, i;
+
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ reg = readl(&fpga_manager_base->imgcfg_stat);
+ if (reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK)
+ return 0;
+
+ if ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK) == 0) {
+ printf("nstatus == 0 while waiting for condone\n");
+ return -EPERM;
+ }
+ }
+
+ if (i == FPGA_TIMEOUT_CNT)
+ return -ETIME;
+
+ return 0;
+}
+
+/* Ensure the FPGA entering user mode */
+static int fpgamgr_program_poll_usermode(void)
+{
+ unsigned long reg;
+ int ret = 0;
+
+ if (fpgamgr_dclkcnt_set(0xf))
+ return -ETIME;
+
+ ret = wait_for_user_mode();
+ if (ret < 0) {
+ printf("%s: Failed to enter user mode with ", __func__);
+ printf("error code %d\n", ret);
+ return ret;
+ }
+
+ /*
+ * Step 14:
+ * Stop DATA path and Dclk
+ * EN_CFG_CTRL and EN_CFG_DATA = 0
+ */
+ clrbits_le32(&fpga_manager_base->imgcfg_ctrl_02,
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSK |
+ ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSK);
+
+ /*
+ * Step 15:
+ * Disable overrides
+ * S2F_NENABLE_CONFIG = 1
+ * S2F_NENABLE_NCONFIG = 1
+ */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG_SET_MSK);
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_00,
+ ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG_SET_MSK);
+
+ /* Disable chip select S2F_NCE = 1 */
+ setbits_le32(&fpga_manager_base->imgcfg_ctrl_01,
+ ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSK);
+
+ /*
+ * Step 16:
+ * Final check
+ */
+ reg = readl(&fpga_manager_base->imgcfg_stat);
+ if (((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK) !=
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK) ||
+ ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK) !=
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK) ||
+ ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK) !=
+ ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK))
+ return -EPERM;
+
+ return 0;
+}
+
+int fpgamgr_program_finish(void)
+{
+ /* Ensure the FPGA entering config done */
+ int status = fpgamgr_program_poll_cd();
+
+ if (status) {
+ printf("FPGA: Poll CD failed with error code %d\n", status);
+ return -EPERM;
+ }
+ WATCHDOG_RESET();
+
+ /* Ensure the FPGA entering user mode */
+ status = fpgamgr_program_poll_usermode();
+ if (status) {
+ printf("FPGA: Poll usermode failed with error code %d\n",
+ status);
+ return -EPERM;
+ }
+
+ printf("Full Configuration Succeeded.\n");
+
+ return 0;
+}
+
+/*
+ * FPGA Manager to program the FPGA. This is the interface used by FPGA driver.
+ * Return 0 for sucess, non-zero for error.
+ */
+int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
+{
+ unsigned long status;
+
+ /* disable all signals from hps peripheral controller to fpga */
+ writel(0, &system_manager_base->fpgaintf_en_global);
+
+ /* disable all axi bridge (hps2fpga, lwhps2fpga & fpga2hps) */
+ socfpga_bridges_reset();
+
+ /* Initialize the FPGA Manager */
+ status = fpgamgr_program_init((u32 *)rbf_data, rbf_size);
+ if (status)
+ return status;
+
+ /* Write the RBF data to FPGA Manager */
+ fpgamgr_program_write(rbf_data, rbf_size);
+
+ return fpgamgr_program_finish();
+}
diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c
new file mode 100644
index 0000000..3dfb030
--- /dev/null
+++ b/drivers/fpga/socfpga_gen5.c
@@ -0,0 +1,252 @@
+/*
+ * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <linux/errno.h>
+#include <asm/arch/fpga_manager.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/arch/system_manager.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define FPGA_TIMEOUT_CNT 0x1000000
+
+static struct socfpga_fpga_manager *fpgamgr_regs =
+ (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
+static struct socfpga_system_manager *sysmgr_regs =
+ (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
+
+/* Set CD ratio */
+static void fpgamgr_set_cd_ratio(unsigned long ratio)
+{
+ clrsetbits_le32(&fpgamgr_regs->ctrl,
+ 0x3 << FPGAMGRREGS_CTRL_CDRATIO_LSB,
+ (ratio & 0x3) << FPGAMGRREGS_CTRL_CDRATIO_LSB);
+}
+
+/* Start the FPGA programming by initialize the FPGA Manager */
+static int fpgamgr_program_init(void)
+{
+ unsigned long msel, i;
+
+ /* Get the MSEL value */
+ msel = readl(&fpgamgr_regs->stat);
+ msel &= FPGAMGRREGS_STAT_MSEL_MASK;
+ msel >>= FPGAMGRREGS_STAT_MSEL_LSB;
+
+ /*
+ * Set the cfg width
+ * If MSEL[3] = 1, cfg width = 32 bit
+ */
+ if (msel & 0x8) {
+ setbits_le32(&fpgamgr_regs->ctrl,
+ FPGAMGRREGS_CTRL_CFGWDTH_MASK);
+
+ /* To determine the CD ratio */
+ /* MSEL[1:0] = 0, CD Ratio = 1 */
+ if ((msel & 0x3) == 0x0)
+ fpgamgr_set_cd_ratio(CDRATIO_x1);
+ /* MSEL[1:0] = 1, CD Ratio = 4 */
+ else if ((msel & 0x3) == 0x1)
+ fpgamgr_set_cd_ratio(CDRATIO_x4);
+ /* MSEL[1:0] = 2, CD Ratio = 8 */
+ else if ((msel & 0x3) == 0x2)
+ fpgamgr_set_cd_ratio(CDRATIO_x8);
+
+ } else { /* MSEL[3] = 0 */
+ clrbits_le32(&fpgamgr_regs->ctrl,
+ FPGAMGRREGS_CTRL_CFGWDTH_MASK);
+
+ /* To determine the CD ratio */
+ /* MSEL[1:0] = 0, CD Ratio = 1 */
+ if ((msel & 0x3) == 0x0)
+ fpgamgr_set_cd_ratio(CDRATIO_x1);
+ /* MSEL[1:0] = 1, CD Ratio = 2 */
+ else if ((msel & 0x3) == 0x1)
+ fpgamgr_set_cd_ratio(CDRATIO_x2);
+ /* MSEL[1:0] = 2, CD Ratio = 4 */
+ else if ((msel & 0x3) == 0x2)
+ fpgamgr_set_cd_ratio(CDRATIO_x4);
+ }
+
+ /* To enable FPGA Manager configuration */
+ clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCE_MASK);
+
+ /* To enable FPGA Manager drive over configuration line */
+ setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_EN_MASK);
+
+ /* Put FPGA into reset phase */
+ setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK);
+
+ /* (1) wait until FPGA enter reset phase */
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_RESETPHASE)
+ break;
+ }
+
+ /* If not in reset state, return error */
+ if (fpgamgr_get_mode() != FPGAMGRREGS_MODE_RESETPHASE) {
+ puts("FPGA: Could not reset\n");
+ return -1;
+ }
+
+ /* Release FPGA from reset phase */
+ clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_NCONFIGPULL_MASK);
+
+ /* (2) wait until FPGA enter configuration phase */
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_CFGPHASE)
+ break;
+ }
+
+ /* If not in configuration state, return error */
+ if (fpgamgr_get_mode() != FPGAMGRREGS_MODE_CFGPHASE) {
+ puts("FPGA: Could not configure\n");
+ return -2;
+ }
+
+ /* Clear all interrupts in CB Monitor */
+ writel(0xFFF, &fpgamgr_regs->gpio_porta_eoi);
+
+ /* Enable AXI configuration */
+ setbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_AXICFGEN_MASK);
+
+ return 0;
+}
+
+/* Ensure the FPGA entering config done */
+static int fpgamgr_program_poll_cd(void)
+{
+ const uint32_t mask = FPGAMGRREGS_MON_GPIO_EXT_PORTA_NS_MASK |
+ FPGAMGRREGS_MON_GPIO_EXT_PORTA_CD_MASK;
+ unsigned long reg, i;
+
+ /* (3) wait until full config done */
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ reg = readl(&fpgamgr_regs->gpio_ext_porta);
+
+ /* Config error */
+ if (!(reg & mask)) {
+ printf("FPGA: Configuration error.\n");
+ return -3;
+ }
+
+ /* Config done without error */
+ if (reg & mask)
+ break;
+ }
+
+ /* Timeout happened, return error */
+ if (i == FPGA_TIMEOUT_CNT) {
+ printf("FPGA: Timeout waiting for program.\n");
+ return -4;
+ }
+
+ /* Disable AXI configuration */
+ clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_AXICFGEN_MASK);
+
+ return 0;
+}
+
+/* Ensure the FPGA entering init phase */
+static int fpgamgr_program_poll_initphase(void)
+{
+ unsigned long i;
+
+ /* Additional clocks for the CB to enter initialization phase */
+ if (fpgamgr_dclkcnt_set(0x4))
+ return -5;
+
+ /* (4) wait until FPGA enter init phase or user mode */
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_INITPHASE)
+ break;
+ if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_USERMODE)
+ break;
+ }
+
+ /* If not in configuration state, return error */
+ if (i == FPGA_TIMEOUT_CNT)
+ return -6;
+
+ return 0;
+}
+
+/* Ensure the FPGA entering user mode */
+static int fpgamgr_program_poll_usermode(void)
+{
+ unsigned long i;
+
+ /* Additional clocks for the CB to exit initialization phase */
+ if (fpgamgr_dclkcnt_set(0x5000))
+ return -7;
+
+ /* (5) wait until FPGA enter user mode */
+ for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
+ if (fpgamgr_get_mode() == FPGAMGRREGS_MODE_USERMODE)
+ break;
+ }
+ /* If not in configuration state, return error */
+ if (i == FPGA_TIMEOUT_CNT)
+ return -8;
+
+ /* To release FPGA Manager drive over configuration line */
+ clrbits_le32(&fpgamgr_regs->ctrl, FPGAMGRREGS_CTRL_EN_MASK);
+
+ return 0;
+}
+
+/*
+ * FPGA Manager to program the FPGA. This is the interface used by FPGA driver.
+ * Return 0 for sucess, non-zero for error.
+ */
+int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
+{
+ unsigned long status;
+
+ if ((uint32_t)rbf_data & 0x3) {
+ puts("FPGA: Unaligned data, realign to 32bit boundary.\n");
+ return -EINVAL;
+ }
+
+ /* Prior programming the FPGA, all bridges need to be shut off */
+
+ /* Disable all signals from hps peripheral controller to fpga */
+ writel(0, &sysmgr_regs->fpgaintfgrp_module);
+
+ /* Disable all signals from FPGA to HPS SDRAM */
+#define SDR_CTRLGRP_FPGAPORTRST_ADDRESS 0x5080
+ writel(0, SOCFPGA_SDR_ADDRESS + SDR_CTRLGRP_FPGAPORTRST_ADDRESS);
+
+ /* Disable all axi bridge (hps2fpga, lwhps2fpga & fpga2hps) */
+ socfpga_bridges_reset(1);
+
+ /* Unmap the bridges from NIC-301 */
+ writel(0x1, SOCFPGA_L3REGS_ADDRESS);
+
+ /* Initialize the FPGA Manager */
+ status = fpgamgr_program_init();
+ if (status)
+ return status;
+
+ /* Write the RBF data to FPGA Manager */
+ fpgamgr_program_write(rbf_data, rbf_size);
+
+ /* Ensure the FPGA entering config done */
+ status = fpgamgr_program_poll_cd();
+ if (status)
+ return status;
+
+ /* Ensure the FPGA entering init phase */
+ status = fpgamgr_program_poll_initphase();
+ if (status)
+ return status;
+
+ /* Ensure the FPGA entering user mode */
+ return fpgamgr_program_poll_usermode();
+}
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 2cd0104..941f300 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -29,7 +29,6 @@
{
unsigned int length;
unsigned int swapsize;
- char buffer[80];
unsigned char *dataptr;
unsigned int i;
const fpga_desc *desc;
@@ -57,10 +56,8 @@
length = (*dataptr << 8) + *(dataptr + 1);
dataptr += 2;
- for (i = 0; i < length; i++)
- buffer[i] = *dataptr++;
-
- printf(" design filename = \"%s\"\n", buffer);
+ printf(" design filename = \"%s\"\n", dataptr);
+ dataptr += length;
/* get part number (identifier, length, string) */
if (*dataptr++ != 0x62) {
@@ -71,23 +68,22 @@
length = (*dataptr << 8) + *(dataptr + 1);
dataptr += 2;
- for (i = 0; i < length; i++)
- buffer[i] = *dataptr++;
if (xdesc->name) {
- i = (ulong)strstr(buffer, xdesc->name);
+ i = (ulong)strstr((char *)dataptr, xdesc->name);
if (!i) {
printf("%s: Wrong bitstream ID for this device\n",
__func__);
printf("%s: Bitstream ID %s, current device ID %d/%s\n",
- __func__, buffer, devnum, xdesc->name);
+ __func__, dataptr, devnum, xdesc->name);
return FPGA_FAIL;
}
} else {
printf("%s: Please fill correct device ID to xilinx_desc\n",
__func__);
}
- printf(" part number = \"%s\"\n", buffer);
+ printf(" part number = \"%s\"\n", dataptr);
+ dataptr += length;
/* get date (identifier, length, string) */
if (*dataptr++ != 0x63) {
@@ -98,9 +94,8 @@
length = (*dataptr << 8) + *(dataptr+1);
dataptr += 2;
- for (i = 0; i < length; i++)
- buffer[i] = *dataptr++;
- printf(" date = \"%s\"\n", buffer);
+ printf(" date = \"%s\"\n", dataptr);
+ dataptr += length;
/* get time (identifier, length, string) */
if (*dataptr++ != 0x64) {
@@ -111,9 +106,8 @@
length = (*dataptr << 8) + *(dataptr+1);
dataptr += 2;
- for (i = 0; i < length; i++)
- buffer[i] = *dataptr++;
- printf(" time = \"%s\"\n", buffer);
+ printf(" time = \"%s\"\n", dataptr);
+ dataptr += length;
/* get fpga data length (identifier, length) */
if (*dataptr++ != 0x65) {
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 15135e5..ffeda94 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -67,6 +67,12 @@
driver from the common Intel ICH6 driver. It supports a total of
95 GPIOs which can be configured from the device tree.
+config INTEL_ICH6_GPIO
+ bool "Intel ICH6 compatible legacy GPIO driver"
+ depends on DM_GPIO
+ help
+ Say yes here to select Intel ICH6 compatible legacy GPIO driver.
+
config IMX_RGPIO2P
bool "i.MX7ULP RGPIO2P driver"
depends on DM
@@ -103,6 +109,15 @@
Support GPIO controllers on the TI OMAP3/4/5 and related (such as
AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
+config CMD_PCA953X
+ bool "Enable the pca953x command"
+ help
+ Deprecated: This should be converted to driver model.
+
+ This command provides access to a pca953x GPIO device using the
+ legacy GPIO interface. Several subcommands are provided which mirror
+ the standard 'gpio' command. It should use that instead.
+
config PM8916_GPIO
bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
depends on DM_GPIO && PMIC_PM8916
@@ -150,6 +165,15 @@
of 'anonymous' GPIOs that do not belong to any device or bank.
Select a suitable value depending on your needs.
+config CMD_TCA642X
+ bool "tca642x - Command to access tca642x state"
+ help
+ DEPRECATED - This needs conversion to driver model
+
+ This provides a way to looking at the pin state of this device.
+ This mirrors the 'gpio' command and that should be used in preference
+ to custom code.
+
config TEGRA_GPIO
bool "Tegra20..210 GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 8937e99..1396467 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -45,7 +45,6 @@
obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
obj-$(CONFIG_TCA642X) += tca642x.o
-oby-$(CONFIG_SX151X) += sx151x.o
obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o
obj-$(CONFIG_STM32_GPIO) += stm32_gpio.o
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 238e028..d1c1ae1 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -143,7 +143,6 @@
}
#ifdef CONFIG_CMD_PCA953X
-#ifdef CONFIG_CMD_PCA953X_INFO
/*
* Display pca953x information
*/
@@ -193,16 +192,13 @@
return 0;
}
-#endif /* CONFIG_CMD_PCA953X_INFO */
cmd_tbl_t cmd_pca953x[] = {
U_BOOT_CMD_MKENT(device, 3, 0, (void *)PCA953X_CMD_DEVICE, "", ""),
U_BOOT_CMD_MKENT(output, 4, 0, (void *)PCA953X_CMD_OUTPUT, "", ""),
U_BOOT_CMD_MKENT(input, 3, 0, (void *)PCA953X_CMD_INPUT, "", ""),
U_BOOT_CMD_MKENT(invert, 4, 0, (void *)PCA953X_CMD_INVERT, "", ""),
-#ifdef CONFIG_CMD_PCA953X_INFO
U_BOOT_CMD_MKENT(info, 2, 0, (void *)PCA953X_CMD_INFO, "", ""),
-#endif
};
int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -231,13 +227,11 @@
ul_arg3 = simple_strtoul(argv[3], NULL, 16) & 0x1;
switch ((long)c->cmd) {
-#ifdef CONFIG_CMD_PCA953X_INFO
case PCA953X_CMD_INFO:
ret = pca953x_info(chip);
if (ret)
ret = CMD_RET_FAILURE;
break;
-#endif
case PCA953X_CMD_DEVICE:
if (argc == 3)
@@ -287,10 +281,8 @@
"pca953x gpio access",
"device [dev]\n"
" - show or set current device address\n"
-#ifdef CONFIG_CMD_PCA953X_INFO
"pca953x info\n"
" - display info for current chip\n"
-#endif
"pca953x output pin 0|1\n"
" - set pin as output and drive low or high\n"
"pca953x invert pin 0|1\n"
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index ff245db..c04cef4 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -19,7 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
static const unsigned long io_base[] = {
STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
@@ -74,81 +73,6 @@
out:
return rv;
}
-#elif defined(CONFIG_STM32F1)
-static const unsigned long io_base[] = {
- STM32_GPIOA_BASE, STM32_GPIOB_BASE, STM32_GPIOC_BASE,
- STM32_GPIOD_BASE, STM32_GPIOE_BASE, STM32_GPIOF_BASE,
- STM32_GPIOG_BASE
-};
-
-#define STM32_GPIO_CR_MODE_MASK 0x3
-#define STM32_GPIO_CR_MODE_SHIFT(p) (p * 4)
-#define STM32_GPIO_CR_CNF_MASK 0x3
-#define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
-
-struct stm32_gpio_regs {
- u32 crl; /* GPIO port configuration low */
- u32 crh; /* GPIO port configuration high */
- u32 idr; /* GPIO port input data */
- u32 odr; /* GPIO port output data */
- u32 bsrr; /* GPIO port bit set/reset */
- u32 brr; /* GPIO port bit reset */
- u32 lckr; /* GPIO port configuration lock */
-};
-
-#define CHECK_DSC(x) (!x || x->port > 6 || x->pin > 15)
-#define CHECK_CTL(x) (!x || x->mode > 3 || x->icnf > 3 || x->ocnf > 3 || \
- x->pupd > 1)
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *dsc,
- const struct stm32_gpio_ctl *ctl)
-{
- struct stm32_gpio_regs *gpio_regs;
- u32 *cr;
- int p, crp;
- int rv;
-
- if (CHECK_DSC(dsc)) {
- rv = -EINVAL;
- goto out;
- }
- if (CHECK_CTL(ctl)) {
- rv = -EINVAL;
- goto out;
- }
-
- p = dsc->pin;
-
- gpio_regs = (struct stm32_gpio_regs *)io_base[dsc->port];
-
- if (p < 8) {
- cr = &gpio_regs->crl;
- crp = p;
- } else {
- cr = &gpio_regs->crh;
- crp = p - 8;
- }
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_MODE_SHIFT(crp));
- setbits_le32(cr, ctl->mode << STM32_GPIO_CR_MODE_SHIFT(crp));
-
- clrbits_le32(cr, 0x3 << STM32_GPIO_CR_CNF_SHIFT(crp));
- /* Inputs set the optional pull up / pull down */
- if (ctl->mode == STM32_GPIO_MODE_IN) {
- setbits_le32(cr, ctl->icnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- clrbits_le32(&gpio_regs->odr, 0x1 << p);
- setbits_le32(&gpio_regs->odr, ctl->pupd << p);
- } else {
- setbits_le32(cr, ctl->ocnf << STM32_GPIO_CR_CNF_SHIFT(crp));
- }
-
- rv = 0;
-out:
- return rv;
-}
-#else
-#error STM32 family not supported
-#endif
int stm32_gpout_set(const struct stm32_gpio_dsc *dsc, int state)
{
@@ -207,20 +131,11 @@
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_IN;
ctl.otype = STM32_GPIO_OTYPE_PP;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_IN;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP; /* ignored for input */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for floating */
-#else
-#error STM32 family not supported
-#endif
return stm32_gpio_config(&dsc, &ctl);
}
@@ -233,19 +148,10 @@
dsc.port = stm32_gpio_to_port(gpio);
dsc.pin = stm32_gpio_to_pin(gpio);
-#if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
ctl.af = STM32_GPIO_AF0;
ctl.mode = STM32_GPIO_MODE_OUT;
ctl.pupd = STM32_GPIO_PUPD_NO;
ctl.speed = STM32_GPIO_SPEED_50M;
-#elif defined(CONFIG_STM32F1)
- ctl.mode = STM32_GPIO_MODE_OUT_50M;
- ctl.ocnf = STM32_GPIO_OCNF_GP_PP;
- ctl.icnf = STM32_GPIO_ICNF_IN_FLT; /* ignored for output */
- ctl.pupd = STM32_GPIO_PUPD_UP; /* ignored for output */
-#else
-#error STM32 family not supported
-#endif
res = stm32_gpio_config(&dsc, &ctl);
if (res < 0)
diff --git a/drivers/gpio/sx151x.c b/drivers/gpio/sx151x.c
deleted file mode 100644
index 167cf40..0000000
--- a/drivers/gpio/sx151x.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * (C) Copyright 2013
- * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Driver for Semtech SX151x SPI GPIO Expanders
- */
-
-#include <common.h>
-#include <spi.h>
-#include <sx151x.h>
-
-#ifndef CONFIG_SX151X_SPI_BUS
-#define CONFIG_SX151X_SPI_BUS 0
-#endif
-
-/*
- * The SX151x registers
- */
-
-#ifdef CONFIG_SX151X_GPIO_COUNT_8
-/* 8bit: SX1511 */
-#define SX151X_REG_DIR 0x07
-#define SX151X_REG_DATA 0x08
-#else
-/* 16bit: SX1512 */
-#define SX151X_REG_DIR 0x0F
-#define SX151X_REG_DATA 0x11
-#endif
-#define SX151X_REG_RESET 0x7D
-
-static int sx151x_spi_write(int chip, unsigned char reg, unsigned char val)
-{
- struct spi_slave *slave;
- unsigned char buf[2];
- int ret;
-
- slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
- SPI_MODE_0);
- if (!slave)
- return 0;
-
- spi_claim_bus(slave);
-
- buf[0] = reg;
- buf[1] = val;
-
- ret = spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
- if (ret < 0)
- printf("spi%d.%d write fail: can't write %02x to %02x: %d\n",
- CONFIG_SX151X_SPI_BUS, chip, val, reg, ret);
- else
- printf("spi%d.%d write 0x%02x to register 0x%02x\n",
- CONFIG_SX151X_SPI_BUS, chip, val, reg);
- spi_release_bus(slave);
- spi_free_slave(slave);
-
- return ret;
-}
-
-static int sx151x_spi_read(int chip, unsigned char reg)
-{
- struct spi_slave *slave;
- int ret;
-
- slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
- SPI_MODE_0);
- if (!slave)
- return 0;
-
- spi_claim_bus(slave);
-
- ret = spi_w8r8(slave, reg | 0x80);
- if (ret < 0)
- printf("spi%d.%d read fail: can't read %02x: %d\n",
- CONFIG_SX151X_SPI_BUS, chip, reg, ret);
- else
- printf("spi%d.%d read register 0x%02x: 0x%02x\n",
- CONFIG_SX151X_SPI_BUS, chip, reg, ret);
-
- spi_release_bus(slave);
- spi_free_slave(slave);
-
- return ret;
-}
-
-static inline void sx151x_find_cfg(int gpio, unsigned char *reg, unsigned char *mask)
-{
- *reg -= gpio / 8;
- *mask = 1 << (gpio % 8);
-}
-
-static int sx151x_write_cfg(int chip, unsigned char gpio, unsigned char reg, int val)
-{
- unsigned char mask;
- unsigned char data;
- int ret;
-
- sx151x_find_cfg(gpio, ®, &mask);
- ret = sx151x_spi_read(chip, reg);
- if (ret < 0)
- return ret;
- else
- data = ret;
- data &= ~mask;
- data |= (val << (gpio % 8)) & mask;
- return sx151x_spi_write(chip, reg, data);
-}
-
-int sx151x_get_value(int chip, int gpio)
-{
- unsigned char reg = SX151X_REG_DATA;
- unsigned char mask;
- int ret;
-
- sx151x_find_cfg(gpio, ®, &mask);
- ret = sx151x_spi_read(chip, reg);
- if (ret >= 0)
- ret = (ret & mask) != 0 ? 1 : 0;
-
- return ret;
-}
-
-int sx151x_set_value(int chip, int gpio, int val)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DATA, (val ? 1 : 0));
-}
-
-int sx151x_direction_input(int chip, int gpio)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 1);
-}
-
-int sx151x_direction_output(int chip, int gpio)
-{
- return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 0);
-}
-
-int sx151x_reset(int chip)
-{
- int err;
-
- err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x12);
- if (err < 0)
- return err;
-
- err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x34);
- return err;
-}
-
-#ifdef CONFIG_CMD_SX151X
-
-int do_sx151x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int ret = CMD_RET_USAGE, chip = 0, gpio = 0, val = 0;
-
- if (argc < 3)
- return CMD_RET_USAGE;
-
- /* arg2 used as chip number */
- chip = simple_strtoul(argv[2], NULL, 10);
-
- if (strcmp(argv[1], "reset") == 0) {
- ret = sx151x_reset(chip);
- if (!ret) {
- printf("Device at spi%d.%d was reset\n",
- CONFIG_SX151X_SPI_BUS, chip);
- }
- return ret;
- }
-
- if (argc < 4)
- return CMD_RET_USAGE;
-
- /* arg3 used as gpio number */
- gpio = simple_strtoul(argv[3], NULL, 10);
-
- if (strcmp(argv[1], "get") == 0) {
- ret = sx151x_get_value(chip, gpio);
- if (ret < 0)
- printf("Failed to get value at spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else {
- printf("Value at spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, ret);
- ret = 0;
- }
- return ret;
- }
-
- if (argc < 5)
- return CMD_RET_USAGE;
-
- /* arg4 used as value or direction */
- val = simple_strtoul(argv[4], NULL, 10);
-
- if (strcmp(argv[1], "set") == 0) {
- ret = sx151x_set_value(chip, gpio, val);
- if (ret < 0)
- printf("Failed to set value at spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else
- printf("New value at spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, val);
- return ret;
- } else if (strcmp(argv[1], "dir") == 0) {
- if (val == 0)
- ret = sx151x_direction_output(chip, gpio);
- else
- ret = sx151x_direction_input(chip, gpio);
-
- if (ret < 0)
- printf("Failed to set direction of spi%d.%d gpio %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio);
- else
- printf("New direction of spi%d.%d gpio %d is %d\n",
- CONFIG_SX151X_SPI_BUS, chip, gpio, val);
- return ret;
- }
-
- printf("Please see usage\n");
-
- return ret;
-}
-
-U_BOOT_CMD(
- sx151x, 5, 1, do_sx151x,
- "sx151x gpio access",
- "dir chip gpio 0|1\n"
- " - set gpio direction (0 for output, 1 for input)\n"
- "sx151x get chip gpio\n"
- " - get gpio value\n"
- "sx151x set chip gpio 0|1\n"
- " - set gpio value\n"
- "sx151x reset chip\n"
- " - reset chip"
-);
-
-#endif /* CONFIG_CMD_SX151X */
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 687cd74..4965583 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -337,11 +337,13 @@
* This driver does not make use of interrupts, other than to figure
* out the number of GPIO banks
*/
- if (!fdt_getprop(gd->fdt_blob, dev_of_offset(parent), "interrupts",
- &len))
- return -EINVAL;
+ len = dev_read_size(parent, "interrupts");
+ if (len < 0)
+ return len;
bank_count = len / 3 / sizeof(u32);
- ctlr = (struct gpio_ctlr *)devfdt_get_addr(parent);
+ ctlr = (struct gpio_ctlr *)dev_read_addr(parent);
+ if ((ulong)ctlr == FDT_ADDR_T_NONE)
+ return -EINVAL;
}
#endif
for (bank = 0; bank < bank_count; bank++) {
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 8ac1cc6..720e82d 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -145,6 +145,12 @@
channels and operating on standard mode upto 100 kbits/s and fast
mode upto 400 kbits/s.
+config SYS_I2C_OMAP24XX
+ bool "TI OMAP2+ I2C driver"
+ depends on ARCH_OMAP2PLUS
+ help
+ Add support for the OMAP2+ I2C driver.
+
config SYS_I2C_ROCKCHIP
bool "Rockchip I2C driver"
depends on DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 4bbf0c9..4f75419 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -31,7 +31,6 @@
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
-obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index b7298cf..d394044 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -199,7 +199,7 @@
return 0;
}
-static int at91_i2c_probe(struct udevice *dev, uint chip, uint chip_flags)
+static int at91_i2c_probe_chip(struct udevice *dev, uint chip, uint chip_flags)
{
struct at91_i2c_bus *bus = dev_get_priv(dev);
struct at91_i2c_regs *reg = bus->regs;
@@ -254,11 +254,32 @@
static const struct dm_i2c_ops at91_i2c_ops = {
.xfer = at91_i2c_xfer,
- .probe_chip = at91_i2c_probe,
+ .probe_chip = at91_i2c_probe_chip,
.set_bus_speed = at91_i2c_set_bus_speed,
.get_bus_speed = at91_i2c_get_bus_speed,
};
+static int at91_i2c_probe(struct udevice *dev)
+{
+ struct at91_i2c_bus *bus = dev_get_priv(dev);
+ struct at91_i2c_regs *reg = bus->regs;
+ int ret;
+
+ ret = at91_i2c_enable_clk(dev);
+ if (ret)
+ return ret;
+
+ writel(TWI_CR_SWRST, ®->cr);
+
+ at91_calc_i2c_clock(dev, bus->clock_frequency);
+
+ writel(bus->cwgr_val, ®->cwgr);
+ writel(TWI_CR_MSEN, ®->cr);
+ writel(TWI_CR_SVDIS, ®->cr);
+
+ return 0;
+}
+
static const struct at91_i2c_pdata at91rm9200_config = {
.clk_max_div = 5,
.clk_offset = 3,
@@ -315,6 +336,7 @@
.name = "i2c_at91",
.id = UCLASS_I2C,
.of_match = at91_i2c_ids,
+ .probe = at91_i2c_probe,
.ofdata_to_platdata = at91_i2c_ofdata_to_platdata,
.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
.priv_auto_alloc_size = sizeof(struct at91_i2c_bus),
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index d4df35a..8cfed21 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -374,7 +374,8 @@
/* Disable i2c */
dw_i2c_enable(i2c_base, false);
- writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_base->ic_con);
+ writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
+ &i2c_base->ic_con);
writel(IC_RX_TL, &i2c_base->ic_rx_tl);
writel(IC_TX_TL, &i2c_base->ic_tx_tl);
writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 055f481..3255e8e 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -9,7 +9,6 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
#include <i2c.h>
#include <asm/io.h>
#include <clk.h>
@@ -365,7 +364,11 @@
i2c_bus->id = dev->seq;
i2c_bus->type = dev_get_driver_data(dev);
- i2c_bus->regs = (struct i2c_ctlr *)devfdt_get_addr(dev);
+ i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev);
+ if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) {
+ debug("%s: Cannot get regs address\n", __func__);
+ return -EINVAL;
+ }
ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl);
if (ret) {
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
index 0fd25b1..18476e9 100644
--- a/drivers/input/i8042.c
+++ b/drivers/input/i8042.c
@@ -274,7 +274,7 @@
/* Init keyboard device (default US layout) */
keymap = KBD_US;
- penv = getenv("keymap");
+ penv = env_get("keymap");
if (penv != NULL) {
if (strncmp(penv, "de", 3) == 0)
keymap = KBD_GER;
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 011667f..26da3a9 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -652,7 +652,7 @@
error = stdio_register(dev);
/* check if this is the standard input device */
- if (!error && strcmp(getenv("stdin"), dev->name) == 0) {
+ if (!error && strcmp(env_get("stdin"), dev->name) == 0) {
/* reassign the console */
if (OVERWRITE_CONSOLE ||
console_assign(stdin, dev->name))
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 423d24c..2e3bc91 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -142,7 +142,7 @@
{
struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
- plat->base = (void *)devfdt_get_addr(dev);
+ plat->base = (void *)dev_read_addr(dev);
return 0;
}
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 82b8d75..51a87cd 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -30,6 +30,27 @@
option will be removed as soon as all DM_MMC drivers use it, as it
will the only supported behaviour.
+config SPL_DM_MMC
+ bool "Enable MMC controllers using Driver Model in SPL"
+ depends on SPL_DM && DM_MMC
+ default y
+ help
+ This enables the MultiMediaCard (MMC) uclass which supports MMC and
+ Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
+ and non-removable (e.g. eMMC chip) devices are supported. These
+ appear as block devices in U-Boot and can support filesystems such
+ as EXT4 and FAT.
+
+config SPL_DM_MMC_OPS
+ bool "Support MMC controller operations using Driver Model in SPL"
+ depends on SPL_DM && DM_MMC_OPS
+ default y
+ help
+ Driver model provides a means of supporting device operations. This
+ option moves MMC operations under the control of driver model. The
+ option will be removed as soon as all DM_MMC drivers use it, as it
+ will the only supported behaviour.
+
if MMC
config SPL_MMC_TINY
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 2d781c3..a6becb2 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -6,9 +6,9 @@
#
obj-y += mmc.o
-obj-$(CONFIG_DM_MMC) += mmc-uclass.o
+obj-$(CONFIG_$(SPL_)DM_MMC) += mmc-uclass.o
-ifndef CONFIG_BLK
+ifndef CONFIG_$(SPL_)BLK
obj-y += mmc_legacy.o
endif
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3abd2d3..b69c9b7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -930,8 +930,6 @@
return 1;
}
#endif
- do_fixup_by_compat(blob, compat, "status", "okay",
- sizeof("okay"), 1);
return 0;
}
@@ -968,7 +966,9 @@
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
+#ifdef CONFIG_DM_REGULATOR
struct udevice *vqmmc_dev;
+#endif
fdt_addr_t addr;
unsigned int val;
int ret;
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 994d268..3e90725 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -15,7 +15,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_DM_MMC_OPS
+#if CONFIG_IS_ENABLED(DM_MMC_OPS)
int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
@@ -91,7 +91,7 @@
return upriv->mmc;
}
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
struct mmc *find_mmc_device(int dev_num)
{
struct udevice *dev, *mmc_dev;
@@ -198,7 +198,7 @@
struct udevice *bdev;
int ret, devnum = -1;
-#ifdef CONFIG_DM_MMC_OPS
+#if CONFIG_IS_ENABLED(DM_MMC_OPS)
if (!mmc_get_ops(dev))
return -ENOSYS;
#endif
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 3cdf6a4..38e1c80 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -53,7 +53,7 @@
}
#endif
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
__weak int board_mmc_getwp(struct mmc *mmc)
{
return -1;
@@ -149,7 +149,7 @@
}
#endif
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
int ret;
@@ -261,14 +261,14 @@
return blkcnt;
}
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
#else
ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
void *dst)
#endif
{
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
#endif
int dev_num = block_dev->devnum;
@@ -839,7 +839,7 @@
return 0;
}
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
int mmc_getcd(struct mmc *mmc)
{
int cd;
@@ -1075,7 +1075,7 @@
80,
};
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
static void mmc_set_ios(struct mmc *mmc)
{
if (mmc->cfg->ops->set_ios)
@@ -1608,7 +1608,7 @@
return 0;
}
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
/* board-specific MMC power initializations. */
__weak void board_mmc_power_init(void)
{
@@ -1617,7 +1617,7 @@
static int mmc_power_init(struct mmc *mmc)
{
-#if defined(CONFIG_DM_MMC)
+#if CONFIG_IS_ENABLED(DM_MMC)
#if defined(CONFIG_DM_REGULATOR) && !defined(CONFIG_SPL_BUILD)
struct udevice *vmmc_supply;
int ret;
@@ -1652,7 +1652,7 @@
/* we pretend there's no card when init is NULL */
no_card = mmc_getcd(mmc) == 0;
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
no_card = no_card || (mmc->cfg->ops->init == NULL);
#endif
if (no_card) {
@@ -1673,7 +1673,7 @@
if (err)
return err;
-#ifdef CONFIG_DM_MMC_OPS
+#if CONFIG_IS_ENABLED(DM_MMC_OPS)
/* The device has already been probed ready for use */
#else
/* made sure it's not NULL earlier */
@@ -1739,7 +1739,7 @@
{
int err = 0;
__maybe_unused unsigned start;
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
upriv->mmc = mmc;
@@ -1783,12 +1783,12 @@
mmc->preinit = preinit;
}
-#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
static int mmc_probe(bd_t *bis)
{
return 0;
}
-#elif defined(CONFIG_DM_MMC)
+#elif CONFIG_IS_ENABLED(DM_MMC)
static int mmc_probe(bd_t *bis)
{
int ret, i;
@@ -1835,7 +1835,7 @@
return 0;
initialized = 1;
-#ifndef CONFIG_BLK
+#if !CONFIG_IS_ENABLED(BLK)
#if !CONFIG_IS_ENABLED(MMC_TINY)
mmc_list_init();
#endif
diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c
index bdf9d98..59dc3df 100644
--- a/drivers/mmc/mmc_legacy.c
+++ b/drivers/mmc/mmc_legacy.c
@@ -150,7 +150,7 @@
cfg->f_max == 0 || cfg->b_max == 0)
return NULL;
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
if (cfg->ops == NULL || cfg->ops->send_cmd == NULL)
return NULL;
#endif
diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h
index 03bf24d..1290eed 100644
--- a/drivers/mmc/mmc_private.h
+++ b/drivers/mmc/mmc_private.h
@@ -20,7 +20,7 @@
void mmc_adapter_card_type_ident(void);
#endif
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
void *dst);
#else
@@ -30,7 +30,7 @@
#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV))
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
ulong mmc_bwrite(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
const void *src);
ulong mmc_berase(struct udevice *dev, lbaint_t start, lbaint_t blkcnt);
@@ -44,7 +44,7 @@
/* declare dummies to reduce code size. */
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
static inline unsigned long mmc_berase(struct udevice *dev,
lbaint_t start, lbaint_t blkcnt)
{
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index bb10caa..efa4389 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -62,11 +62,11 @@
struct omap_hsmmc_data {
struct hsmmc *base_addr;
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc_config cfg;
#endif
#ifdef OMAP_HSMMC_USE_GPIO
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
struct gpio_desc cd_gpio; /* Change Detect GPIO */
struct gpio_desc wp_gpio; /* Write Protect GPIO */
bool cd_inverted;
@@ -86,7 +86,7 @@
static inline struct omap_hsmmc_data *omap_hsmmc_get_data(struct mmc *mmc)
{
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
return dev_get_priv(mmc->dev);
#else
return (struct omap_hsmmc_data *)mmc->priv;
@@ -94,7 +94,7 @@
}
static inline struct mmc_config *omap_hsmmc_get_cfg(struct mmc *mmc)
{
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
struct omap_hsmmc_plat *plat = dev_get_platdata(mmc->dev);
return &plat->cfg;
#else
@@ -102,7 +102,7 @@
#endif
}
- #if defined(OMAP_HSMMC_USE_GPIO) && !defined(CONFIG_DM_MMC)
+#if defined(OMAP_HSMMC_USE_GPIO) && !CONFIG_IS_ENABLED(DM_MMC)
static int omap_mmc_setup_gpio_in(int gpio, const char *label)
{
int ret;
@@ -326,7 +326,7 @@
}
}
}
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
@@ -564,7 +564,7 @@
return 0;
}
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int omap_hsmmc_set_ios(struct mmc *mmc)
{
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
@@ -630,7 +630,7 @@
}
#ifdef OMAP_HSMMC_USE_GPIO
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
static int omap_hsmmc_getcd(struct udevice *dev)
{
struct omap_hsmmc_data *priv = dev_get_priv(dev);
@@ -688,7 +688,7 @@
#endif
#endif
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
static const struct dm_mmc_ops omap_hsmmc_ops = {
.send_cmd = omap_hsmmc_send_cmd,
.set_ios = omap_hsmmc_set_ios,
@@ -709,7 +709,7 @@
};
#endif
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
int wp_gpio)
{
diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
index e39b476..6db8977 100644
--- a/drivers/mmc/pci_mmc.c
+++ b/drivers/mmc/pci_mmc.c
@@ -6,37 +6,71 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <malloc.h>
+#include <mapmem.h>
#include <sdhci.h>
#include <asm/pci.h>
-int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)
+struct pci_mmc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+struct pci_mmc_priv {
+ struct sdhci_host host;
+ void *base;
+};
+
+static int pci_mmc_probe(struct udevice *dev)
{
- struct sdhci_host *mmc_host;
- u32 iobase;
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct pci_mmc_plat *plat = dev_get_platdata(dev);
+ struct pci_mmc_priv *priv = dev_get_priv(dev);
+ struct sdhci_host *host = &priv->host;
+ u32 ioaddr;
int ret;
- int i;
- for (i = 0; ; i++) {
- struct udevice *dev;
+ dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &ioaddr);
+ host->ioaddr = map_sysmem(ioaddr, 0);
+ host->name = dev->name;
+ ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
+ if (ret)
+ return ret;
+ host->mmc = &plat->mmc;
+ host->mmc->priv = &priv->host;
+ host->mmc->dev = dev;
+ upriv->mmc = host->mmc;
- ret = pci_find_device_id(mmc_supported, i, &dev);
- if (ret)
- return ret;
- mmc_host = malloc(sizeof(struct sdhci_host));
- if (!mmc_host)
- return -ENOMEM;
-
- mmc_host->name = name;
- dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
- mmc_host->ioaddr = (void *)(ulong)iobase;
- mmc_host->quirks = 0;
- mmc_host->max_clk = 0;
- ret = add_sdhci(mmc_host, 0, 0);
- if (ret)
- return ret;
- }
-
- return 0;
+ return sdhci_probe(dev);
}
+
+static int pci_mmc_bind(struct udevice *dev)
+{
+ struct pci_mmc_plat *plat = dev_get_platdata(dev);
+
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+U_BOOT_DRIVER(pci_mmc) = {
+ .name = "pci_mmc",
+ .id = UCLASS_MMC,
+ .bind = pci_mmc_bind,
+ .probe = pci_mmc_probe,
+ .ops = &sdhci_ops,
+ .priv_auto_alloc_size = sizeof(struct pci_mmc_priv),
+ .platdata_auto_alloc_size = sizeof(struct pci_mmc_plat),
+};
+
+static struct pci_device_id mmc_supported[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1) },
+ {},
+};
+
+U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index fd3fc2a..588574f 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -9,6 +9,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <malloc.h>
#include <mmc.h>
@@ -19,16 +20,23 @@
#include <asm/arch/mmc.h>
#include <asm-generic/gpio.h>
-struct sunxi_mmc_host {
+struct sunxi_mmc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+struct sunxi_mmc_priv {
unsigned mmc_no;
uint32_t *mclkreg;
unsigned fatal_err;
+ struct gpio_desc cd_gpio; /* Change Detect GPIO */
struct sunxi_mmc *reg;
struct mmc_config cfg;
};
+#if !CONFIG_IS_ENABLED(DM_MMC)
/* support 4 mmc hosts */
-struct sunxi_mmc_host mmc_host[4];
+struct sunxi_mmc_priv mmc_host[4];
static int sunxi_mmc_getcd_gpio(int sdc_no)
{
@@ -43,7 +51,7 @@
static int mmc_resource_init(int sdc_no)
{
- struct sunxi_mmc_host *mmchost = &mmc_host[sdc_no];
+ struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
int cd_pin, ret = 0;
@@ -51,26 +59,26 @@
switch (sdc_no) {
case 0:
- mmchost->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE;
- mmchost->mclkreg = &ccm->sd0_clk_cfg;
+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE;
+ priv->mclkreg = &ccm->sd0_clk_cfg;
break;
case 1:
- mmchost->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE;
- mmchost->mclkreg = &ccm->sd1_clk_cfg;
+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC1_BASE;
+ priv->mclkreg = &ccm->sd1_clk_cfg;
break;
case 2:
- mmchost->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE;
- mmchost->mclkreg = &ccm->sd2_clk_cfg;
+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC2_BASE;
+ priv->mclkreg = &ccm->sd2_clk_cfg;
break;
case 3:
- mmchost->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE;
- mmchost->mclkreg = &ccm->sd3_clk_cfg;
+ priv->reg = (struct sunxi_mmc *)SUNXI_MMC3_BASE;
+ priv->mclkreg = &ccm->sd3_clk_cfg;
break;
default:
printf("Wrong mmc number %d\n", sdc_no);
return -1;
}
- mmchost->mmc_no = sdc_no;
+ priv->mmc_no = sdc_no;
cd_pin = sunxi_mmc_getcd_gpio(sdc_no);
if (cd_pin >= 0) {
@@ -83,8 +91,9 @@
return ret;
}
+#endif
-static int mmc_set_mod_clk(struct sunxi_mmc_host *mmchost, unsigned int hz)
+static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
{
unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
@@ -112,8 +121,8 @@
}
if (n > 3) {
- printf("mmc %u error cannot set clock to %u\n",
- mmchost->mmc_no, hz);
+ printf("mmc %u error cannot set clock to %u\n", priv->mmc_no,
+ hz);
return -1;
}
@@ -145,126 +154,101 @@
writel(CCM_MMC_CTRL_ENABLE | pll | CCM_MMC_CTRL_SCLK_DLY(sclk_dly) |
CCM_MMC_CTRL_N(n) | CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
- CCM_MMC_CTRL_M(div), mmchost->mclkreg);
+ CCM_MMC_CTRL_M(div), priv->mclkreg);
debug("mmc %u set mod-clk req %u parent %u n %u m %u rate %u\n",
- mmchost->mmc_no, hz, pll_hz, 1u << n, div,
- pll_hz / (1u << n) / div);
+ priv->mmc_no, hz, pll_hz, 1u << n, div, pll_hz / (1u << n) / div);
return 0;
}
-static int mmc_clk_io_on(int sdc_no)
+static int mmc_update_clk(struct sunxi_mmc_priv *priv)
{
- struct sunxi_mmc_host *mmchost = &mmc_host[sdc_no];
- struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- debug("init mmc %d clock and io\n", sdc_no);
-
- /* config ahb clock */
- setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no));
-
-#ifdef CONFIG_SUNXI_GEN_SUN6I
- /* unassert reset */
- setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no));
-#endif
-#if defined(CONFIG_MACH_SUN9I)
- /* sun9i has a mmc-common module, also set the gate and reset there */
- writel(SUNXI_MMC_COMMON_CLK_GATE | SUNXI_MMC_COMMON_RESET,
- SUNXI_MMC_COMMON_BASE + 4 * sdc_no);
-#endif
-
- return mmc_set_mod_clk(mmchost, 24000000);
-}
-
-static int mmc_update_clk(struct mmc *mmc)
-{
- struct sunxi_mmc_host *mmchost = mmc->priv;
unsigned int cmd;
unsigned timeout_msecs = 2000;
cmd = SUNXI_MMC_CMD_START |
SUNXI_MMC_CMD_UPCLK_ONLY |
SUNXI_MMC_CMD_WAIT_PRE_OVER;
- writel(cmd, &mmchost->reg->cmd);
- while (readl(&mmchost->reg->cmd) & SUNXI_MMC_CMD_START) {
+ writel(cmd, &priv->reg->cmd);
+ while (readl(&priv->reg->cmd) & SUNXI_MMC_CMD_START) {
if (!timeout_msecs--)
return -1;
udelay(1000);
}
/* clock update sets various irq status bits, clear these */
- writel(readl(&mmchost->reg->rint), &mmchost->reg->rint);
+ writel(readl(&priv->reg->rint), &priv->reg->rint);
return 0;
}
-static int mmc_config_clock(struct mmc *mmc)
+static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
- unsigned rval = readl(&mmchost->reg->clkcr);
+ unsigned rval = readl(&priv->reg->clkcr);
/* Disable Clock */
rval &= ~SUNXI_MMC_CLK_ENABLE;
- writel(rval, &mmchost->reg->clkcr);
- if (mmc_update_clk(mmc))
+ writel(rval, &priv->reg->clkcr);
+ if (mmc_update_clk(priv))
return -1;
/* Set mod_clk to new rate */
- if (mmc_set_mod_clk(mmchost, mmc->clock))
+ if (mmc_set_mod_clk(priv, mmc->clock))
return -1;
/* Clear internal divider */
rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
- writel(rval, &mmchost->reg->clkcr);
+ writel(rval, &priv->reg->clkcr);
/* Re-enable Clock */
rval |= SUNXI_MMC_CLK_ENABLE;
- writel(rval, &mmchost->reg->clkcr);
- if (mmc_update_clk(mmc))
+ writel(rval, &priv->reg->clkcr);
+ if (mmc_update_clk(priv))
return -1;
return 0;
}
-static int sunxi_mmc_set_ios(struct mmc *mmc)
+static int sunxi_mmc_set_ios_common(struct sunxi_mmc_priv *priv,
+ struct mmc *mmc)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
-
debug("set ios: bus_width: %x, clock: %d\n",
mmc->bus_width, mmc->clock);
/* Change clock first */
- if (mmc->clock && mmc_config_clock(mmc) != 0) {
- mmchost->fatal_err = 1;
+ if (mmc->clock && mmc_config_clock(priv, mmc) != 0) {
+ priv->fatal_err = 1;
return -EINVAL;
}
/* Change bus width */
if (mmc->bus_width == 8)
- writel(0x2, &mmchost->reg->width);
+ writel(0x2, &priv->reg->width);
else if (mmc->bus_width == 4)
- writel(0x1, &mmchost->reg->width);
+ writel(0x1, &priv->reg->width);
else
- writel(0x0, &mmchost->reg->width);
+ writel(0x0, &priv->reg->width);
return 0;
}
+#if !CONFIG_IS_ENABLED(DM_MMC)
static int sunxi_mmc_core_init(struct mmc *mmc)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
+ struct sunxi_mmc_priv *priv = mmc->priv;
/* Reset controller */
- writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl);
+ writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
udelay(1000);
return 0;
}
+#endif
-static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
+static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc,
+ struct mmc_data *data)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
const int reading = !!(data->flags & MMC_DATA_READ);
const uint32_t status_bit = reading ? SUNXI_MMC_STATUS_FIFO_EMPTY :
SUNXI_MMC_STATUS_FIFO_FULL;
@@ -276,32 +260,31 @@
timeout_usecs = 2000000;
/* Always read / write data through the CPU */
- setbits_le32(&mmchost->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
+ setbits_le32(&priv->reg->gctrl, SUNXI_MMC_GCTRL_ACCESS_BY_AHB);
for (i = 0; i < (byte_cnt >> 2); i++) {
- while (readl(&mmchost->reg->status) & status_bit) {
+ while (readl(&priv->reg->status) & status_bit) {
if (!timeout_usecs--)
return -1;
udelay(1);
}
if (reading)
- buff[i] = readl(&mmchost->reg->fifo);
+ buff[i] = readl(&priv->reg->fifo);
else
- writel(buff[i], &mmchost->reg->fifo);
+ writel(buff[i], &priv->reg->fifo);
}
return 0;
}
-static int mmc_rint_wait(struct mmc *mmc, unsigned int timeout_msecs,
- unsigned int done_bit, const char *what)
+static int mmc_rint_wait(struct sunxi_mmc_priv *priv, struct mmc *mmc,
+ uint timeout_msecs, uint done_bit, const char *what)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
unsigned int status;
do {
- status = readl(&mmchost->reg->rint);
+ status = readl(&priv->reg->rint);
if (!timeout_msecs-- ||
(status & SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT)) {
debug("%s timeout %x\n", what,
@@ -314,17 +297,17 @@
return 0;
}
-static int sunxi_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
- struct mmc_data *data)
+static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv,
+ struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
unsigned int cmdval = SUNXI_MMC_CMD_START;
unsigned int timeout_msecs;
int error = 0;
unsigned int status = 0;
unsigned int bytecnt = 0;
- if (mmchost->fatal_err)
+ if (priv->fatal_err)
return -1;
if (cmd->resp_type & MMC_RSP_BUSY)
debug("mmc cmd %d check rsp busy\n", cmd->cmdidx);
@@ -351,16 +334,16 @@
cmdval |= SUNXI_MMC_CMD_WRITE;
if (data->blocks > 1)
cmdval |= SUNXI_MMC_CMD_AUTO_STOP;
- writel(data->blocksize, &mmchost->reg->blksz);
- writel(data->blocks * data->blocksize, &mmchost->reg->bytecnt);
+ writel(data->blocksize, &priv->reg->blksz);
+ writel(data->blocks * data->blocksize, &priv->reg->bytecnt);
}
- debug("mmc %d, cmd %d(0x%08x), arg 0x%08x\n", mmchost->mmc_no,
+ debug("mmc %d, cmd %d(0x%08x), arg 0x%08x\n", priv->mmc_no,
cmd->cmdidx, cmdval | cmd->cmdidx, cmd->cmdarg);
- writel(cmd->cmdarg, &mmchost->reg->arg);
+ writel(cmd->cmdarg, &priv->reg->arg);
if (!data)
- writel(cmdval | cmd->cmdidx, &mmchost->reg->cmd);
+ writel(cmdval | cmd->cmdidx, &priv->reg->cmd);
/*
* transfer data and check status
@@ -372,24 +355,25 @@
bytecnt = data->blocksize * data->blocks;
debug("trans data %d bytes\n", bytecnt);
- writel(cmdval | cmd->cmdidx, &mmchost->reg->cmd);
- ret = mmc_trans_data_by_cpu(mmc, data);
+ writel(cmdval | cmd->cmdidx, &priv->reg->cmd);
+ ret = mmc_trans_data_by_cpu(priv, mmc, data);
if (ret) {
- error = readl(&mmchost->reg->rint) & \
+ error = readl(&priv->reg->rint) &
SUNXI_MMC_RINT_INTERRUPT_ERROR_BIT;
error = -ETIMEDOUT;
goto out;
}
}
- error = mmc_rint_wait(mmc, 1000, SUNXI_MMC_RINT_COMMAND_DONE, "cmd");
+ error = mmc_rint_wait(priv, mmc, 1000, SUNXI_MMC_RINT_COMMAND_DONE,
+ "cmd");
if (error)
goto out;
if (data) {
timeout_msecs = 120;
debug("cacl timeout %x msec\n", timeout_msecs);
- error = mmc_rint_wait(mmc, timeout_msecs,
+ error = mmc_rint_wait(priv, mmc, timeout_msecs,
data->blocks > 1 ?
SUNXI_MMC_RINT_AUTO_COMMAND_DONE :
SUNXI_MMC_RINT_DATA_OVER,
@@ -401,7 +385,7 @@
if (cmd->resp_type & MMC_RSP_BUSY) {
timeout_msecs = 2000;
do {
- status = readl(&mmchost->reg->status);
+ status = readl(&priv->reg->status);
if (!timeout_msecs--) {
debug("busy timeout\n");
error = -ETIMEDOUT;
@@ -412,35 +396,51 @@
}
if (cmd->resp_type & MMC_RSP_136) {
- cmd->response[0] = readl(&mmchost->reg->resp3);
- cmd->response[1] = readl(&mmchost->reg->resp2);
- cmd->response[2] = readl(&mmchost->reg->resp1);
- cmd->response[3] = readl(&mmchost->reg->resp0);
+ cmd->response[0] = readl(&priv->reg->resp3);
+ cmd->response[1] = readl(&priv->reg->resp2);
+ cmd->response[2] = readl(&priv->reg->resp1);
+ cmd->response[3] = readl(&priv->reg->resp0);
debug("mmc resp 0x%08x 0x%08x 0x%08x 0x%08x\n",
cmd->response[3], cmd->response[2],
cmd->response[1], cmd->response[0]);
} else {
- cmd->response[0] = readl(&mmchost->reg->resp0);
+ cmd->response[0] = readl(&priv->reg->resp0);
debug("mmc resp 0x%08x\n", cmd->response[0]);
}
out:
if (error < 0) {
- writel(SUNXI_MMC_GCTRL_RESET, &mmchost->reg->gctrl);
- mmc_update_clk(mmc);
+ writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
+ mmc_update_clk(priv);
}
- writel(0xffffffff, &mmchost->reg->rint);
- writel(readl(&mmchost->reg->gctrl) | SUNXI_MMC_GCTRL_FIFO_RESET,
- &mmchost->reg->gctrl);
+ writel(0xffffffff, &priv->reg->rint);
+ writel(readl(&priv->reg->gctrl) | SUNXI_MMC_GCTRL_FIFO_RESET,
+ &priv->reg->gctrl);
return error;
}
-static int sunxi_mmc_getcd(struct mmc *mmc)
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static int sunxi_mmc_set_ios_legacy(struct mmc *mmc)
{
- struct sunxi_mmc_host *mmchost = mmc->priv;
+ struct sunxi_mmc_priv *priv = mmc->priv;
+
+ return sunxi_mmc_set_ios_common(priv, mmc);
+}
+
+static int sunxi_mmc_send_cmd_legacy(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct sunxi_mmc_priv *priv = mmc->priv;
+
+ return sunxi_mmc_send_cmd_common(priv, mmc, cmd, data);
+}
+
+static int sunxi_mmc_getcd_legacy(struct mmc *mmc)
+{
+ struct sunxi_mmc_priv *priv = mmc->priv;
int cd_pin;
- cd_pin = sunxi_mmc_getcd_gpio(mmchost->mmc_no);
+ cd_pin = sunxi_mmc_getcd_gpio(priv->mmc_no);
if (cd_pin < 0)
return 1;
@@ -448,17 +448,20 @@
}
static const struct mmc_ops sunxi_mmc_ops = {
- .send_cmd = sunxi_mmc_send_cmd,
- .set_ios = sunxi_mmc_set_ios,
+ .send_cmd = sunxi_mmc_send_cmd_legacy,
+ .set_ios = sunxi_mmc_set_ios_legacy,
.init = sunxi_mmc_core_init,
- .getcd = sunxi_mmc_getcd,
+ .getcd = sunxi_mmc_getcd_legacy,
};
struct mmc *sunxi_mmc_init(int sdc_no)
{
- struct mmc_config *cfg = &mmc_host[sdc_no].cfg;
+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ struct sunxi_mmc_priv *priv = &mmc_host[sdc_no];
+ struct mmc_config *cfg = &priv->cfg;
+ int ret;
- memset(&mmc_host[sdc_no], 0, sizeof(struct sunxi_mmc_host));
+ memset(priv, '\0', sizeof(struct sunxi_mmc_priv));
cfg->name = "SUNXI SD/MMC";
cfg->ops = &sunxi_mmc_ops;
@@ -478,7 +481,143 @@
if (mmc_resource_init(sdc_no) != 0)
return NULL;
- mmc_clk_io_on(sdc_no);
+ /* config ahb clock */
+ debug("init mmc %d clock and io\n", sdc_no);
+ setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no));
- return mmc_create(cfg, &mmc_host[sdc_no]);
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+ /* unassert reset */
+ setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no));
+#endif
+#if defined(CONFIG_MACH_SUN9I)
+ /* sun9i has a mmc-common module, also set the gate and reset there */
+ writel(SUNXI_MMC_COMMON_CLK_GATE | SUNXI_MMC_COMMON_RESET,
+ SUNXI_MMC_COMMON_BASE + 4 * sdc_no);
+#endif
+ ret = mmc_set_mod_clk(priv, 24000000);
+ if (ret)
+ return NULL;
+
+ return mmc_create(cfg, mmc_host);
}
+#else
+
+static int sunxi_mmc_set_ios(struct udevice *dev)
+{
+ struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_priv *priv = dev_get_priv(dev);
+
+ return sunxi_mmc_set_ios_common(priv, &plat->mmc);
+}
+
+static int sunxi_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_priv *priv = dev_get_priv(dev);
+
+ return sunxi_mmc_send_cmd_common(priv, &plat->mmc, cmd, data);
+}
+
+static int sunxi_mmc_getcd(struct udevice *dev)
+{
+ struct sunxi_mmc_priv *priv = dev_get_priv(dev);
+
+ if (dm_gpio_is_valid(&priv->cd_gpio))
+ return dm_gpio_get_value(&priv->cd_gpio);
+
+ return 1;
+}
+
+static const struct dm_mmc_ops sunxi_mmc_ops = {
+ .send_cmd = sunxi_mmc_send_cmd,
+ .set_ios = sunxi_mmc_set_ios,
+ .get_cd = sunxi_mmc_getcd,
+};
+
+static int sunxi_mmc_probe(struct udevice *dev)
+{
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+ struct sunxi_mmc_priv *priv = dev_get_priv(dev);
+ struct mmc_config *cfg = &plat->cfg;
+ struct ofnode_phandle_args args;
+ u32 *gate_reg;
+ int bus_width, ret;
+
+ cfg->name = dev->name;
+ bus_width = dev_read_u32_default(dev, "bus-width", 1);
+
+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
+ cfg->host_caps = 0;
+ if (bus_width == 8)
+ cfg->host_caps |= MMC_MODE_8BIT;
+ if (bus_width >= 4)
+ cfg->host_caps |= MMC_MODE_4BIT;
+ cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+
+ cfg->f_min = 400000;
+ cfg->f_max = 52000000;
+
+ priv->reg = (void *)dev_read_addr(dev);
+
+ /* We don't have a sunxi clock driver so find the clock address here */
+ ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+ 1, &args);
+ if (ret)
+ return ret;
+ priv->mclkreg = (u32 *)ofnode_get_addr(args.node);
+
+ ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+ 0, &args);
+ if (ret)
+ return ret;
+ gate_reg = (u32 *)ofnode_get_addr(args.node);
+ setbits_le32(gate_reg, 1 << args.args[0]);
+ priv->mmc_no = args.args[0] - 8;
+
+ ret = mmc_set_mod_clk(priv, 24000000);
+ if (ret)
+ return ret;
+
+ /* This GPIO is optional */
+ if (!gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
+ GPIOD_IS_IN)) {
+ int cd_pin = gpio_get_number(&priv->cd_gpio);
+
+ sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP);
+ }
+
+ upriv->mmc = &plat->mmc;
+
+ /* Reset controller */
+ writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl);
+ udelay(1000);
+
+ return 0;
+}
+
+static int sunxi_mmc_bind(struct udevice *dev)
+{
+ struct sunxi_mmc_plat *plat = dev_get_platdata(dev);
+
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+static const struct udevice_id sunxi_mmc_ids[] = {
+ { .compatible = "allwinner,sun5i-a13-mmc" },
+ { }
+};
+
+U_BOOT_DRIVER(sunxi_mmc_drv) = {
+ .name = "sunxi_mmc",
+ .id = UCLASS_MMC,
+ .of_match = sunxi_mmc_ids,
+ .bind = sunxi_mmc_bind,
+ .probe = sunxi_mmc_probe,
+ .ops = &sunxi_mmc_ops,
+ .platdata_auto_alloc_size = sizeof(struct sunxi_mmc_plat),
+ .priv_auto_alloc_size = sizeof(struct sunxi_mmc_priv),
+};
+#endif
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 7d945a1..7474529 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -11,10 +11,10 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
+#include <mmc.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch-tegra/tegra_mmc.h>
-#include <mmc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -599,8 +599,7 @@
cfg->name = dev->name;
- bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "bus-width", 1);
+ bus_width = dev_read_u32_default(dev, "bus-width", 1);
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
cfg->host_caps = 0;
@@ -621,7 +620,7 @@
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- priv->reg = (void *)devfdt_get_addr(dev);
+ priv->reg = (void *)dev_read_addr(dev);
ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl);
if (ret) {
@@ -648,12 +647,10 @@
return ret;
/* These GPIOs are optional */
- gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
- GPIOD_IS_IN);
- gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio,
- GPIOD_IS_IN);
- gpio_request_by_name(dev, "power-gpios", 0,
- &priv->pwr_gpio, GPIOD_IS_OUT);
+ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
+ gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
+ gpio_request_by_name(dev, "power-gpios", 0, &priv->pwr_gpio,
+ GPIOD_IS_OUT);
if (dm_gpio_is_valid(&priv->pwr_gpio))
dm_gpio_set_value(&priv->pwr_gpio, 1);
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 048a517..42bc2ef 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -2353,7 +2353,7 @@
#ifdef CONFIG_SYS_FLASH_PROTECTION
/* read environment from EEPROM */
char s[64];
- getenv_f("unlock", s, sizeof(s));
+ env_get_f("unlock", s, sizeof(s));
#endif
#ifdef CONFIG_CFI_FLASH /* for driver model */
diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c
index 2d2c318..e961f51 100644
--- a/drivers/mtd/dataflash.c
+++ b/drivers/mtd/dataflash.c
@@ -155,7 +155,7 @@
return found[0];
}
-void AT91F_DataflashSetEnv (void)
+void AT91F_Dataflashenv_set(void)
{
int i, j;
int part;
@@ -169,8 +169,9 @@
/* Set the environment according to the label...*/
if((env & FLAG_SETENV) == FLAG_SETENV) {
start = dataflash_info[i].Device.area_list[j].start;
- sprintf((char*) s,"%lX",start);
- setenv((char*) area_list[part].label,(char*) s);
+ sprintf((char *)s, "%lX", start);
+ env_set((char *)area_list[part].label,
+ (char *)s);
}
part++;
}
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index ce8ba99..71d678f 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -1,4 +1,7 @@
-menu "NAND Device Support"
+
+menuconfig NAND
+ bool "NAND Device Support"
+if NAND
config SYS_NAND_SELF_INIT
bool
@@ -9,6 +12,7 @@
config NAND_DENALI
bool "Support Denali NAND controller"
select SYS_NAND_SELF_INIT
+ imply CMD_NAND
help
Enable support for the Denali NAND controller.
@@ -35,6 +39,7 @@
config NAND_VF610_NFC
bool "Support for Freescale NFC for VF610"
select SYS_NAND_SELF_INIT
+ imply CMD_NAND
help
Enables support for NAND Flash Controller on some Freescale
processors like the VF610, MCF54418 or Kinetis K70.
@@ -59,6 +64,7 @@
config NAND_PXA3XX
bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
select SYS_NAND_SELF_INIT
+ imply CMD_NAND
help
This enables the driver for the NAND flash device found on
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
@@ -68,6 +74,7 @@
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
select SYS_NAND_SELF_INIT
select SYS_NAND_U_BOOT_LOCATIONS
+ imply CMD_NAND
---help---
Enable support for NAND. This option enables the standard and
SPL drivers.
@@ -92,6 +99,7 @@
config NAND_ARASAN
bool "Configure Arasan Nand"
+ imply CMD_NAND
help
This enables Nand driver support for Arasan nand flash
controller. This uses the hardware ECC for read and
@@ -100,6 +108,7 @@
config NAND_MXS
bool "MXS NAND support"
depends on MX6 || MX7
+ imply CMD_NAND
help
This enables NAND driver for the NAND flash controller on the
MXS processors.
@@ -107,6 +116,7 @@
config NAND_ZYNQ
bool "Support for Zynq Nand controller"
select SYS_NAND_SELF_INIT
+ imply CMD_NAND
help
This enables Nand driver support for Nand flash controller
found on Zynq SoC.
@@ -166,4 +176,4 @@
endif
-endmenu
+endif # if NAND
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index bcddfa0..e5c0e12 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -134,11 +134,17 @@
debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
div_u64_rem(len, spi_flash->page_size, &rem);
- if (rem)
+ if (rem) {
+ printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
+ dev->name, len, spi_flash->page_size);
return -EINVAL;
+ }
div_u64_rem(offset, spi_flash->page_size, &rem);
- if (rem)
+ if (rem) {
+ printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
+ dev->name, offset, spi_flash->page_size);
return -EINVAL;
+ }
status = spi_claim_bus(spi);
if (status) {
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 0034a28..34f6888 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -947,11 +947,25 @@
if (IS_ERR_OR_NULL(info))
return -ENOENT;
- /* Flash powers up read-only, so clear BP# bits */
+ /*
+ * Flash powers up read-only, so clear BP# bits.
+ *
+ * Note on some flash (like Macronix), QE (quad enable) bit is in the
+ * same status register as BP# bits, and we need preserve its original
+ * value during a reboot cycle as this is required by some platforms
+ * (like Intel ICH SPI controller working under descriptor mode).
+ */
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
- JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
- JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
- write_sr(flash, 0);
+ (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) ||
+ (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX)) {
+ u8 sr = 0;
+
+ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX) {
+ read_sr(flash, &sr);
+ sr &= STATUS_QEB_MXIC;
+ }
+ write_sr(flash, sr);
+ }
flash->name = info->name;
flash->memory_map = spi->memory_map;
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index edca94e..c4ccf48 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -81,6 +81,7 @@
{"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) },
{"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
+ {"mx25u6435f", INFO(0xc22537, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP) },
{"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) },
{"mx66u51235f", INFO(0xc2253a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"mx66l1g45g", INFO(0xc2201b, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP) },
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 736aab2..5ceea44 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -47,6 +47,30 @@
Please find details on the "Triple-Speed Ethernet MegaCore Function
Resource Center" of Altera.
+config BCM_SF2_ETH
+ bool "Broadcom SF2 (Starfighter2) Ethernet support"
+ select PHYLIB
+ help
+ This is an abstract framework which provides a generic interface
+ to MAC and DMA management for multiple Broadcom SoCs such as
+ Cygnus, NSP and bcm28155_ap platforms.
+
+config BCM_SF2_ETH_DEFAULT_PORT
+ int "Broadcom SF2 (Starfighter2) Ethernet default port number"
+ depends on BCM_SF2_ETH
+ default 0
+ help
+ Default port number for the Starfighter2 ethernet driver.
+
+config BCM_SF2_ETH_GMAC
+ bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
+ depends on BCM_SF2_ETH
+ help
+ This flag enables the ethernet support for Broadcom platforms with
+ GMAC such as Cygnus. This driver is based on the framework provided
+ by the BCM_SF2_ETH driver.
+ Say Y to any bcmcygnus based platforms.
+
config DWC_ETH_QOS
bool "Synopsys DWC Ethernet QOS device support"
depends on DM_ETH
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index cf60d11..00e6806 100644
--- a/drivers/net/ag7xxx.c
+++ b/drivers/net/ag7xxx.c
@@ -26,6 +26,7 @@
AG7XXX_MODEL_AG934X,
};
+/* MAC Configuration 1 */
#define AG7XXX_ETH_CFG1 0x00
#define AG7XXX_ETH_CFG1_SOFT_RST BIT(31)
#define AG7XXX_ETH_CFG1_RX_RST BIT(19)
@@ -34,6 +35,7 @@
#define AG7XXX_ETH_CFG1_RX_EN BIT(2)
#define AG7XXX_ETH_CFG1_TX_EN BIT(0)
+/* MAC Configuration 2 */
#define AG7XXX_ETH_CFG2 0x04
#define AG7XXX_ETH_CFG2_IF_1000 BIT(9)
#define AG7XXX_ETH_CFG2_IF_10_100 BIT(8)
@@ -43,26 +45,34 @@
#define AG7XXX_ETH_CFG2_PAD_CRC_EN BIT(2)
#define AG7XXX_ETH_CFG2_FDX BIT(0)
+/* MII Configuration */
#define AG7XXX_ETH_MII_MGMT_CFG 0x20
#define AG7XXX_ETH_MII_MGMT_CFG_RESET BIT(31)
+/* MII Command */
#define AG7XXX_ETH_MII_MGMT_CMD 0x24
#define AG7XXX_ETH_MII_MGMT_CMD_READ 0x1
+/* MII Address */
#define AG7XXX_ETH_MII_MGMT_ADDRESS 0x28
#define AG7XXX_ETH_MII_MGMT_ADDRESS_SHIFT 8
+/* MII Control */
#define AG7XXX_ETH_MII_MGMT_CTRL 0x2c
+/* MII Status */
#define AG7XXX_ETH_MII_MGMT_STATUS 0x30
+/* MII Indicators */
#define AG7XXX_ETH_MII_MGMT_IND 0x34
#define AG7XXX_ETH_MII_MGMT_IND_INVALID BIT(2)
#define AG7XXX_ETH_MII_MGMT_IND_BUSY BIT(0)
+/* STA Address 1 & 2 */
#define AG7XXX_ETH_ADDR1 0x40
#define AG7XXX_ETH_ADDR2 0x44
+/* ETH Configuration 0 - 5 */
#define AG7XXX_ETH_FIFO_CFG_0 0x48
#define AG7XXX_ETH_FIFO_CFG_1 0x4c
#define AG7XXX_ETH_FIFO_CFG_2 0x50
@@ -70,18 +80,24 @@
#define AG7XXX_ETH_FIFO_CFG_4 0x58
#define AG7XXX_ETH_FIFO_CFG_5 0x5c
+/* DMA Transfer Control for Queue 0 */
#define AG7XXX_ETH_DMA_TX_CTRL 0x180
#define AG7XXX_ETH_DMA_TX_CTRL_TXE BIT(0)
+/* Descriptor Address for Queue 0 Tx */
#define AG7XXX_ETH_DMA_TX_DESC 0x184
+/* DMA Tx Status */
#define AG7XXX_ETH_DMA_TX_STATUS 0x188
+/* Rx Control */
#define AG7XXX_ETH_DMA_RX_CTRL 0x18c
#define AG7XXX_ETH_DMA_RX_CTRL_RXE BIT(0)
+/* Pointer to Rx Descriptor */
#define AG7XXX_ETH_DMA_RX_DESC 0x190
+/* Rx Status */
#define AG7XXX_ETH_DMA_RX_STATUS 0x194
/* Custom register at 0x18070000 */
@@ -269,18 +285,33 @@
return 0;
}
-static u16 ag7xxx_mdio_rw(struct mii_dev *bus, int addr, int reg, u32 val)
+static int ag7xxx_mdio_rw(struct mii_dev *bus, int addr, int reg, u32 val)
{
u32 data;
+ unsigned long start;
+ int ret;
+ /* No idea if this is long enough or too long */
+ int timeout_ms = 1000;
/* Dummy read followed by PHY read/write command. */
- ag7xxx_switch_reg_read(bus, 0x98, &data);
+ ret = ag7xxx_switch_reg_read(bus, 0x98, &data);
+ if (ret < 0)
+ return ret;
data = val | (reg << 16) | (addr << 21) | BIT(30) | BIT(31);
- ag7xxx_switch_reg_write(bus, 0x98, data);
+ ret = ag7xxx_switch_reg_write(bus, 0x98, data);
+ if (ret < 0)
+ return ret;
+
+ start = get_timer(0);
/* Wait for operation to finish */
do {
- ag7xxx_switch_reg_read(bus, 0x98, &data);
+ ret = ag7xxx_switch_reg_read(bus, 0x98, &data);
+ if (ret < 0)
+ return ret;
+
+ if (get_timer(start) > timeout_ms)
+ return -ETIMEDOUT;
} while (data & BIT(31));
return data & 0xffff;
@@ -294,7 +325,11 @@
static int ag7xxx_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 val)
{
- ag7xxx_mdio_rw(bus, addr, reg, val);
+ int ret;
+
+ ret = ag7xxx_mdio_rw(bus, addr, reg, val);
+ if (ret < 0)
+ return ret;
return 0;
}
diff --git a/drivers/net/bcm-sf2-eth.h b/drivers/net/bcm-sf2-eth.h
index c4e2e01..efeff15 100644
--- a/drivers/net/bcm-sf2-eth.h
+++ b/drivers/net/bcm-sf2-eth.h
@@ -20,8 +20,6 @@
/* Support 2 Ethernet ports now */
#define BCM_ETH_MAX_PORT_NUM 2
-#define CONFIG_BCM_SF2_ETH_DEFAULT_PORT 0
-
enum {
MAC_DMA_TX = 1,
MAC_DMA_RX = 2
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 8245cf5..f38f36b 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -750,7 +750,7 @@
uchar enetaddr[6];
/* Ethernet Addr... */
- if (!eth_getenv_enetaddr("ethaddr", enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", enetaddr))
return;
eeprom[0x0a] = (enetaddr[1] << 8) | enetaddr[0];
eeprom[0x0b] = (enetaddr[3] << 8) | enetaddr[2];
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index dc7b512..f16b299 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1105,8 +1105,8 @@
sprintf(mac, "eth%daddr", fec->dev_id);
else
strcpy(mac, "ethaddr");
- if (!getenv(mac))
- eth_setenv_enetaddr(mac, ethaddr);
+ if (!env_get(mac))
+ eth_env_set_enetaddr(mac, ethaddr);
}
return ret;
err4:
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
index 5aeeb87..3245bee 100644
--- a/drivers/net/fm/b4860.c
+++ b/drivers/net/fm/b4860.c
@@ -97,7 +97,7 @@
* Extract hwconfig from environment since environment
* is not setup yet
*/
- getenv_f("hwconfig", buffer, sizeof(buffer));
+ env_get_f("hwconfig", buffer, sizeof(buffer));
buf = buffer;
/* check if XFI interface enable in hwconfig for 10g */
diff --git a/drivers/net/fm/fdt.c b/drivers/net/fm/fdt.c
index 9918d80..5920fec 100644
--- a/drivers/net/fm/fdt.c
+++ b/drivers/net/fm/fdt.c
@@ -36,7 +36,7 @@
return;
/* If the environment variable is not set, then exit silently */
- p = getenv("fman_ucode");
+ p = env_get("fman_ucode");
if (!p)
return;
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 9fe34ad..451dfde 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -418,7 +418,7 @@
rc = fman_upload_firmware(index, ®->fm_imem, addr);
if (rc)
return rc;
- setenv_addr("fman_ucode", addr);
+ env_set_addr("fman_ucode", addr);
fm_init_muram(index, ®->muram);
fm_init_qmi(®->fm_qmi_common);
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index 1b5779c..ea50ed3 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -84,6 +84,7 @@
if_mode |= IF_MODE_GMII;
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
if_mode |= (IF_MODE_GMII | IF_MODE_RG);
break;
case PHY_INTERFACE_MODE_RMII:
@@ -106,7 +107,8 @@
if (type != PHY_INTERFACE_MODE_XGMII)
if_mode |= IF_MODE_EN_AUTO;
- if (type == PHY_INTERFACE_MODE_RGMII) {
+ if (type == PHY_INTERFACE_MODE_RGMII ||
+ type == PHY_INTERFACE_MODE_RGMII_TXID) {
if_mode &= ~IF_MODE_EN_AUTO;
if_mode &= ~IF_MODE_SETSP_MASK;
switch (speed) {
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 8bf25c7..bdb6792 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -190,8 +190,8 @@
/* MAC address property present */
if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
/* u-boot MAC addr randomly assigned - leave the present one */
- if (!eth_getenv_enetaddr_by_index("eth", eth_dev->index,
- env_enetaddr))
+ if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
+ env_enetaddr))
return err;
} else {
size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
@@ -530,7 +530,7 @@
{
unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
- char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
+ char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
if (timeout_ms_env_var) {
timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
@@ -815,7 +815,7 @@
{
unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
- char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
+ char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
if (dram_block_size_env_var) {
dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
@@ -1336,14 +1336,18 @@
{
int err = 0;
bool is_dpl_apply_status = false;
+ bool mc_boot_status = false;
if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
mc_apply_dpl(mc_lazy_dpl_addr);
mc_lazy_dpl_addr = 0;
}
+ if (!get_mc_boot_status())
+ mc_boot_status = true;
+
/* MC is not loaded intentionally, So return success. */
- if (bd && get_mc_boot_status() != 0)
+ if (bd && !mc_boot_status)
return 0;
/* If DPL is deployed, set is_dpl_apply_status as TRUE. */
@@ -1354,11 +1358,14 @@
* For case MC is loaded but DPL is not deployed, return success and
* print message on console. Else FDT fix-up code execution hanged.
*/
- if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
+ if (bd && mc_boot_status && !is_dpl_apply_status) {
printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
return 0;
}
+ if (bd && mc_boot_status && is_dpl_apply_status)
+ return 0;
+
err = dpbp_exit();
if (err < 0) {
printf("dpbp_exit() failed: %d\n", err);
@@ -1511,7 +1518,7 @@
* address info properly. Without MAC addresses, the MC code
* can not properly initialize the DPC.
*/
- mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
+ mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
if (mc_boot_env_var)
run_command_list(mc_boot_env_var, -1, 0);
#endif /* CONFIG_FSL_MC_ENET */
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 628b420..26c714c 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -383,9 +383,9 @@
/* Set station address */
if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE)
- eth_getenv_enetaddr("ethaddr", enetaddr);
+ eth_env_get_enetaddr("ethaddr", enetaddr);
else
- eth_getenv_enetaddr("eth1addr", enetaddr);
+ eth_env_get_enetaddr("eth1addr", enetaddr);
fec_set_hwaddr(fecp, enetaddr);
/* Set Opcode/Pause Duration Register */
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 5ccc4be..d0939e9 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -346,7 +346,7 @@
static void ftgmac100_set_mac_from_env(struct eth_device *dev)
{
- eth_getenv_enetaddr("ethaddr", dev->enetaddr);
+ eth_env_get_enetaddr("ethaddr", dev->enetaddr);
ftgmac100_set_mac(dev, dev->enetaddr);
}
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index cd24a21..f231e6b 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -355,7 +355,7 @@
int ftmac100_read_rom_hwaddr(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
- eth_getenv_enetaddr("ethaddr", pdata->enetaddr);
+ eth_env_get_enetaddr("ethaddr", pdata->enetaddr);
return 0;
}
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index c9f9e83..586ccbf 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3368.h>
#include <asm/arch/grf_rk3399.h>
#include <dm/pinctrl.h>
#include <dt-bindings/clock/rk3288-cru.h>
@@ -83,6 +84,38 @@
return 0;
}
+static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+ struct rk3368_grf *grf;
+ int clk;
+ enum {
+ RK3368_GMAC_CLK_SEL_2_5M = 2 << 4,
+ RK3368_GMAC_CLK_SEL_25M = 3 << 4,
+ RK3368_GMAC_CLK_SEL_125M = 0 << 4,
+ RK3368_GMAC_CLK_SEL_MASK = GENMASK(5, 4),
+ };
+
+ switch (priv->phydev->speed) {
+ case 10:
+ clk = RK3368_GMAC_CLK_SEL_2_5M;
+ break;
+ case 100:
+ clk = RK3368_GMAC_CLK_SEL_25M;
+ break;
+ case 1000:
+ clk = RK3368_GMAC_CLK_SEL_125M;
+ break;
+ default:
+ debug("Unknown phy speed: %d\n", priv->phydev->speed);
+ return -EINVAL;
+ }
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);
+
+ return 0;
+}
+
static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct rk3399_grf_regs *grf;
@@ -129,6 +162,44 @@
pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
}
+static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+ struct rk3368_grf *grf;
+ enum {
+ RK3368_GMAC_PHY_INTF_SEL_RGMII = 1 << 9,
+ RK3368_GMAC_PHY_INTF_SEL_MASK = GENMASK(11, 9),
+ RK3368_RMII_MODE_MASK = BIT(6),
+ RK3368_RMII_MODE = BIT(6),
+ };
+ enum {
+ RK3368_RXCLK_DLY_ENA_GMAC_MASK = BIT(15),
+ RK3368_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3368_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(15),
+ RK3368_TXCLK_DLY_ENA_GMAC_MASK = BIT(7),
+ RK3368_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3368_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(7),
+ RK3368_CLK_RX_DL_CFG_GMAC_SHIFT = 8,
+ RK3368_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(14, 8),
+ RK3368_CLK_TX_DL_CFG_GMAC_SHIFT = 0,
+ RK3368_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+ };
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ rk_clrsetreg(&grf->soc_con15,
+ RK3368_RMII_MODE_MASK | RK3368_GMAC_PHY_INTF_SEL_MASK,
+ RK3368_GMAC_PHY_INTF_SEL_RGMII);
+
+ rk_clrsetreg(&grf->soc_con16,
+ RK3368_RXCLK_DLY_ENA_GMAC_MASK |
+ RK3368_TXCLK_DLY_ENA_GMAC_MASK |
+ RK3368_CLK_RX_DL_CFG_GMAC_MASK |
+ RK3368_CLK_TX_DL_CFG_GMAC_MASK,
+ RK3368_RXCLK_DLY_ENA_GMAC_ENABLE |
+ RK3368_TXCLK_DLY_ENA_GMAC_ENABLE |
+ pdata->rx_delay << RK3368_CLK_RX_DL_CFG_GMAC_SHIFT |
+ pdata->tx_delay << RK3368_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
{
struct rk3399_grf_regs *grf;
@@ -208,6 +279,11 @@
.set_to_rgmii = rk3288_gmac_set_to_rgmii,
};
+const struct rk_gmac_ops rk3368_gmac_ops = {
+ .fix_mac_speed = rk3368_gmac_fix_mac_speed,
+ .set_to_rgmii = rk3368_gmac_set_to_rgmii,
+};
+
const struct rk_gmac_ops rk3399_gmac_ops = {
.fix_mac_speed = rk3399_gmac_fix_mac_speed,
.set_to_rgmii = rk3399_gmac_set_to_rgmii,
@@ -216,6 +292,8 @@
static const struct udevice_id rockchip_gmac_ids[] = {
{ .compatible = "rockchip,rk3288-gmac",
.data = (ulong)&rk3288_gmac_ops },
+ { .compatible = "rockchip,rk3368-gmac",
+ .data = (ulong)&rk3368_gmac_ops },
{ .compatible = "rockchip,rk3399-gmac",
.data = (ulong)&rk3399_gmac_ops },
{ }
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 3526876..a9fc74b 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -704,13 +704,13 @@
{
uchar v_mac[6];
- if (!eth_getenv_enetaddr("ethaddr", v_mac)) {
+ if (!eth_env_get_enetaddr("ethaddr", v_mac)) {
/* get ROM mac value if any */
if (!get_rom_mac(dev, v_mac)) {
printf("\n*** ERROR: ethaddr is NOT set !!\n");
return -1;
}
- eth_setenv_enetaddr("ethaddr", v_mac);
+ eth_env_set_enetaddr("ethaddr", v_mac);
}
smc_set_mac_addr(v_mac); /* use old function to update smc default */
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 4e61700..f235b62 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -587,8 +587,10 @@
#ifdef CONFIG_PHYLIB
if (priv->phydev && bus != NULL)
phy_shutdown(priv->phydev);
- else
+ else {
free(priv->phydev);
+ priv->phydev = NULL;
+ }
#endif
ldpaa_dpbp_free();
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index e1b06b2..39a6747 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -428,25 +428,25 @@
if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) {
#ifdef CONFIG_SYS_FEC1_IOBASE
volatile fec_t *fecp1 = (fec_t *) (CONFIG_SYS_FEC1_IOBASE);
- eth_getenv_enetaddr("eth1addr", ea);
+ eth_env_get_enetaddr("eth1addr", ea);
fecp1->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp1->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
- eth_getenv_enetaddr("ethaddr", ea);
+ eth_env_get_enetaddr("ethaddr", ea);
fecp->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp->paur = (ea[4] << 24) | (ea[5] << 16);
} else {
#ifdef CONFIG_SYS_FEC0_IOBASE
volatile fec_t *fecp0 = (fec_t *) (CONFIG_SYS_FEC0_IOBASE);
- eth_getenv_enetaddr("ethaddr", ea);
+ eth_env_get_enetaddr("ethaddr", ea);
fecp0->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp0->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
#ifdef CONFIG_SYS_FEC1_IOBASE
- eth_getenv_enetaddr("eth1addr", ea);
+ eth_env_get_enetaddr("eth1addr", ea);
fecp->palr =
(ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
fecp->paur = (ea[4] << 24) | (ea[5] << 16);
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 1b46218..233c98b 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -30,6 +30,8 @@
#include <asm/arch/soc.h>
#include <linux/compat.h>
#include <linux/mbus.h>
+#include <asm-generic/gpio.h>
+#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -314,6 +316,8 @@
#define MVPP22_BM_ADDR_HIGH_VIRT_RLS_MASK 0xff00
#define MVPP22_BM_ADDR_HIGH_VIRT_RLS_SHIFT 8
#define MVPP22_BM_MC_RLS_REG 0x64d4
+#define MVPP22_BM_POOL_BASE_HIGH_REG 0x6310
+#define MVPP22_BM_POOL_BASE_HIGH_MASK 0xff
/* TX Scheduler registers */
#define MVPP2_TXP_SCHED_PORT_INDEX_REG 0x8000
@@ -615,10 +619,10 @@
#define MVPP2_MAX_TXD 16
/* Amount of Tx descriptors that can be reserved at once by CPU */
-#define MVPP2_CPU_DESC_CHUNK 64
+#define MVPP2_CPU_DESC_CHUNK 16
/* Max number of Tx descriptors in each aggregated queue */
-#define MVPP2_AGGR_TXQ_SIZE 256
+#define MVPP2_AGGR_TXQ_SIZE 16
/* Descriptor aligned size */
#define MVPP2_DESC_ALIGNED_SIZE 32
@@ -940,6 +944,7 @@
struct mii_dev *bus;
int probe_done;
+ u8 num_ports;
};
struct mvpp2_pcpu_stats {
@@ -985,6 +990,10 @@
phy_interface_t phy_interface;
int phy_node;
int phyaddr;
+#ifdef CONFIG_DM_GPIO
+ struct gpio_desc phy_reset_gpio;
+ struct gpio_desc phy_tx_disable_gpio;
+#endif
int init;
unsigned int link;
unsigned int duplex;
@@ -2587,6 +2596,10 @@
mvpp2_write(priv, MVPP2_BM_POOL_BASE_REG(bm_pool->id),
lower_32_bits(bm_pool->dma_addr));
+ if (priv->hw_version == MVPP22)
+ mvpp2_write(priv, MVPP22_BM_POOL_BASE_HIGH_REG,
+ (upper_32_bits(bm_pool->dma_addr) &
+ MVPP22_BM_POOL_BASE_HIGH_MASK));
mvpp2_write(priv, MVPP2_BM_POOL_SIZE_REG(bm_pool->id), size);
val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id));
@@ -2662,7 +2675,7 @@
err = mvpp2_bm_pool_create(dev, priv, bm_pool, size);
if (err)
goto err_unroll_pools;
- mvpp2_bm_pool_bufsize_set(priv, bm_pool, 0);
+ mvpp2_bm_pool_bufsize_set(priv, bm_pool, RX_BUFFER_SIZE);
}
return 0;
@@ -2848,9 +2861,6 @@
}
}
- mvpp2_bm_pool_bufsize_set(port->priv, new_pool,
- MVPP2_RX_BUF_SIZE(new_pool->pkt_size));
-
return new_pool;
}
@@ -3057,10 +3067,6 @@
val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK;
writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
- val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
- val |= MVPP2_GMAC_PORT_DIS_PADING_MASK;
- writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
/*
* Configure GIG MAC to 1000Base-X mode connected to a fiber
@@ -3103,10 +3109,6 @@
val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK;
writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
- val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
- val |= MVPP2_GMAC_PORT_DIS_PADING_MASK;
- writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
/* configure GIG MAC to SGMII mode */
val &= ~MVPP2_GMAC_PORT_TYPE_MASK;
@@ -3145,10 +3147,6 @@
val |= MVPP2_GMAC_CTRL4_EXT_PIN_GMII_SEL_MASK;
writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
- val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
- val &= ~MVPP2_GMAC_PORT_DIS_PADING_MASK;
- writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
/* configure GIG MAC to SGMII mode */
val &= ~MVPP2_GMAC_PORT_TYPE_MASK;
@@ -4686,20 +4684,6 @@
port->rxqs[queue] = rxq;
}
- /* Configure Rx queue group interrupt for this port */
- if (priv->hw_version == MVPP21) {
- mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(port->id),
- CONFIG_MV_ETH_RXQ);
- } else {
- u32 val;
-
- val = (port->id << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET);
- mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val);
-
- val = (CONFIG_MV_ETH_RXQ <<
- MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET);
- mvpp2_write(priv, MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val);
- }
/* Create Rx descriptor rings */
for (queue = 0; queue < rxq_number; queue++) {
@@ -4734,10 +4718,11 @@
{
int port_node = dev_of_offset(dev);
const char *phy_mode_str;
- int phy_node;
+ int phy_node, mdio_off, cp_node;
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
+ u64 mdio_addr;
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
@@ -4747,6 +4732,28 @@
dev_err(&pdev->dev, "could not find phy address\n");
return -1;
}
+ mdio_off = fdt_parent_offset(gd->fdt_blob, phy_node);
+
+ /* TODO: This WA for mdio issue. U-boot 2017 don't have
+ * mdio driver and on MACHIATOBin board ports from CP1
+ * connected to mdio on CP0.
+ * WA is to get mdio address from phy handler parent
+ * base address. WA should be removed after
+ * mdio driver implementation.
+ */
+ mdio_addr = fdtdec_get_uint(gd->fdt_blob,
+ mdio_off, "reg", 0);
+
+ cp_node = fdt_parent_offset(gd->fdt_blob, mdio_off);
+ mdio_addr |= fdt_get_base_address((void *)gd->fdt_blob,
+ cp_node);
+
+ port->priv->mdio_base = (void *)mdio_addr;
+
+ if (port->priv->mdio_base < 0) {
+ dev_err(&pdev->dev, "could not find mdio base address\n");
+ return -1;
+ }
} else {
phy_node = 0;
}
@@ -4765,6 +4772,13 @@
return -EINVAL;
}
+#ifdef CONFIG_DM_GPIO
+ gpio_request_by_name(dev, "phy-reset-gpios", 0,
+ &port->phy_reset_gpio, GPIOD_IS_OUT);
+ gpio_request_by_name(dev, "marvell,sfp-tx-disable-gpio", 0,
+ &port->phy_tx_disable_gpio, GPIOD_IS_OUT);
+#endif
+
/*
* ToDo:
* Not sure if this DT property "phy-speed" will get accepted, so
@@ -4786,6 +4800,21 @@
return 0;
}
+#ifdef CONFIG_DM_GPIO
+/* Port GPIO initialization */
+static void mvpp2_gpio_init(struct mvpp2_port *port)
+{
+ if (dm_gpio_is_valid(&port->phy_reset_gpio)) {
+ dm_gpio_set_value(&port->phy_reset_gpio, 0);
+ udelay(1000);
+ dm_gpio_set_value(&port->phy_reset_gpio, 1);
+ }
+
+ if (dm_gpio_is_valid(&port->phy_tx_disable_gpio))
+ dm_gpio_set_value(&port->phy_tx_disable_gpio, 0);
+}
+#endif
+
/* Ports initialization */
static int mvpp2_port_probe(struct udevice *dev,
struct mvpp2_port *port,
@@ -4804,7 +4833,12 @@
}
mvpp2_port_power_up(port);
+#ifdef CONFIG_DM_GPIO
+ mvpp2_gpio_init(port);
+#endif
+
priv->port_list[port->id] = port;
+ priv->num_ports++;
return 0;
}
@@ -4969,13 +5003,14 @@
return -EINVAL;
}
- /* MBUS windows configuration */
- dram_target_info = mvebu_mbus_dram_info();
- if (dram_target_info)
- mvpp2_conf_mbus_windows(dram_target_info, priv);
-
if (priv->hw_version == MVPP22)
mvpp2_axi_init(priv);
+ else {
+ /* MBUS windows configuration */
+ dram_target_info = mvebu_mbus_dram_info();
+ if (dram_target_info)
+ mvpp2_conf_mbus_windows(dram_target_info, priv);
+ }
if (priv->hw_version == MVPP21) {
/* Disable HW PHY polling */
@@ -5012,25 +5047,6 @@
if (priv->hw_version == MVPP22)
mvpp2_tx_fifo_init(priv);
- /* Reset Rx queue group interrupt configuration */
- for (i = 0; i < MVPP2_MAX_PORTS; i++) {
- if (priv->hw_version == MVPP21) {
- mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(i),
- CONFIG_MV_ETH_RXQ);
- continue;
- } else {
- u32 val;
-
- val = (i << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET);
- mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val);
-
- val = (CONFIG_MV_ETH_RXQ <<
- MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET);
- mvpp2_write(priv,
- MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val);
- }
- }
-
if (priv->hw_version == MVPP21)
writel(MVPP2_EXT_GLOBAL_CTRL_DEFAULT,
priv->lms_base + MVPP2_MNG_EXTENDED_GLOBAL_CTRL_REG);
@@ -5176,21 +5192,10 @@
int pool, rx_bytes, err;
int rx_received;
struct mvpp2_rx_queue *rxq;
- u32 cause_rx_tx, cause_rx, cause_misc;
u8 *data;
- cause_rx_tx = mvpp2_read(port->priv,
- MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
- cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
- cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;
- if (!cause_rx_tx && !cause_misc)
- return 0;
-
- cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;
-
/* Process RX packets */
- cause_rx |= port->pending_cause_rx;
- rxq = mvpp2_get_rx_queue(port, cause_rx);
+ rxq = port->rxqs[0];
/* Get number of received packets and clamp the to-do */
rx_received = mvpp2_rxq_received(port, rxq->id);
@@ -5246,21 +5251,6 @@
return rx_bytes;
}
-/* Drain Txq */
-static void mvpp2_txq_drain(struct mvpp2_port *port, struct mvpp2_tx_queue *txq,
- int enable)
-{
- u32 val;
-
- mvpp2_write(port->priv, MVPP2_TXQ_NUM_REG, txq->id);
- val = mvpp2_read(port->priv, MVPP2_TXQ_PREF_BUF_REG);
- if (enable)
- val |= MVPP2_TXQ_DRAIN_EN_MASK;
- else
- val &= ~MVPP2_TXQ_DRAIN_EN_MASK;
- mvpp2_write(port->priv, MVPP2_TXQ_PREF_BUF_REG, val);
-}
-
static int mvpp2_send(struct udevice *dev, void *packet, int length)
{
struct mvpp2_port *port = dev_get_priv(dev);
@@ -5304,9 +5294,6 @@
tx_done = mvpp2_txq_pend_desc_num_get(port, txq);
} while (tx_done);
- /* Enable TXQ drain */
- mvpp2_txq_drain(port, txq, 1);
-
timeout = 0;
do {
if (timeout++ > 10000) {
@@ -5316,9 +5303,6 @@
tx_done = mvpp2_txq_sent_desc_proc(port, txq);
} while (!tx_done);
- /* Disable TXQ drain */
- mvpp2_txq_drain(port, txq, 0);
-
return 0;
}
@@ -5469,10 +5453,8 @@
int err;
/* Only call the probe function for the parent once */
- if (!priv->probe_done) {
+ if (!priv->probe_done)
err = mvpp2_base_probe(dev->parent);
- priv->probe_done = 1;
- }
port->priv = dev_get_priv(dev->parent);
@@ -5510,11 +5492,15 @@
gop_port_init(port);
}
- /* Initialize network controller */
- err = mvpp2_init(dev, priv);
- if (err < 0) {
- dev_err(&pdev->dev, "failed to initialize controller\n");
- return err;
+ if (!priv->probe_done) {
+ /* Initialize network controller */
+ err = mvpp2_init(dev, priv);
+ if (err < 0) {
+ dev_err(&pdev->dev, "failed to initialize controller\n");
+ return err;
+ }
+ priv->num_ports = 0;
+ priv->probe_done = 1;
}
err = mvpp2_port_probe(dev, port, dev_of_offset(dev), priv);
@@ -5542,6 +5528,11 @@
struct mvpp2 *priv = port->priv;
int i;
+ priv->num_ports--;
+
+ if (priv->num_ports)
+ return 0;
+
for (i = 0; i < MVPP2_BM_POOLS_NUM; i++)
mvpp2_bm_pool_destroy(dev, priv, &priv->bm_pools[i]);
diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c
index 377d87f..fb088e0 100644
--- a/drivers/net/ne2000_base.c
+++ b/drivers/net/ne2000_base.c
@@ -715,15 +715,15 @@
* to the MAC address value in the environment, so we do not read
* it from the prom or eeprom if it is specified in the environment.
*/
- if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr)) {
+ if (!eth_env_get_enetaddr("ethaddr", dev->enetaddr)) {
/* If the MAC address is not in the environment, get it: */
if (!get_prom(dev->enetaddr, nic.base)) /* get MAC from prom */
dp83902a_init(dev->enetaddr); /* fallback: seeprom */
/* And write it into the environment otherwise eth_write_hwaddr
- * returns -1 due to eth_getenv_enetaddr_by_index() failing,
+ * returns -1 due to eth_env_get_enetaddr_by_index() failing,
* and this causes "Warning: failed to set MAC address", and
* cmd_bdinfo has no ethaddr value which it can show: */
- eth_setenv_enetaddr("ethaddr", dev->enetaddr);
+ eth_env_set_enetaddr("ethaddr", dev->enetaddr);
}
return 0;
}
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 3500047..e9dbedf 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -62,8 +62,8 @@
/* update only when the environment has changed */
if (env_changed_id != env_id) {
- netmask = getenv_ip("netmask");
- our_ip = getenv_ip("ipaddr");
+ netmask = env_get_ip("netmask");
+ our_ip = env_get_ip("ipaddr");
env_changed_id = env_id;
}
@@ -82,11 +82,11 @@
/* update only when the environment has changed */
if (env_changed_id != env_id) {
- if (getenv("ncip")) {
- nc_ip = getenv_ip("ncip");
+ if (env_get("ncip")) {
+ nc_ip = env_get_ip("ncip");
if (!nc_ip.s_addr)
return -1; /* ncip is 0.0.0.0 */
- p = strchr(getenv("ncip"), ':');
+ p = strchr(env_get("ncip"), ':');
if (p != NULL) {
nc_out_port = simple_strtoul(p + 1, NULL, 10);
nc_in_port = nc_out_port;
@@ -95,10 +95,10 @@
nc_ip.s_addr = ~0; /* ncip is not set, so broadcast */
}
- p = getenv("ncoutport");
+ p = env_get("ncoutport");
if (p != NULL)
nc_out_port = simple_strtoul(p, NULL, 10);
- p = getenv("ncinport");
+ p = env_get("ncinport");
if (p != NULL)
nc_in_port = simple_strtoul(p, NULL, 10);
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 0230852..4d02d8b 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -67,39 +67,41 @@
if PHY_MICREL
config PHY_MICREL_KSZ9021
- bool "Micrel KSZ9021 family support"
+ bool
select PHY_GIGE
- help
- Enable support for the Micrel KSZ9021 GbE PHY family. If
- enabled, the extended register read/write for KSZ9021 PHYs
- is supported through the 'mdio' command and any RGMII signal
- delays configured in the device tree will be applied to the
- PHY during initialisation.
-
- Note that the KSZ9021 uses the same part number os the
- KSZ8921BL, so enabling this option disables support for the
- KSZ8721BL.
+ select PHY_MICREL_KSZ90X1
config PHY_MICREL_KSZ9031
- bool "Micrel KSZ9031 family support"
+ bool
+ select PHY_GIGE
+ select PHY_MICREL_KSZ90X1
+
+config PHY_MICREL_KSZ90X1
+ bool "Micrel KSZ90x1 family support"
select PHY_GIGE
help
- Enable support for the Micrel KSZ9031 GbE PHY family. If
- enabled, the extended register read/write for KSZ9021 PHYs
+ Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
+ enabled, the extended register read/write for KSZ90x1 PHYs
is supported through the 'mdio' command and any RGMII signal
delays configured in the device tree will be applied to the
- PHY during initialisatioin.
+ PHY during initialization.
+
+ This should not be enabled at the same time with PHY_MICREL_KSZ8XXX
+ as the KSZ9021 and KS8721 share the same ID.
+
+config PHY_MICREL_KSZ8XXX
+ bool "Micrel KSZ8xxx family support"
+ default y if !PHY_MICREL_KSZ90X1
+ help
+ Enable support for the 8000 series GbE PHYs manufactured by Micrel
+ (now a part of Microchip). This includes drivers for the KSZ804,
+ KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
+
+ This should not be enabled at the same time with PHY_MICREL_KSZ90X1
+ as the KSZ9021 and KS8721 share the same ID.
endif # PHY_MICREL
-config PHY_MICREL_KSZ9021
- bool "Micrel KSZ9021 Ethernet PHYs support"
- depends on PHY_MICREL
- help
- KSZ9021 is a completely integrated triple speed (10Base-T/100Base-TX/1000Base-T)
- Ethernet Physical Layer Transceiver for transmission and reception of data over
- standard CAT-5 unshielded twisted pair (UTP) cable.
-
config PHY_MSCC
bool "Microsemi Corp Ethernet PHYs support"
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 88c00a5..54f32f6 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,7 +19,8 @@
obj-$(CONFIG_PHY_ET1011C) += et1011c.o
obj-$(CONFIG_PHY_LXT) += lxt.o
obj-$(CONFIG_PHY_MARVELL) += marvell.o
-obj-$(CONFIG_PHY_MICREL) += micrel.o
+obj-$(CONFIG_PHY_MICREL_KSZ8XXX) += micrel_ksz8xxx.o
+obj-$(CONFIG_PHY_MICREL_KSZ90X1) += micrel_ksz90x1.o
obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
obj-$(CONFIG_PHY_REALTEK) += realtek.o
obj-$(CONFIG_PHY_SMSC) += smsc.o
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 9871cc3..e4afa90 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -30,6 +30,29 @@
#define MIIM_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */
#define MIIM_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */
+#define MIIM_BCM_AUXCNTL_SHDWSEL_MISC 0x0007
+#define MIIM_BCM_AUXCNTL_ACTL_SMDSP_EN 0x0800
+
+#define MIIM_BCM_CHANNEL_WIDTH 0x2000
+
+static void bcm_phy_write_misc(struct phy_device *phydev,
+ u16 reg, u16 chl, u16 value)
+{
+ int reg_val;
+
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,
+ MIIM_BCM_AUXCNTL_SHDWSEL_MISC);
+
+ reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL);
+ reg_val |= MIIM_BCM_AUXCNTL_ACTL_SMDSP_EN;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg_val);
+
+ reg_val = (chl * MIIM_BCM_CHANNEL_WIDTH) | reg;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg_val);
+
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value);
+}
+
/* Broadcom BCM5461S */
static int bcm5461_config(struct phy_device *phydev)
{
@@ -152,11 +175,50 @@
return genphy_parse_link(phydev);
}
+static void bcm_cygnus_afe(struct phy_device *phydev)
+{
+ /* ensures smdspclk is enabled */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, 0x0c30);
+
+ /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+ bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+
+ /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode for all modes*/
+ bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+
+ /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+ bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+
+ /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 10000 */
+ bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+
+ /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+ bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+
+ /* Adjust bias current trim to overcome digital offSet */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x02);
+
+ /* make rcal=100, since rdb default is 000 */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B1);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010);
+
+ /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0010);
+
+ /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x17, 0x00B0);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x15, 0x0000);
+}
+
static int bcm_cygnus_config(struct phy_device *phydev)
{
genphy_config_aneg(phydev);
-
phy_reset(phydev);
+ /* AFE settings for PHY stability */
+ bcm_cygnus_afe(phydev);
+ /* Forcing aneg after applying the AFE settings */
+ genphy_restart_aneg(phydev);
return 0;
}
diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c
index df82356..e8e9099 100644
--- a/drivers/net/phy/fixed.c
+++ b/drivers/net/phy/fixed.c
@@ -34,7 +34,6 @@
memset(priv, 0, sizeof(*priv));
phydev->priv = priv;
- phydev->addr = 0;
priv->link_speed = val;
priv->duplex = fdtdec_get_bool(gd->fdt_blob, ofnode, "full-duplex");
diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c
new file mode 100644
index 0000000..ec628bb
--- /dev/null
+++ b/drivers/net/phy/micrel_ksz8xxx.c
@@ -0,0 +1,200 @@
+/*
+ * Micrel PHY drivers
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * author Andy Fleming
+ * (C) 2012 NetModule AG, David Andrey, added KSZ9031
+ */
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <micrel.h>
+#include <phy.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct phy_driver KSZ804_driver = {
+ .name = "Micrel KSZ804",
+ .uid = 0x221510,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &genphy_config,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+#define MII_KSZPHY_OMSO 0x16
+#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
+
+static int ksz_genconfig_bcastoff(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO);
+ if (ret < 0)
+ return ret;
+
+ ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO,
+ ret | KSZPHY_OMSO_B_CAST_OFF);
+ if (ret < 0)
+ return ret;
+
+ return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8031_driver = {
+ .name = "Micrel KSZ8021/KSZ8031",
+ .uid = 0x221550,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &ksz_genconfig_bcastoff,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+/**
+ * KSZ8051
+ */
+#define MII_KSZ8051_PHY_OMSO 0x16
+#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON (1 << 5)
+
+static int ksz8051_config(struct phy_device *phydev)
+{
+ unsigned val;
+
+ /* Disable NAND-tree */
+ val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
+ val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
+
+ return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8051_driver = {
+ .name = "Micrel KSZ8051",
+ .uid = 0x221550,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &ksz8051_config,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+static struct phy_driver KSZ8081_driver = {
+ .name = "Micrel KSZ8081",
+ .uid = 0x221560,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &ksz_genconfig_bcastoff,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+/**
+ * KSZ8895
+ */
+
+static unsigned short smireg_to_phy(unsigned short reg)
+{
+ return ((reg & 0xc0) >> 3) + 0x06 + ((reg & 0x20) >> 5);
+}
+
+static unsigned short smireg_to_reg(unsigned short reg)
+{
+ return reg & 0x1F;
+}
+
+static void ksz8895_write_smireg(struct phy_device *phydev, int smireg, int val)
+{
+ phydev->bus->write(phydev->bus, smireg_to_phy(smireg), MDIO_DEVAD_NONE,
+ smireg_to_reg(smireg), val);
+}
+
+#if 0
+static int ksz8895_read_smireg(struct phy_device *phydev, int smireg)
+{
+ return phydev->bus->read(phydev->bus, smireg_to_phy(smireg),
+ MDIO_DEVAD_NONE, smireg_to_reg(smireg));
+}
+#endif
+
+int ksz8895_config(struct phy_device *phydev)
+{
+ /* we are connected directly to the switch without
+ * dedicated PHY. SCONF1 == 001 */
+ phydev->link = 1;
+ phydev->duplex = DUPLEX_FULL;
+ phydev->speed = SPEED_100;
+
+ /* Force the switch to start */
+ ksz8895_write_smireg(phydev, 1, 1);
+
+ return 0;
+}
+
+static int ksz8895_startup(struct phy_device *phydev)
+{
+ return 0;
+}
+
+static struct phy_driver ksz8895_driver = {
+ .name = "Micrel KSZ8895/KSZ8864",
+ .uid = 0x221450,
+ .mask = 0xffffe1,
+ .features = PHY_BASIC_FEATURES,
+ .config = &ksz8895_config,
+ .startup = &ksz8895_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+/* Micrel used the exact same part number for the KSZ9021. */
+static struct phy_driver KS8721_driver = {
+ .name = "Micrel KS8721BL",
+ .uid = 0x221610,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &genphy_config,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+int ksz886x_config(struct phy_device *phydev)
+{
+ /* we are connected directly to the switch without
+ * dedicated PHY. */
+ phydev->link = 1;
+ phydev->duplex = DUPLEX_FULL;
+ phydev->speed = SPEED_100;
+ return 0;
+}
+
+static int ksz886x_startup(struct phy_device *phydev)
+{
+ return 0;
+}
+
+static struct phy_driver ksz886x_driver = {
+ .name = "Micrel KSZ886x Switch",
+ .uid = 0x00221430,
+ .mask = 0xfffff0,
+ .features = PHY_BASIC_FEATURES,
+ .config = &ksz886x_config,
+ .startup = &ksz886x_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+int phy_micrel_ksz8xxx_init(void)
+{
+ phy_register(&KSZ804_driver);
+ phy_register(&KSZ8031_driver);
+ phy_register(&KSZ8051_driver);
+ phy_register(&KSZ8081_driver);
+ phy_register(&KS8721_driver);
+ phy_register(&ksz8895_driver);
+ phy_register(&ksz886x_driver);
+ return 0;
+}
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel_ksz90x1.c
similarity index 62%
rename from drivers/net/phy/micrel.c
rename to drivers/net/phy/micrel_ksz90x1.c
index 0e4a4eb..0bb99e6 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -6,6 +6,8 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
* (C) 2012 NetModule AG, David Andrey, added KSZ9031
+ * (C) Copyright 2017 Adaptrum, Inc.
+ * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
*/
#include <config.h>
#include <common.h>
@@ -17,157 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct phy_driver KSZ804_driver = {
- .name = "Micrel KSZ804",
- .uid = 0x221510,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &genphy_config,
- .startup = &genphy_startup,
- .shutdown = &genphy_shutdown,
-};
-
-#define MII_KSZPHY_OMSO 0x16
-#define KSZPHY_OMSO_B_CAST_OFF (1 << 9)
-
-static int ksz_genconfig_bcastoff(struct phy_device *phydev)
-{
- int ret;
-
- ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO);
- if (ret < 0)
- return ret;
-
- ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZPHY_OMSO,
- ret | KSZPHY_OMSO_B_CAST_OFF);
- if (ret < 0)
- return ret;
-
- return genphy_config(phydev);
-}
-
-static struct phy_driver KSZ8031_driver = {
- .name = "Micrel KSZ8021/KSZ8031",
- .uid = 0x221550,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &ksz_genconfig_bcastoff,
- .startup = &genphy_startup,
- .shutdown = &genphy_shutdown,
-};
-
-/**
- * KSZ8051
- */
-#define MII_KSZ8051_PHY_OMSO 0x16
-#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON (1 << 5)
-
-static int ksz8051_config(struct phy_device *phydev)
-{
- unsigned val;
-
- /* Disable NAND-tree */
- val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
- val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
- phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
-
- return genphy_config(phydev);
-}
-
-static struct phy_driver KSZ8051_driver = {
- .name = "Micrel KSZ8051",
- .uid = 0x221550,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &ksz8051_config,
- .startup = &genphy_startup,
- .shutdown = &genphy_shutdown,
-};
-
-static struct phy_driver KSZ8081_driver = {
- .name = "Micrel KSZ8081",
- .uid = 0x221560,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &ksz_genconfig_bcastoff,
- .startup = &genphy_startup,
- .shutdown = &genphy_shutdown,
-};
-
-/**
- * KSZ8895
- */
-
-static unsigned short smireg_to_phy(unsigned short reg)
-{
- return ((reg & 0xc0) >> 3) + 0x06 + ((reg & 0x20) >> 5);
-}
-
-static unsigned short smireg_to_reg(unsigned short reg)
-{
- return reg & 0x1F;
-}
-
-static void ksz8895_write_smireg(struct phy_device *phydev, int smireg, int val)
-{
- phydev->bus->write(phydev->bus, smireg_to_phy(smireg), MDIO_DEVAD_NONE,
- smireg_to_reg(smireg), val);
-}
-
-#if 0
-static int ksz8895_read_smireg(struct phy_device *phydev, int smireg)
-{
- return phydev->bus->read(phydev->bus, smireg_to_phy(smireg),
- MDIO_DEVAD_NONE, smireg_to_reg(smireg));
-}
-#endif
-
-int ksz8895_config(struct phy_device *phydev)
-{
- /* we are connected directly to the switch without
- * dedicated PHY. SCONF1 == 001 */
- phydev->link = 1;
- phydev->duplex = DUPLEX_FULL;
- phydev->speed = SPEED_100;
-
- /* Force the switch to start */
- ksz8895_write_smireg(phydev, 1, 1);
-
- return 0;
-}
-
-static int ksz8895_startup(struct phy_device *phydev)
-{
- return 0;
-}
-
-static struct phy_driver ksz8895_driver = {
- .name = "Micrel KSZ8895/KSZ8864",
- .uid = 0x221450,
- .mask = 0xffffe1,
- .features = PHY_BASIC_FEATURES,
- .config = &ksz8895_config,
- .startup = &ksz8895_startup,
- .shutdown = &genphy_shutdown,
-};
-
-#ifndef CONFIG_PHY_MICREL_KSZ9021
-/*
- * I can't believe Micrel used the exact same part number
- * for the KSZ9021. Shame Micrel, Shame!
- */
-static struct phy_driver KS8721_driver = {
- .name = "Micrel KS8721BL",
- .uid = 0x221610,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &genphy_config,
- .startup = &genphy_startup,
- .shutdown = &genphy_shutdown,
-};
-#endif
-
-
/*
* KSZ9021 - KSZ9031 common
*/
@@ -178,6 +29,19 @@
#define MIIM_KSZ90xx_PHYCTL_10 (1 << 4)
#define MIIM_KSZ90xx_PHYCTL_DUPLEX (1 << 3)
+/* KSZ9021 PHY Registers */
+#define MII_KSZ9021_EXTENDED_CTRL 0x0b
+#define MII_KSZ9021_EXTENDED_DATAW 0x0c
+#define MII_KSZ9021_EXTENDED_DATAR 0x0d
+
+#define CTRL1000_PREFER_MASTER (1 << 10)
+#define CTRL1000_CONFIG_MASTER (1 << 11)
+#define CTRL1000_MANUAL_CONFIG (1 << 12)
+
+/* KSZ9031 PHY Registers */
+#define MII_KSZ9031_MMD_ACCES_CTRL 0x0d
+#define MII_KSZ9031_MMD_REG_DATA 0x0e
+
static int ksz90xx_startup(struct phy_device *phydev)
{
unsigned phy_ctl;
@@ -204,7 +68,6 @@
}
/* Common OF config bits for KSZ9021 and KSZ9031 */
-#if defined(CONFIG_PHY_MICREL_KSZ9021) || defined(CONFIG_PHY_MICREL_KSZ9031)
#ifdef CONFIG_DM_ETH
struct ksz90x1_reg_field {
const char *name;
@@ -230,6 +93,19 @@
{ "txd2-skew-ps", 4, 8, 0x7 }, { "txd3-skew-ps", 4, 12, 0x7 },
};
+static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {
+ { "txen-skew-ps", 4, 0, 0x7 }, { "txc-skew-ps", 4, 4, 0x7 },
+ { "rxdv-skew-ps", 4, 8, 0x7 }, { "rxc-skew-ps", 4, 12, 0x7 },
+};
+
+static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = {
+ { "txen-skew-ps", 4, 0, 0x7 }, { "rxdv-skew-ps", 4, 4, 0x7 }
+};
+
+static const struct ksz90x1_reg_field ksz9031_clk_grp[] = {
+ { "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf }
+};
+
static int ksz90x1_of_config_group(struct phy_device *phydev,
struct ksz90x1_ofcfg *ofcfg)
{
@@ -267,29 +143,6 @@
return drv->writeext(phydev, 0, ofcfg->devad, ofcfg->reg, regval);
}
-#endif
-#endif
-
-#ifdef CONFIG_PHY_MICREL_KSZ9021
-/*
- * KSZ9021
- */
-
-/* PHY Registers */
-#define MII_KSZ9021_EXTENDED_CTRL 0x0b
-#define MII_KSZ9021_EXTENDED_DATAW 0x0c
-#define MII_KSZ9021_EXTENDED_DATAR 0x0d
-
-#define CTRL1000_PREFER_MASTER (1 << 10)
-#define CTRL1000_CONFIG_MASTER (1 << 11)
-#define CTRL1000_MANUAL_CONFIG (1 << 12)
-
-#if defined(CONFIG_DM_ETH) && (defined(CONFIG_PHY_MICREL_KSZ9021) || \
- defined(CONFIG_PHY_MICREL_KSZ9031))
-static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {
- { "txen-skew-ps", 4, 0, 0x7 }, { "txc-skew-ps", 4, 4, 0x7 },
- { "rxdv-skew-ps", 4, 8, 0x7 }, { "rxc-skew-ps", 4, 12, 0x7 },
-};
static int ksz9021_of_config(struct phy_device *phydev)
{
@@ -308,96 +161,6 @@
return 0;
}
-#else
-static int ksz9021_of_config(struct phy_device *phydev)
-{
- return 0;
-}
-#endif
-
-int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
-{
- /* extended registers */
- phy_write(phydev, MDIO_DEVAD_NONE,
- MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
- return phy_write(phydev, MDIO_DEVAD_NONE,
- MII_KSZ9021_EXTENDED_DATAW, val);
-}
-
-int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
-{
- /* extended registers */
- phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum);
- return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR);
-}
-
-
-static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
- int regnum)
-{
- return ksz9021_phy_extended_read(phydev, regnum);
-}
-
-static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
- int devaddr, int regnum, u16 val)
-{
- return ksz9021_phy_extended_write(phydev, regnum, val);
-}
-
-/* Micrel ksz9021 */
-static int ksz9021_config(struct phy_device *phydev)
-{
- unsigned ctrl1000 = 0;
- const unsigned master = CTRL1000_PREFER_MASTER |
- CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
- unsigned features = phydev->drv->features;
- int ret;
-
- ret = ksz9021_of_config(phydev);
- if (ret)
- return ret;
-
- if (getenv("disable_giga"))
- features &= ~(SUPPORTED_1000baseT_Half |
- SUPPORTED_1000baseT_Full);
- /* force master mode for 1000BaseT due to chip errata */
- if (features & SUPPORTED_1000baseT_Half)
- ctrl1000 |= ADVERTISE_1000HALF | master;
- if (features & SUPPORTED_1000baseT_Full)
- ctrl1000 |= ADVERTISE_1000FULL | master;
- phydev->advertising = phydev->supported = features;
- phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
- genphy_config_aneg(phydev);
- genphy_restart_aneg(phydev);
- return 0;
-}
-
-static struct phy_driver ksz9021_driver = {
- .name = "Micrel ksz9021",
- .uid = 0x221610,
- .mask = 0xfffff0,
- .features = PHY_GBIT_FEATURES,
- .config = &ksz9021_config,
- .startup = &ksz90xx_startup,
- .shutdown = &genphy_shutdown,
- .writeext = &ksz9021_phy_extwrite,
- .readext = &ksz9021_phy_extread,
-};
-#endif
-
-/**
- * KSZ9031
- */
-/* PHY Registers */
-#define MII_KSZ9031_MMD_ACCES_CTRL 0x0d
-#define MII_KSZ9031_MMD_REG_DATA 0x0e
-
-#if defined(CONFIG_DM_ETH) && (defined(CONFIG_PHY_MICREL_KSZ9021) || \
- defined(CONFIG_PHY_MICREL_KSZ9031))
-static const struct ksz90x1_reg_field ksz9031_ctl_grp[] =
- { { "txen-skew-ps", 4, 0, 0x7 }, { "rxdv-skew-ps", 4, 4, 0x7 } };
-static const struct ksz90x1_reg_field ksz9031_clk_grp[] =
- { { "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf } };
static int ksz9031_of_config(struct phy_device *phydev)
{
@@ -433,18 +196,99 @@
ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
return ret;
}
-#else
+
+#else /* !CONFIG_DM_ETH */
+static int ksz9021_of_config(struct phy_device *phydev)
+{
+ return 0;
+}
+
static int ksz9031_of_config(struct phy_device *phydev)
{
return 0;
}
+
static int ksz9031_center_flp_timing(struct phy_device *phydev)
{
return 0;
}
#endif
-/* Accessors to extended registers*/
+/*
+ * KSZ9021
+ */
+int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
+{
+ /* extended registers */
+ phy_write(phydev, MDIO_DEVAD_NONE,
+ MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
+ return phy_write(phydev, MDIO_DEVAD_NONE,
+ MII_KSZ9021_EXTENDED_DATAW, val);
+}
+
+int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
+{
+ /* extended registers */
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum);
+ return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR);
+}
+
+
+static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
+ int regnum)
+{
+ return ksz9021_phy_extended_read(phydev, regnum);
+}
+
+static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
+ int devaddr, int regnum, u16 val)
+{
+ return ksz9021_phy_extended_write(phydev, regnum, val);
+}
+
+static int ksz9021_config(struct phy_device *phydev)
+{
+ unsigned ctrl1000 = 0;
+ const unsigned master = CTRL1000_PREFER_MASTER |
+ CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
+ unsigned features = phydev->drv->features;
+ int ret;
+
+ ret = ksz9021_of_config(phydev);
+ if (ret)
+ return ret;
+
+ if (env_get("disable_giga"))
+ features &= ~(SUPPORTED_1000baseT_Half |
+ SUPPORTED_1000baseT_Full);
+ /* force master mode for 1000BaseT due to chip errata */
+ if (features & SUPPORTED_1000baseT_Half)
+ ctrl1000 |= ADVERTISE_1000HALF | master;
+ if (features & SUPPORTED_1000baseT_Full)
+ ctrl1000 |= ADVERTISE_1000FULL | master;
+ phydev->advertising = features;
+ phydev->supported = features;
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
+ genphy_config_aneg(phydev);
+ genphy_restart_aneg(phydev);
+ return 0;
+}
+
+static struct phy_driver ksz9021_driver = {
+ .name = "Micrel ksz9021",
+ .uid = 0x221610,
+ .mask = 0xfffff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = &ksz9021_config,
+ .startup = &ksz90xx_startup,
+ .shutdown = &genphy_shutdown,
+ .writeext = &ksz9021_phy_extwrite,
+ .readext = &ksz9021_phy_extread,
+};
+
+/*
+ * KSZ9031
+ */
int ksz9031_phy_extended_write(struct phy_device *phydev,
int devaddr, int regnum, u16 mode, u16 val)
{
@@ -459,7 +303,7 @@
MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr));
/*write the value*/
return phy_write(phydev, MDIO_DEVAD_NONE,
- MII_KSZ9031_MMD_REG_DATA, val);
+ MII_KSZ9031_MMD_REG_DATA, val);
}
int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
@@ -479,24 +323,52 @@
{
return ksz9031_phy_extended_read(phydev, devaddr, regnum,
MII_KSZ9031_MOD_DATA_NO_POST_INC);
-};
+}
static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
int devaddr, int regnum, u16 val)
{
return ksz9031_phy_extended_write(phydev, devaddr, regnum,
- MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
-};
+ MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
+}
static int ksz9031_config(struct phy_device *phydev)
{
int ret;
+
ret = ksz9031_of_config(phydev);
if (ret)
return ret;
ret = ksz9031_center_flp_timing(phydev);
if (ret)
return ret;
+
+ /* add an option to disable the gigabit feature of this PHY */
+ if (env_get("disable_giga")) {
+ unsigned features;
+ unsigned bmcr;
+
+ /* disable speed 1000 in features supported by the PHY */
+ features = phydev->drv->features;
+ features &= ~(SUPPORTED_1000baseT_Half |
+ SUPPORTED_1000baseT_Full);
+ phydev->advertising = phydev->supported = features;
+
+ /* disable speed 1000 in Basic Control Register */
+ bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+ bmcr &= ~(1 << 6);
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr);
+
+ /* disable speed 1000 in 1000Base-T Control Register */
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0);
+
+ /* start autoneg */
+ genphy_config_aneg(phydev);
+ genphy_restart_aneg(phydev);
+
+ return 0;
+ }
+
return genphy_config(phydev);
}
@@ -512,44 +384,9 @@
.readext = &ksz9031_phy_extread,
};
-int ksz886x_config(struct phy_device *phydev)
+int phy_micrel_ksz90x1_init(void)
{
- /* we are connected directly to the switch without
- * dedicated PHY. */
- phydev->link = 1;
- phydev->duplex = DUPLEX_FULL;
- phydev->speed = SPEED_100;
- return 0;
-}
-
-static int ksz886x_startup(struct phy_device *phydev)
-{
- return 0;
-}
-
-static struct phy_driver ksz886x_driver = {
- .name = "Micrel KSZ886x Switch",
- .uid = 0x00221430,
- .mask = 0xfffff0,
- .features = PHY_BASIC_FEATURES,
- .config = &ksz886x_config,
- .startup = &ksz886x_startup,
- .shutdown = &genphy_shutdown,
-};
-
-int phy_micrel_init(void)
-{
- phy_register(&KSZ804_driver);
- phy_register(&KSZ8031_driver);
- phy_register(&KSZ8051_driver);
- phy_register(&KSZ8081_driver);
-#ifdef CONFIG_PHY_MICREL_KSZ9021
phy_register(&ksz9021_driver);
-#else
- phy_register(&KS8721_driver);
-#endif
phy_register(&ksz9031_driver);
- phy_register(&ksz8895_driver);
- phy_register(&ksz886x_driver);
return 0;
}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 97e0bc0..5be51d7 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -488,8 +488,11 @@
#ifdef CONFIG_PHY_MARVELL
phy_marvell_init();
#endif
-#ifdef CONFIG_PHY_MICREL
- phy_micrel_init();
+#ifdef CONFIG_PHY_MICREL_KSZ8XXX
+ phy_micrel_ksz8xxx_init();
+#endif
+#ifdef CONFIG_PHY_MICREL_KSZ90X1
+ phy_micrel_ksz90x1_init();
#endif
#ifdef CONFIG_PHY_NATSEMI
phy_natsemi_init();
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index ab45a31..8db127b 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -10,6 +10,7 @@
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <errno.h>
#include <miiphy.h>
@@ -120,6 +121,7 @@
struct phy_device *phydev;
struct mii_dev *bus;
void __iomem *iobase;
+ struct clk clk;
};
static inline void ravb_flush_dcache(u32 addr, u32 len)
@@ -298,13 +300,14 @@
struct ravb_priv *eth = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
struct phy_device *phydev;
- int reg;
+ int mask = 0xffffffff, reg;
- phydev = phy_connect(eth->bus, pdata->phy_interface,
- dev, PHY_INTERFACE_MODE_RGMII_ID);
+ phydev = phy_find_by_mask(eth->bus, mask, pdata->phy_interface);
if (!phydev)
return -ENODEV;
+ phy_connect_dev(phydev, dev);
+
eth->phydev = phydev;
/* 10BASE is not supported for Ethernet AVB MAC */
@@ -431,27 +434,38 @@
struct ravb_priv *eth = dev_get_priv(dev);
int ret;
- ret = ravb_reset(dev);
+ ret = clk_enable(ð->clk);
if (ret)
return ret;
+ ret = ravb_reset(dev);
+ if (ret)
+ goto err;
+
ravb_base_desc_init(eth);
ravb_tx_desc_init(eth);
ravb_rx_desc_init(eth);
ret = ravb_config(dev);
if (ret)
- return ret;
+ goto err;
/* Setting the control will start the AVB-DMAC process. */
writel(CCC_OPC_OPERATION, eth->iobase + RAVB_REG_CCC);
return 0;
+
+err:
+ clk_disable(ð->clk);
+ return ret;
}
static void ravb_stop(struct udevice *dev)
{
+ struct ravb_priv *eth = dev_get_priv(dev);
+
ravb_reset(dev);
+ clk_disable(ð->clk);
}
static int ravb_probe(struct udevice *dev)
@@ -465,6 +479,10 @@
iobase = map_physmem(pdata->iobase, 0x1000, MAP_NOCACHE);
eth->iobase = iobase;
+ ret = clk_get_by_index(dev, 0, ð->clk);
+ if (ret < 0)
+ goto err_mdio_alloc;
+
mdiodev = mdio_alloc();
if (!mdiodev) {
ret = -ENOMEM;
@@ -589,9 +607,46 @@
.write_hwaddr = ravb_write_hwaddr,
};
+int ravb_ofdata_to_platdata(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ const char *phy_mode;
+ const fdt32_t *cell;
+ int ret = 0;
+
+ pdata->iobase = devfdt_get_addr(dev);
+ pdata->phy_interface = -1;
+ phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
+ NULL);
+ if (phy_mode)
+ pdata->phy_interface = phy_get_interface_by_name(phy_mode);
+ if (pdata->phy_interface == -1) {
+ debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
+ return -EINVAL;
+ }
+
+ pdata->max_speed = 1000;
+ cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
+ if (cell)
+ pdata->max_speed = fdt32_to_cpu(*cell);
+
+ sprintf(bb_miiphy_buses[0].name, dev->name);
+
+ return ret;
+}
+
+static const struct udevice_id ravb_ids[] = {
+ { .compatible = "renesas,etheravb-r8a7795" },
+ { .compatible = "renesas,etheravb-r8a7796" },
+ { .compatible = "renesas,etheravb-rcar-gen3" },
+ { }
+};
+
U_BOOT_DRIVER(eth_ravb) = {
.name = "ravb",
.id = UCLASS_ETH,
+ .of_match = ravb_ids,
+ .ofdata_to_platdata = ravb_ofdata_to_platdata,
.probe = ravb_probe,
.remove = ravb_remove,
.ops = &ravb_ops,
diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c
index f5fa0e8..590ae0c 100644
--- a/drivers/net/sandbox-raw.c
+++ b/drivers/net/sandbox-raw.c
@@ -33,8 +33,8 @@
if (strcmp(interface, "lo") == 0) {
priv->local = 1;
- setenv("ipaddr", "127.0.0.1");
- setenv("serverip", "127.0.0.1");
+ env_set("ipaddr", "127.0.0.1");
+ env_set("serverip", "127.0.0.1");
}
return sandbox_eth_raw_os_start(interface, pdata->enetaddr, priv);
}
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index a7c265b..970d730 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -578,7 +578,7 @@
if (retval < 0)
return retval;
- if (!eth_getenv_enetaddr("ethaddr", dev->enetaddr))
+ if (!eth_env_get_enetaddr("ethaddr", dev->enetaddr))
puts("Please set MAC address\n");
return ret;
diff --git a/drivers/nvme/Kconfig b/drivers/nvme/Kconfig
new file mode 100644
index 0000000..cad8dbc
--- /dev/null
+++ b/drivers/nvme/Kconfig
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config NVME
+ bool "NVM Express device support"
+ depends on BLK && PCI
+ help
+ This option enables support for NVM Express devices.
+ It supports basic functions of NVMe (read/write).
diff --git a/drivers/nvme/Makefile b/drivers/nvme/Makefile
new file mode 100644
index 0000000..1f3010a
--- /dev/null
+++ b/drivers/nvme/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += nvme-uclass.o nvme.o nvme_show.o
diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c
new file mode 100644
index 0000000..0895bc9
--- /dev/null
+++ b/drivers/nvme/nvme-uclass.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/device.h>
+#include "nvme.h"
+
+static int nvme_info_init(struct uclass *uc)
+{
+ struct nvme_info *info = (struct nvme_info *)uc->priv;
+
+ info->ns_num = 0;
+ info->ndev_num = 0;
+ INIT_LIST_HEAD(&info->dev_list);
+ nvme_info = info;
+
+ return 0;
+}
+
+static int nvme_uclass_post_probe(struct udevice *udev)
+{
+ char name[20];
+ char *str;
+ struct udevice *ns_udev;
+ int i, ret;
+ struct nvme_dev *ndev = dev_get_priv(udev);
+
+ /* Create a blk device for each namespace */
+ for (i = 0; i < ndev->nn; i++) {
+ sprintf(name, "nvme-blk#%d", nvme_info->ns_num);
+ str = strdup(name);
+ if (!str)
+ return -ENOMEM;
+
+ /* The real blksz and size will be set by nvme_blk_probe() */
+ ret = blk_create_device(udev, "nvme-blk", str, IF_TYPE_NVME,
+ nvme_info->ns_num++, 512, 0, &ns_udev);
+ if (ret) {
+ free(str);
+ nvme_info->ns_num--;
+
+ return ret;
+ }
+ device_set_name_alloced(ns_udev);
+ }
+
+ return 0;
+}
+
+UCLASS_DRIVER(nvme) = {
+ .name = "nvme",
+ .id = UCLASS_NVME,
+ .init = nvme_info_init,
+ .post_probe = nvme_uclass_post_probe,
+ .priv_auto_alloc_size = sizeof(struct nvme_info),
+};
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
new file mode 100644
index 0000000..151fe92
--- /dev/null
+++ b/drivers/nvme/nvme.c
@@ -0,0 +1,860 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <memalign.h>
+#include <pci.h>
+#include <dm/device-internal.h>
+#include "nvme.h"
+
+struct nvme_info *nvme_info;
+
+#define NVME_Q_DEPTH 2
+#define NVME_AQ_DEPTH 2
+#define NVME_SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
+#define NVME_CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
+#define ADMIN_TIMEOUT 60
+#define IO_TIMEOUT 30
+#define MAX_PRP_POOL 512
+
+/*
+ * An NVM Express queue. Each device has at least two (one for admin
+ * commands and one for I/O commands).
+ */
+struct nvme_queue {
+ struct nvme_dev *dev;
+ struct nvme_command *sq_cmds;
+ struct nvme_completion *cqes;
+ wait_queue_head_t sq_full;
+ u32 __iomem *q_db;
+ u16 q_depth;
+ s16 cq_vector;
+ u16 sq_head;
+ u16 sq_tail;
+ u16 cq_head;
+ u16 qid;
+ u8 cq_phase;
+ u8 cqe_seen;
+ unsigned long cmdid_data[];
+};
+
+static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
+{
+ u32 bit = enabled ? NVME_CSTS_RDY : 0;
+
+ while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit)
+ udelay(10000);
+
+ return 0;
+}
+
+static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2,
+ int total_len, u64 dma_addr)
+{
+ u32 page_size = dev->page_size;
+ int offset = dma_addr & (page_size - 1);
+ u64 *prp_pool;
+ int length = total_len;
+ int i, nprps;
+ length -= (page_size - offset);
+
+ if (length <= 0) {
+ *prp2 = 0;
+ return 0;
+ }
+
+ if (length)
+ dma_addr += (page_size - offset);
+
+ if (length <= page_size) {
+ *prp2 = dma_addr;
+ return 0;
+ }
+
+ nprps = DIV_ROUND_UP(length, page_size);
+
+ if (nprps > dev->prp_entry_num) {
+ free(dev->prp_pool);
+ dev->prp_pool = malloc(nprps << 3);
+ if (!dev->prp_pool) {
+ printf("Error: malloc prp_pool fail\n");
+ return -ENOMEM;
+ }
+ dev->prp_entry_num = nprps;
+ }
+
+ prp_pool = dev->prp_pool;
+ i = 0;
+ while (nprps) {
+ if (i == ((page_size >> 3) - 1)) {
+ *(prp_pool + i) = cpu_to_le64((ulong)prp_pool +
+ page_size);
+ i = 0;
+ prp_pool += page_size;
+ }
+ *(prp_pool + i++) = cpu_to_le64(dma_addr);
+ dma_addr += page_size;
+ nprps--;
+ }
+ *prp2 = (ulong)dev->prp_pool;
+
+ return 0;
+}
+
+static __le16 nvme_get_cmd_id(void)
+{
+ static unsigned short cmdid;
+
+ return cpu_to_le16((cmdid < USHRT_MAX) ? cmdid++ : 0);
+}
+
+static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index)
+{
+ u64 start = (ulong)&nvmeq->cqes[index];
+ u64 stop = start + sizeof(struct nvme_completion);
+
+ invalidate_dcache_range(start, stop);
+
+ return le16_to_cpu(readw(&(nvmeq->cqes[index].status)));
+}
+
+/**
+ * nvme_submit_cmd() - copy a command into a queue and ring the doorbell
+ *
+ * @nvmeq: The queue to use
+ * @cmd: The command to send
+ */
+static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
+{
+ u16 tail = nvmeq->sq_tail;
+
+ memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
+ flush_dcache_range((ulong)&nvmeq->sq_cmds[tail],
+ (ulong)&nvmeq->sq_cmds[tail] + sizeof(*cmd));
+
+ if (++tail == nvmeq->q_depth)
+ tail = 0;
+ writel(tail, nvmeq->q_db);
+ nvmeq->sq_tail = tail;
+}
+
+static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
+ struct nvme_command *cmd,
+ u32 *result, unsigned timeout)
+{
+ u16 head = nvmeq->cq_head;
+ u16 phase = nvmeq->cq_phase;
+ u16 status;
+ ulong start_time;
+ ulong timeout_us = timeout * 100000;
+
+ cmd->common.command_id = nvme_get_cmd_id();
+ nvme_submit_cmd(nvmeq, cmd);
+
+ start_time = timer_get_us();
+
+ for (;;) {
+ status = nvme_read_completion_status(nvmeq, head);
+ if ((status & 0x01) == phase)
+ break;
+ if (timeout_us > 0 && (timer_get_us() - start_time)
+ >= timeout_us)
+ return -ETIMEDOUT;
+ }
+
+ status >>= 1;
+ if (status) {
+ printf("ERROR: status = %x, phase = %d, head = %d\n",
+ status, phase, head);
+ status = 0;
+ if (++head == nvmeq->q_depth) {
+ head = 0;
+ phase = !phase;
+ }
+ writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
+ nvmeq->cq_head = head;
+ nvmeq->cq_phase = phase;
+
+ return -EIO;
+ }
+
+ if (result)
+ *result = le32_to_cpu(readl(&(nvmeq->cqes[head].result)));
+
+ if (++head == nvmeq->q_depth) {
+ head = 0;
+ phase = !phase;
+ }
+ writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
+ nvmeq->cq_head = head;
+ nvmeq->cq_phase = phase;
+
+ return status;
+}
+
+static int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
+ u32 *result)
+{
+ return nvme_submit_sync_cmd(dev->queues[0], cmd, result, ADMIN_TIMEOUT);
+}
+
+static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,
+ int qid, int depth)
+{
+ struct nvme_queue *nvmeq = malloc(sizeof(*nvmeq));
+ if (!nvmeq)
+ return NULL;
+ memset(nvmeq, 0, sizeof(*nvmeq));
+
+ nvmeq->cqes = (void *)memalign(4096, NVME_CQ_SIZE(depth));
+ if (!nvmeq->cqes)
+ goto free_nvmeq;
+ memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(depth));
+
+ nvmeq->sq_cmds = (void *)memalign(4096, NVME_SQ_SIZE(depth));
+ if (!nvmeq->sq_cmds)
+ goto free_queue;
+ memset((void *)nvmeq->sq_cmds, 0, NVME_SQ_SIZE(depth));
+
+ nvmeq->dev = dev;
+
+ nvmeq->cq_head = 0;
+ nvmeq->cq_phase = 1;
+ nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
+ nvmeq->q_depth = depth;
+ nvmeq->qid = qid;
+ dev->queue_count++;
+ dev->queues[qid] = nvmeq;
+
+ return nvmeq;
+
+ free_queue:
+ free((void *)nvmeq->cqes);
+ free_nvmeq:
+ free(nvmeq);
+
+ return NULL;
+}
+
+static int nvme_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.delete_queue.opcode = opcode;
+ c.delete_queue.qid = cpu_to_le16(id);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+static int nvme_delete_sq(struct nvme_dev *dev, u16 sqid)
+{
+ return nvme_delete_queue(dev, nvme_admin_delete_sq, sqid);
+}
+
+static int nvme_delete_cq(struct nvme_dev *dev, u16 cqid)
+{
+ return nvme_delete_queue(dev, nvme_admin_delete_cq, cqid);
+}
+
+static int nvme_enable_ctrl(struct nvme_dev *dev)
+{
+ dev->ctrl_config &= ~NVME_CC_SHN_MASK;
+ dev->ctrl_config |= NVME_CC_ENABLE;
+ writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+
+ return nvme_wait_ready(dev, true);
+}
+
+static int nvme_disable_ctrl(struct nvme_dev *dev)
+{
+ dev->ctrl_config &= ~NVME_CC_SHN_MASK;
+ dev->ctrl_config &= ~NVME_CC_ENABLE;
+ writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc);
+
+ return nvme_wait_ready(dev, false);
+}
+
+static void nvme_free_queue(struct nvme_queue *nvmeq)
+{
+ free((void *)nvmeq->cqes);
+ free(nvmeq->sq_cmds);
+ free(nvmeq);
+}
+
+static void nvme_free_queues(struct nvme_dev *dev, int lowest)
+{
+ int i;
+
+ for (i = dev->queue_count - 1; i >= lowest; i--) {
+ struct nvme_queue *nvmeq = dev->queues[i];
+ dev->queue_count--;
+ dev->queues[i] = NULL;
+ nvme_free_queue(nvmeq);
+ }
+}
+
+static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
+{
+ struct nvme_dev *dev = nvmeq->dev;
+
+ nvmeq->sq_tail = 0;
+ nvmeq->cq_head = 0;
+ nvmeq->cq_phase = 1;
+ nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
+ memset((void *)nvmeq->cqes, 0, NVME_CQ_SIZE(nvmeq->q_depth));
+ flush_dcache_range((ulong)nvmeq->cqes,
+ (ulong)nvmeq->cqes + NVME_CQ_SIZE(nvmeq->q_depth));
+ dev->online_queues++;
+}
+
+static int nvme_configure_admin_queue(struct nvme_dev *dev)
+{
+ int result;
+ u32 aqa;
+ u64 cap = nvme_readq(&dev->bar->cap);
+ struct nvme_queue *nvmeq;
+ /* most architectures use 4KB as the page size */
+ unsigned page_shift = 12;
+ unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
+ unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
+
+ if (page_shift < dev_page_min) {
+ debug("Device minimum page size (%u) too large for host (%u)\n",
+ 1 << dev_page_min, 1 << page_shift);
+ return -ENODEV;
+ }
+
+ if (page_shift > dev_page_max) {
+ debug("Device maximum page size (%u) smaller than host (%u)\n",
+ 1 << dev_page_max, 1 << page_shift);
+ page_shift = dev_page_max;
+ }
+
+ result = nvme_disable_ctrl(dev);
+ if (result < 0)
+ return result;
+
+ nvmeq = dev->queues[0];
+ if (!nvmeq) {
+ nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
+ if (!nvmeq)
+ return -ENOMEM;
+ }
+
+ aqa = nvmeq->q_depth - 1;
+ aqa |= aqa << 16;
+ aqa |= aqa << 16;
+
+ dev->page_size = 1 << page_shift;
+
+ dev->ctrl_config = NVME_CC_CSS_NVM;
+ dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
+ dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
+ dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
+
+ writel(aqa, &dev->bar->aqa);
+ nvme_writeq((ulong)nvmeq->sq_cmds, &dev->bar->asq);
+ nvme_writeq((ulong)nvmeq->cqes, &dev->bar->acq);
+
+ result = nvme_enable_ctrl(dev);
+ if (result)
+ goto free_nvmeq;
+
+ nvmeq->cq_vector = 0;
+
+ nvme_init_queue(dev->queues[0], 0);
+
+ return result;
+
+ free_nvmeq:
+ nvme_free_queues(dev, 0);
+
+ return result;
+}
+
+static int nvme_alloc_cq(struct nvme_dev *dev, u16 qid,
+ struct nvme_queue *nvmeq)
+{
+ struct nvme_command c;
+ int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
+
+ memset(&c, 0, sizeof(c));
+ c.create_cq.opcode = nvme_admin_create_cq;
+ c.create_cq.prp1 = cpu_to_le64((ulong)nvmeq->cqes);
+ c.create_cq.cqid = cpu_to_le16(qid);
+ c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
+ c.create_cq.cq_flags = cpu_to_le16(flags);
+ c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+static int nvme_alloc_sq(struct nvme_dev *dev, u16 qid,
+ struct nvme_queue *nvmeq)
+{
+ struct nvme_command c;
+ int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
+
+ memset(&c, 0, sizeof(c));
+ c.create_sq.opcode = nvme_admin_create_sq;
+ c.create_sq.prp1 = cpu_to_le64((ulong)nvmeq->sq_cmds);
+ c.create_sq.sqid = cpu_to_le16(qid);
+ c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
+ c.create_sq.sq_flags = cpu_to_le16(flags);
+ c.create_sq.cqid = cpu_to_le16(qid);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+ unsigned cns, dma_addr_t dma_addr)
+{
+ struct nvme_command c;
+ u32 page_size = dev->page_size;
+ int offset = dma_addr & (page_size - 1);
+ int length = sizeof(struct nvme_id_ctrl);
+
+ memset(&c, 0, sizeof(c));
+ c.identify.opcode = nvme_admin_identify;
+ c.identify.nsid = cpu_to_le32(nsid);
+ c.identify.prp1 = cpu_to_le64(dma_addr);
+
+ length -= (page_size - offset);
+ if (length <= 0) {
+ c.identify.prp2 = 0;
+ } else {
+ dma_addr += (page_size - offset);
+ c.identify.prp2 = dma_addr;
+ }
+
+ c.identify.cns = cpu_to_le32(cns);
+
+ return nvme_submit_admin_cmd(dev, &c, NULL);
+}
+
+int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
+ dma_addr_t dma_addr, u32 *result)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.features.opcode = nvme_admin_get_features;
+ c.features.nsid = cpu_to_le32(nsid);
+ c.features.prp1 = cpu_to_le64(dma_addr);
+ c.features.fid = cpu_to_le32(fid);
+
+ return nvme_submit_admin_cmd(dev, &c, result);
+}
+
+int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+ dma_addr_t dma_addr, u32 *result)
+{
+ struct nvme_command c;
+
+ memset(&c, 0, sizeof(c));
+ c.features.opcode = nvme_admin_set_features;
+ c.features.prp1 = cpu_to_le64(dma_addr);
+ c.features.fid = cpu_to_le32(fid);
+ c.features.dword11 = cpu_to_le32(dword11);
+
+ return nvme_submit_admin_cmd(dev, &c, result);
+}
+
+static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
+{
+ struct nvme_dev *dev = nvmeq->dev;
+ int result;
+
+ nvmeq->cq_vector = qid - 1;
+ result = nvme_alloc_cq(dev, qid, nvmeq);
+ if (result < 0)
+ goto release_cq;
+
+ result = nvme_alloc_sq(dev, qid, nvmeq);
+ if (result < 0)
+ goto release_sq;
+
+ nvme_init_queue(nvmeq, qid);
+
+ return result;
+
+ release_sq:
+ nvme_delete_sq(dev, qid);
+ release_cq:
+ nvme_delete_cq(dev, qid);
+
+ return result;
+}
+
+static int nvme_set_queue_count(struct nvme_dev *dev, int count)
+{
+ int status;
+ u32 result;
+ u32 q_count = (count - 1) | ((count - 1) << 16);
+
+ status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES,
+ q_count, 0, &result);
+
+ if (status < 0)
+ return status;
+ if (status > 1)
+ return 0;
+
+ return min(result & 0xffff, result >> 16) + 1;
+}
+
+static void nvme_create_io_queues(struct nvme_dev *dev)
+{
+ unsigned int i;
+
+ for (i = dev->queue_count; i <= dev->max_qid; i++)
+ if (!nvme_alloc_queue(dev, i, dev->q_depth))
+ break;
+
+ for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
+ if (nvme_create_queue(dev->queues[i], i))
+ break;
+}
+
+static int nvme_setup_io_queues(struct nvme_dev *dev)
+{
+ int nr_io_queues;
+ int result;
+
+ nr_io_queues = 1;
+ result = nvme_set_queue_count(dev, nr_io_queues);
+ if (result <= 0)
+ return result;
+
+ if (result < nr_io_queues)
+ nr_io_queues = result;
+
+ dev->max_qid = nr_io_queues;
+
+ /* Free previously allocated queues */
+ nvme_free_queues(dev, nr_io_queues + 1);
+ nvme_create_io_queues(dev);
+
+ return 0;
+}
+
+static int nvme_get_info_from_identify(struct nvme_dev *dev)
+{
+ u16 vendor, device;
+ struct nvme_id_ctrl buf, *ctrl = &buf;
+ int ret;
+ int shift = NVME_CAP_MPSMIN(nvme_readq(&dev->bar->cap)) + 12;
+
+ ret = nvme_identify(dev, 0, 1, (dma_addr_t)ctrl);
+ if (ret)
+ return -EIO;
+
+ dev->nn = le32_to_cpu(ctrl->nn);
+ dev->vwc = ctrl->vwc;
+ memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
+ memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
+ memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
+ if (ctrl->mdts)
+ dev->max_transfer_shift = (ctrl->mdts + shift);
+ else {
+ /*
+ * Maximum Data Transfer Size (MDTS) field indicates the maximum
+ * data transfer size between the host and the controller. The
+ * host should not submit a command that exceeds this transfer
+ * size. The value is in units of the minimum memory page size
+ * and is reported as a power of two (2^n).
+ *
+ * The spec also says: a value of 0h indicates no restrictions
+ * on transfer size. But in nvme_blk_read/write() below we have
+ * the following algorithm for maximum number of logic blocks
+ * per transfer:
+ *
+ * u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ *
+ * In order for lbas not to overflow, the maximum number is 15
+ * which means dev->max_transfer_shift = 15 + 9 (ns->lba_shift).
+ * Let's use 20 which provides 1MB size.
+ */
+ dev->max_transfer_shift = 20;
+ }
+
+ /* Apply quirk stuff */
+ dm_pci_read_config16(dev->pdev, PCI_VENDOR_ID, &vendor);
+ dm_pci_read_config16(dev->pdev, PCI_DEVICE_ID, &device);
+ if ((vendor == PCI_VENDOR_ID_INTEL) &&
+ (device == 0x0953) && ctrl->vs[3]) {
+ unsigned int max_transfer_shift;
+ dev->stripe_size = (ctrl->vs[3] + shift);
+ max_transfer_shift = (ctrl->vs[3] + 18);
+ if (dev->max_transfer_shift) {
+ dev->max_transfer_shift = min(max_transfer_shift,
+ dev->max_transfer_shift);
+ } else {
+ dev->max_transfer_shift = max_transfer_shift;
+ }
+ }
+
+ return 0;
+}
+
+int nvme_scan_namespace(void)
+{
+ struct uclass *uc;
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get(UCLASS_NVME, &uc);
+ if (ret)
+ return ret;
+
+ uclass_foreach_dev(dev, uc) {
+ ret = device_probe(dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int nvme_blk_probe(struct udevice *udev)
+{
+ struct nvme_dev *ndev = dev_get_priv(udev->parent);
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ struct nvme_ns *ns = dev_get_priv(udev);
+ u8 flbas;
+ u16 vendor;
+ struct nvme_id_ns buf, *id = &buf;
+
+ memset(ns, 0, sizeof(*ns));
+ ns->dev = ndev;
+ ns->ns_id = desc->devnum - ndev->blk_dev_start + 1;
+ if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)id))
+ return -EIO;
+
+ flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK;
+ ns->flbas = flbas;
+ ns->lba_shift = id->lbaf[flbas].ds;
+ ns->mode_select_num_blocks = le64_to_cpu(id->nsze);
+ ns->mode_select_block_len = 1 << ns->lba_shift;
+ list_add(&ns->list, &ndev->namespaces);
+
+ desc->lba = ns->mode_select_num_blocks;
+ desc->log2blksz = ns->lba_shift;
+ desc->blksz = 1 << ns->lba_shift;
+ desc->bdev = udev;
+ dm_pci_read_config16(ndev->pdev, PCI_VENDOR_ID, &vendor);
+ sprintf(desc->vendor, "0x%.4x", vendor);
+ memcpy(desc->product, ndev->serial, sizeof(ndev->serial));
+ memcpy(desc->revision, ndev->firmware_rev, sizeof(ndev->firmware_rev));
+ part_init(desc);
+
+ return 0;
+}
+
+static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,
+ lbaint_t blkcnt, void *buffer)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_command c;
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ int status;
+ u64 prp2;
+ u64 total_len = blkcnt << desc->log2blksz;
+ u64 temp_len = total_len;
+
+ u64 slba = blknr;
+ u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ u64 total_lbas = blkcnt;
+
+ c.rw.opcode = nvme_cmd_read;
+ c.rw.flags = 0;
+ c.rw.nsid = cpu_to_le32(ns->ns_id);
+ c.rw.control = 0;
+ c.rw.dsmgmt = 0;
+ c.rw.reftag = 0;
+ c.rw.apptag = 0;
+ c.rw.appmask = 0;
+ c.rw.metadata = 0;
+
+ while (total_lbas) {
+ if (total_lbas < lbas) {
+ lbas = (u16)total_lbas;
+ total_lbas = 0;
+ } else {
+ total_lbas -= lbas;
+ }
+
+ if (nvme_setup_prps
+ (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))
+ return -EIO;
+ c.rw.slba = cpu_to_le64(slba);
+ slba += lbas;
+ c.rw.length = cpu_to_le16(lbas - 1);
+ c.rw.prp1 = cpu_to_le64((ulong)buffer);
+ c.rw.prp2 = cpu_to_le64(prp2);
+ status = nvme_submit_sync_cmd(dev->queues[1],
+ &c, NULL, IO_TIMEOUT);
+ if (status)
+ break;
+ temp_len -= lbas << ns->lba_shift;
+ buffer += lbas << ns->lba_shift;
+ }
+
+ return (total_len - temp_len) >> desc->log2blksz;
+}
+
+static ulong nvme_blk_write(struct udevice *udev, lbaint_t blknr,
+ lbaint_t blkcnt, const void *buffer)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_command c;
+ struct blk_desc *desc = dev_get_uclass_platdata(udev);
+ int status;
+ u64 prp2;
+ u64 total_len = blkcnt << desc->log2blksz;
+ u64 temp_len = total_len;
+
+ u64 slba = blknr;
+ u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ u64 total_lbas = blkcnt;
+
+ c.rw.opcode = nvme_cmd_write;
+ c.rw.flags = 0;
+ c.rw.nsid = cpu_to_le32(ns->ns_id);
+ c.rw.control = 0;
+ c.rw.dsmgmt = 0;
+ c.rw.reftag = 0;
+ c.rw.apptag = 0;
+ c.rw.appmask = 0;
+ c.rw.metadata = 0;
+
+ while (total_lbas) {
+ if (total_lbas < lbas) {
+ lbas = (u16)total_lbas;
+ total_lbas = 0;
+ } else {
+ total_lbas -= lbas;
+ }
+
+ if (nvme_setup_prps
+ (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))
+ return -EIO;
+ c.rw.slba = cpu_to_le64(slba);
+ slba += lbas;
+ c.rw.length = cpu_to_le16(lbas - 1);
+ c.rw.prp1 = cpu_to_le64((ulong)buffer);
+ c.rw.prp2 = cpu_to_le64(prp2);
+ status = nvme_submit_sync_cmd(dev->queues[1],
+ &c, NULL, IO_TIMEOUT);
+ if (status)
+ break;
+ temp_len -= lbas << ns->lba_shift;
+ buffer += lbas << ns->lba_shift;
+ }
+
+ return (total_len - temp_len) >> desc->log2blksz;
+}
+
+static const struct blk_ops nvme_blk_ops = {
+ .read = nvme_blk_read,
+ .write = nvme_blk_write,
+};
+
+U_BOOT_DRIVER(nvme_blk) = {
+ .name = "nvme-blk",
+ .id = UCLASS_BLK,
+ .probe = nvme_blk_probe,
+ .ops = &nvme_blk_ops,
+ .priv_auto_alloc_size = sizeof(struct nvme_ns),
+};
+
+static int nvme_bind(struct udevice *udev)
+{
+ char name[20];
+ sprintf(name, "nvme#%d", nvme_info->ndev_num++);
+
+ return device_set_name(udev, name);
+}
+
+static int nvme_probe(struct udevice *udev)
+{
+ int ret;
+ struct nvme_dev *ndev = dev_get_priv(udev);
+ u64 cap;
+
+ ndev->pdev = pci_get_controller(udev);
+ ndev->instance = trailing_strtol(udev->name);
+
+ INIT_LIST_HEAD(&ndev->namespaces);
+ ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0,
+ PCI_REGION_MEM);
+ if (readl(&ndev->bar->csts) == -1) {
+ ret = -ENODEV;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+
+ ndev->queues = malloc(2 * sizeof(struct nvme_queue));
+ if (!ndev->queues) {
+ ret = -ENOMEM;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+ memset(ndev->queues, 0, sizeof(2 * sizeof(struct nvme_queue)));
+
+ ndev->prp_pool = malloc(MAX_PRP_POOL);
+ if (!ndev->prp_pool) {
+ ret = -ENOMEM;
+ printf("Error: %s: Out of memory!\n", udev->name);
+ goto free_nvme;
+ }
+ ndev->prp_entry_num = MAX_PRP_POOL >> 3;
+
+ cap = nvme_readq(&ndev->bar->cap);
+ ndev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
+ ndev->db_stride = 1 << NVME_CAP_STRIDE(cap);
+ ndev->dbs = ((void __iomem *)ndev->bar) + 4096;
+
+ ret = nvme_configure_admin_queue(ndev);
+ if (ret)
+ goto free_queue;
+
+ ret = nvme_setup_io_queues(ndev);
+ if (ret)
+ goto free_queue;
+
+ nvme_get_info_from_identify(ndev);
+ ndev->blk_dev_start = nvme_info->ns_num;
+ list_add(&ndev->node, &nvme_info->dev_list);
+
+ return 0;
+
+free_queue:
+ free((void *)ndev->queues);
+free_nvme:
+ return ret;
+}
+
+U_BOOT_DRIVER(nvme) = {
+ .name = "nvme",
+ .id = UCLASS_NVME,
+ .bind = nvme_bind,
+ .probe = nvme_probe,
+ .priv_auto_alloc_size = sizeof(struct nvme_dev),
+};
+
+struct pci_device_id nvme_supported[] = {
+ { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, ~0) },
+ {}
+};
+
+U_BOOT_PCI_DEVICE(nvme, nvme_supported);
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
new file mode 100644
index 0000000..b7fdd0b
--- /dev/null
+++ b/drivers/nvme/nvme.h
@@ -0,0 +1,717 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DRIVER_NVME_H__
+#define __DRIVER_NVME_H__
+
+#include <asm/io.h>
+
+struct nvme_id_power_state {
+ __le16 max_power; /* centiwatts */
+ __u8 rsvd2;
+ __u8 flags;
+ __le32 entry_lat; /* microseconds */
+ __le32 exit_lat; /* microseconds */
+ __u8 read_tput;
+ __u8 read_lat;
+ __u8 write_tput;
+ __u8 write_lat;
+ __le16 idle_power;
+ __u8 idle_scale;
+ __u8 rsvd19;
+ __le16 active_power;
+ __u8 active_work_scale;
+ __u8 rsvd23[9];
+};
+
+enum {
+ NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0,
+ NVME_PS_FLAGS_NON_OP_STATE = 1 << 1,
+};
+
+struct nvme_id_ctrl {
+ __le16 vid;
+ __le16 ssvid;
+ char sn[20];
+ char mn[40];
+ char fr[8];
+ __u8 rab;
+ __u8 ieee[3];
+ __u8 mic;
+ __u8 mdts;
+ __u16 cntlid;
+ __u32 ver;
+ __u8 rsvd84[172];
+ __le16 oacs;
+ __u8 acl;
+ __u8 aerl;
+ __u8 frmw;
+ __u8 lpa;
+ __u8 elpe;
+ __u8 npss;
+ __u8 avscc;
+ __u8 apsta;
+ __le16 wctemp;
+ __le16 cctemp;
+ __u8 rsvd270[242];
+ __u8 sqes;
+ __u8 cqes;
+ __u8 rsvd514[2];
+ __le32 nn;
+ __le16 oncs;
+ __le16 fuses;
+ __u8 fna;
+ __u8 vwc;
+ __le16 awun;
+ __le16 awupf;
+ __u8 nvscc;
+ __u8 rsvd531;
+ __le16 acwu;
+ __u8 rsvd534[2];
+ __le32 sgls;
+ __u8 rsvd540[1508];
+ struct nvme_id_power_state psd[32];
+ __u8 vs[1024];
+};
+
+enum {
+ NVME_CTRL_ONCS_COMPARE = 1 << 0,
+ NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
+ NVME_CTRL_ONCS_DSM = 1 << 2,
+ NVME_CTRL_VWC_PRESENT = 1 << 0,
+};
+
+struct nvme_lbaf {
+ __le16 ms;
+ __u8 ds;
+ __u8 rp;
+};
+
+struct nvme_id_ns {
+ __le64 nsze;
+ __le64 ncap;
+ __le64 nuse;
+ __u8 nsfeat;
+ __u8 nlbaf;
+ __u8 flbas;
+ __u8 mc;
+ __u8 dpc;
+ __u8 dps;
+ __u8 nmic;
+ __u8 rescap;
+ __u8 fpi;
+ __u8 rsvd33;
+ __le16 nawun;
+ __le16 nawupf;
+ __le16 nacwu;
+ __le16 nabsn;
+ __le16 nabo;
+ __le16 nabspf;
+ __u16 rsvd46;
+ __le64 nvmcap[2];
+ __u8 rsvd64[40];
+ __u8 nguid[16];
+ __u8 eui64[8];
+ struct nvme_lbaf lbaf[16];
+ __u8 rsvd192[192];
+ __u8 vs[3712];
+};
+
+enum {
+ NVME_NS_FEAT_THIN = 1 << 0,
+ NVME_NS_FLBAS_LBA_MASK = 0xf,
+ NVME_NS_FLBAS_META_EXT = 0x10,
+ NVME_LBAF_RP_BEST = 0,
+ NVME_LBAF_RP_BETTER = 1,
+ NVME_LBAF_RP_GOOD = 2,
+ NVME_LBAF_RP_DEGRADED = 3,
+ NVME_NS_DPC_PI_LAST = 1 << 4,
+ NVME_NS_DPC_PI_FIRST = 1 << 3,
+ NVME_NS_DPC_PI_TYPE3 = 1 << 2,
+ NVME_NS_DPC_PI_TYPE2 = 1 << 1,
+ NVME_NS_DPC_PI_TYPE1 = 1 << 0,
+ NVME_NS_DPS_PI_FIRST = 1 << 3,
+ NVME_NS_DPS_PI_MASK = 0x7,
+ NVME_NS_DPS_PI_TYPE1 = 1,
+ NVME_NS_DPS_PI_TYPE2 = 2,
+ NVME_NS_DPS_PI_TYPE3 = 3,
+};
+
+struct nvme_smart_log {
+ __u8 critical_warning;
+ __u8 temperature[2];
+ __u8 avail_spare;
+ __u8 spare_thresh;
+ __u8 percent_used;
+ __u8 rsvd6[26];
+ __u8 data_units_read[16];
+ __u8 data_units_written[16];
+ __u8 host_reads[16];
+ __u8 host_writes[16];
+ __u8 ctrl_busy_time[16];
+ __u8 power_cycles[16];
+ __u8 power_on_hours[16];
+ __u8 unsafe_shutdowns[16];
+ __u8 media_errors[16];
+ __u8 num_err_log_entries[16];
+ __le32 warning_temp_time;
+ __le32 critical_comp_time;
+ __le16 temp_sensor[8];
+ __u8 rsvd216[296];
+};
+
+enum {
+ NVME_SMART_CRIT_SPARE = 1 << 0,
+ NVME_SMART_CRIT_TEMPERATURE = 1 << 1,
+ NVME_SMART_CRIT_RELIABILITY = 1 << 2,
+ NVME_SMART_CRIT_MEDIA = 1 << 3,
+ NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
+};
+
+struct nvme_lba_range_type {
+ __u8 type;
+ __u8 attributes;
+ __u8 rsvd2[14];
+ __u64 slba;
+ __u64 nlb;
+ __u8 guid[16];
+ __u8 rsvd48[16];
+};
+
+enum {
+ NVME_LBART_TYPE_FS = 0x01,
+ NVME_LBART_TYPE_RAID = 0x02,
+ NVME_LBART_TYPE_CACHE = 0x03,
+ NVME_LBART_TYPE_SWAP = 0x04,
+
+ NVME_LBART_ATTRIB_TEMP = 1 << 0,
+ NVME_LBART_ATTRIB_HIDE = 1 << 1,
+};
+
+struct nvme_reservation_status {
+ __le32 gen;
+ __u8 rtype;
+ __u8 regctl[2];
+ __u8 resv5[2];
+ __u8 ptpls;
+ __u8 resv10[13];
+ struct {
+ __le16 cntlid;
+ __u8 rcsts;
+ __u8 resv3[5];
+ __le64 hostid;
+ __le64 rkey;
+ } regctl_ds[];
+};
+
+/* I/O commands */
+
+enum nvme_opcode {
+ nvme_cmd_flush = 0x00,
+ nvme_cmd_write = 0x01,
+ nvme_cmd_read = 0x02,
+ nvme_cmd_write_uncor = 0x04,
+ nvme_cmd_compare = 0x05,
+ nvme_cmd_write_zeroes = 0x08,
+ nvme_cmd_dsm = 0x09,
+ nvme_cmd_resv_register = 0x0d,
+ nvme_cmd_resv_report = 0x0e,
+ nvme_cmd_resv_acquire = 0x11,
+ nvme_cmd_resv_release = 0x15,
+};
+
+struct nvme_common_command {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __le32 cdw2[2];
+ __le64 metadata;
+ __le64 prp1;
+ __le64 prp2;
+ __le32 cdw10[6];
+};
+
+struct nvme_rw_command {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2;
+ __le64 metadata;
+ __le64 prp1;
+ __le64 prp2;
+ __le64 slba;
+ __le16 length;
+ __le16 control;
+ __le32 dsmgmt;
+ __le32 reftag;
+ __le16 apptag;
+ __le16 appmask;
+};
+
+enum {
+ NVME_RW_LR = 1 << 15,
+ NVME_RW_FUA = 1 << 14,
+ NVME_RW_DSM_FREQ_UNSPEC = 0,
+ NVME_RW_DSM_FREQ_TYPICAL = 1,
+ NVME_RW_DSM_FREQ_RARE = 2,
+ NVME_RW_DSM_FREQ_READS = 3,
+ NVME_RW_DSM_FREQ_WRITES = 4,
+ NVME_RW_DSM_FREQ_RW = 5,
+ NVME_RW_DSM_FREQ_ONCE = 6,
+ NVME_RW_DSM_FREQ_PREFETCH = 7,
+ NVME_RW_DSM_FREQ_TEMP = 8,
+ NVME_RW_DSM_LATENCY_NONE = 0 << 4,
+ NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
+ NVME_RW_DSM_LATENCY_NORM = 2 << 4,
+ NVME_RW_DSM_LATENCY_LOW = 3 << 4,
+ NVME_RW_DSM_SEQ_REQ = 1 << 6,
+ NVME_RW_DSM_COMPRESSED = 1 << 7,
+ NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
+ NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
+ NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
+ NVME_RW_PRINFO_PRACT = 1 << 13,
+};
+
+struct nvme_dsm_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 nr;
+ __le32 attributes;
+ __u32 rsvd12[4];
+};
+
+enum {
+ NVME_DSMGMT_IDR = 1 << 0,
+ NVME_DSMGMT_IDW = 1 << 1,
+ NVME_DSMGMT_AD = 1 << 2,
+};
+
+struct nvme_dsm_range {
+ __le32 cattr;
+ __le32 nlb;
+ __le64 slba;
+};
+
+/* Admin commands */
+
+enum nvme_admin_opcode {
+ nvme_admin_delete_sq = 0x00,
+ nvme_admin_create_sq = 0x01,
+ nvme_admin_get_log_page = 0x02,
+ nvme_admin_delete_cq = 0x04,
+ nvme_admin_create_cq = 0x05,
+ nvme_admin_identify = 0x06,
+ nvme_admin_abort_cmd = 0x08,
+ nvme_admin_set_features = 0x09,
+ nvme_admin_get_features = 0x0a,
+ nvme_admin_async_event = 0x0c,
+ nvme_admin_activate_fw = 0x10,
+ nvme_admin_download_fw = 0x11,
+ nvme_admin_format_nvm = 0x80,
+ nvme_admin_security_send = 0x81,
+ nvme_admin_security_recv = 0x82,
+};
+
+enum {
+ NVME_QUEUE_PHYS_CONTIG = (1 << 0),
+ NVME_CQ_IRQ_ENABLED = (1 << 1),
+ NVME_SQ_PRIO_URGENT = (0 << 1),
+ NVME_SQ_PRIO_HIGH = (1 << 1),
+ NVME_SQ_PRIO_MEDIUM = (2 << 1),
+ NVME_SQ_PRIO_LOW = (3 << 1),
+ NVME_FEAT_ARBITRATION = 0x01,
+ NVME_FEAT_POWER_MGMT = 0x02,
+ NVME_FEAT_LBA_RANGE = 0x03,
+ NVME_FEAT_TEMP_THRESH = 0x04,
+ NVME_FEAT_ERR_RECOVERY = 0x05,
+ NVME_FEAT_VOLATILE_WC = 0x06,
+ NVME_FEAT_NUM_QUEUES = 0x07,
+ NVME_FEAT_IRQ_COALESCE = 0x08,
+ NVME_FEAT_IRQ_CONFIG = 0x09,
+ NVME_FEAT_WRITE_ATOMIC = 0x0a,
+ NVME_FEAT_ASYNC_EVENT = 0x0b,
+ NVME_FEAT_AUTO_PST = 0x0c,
+ NVME_FEAT_SW_PROGRESS = 0x80,
+ NVME_FEAT_HOST_ID = 0x81,
+ NVME_FEAT_RESV_MASK = 0x82,
+ NVME_FEAT_RESV_PERSIST = 0x83,
+ NVME_LOG_ERROR = 0x01,
+ NVME_LOG_SMART = 0x02,
+ NVME_LOG_FW_SLOT = 0x03,
+ NVME_LOG_RESERVATION = 0x80,
+ NVME_FWACT_REPL = (0 << 3),
+ NVME_FWACT_REPL_ACTV = (1 << 3),
+ NVME_FWACT_ACTV = (2 << 3),
+};
+
+struct nvme_identify {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 cns;
+ __u32 rsvd11[5];
+};
+
+struct nvme_features {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[2];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 fid;
+ __le32 dword11;
+ __u32 rsvd12[4];
+};
+
+struct nvme_create_cq {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __u64 rsvd8;
+ __le16 cqid;
+ __le16 qsize;
+ __le16 cq_flags;
+ __le16 irq_vector;
+ __u32 rsvd12[4];
+};
+
+struct nvme_create_sq {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __u64 rsvd8;
+ __le16 sqid;
+ __le16 qsize;
+ __le16 sq_flags;
+ __le16 cqid;
+ __u32 rsvd12[4];
+};
+
+struct nvme_delete_queue {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[9];
+ __le16 qid;
+ __u16 rsvd10;
+ __u32 rsvd11[5];
+};
+
+struct nvme_abort_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[9];
+ __le16 sqid;
+ __u16 cid;
+ __u32 rsvd11[5];
+};
+
+struct nvme_download_firmware {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __u32 rsvd1[5];
+ __le64 prp1;
+ __le64 prp2;
+ __le32 numd;
+ __le32 offset;
+ __u32 rsvd12[4];
+};
+
+struct nvme_format_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 command_id;
+ __le32 nsid;
+ __u64 rsvd2[4];
+ __le32 cdw10;
+ __u32 rsvd11[5];
+};
+
+struct nvme_command {
+ union {
+ struct nvme_common_command common;
+ struct nvme_rw_command rw;
+ struct nvme_identify identify;
+ struct nvme_features features;
+ struct nvme_create_cq create_cq;
+ struct nvme_create_sq create_sq;
+ struct nvme_delete_queue delete_queue;
+ struct nvme_download_firmware dlfw;
+ struct nvme_format_cmd format;
+ struct nvme_dsm_cmd dsm;
+ struct nvme_abort_cmd abort;
+ };
+};
+
+enum {
+ NVME_SC_SUCCESS = 0x0,
+ NVME_SC_INVALID_OPCODE = 0x1,
+ NVME_SC_INVALID_FIELD = 0x2,
+ NVME_SC_CMDID_CONFLICT = 0x3,
+ NVME_SC_DATA_XFER_ERROR = 0x4,
+ NVME_SC_POWER_LOSS = 0x5,
+ NVME_SC_INTERNAL = 0x6,
+ NVME_SC_ABORT_REQ = 0x7,
+ NVME_SC_ABORT_QUEUE = 0x8,
+ NVME_SC_FUSED_FAIL = 0x9,
+ NVME_SC_FUSED_MISSING = 0xa,
+ NVME_SC_INVALID_NS = 0xb,
+ NVME_SC_CMD_SEQ_ERROR = 0xc,
+ NVME_SC_SGL_INVALID_LAST = 0xd,
+ NVME_SC_SGL_INVALID_COUNT = 0xe,
+ NVME_SC_SGL_INVALID_DATA = 0xf,
+ NVME_SC_SGL_INVALID_METADATA = 0x10,
+ NVME_SC_SGL_INVALID_TYPE = 0x11,
+ NVME_SC_LBA_RANGE = 0x80,
+ NVME_SC_CAP_EXCEEDED = 0x81,
+ NVME_SC_NS_NOT_READY = 0x82,
+ NVME_SC_RESERVATION_CONFLICT = 0x83,
+ NVME_SC_CQ_INVALID = 0x100,
+ NVME_SC_QID_INVALID = 0x101,
+ NVME_SC_QUEUE_SIZE = 0x102,
+ NVME_SC_ABORT_LIMIT = 0x103,
+ NVME_SC_ABORT_MISSING = 0x104,
+ NVME_SC_ASYNC_LIMIT = 0x105,
+ NVME_SC_FIRMWARE_SLOT = 0x106,
+ NVME_SC_FIRMWARE_IMAGE = 0x107,
+ NVME_SC_INVALID_VECTOR = 0x108,
+ NVME_SC_INVALID_LOG_PAGE = 0x109,
+ NVME_SC_INVALID_FORMAT = 0x10a,
+ NVME_SC_FIRMWARE_NEEDS_RESET = 0x10b,
+ NVME_SC_INVALID_QUEUE = 0x10c,
+ NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d,
+ NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e,
+ NVME_SC_FEATURE_NOT_PER_NS = 0x10f,
+ NVME_SC_FW_NEEDS_RESET_SUBSYS = 0x110,
+ NVME_SC_BAD_ATTRIBUTES = 0x180,
+ NVME_SC_INVALID_PI = 0x181,
+ NVME_SC_READ_ONLY = 0x182,
+ NVME_SC_WRITE_FAULT = 0x280,
+ NVME_SC_READ_ERROR = 0x281,
+ NVME_SC_GUARD_CHECK = 0x282,
+ NVME_SC_APPTAG_CHECK = 0x283,
+ NVME_SC_REFTAG_CHECK = 0x284,
+ NVME_SC_COMPARE_FAILED = 0x285,
+ NVME_SC_ACCESS_DENIED = 0x286,
+ NVME_SC_DNR = 0x4000,
+};
+
+struct nvme_completion {
+ __le32 result; /* Used by admin commands to return data */
+ __u32 rsvd;
+ __le16 sq_head; /* how much of this queue may be reclaimed */
+ __le16 sq_id; /* submission queue that generated this entry */
+ __u16 command_id; /* of the command which completed */
+ __le16 status; /* did the command fail, and if so, why? */
+};
+
+struct nvme_user_io {
+ __u8 opcode;
+ __u8 flags;
+ __u16 control;
+ __u16 nblocks;
+ __u16 rsvd;
+ __u64 metadata;
+ __u64 addr;
+ __u64 slba;
+ __u32 dsmgmt;
+ __u32 reftag;
+ __u16 apptag;
+ __u16 appmask;
+};
+
+struct nvme_passthru_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 rsvd1;
+ __u32 nsid;
+ __u32 cdw2;
+ __u32 cdw3;
+ __u64 metadata;
+ __u64 addr;
+ __u32 metadata_len;
+ __u32 data_len;
+ __u32 cdw10;
+ __u32 cdw11;
+ __u32 cdw12;
+ __u32 cdw13;
+ __u32 cdw14;
+ __u32 cdw15;
+ __u32 timeout_ms;
+ __u32 result;
+};
+
+/*
+ * Registers should always be accessed with double word or quad word
+ * accesses. Registers with 64-bit address pointers should be written
+ * to with dword accesses by writing the low dword first (ptr[0]),
+ * then the high dword (ptr[1]) second.
+ */
+static inline u64 nvme_readq(__le64 volatile *regs)
+{
+#if BITS_PER_LONG == 64
+ return readq(regs);
+#else
+ __u32 *ptr = (__u32 *)regs;
+ u64 val_lo = readl(ptr);
+ u64 val_hi = readl(ptr + 1);
+
+ return val_lo + (val_hi << 32);
+#endif
+}
+
+static inline void nvme_writeq(const u64 val, __le64 volatile *regs)
+{
+#if BITS_PER_LONG == 64
+ writeq(val, regs);
+#else
+ __u32 *ptr = (__u32 *)regs;
+ u32 val_lo = lower_32_bits(val);
+ u32 val_hi = upper_32_bits(val);
+ writel(val_lo, ptr);
+ writel(val_hi, ptr + 1);
+#endif
+}
+
+struct nvme_bar {
+ __u64 cap; /* Controller Capabilities */
+ __u32 vs; /* Version */
+ __u32 intms; /* Interrupt Mask Set */
+ __u32 intmc; /* Interrupt Mask Clear */
+ __u32 cc; /* Controller Configuration */
+ __u32 rsvd1; /* Reserved */
+ __u32 csts; /* Controller Status */
+ __u32 rsvd2; /* Reserved */
+ __u32 aqa; /* Admin Queue Attributes */
+ __u64 asq; /* Admin SQ Base Address */
+ __u64 acq; /* Admin CQ Base Address */
+};
+
+#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
+#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
+#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
+#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
+#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
+
+#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
+
+enum {
+ NVME_CC_ENABLE = 1 << 0,
+ NVME_CC_CSS_NVM = 0 << 4,
+ NVME_CC_MPS_SHIFT = 7,
+ NVME_CC_ARB_RR = 0 << 11,
+ NVME_CC_ARB_WRRU = 1 << 11,
+ NVME_CC_ARB_VS = 7 << 11,
+ NVME_CC_SHN_NONE = 0 << 14,
+ NVME_CC_SHN_NORMAL = 1 << 14,
+ NVME_CC_SHN_ABRUPT = 2 << 14,
+ NVME_CC_SHN_MASK = 3 << 14,
+ NVME_CC_IOSQES = 6 << 16,
+ NVME_CC_IOCQES = 4 << 20,
+ NVME_CSTS_RDY = 1 << 0,
+ NVME_CSTS_CFS = 1 << 1,
+ NVME_CSTS_SHST_NORMAL = 0 << 2,
+ NVME_CSTS_SHST_OCCUR = 1 << 2,
+ NVME_CSTS_SHST_CMPLT = 2 << 2,
+ NVME_CSTS_SHST_MASK = 3 << 2,
+};
+
+/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
+struct nvme_dev {
+ struct list_head node;
+ struct nvme_queue **queues;
+ u32 __iomem *dbs;
+ unsigned int cardnum;
+ struct udevice *pdev;
+ pci_dev_t pci_dev;
+ int instance;
+ uint8_t *hw_addr;
+ unsigned queue_count;
+ unsigned online_queues;
+ unsigned max_qid;
+ int q_depth;
+ u32 db_stride;
+ u32 ctrl_config;
+ struct nvme_bar __iomem *bar;
+ struct list_head namespaces;
+ const char *name;
+ char serial[20];
+ char model[40];
+ char firmware_rev[8];
+ u32 max_transfer_shift;
+ u32 stripe_size;
+ u32 page_size;
+ u16 oncs;
+ u16 abort_limit;
+ u8 event_limit;
+ u8 vwc;
+ u64 *prp_pool;
+ u32 prp_entry_num;
+ u32 nn;
+ u32 blk_dev_start;
+};
+
+struct nvme_info {
+ int ns_num; /*the number of nvme namespaces*/
+ int ndev_num; /*the number of nvme devices*/
+ struct list_head dev_list;
+};
+
+/*
+ * The nvme_iod describes the data in an I/O, including the list of PRP
+ * entries. You can't see it in this data structure because C doesn't let
+ * me express that. Use nvme_alloc_iod to ensure there's enough space
+ * allocated to store the PRP list.
+ */
+struct nvme_iod {
+ unsigned long private; /* For the use of the submitter of the I/O */
+ int npages; /* In the PRP list. 0 means small pool in use */
+ int offset; /* Of PRP list */
+ int nents; /* Used in scatterlist */
+ int length; /* Of data, in bytes */
+ dma_addr_t first_dma;
+};
+
+/*
+ * An NVM Express namespace is equivalent to a SCSI LUN.
+ * Each namespace is operated as an independent "device".
+ */
+struct nvme_ns {
+ struct list_head list;
+ struct nvme_dev *dev;
+ unsigned ns_id;
+ int devnum;
+ int lba_shift;
+ u16 ms;
+ u8 flbas;
+ u8 pi_type;
+ u64 mode_select_num_blocks;
+ u32 mode_select_block_len;
+};
+
+extern struct nvme_info *nvme_info;
+
+#endif /* __DRIVER_NVME_H__ */
diff --git a/drivers/nvme/nvme_show.c b/drivers/nvme/nvme_show.c
new file mode 100644
index 0000000..5577e5d
--- /dev/null
+++ b/drivers/nvme/nvme_show.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <nvme.h>
+#include "nvme.h"
+
+static void print_optional_admin_cmd(u16 oacs, int devnum)
+{
+ printf("Blk device %d: Optional Admin Command Support:\n",
+ devnum);
+ printf("\tNamespace Management/Attachment: %s\n",
+ oacs & 0x08 ? "yes" : "no");
+ printf("\tFirmware Commit/Image download: %s\n",
+ oacs & 0x04 ? "yes" : "no");
+ printf("\tFormat NVM: %s\n",
+ oacs & 0x02 ? "yes" : "no");
+ printf("\tSecurity Send/Receive: %s\n",
+ oacs & 0x01 ? "yes" : "no");
+}
+
+static void print_optional_nvm_cmd(u16 oncs, int devnum)
+{
+ printf("Blk device %d: Optional NVM Command Support:\n",
+ devnum);
+ printf("\tReservation: %s\n",
+ oncs & 0x10 ? "yes" : "no");
+ printf("\tSave/Select field in the Set/Get features: %s\n",
+ oncs & 0x08 ? "yes" : "no");
+ printf("\tWrite Zeroes: %s\n",
+ oncs & 0x04 ? "yes" : "no");
+ printf("\tDataset Management: %s\n",
+ oncs & 0x02 ? "yes" : "no");
+ printf("\tWrite Uncorrectable: %s\n",
+ oncs & 0x01 ? "yes" : "no");
+}
+
+static void print_format_nvme_attributes(u8 fna, int devnum)
+{
+ printf("Blk device %d: Format NVM Attributes:\n", devnum);
+ printf("\tSupport Cryptographic Erase: %s\n",
+ fna & 0x04 ? "yes" : "No");
+ printf("\tSupport erase a particular namespace: %s\n",
+ fna & 0x02 ? "No" : "Yes");
+ printf("\tSupport format a particular namespace: %s\n",
+ fna & 0x01 ? "No" : "Yes");
+}
+
+static void print_format(struct nvme_lbaf *lbaf)
+{
+ u8 str[][10] = {"Best", "Better", "Good", "Degraded"};
+
+ printf("\t\tMetadata Size: %d\n", le16_to_cpu(lbaf->ms));
+ printf("\t\tLBA Data Size: %d\n", 1 << lbaf->ds);
+ printf("\t\tRelative Performance: %s\n", str[lbaf->rp & 0x03]);
+}
+
+static void print_formats(struct nvme_id_ns *id, struct nvme_ns *ns)
+{
+ int i;
+
+ printf("Blk device %d: LBA Format Support:\n", ns->devnum);
+
+ for (i = 0; i < id->nlbaf; i++) {
+ printf("\tLBA Foramt %d Support: ", i);
+ if (i == ns->flbas)
+ printf("(current)\n");
+ else
+ printf("\n");
+ print_format(id->lbaf + i);
+ }
+}
+
+static void print_data_protect_cap(u8 dpc, int devnum)
+{
+ printf("Blk device %d: End-to-End Data", devnum);
+ printf("Protect Capabilities:\n");
+ printf("\tAs last eight bytes: %s\n",
+ dpc & 0x10 ? "yes" : "No");
+ printf("\tAs first eight bytes: %s\n",
+ dpc & 0x08 ? "yes" : "No");
+ printf("\tSupport Type3: %s\n",
+ dpc & 0x04 ? "yes" : "No");
+ printf("\tSupport Type2: %s\n",
+ dpc & 0x02 ? "yes" : "No");
+ printf("\tSupport Type1: %s\n",
+ dpc & 0x01 ? "yes" : "No");
+}
+
+static void print_metadata_cap(u8 mc, int devnum)
+{
+ printf("Blk device %d: Metadata capabilities:\n", devnum);
+ printf("\tAs part of a separate buffer: %s\n",
+ mc & 0x02 ? "yes" : "No");
+ printf("\tAs part of an extended data LBA: %s\n",
+ mc & 0x01 ? "yes" : "No");
+}
+
+int nvme_print_info(struct udevice *udev)
+{
+ struct nvme_ns *ns = dev_get_priv(udev);
+ struct nvme_dev *dev = ns->dev;
+ struct nvme_id_ns buf_ns, *id = &buf_ns;
+ struct nvme_id_ctrl buf_ctrl, *ctrl = &buf_ctrl;
+
+ if (nvme_identify(dev, 0, 1, (dma_addr_t)ctrl))
+ return -EIO;
+
+ print_optional_admin_cmd(le16_to_cpu(ctrl->oacs), ns->devnum);
+ print_optional_nvm_cmd(le16_to_cpu(ctrl->oncs), ns->devnum);
+ print_format_nvme_attributes(ctrl->fna, ns->devnum);
+
+ if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)id))
+ return -EIO;
+
+ print_formats(id, ns);
+ print_data_protect_cap(id->dpc, ns->devnum);
+ print_metadata_cap(id->mc, ns->devnum);
+
+ return 0;
+}
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 692a398..e2a1c0a 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -1,6 +1,6 @@
menuconfig PCI
bool "PCI support"
- default y if PPC || X86
+ default y if PPC
help
Enable support for PCI (Peripheral Interconnect Bus), a type of bus
used on some devices to allow the CPU to communicate with its
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index af20cf0..df76a94 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -390,7 +390,7 @@
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
/* boot from PCIE --master */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
@@ -673,7 +673,7 @@
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
} else {
/* boot from PCIE --master releases slave's core 0 */
- char *s = getenv("bootmaster");
+ char *s = env_get("bootmaster");
char pcie[6];
sprintf(pcie, "PCIE%d", pci_info->pci_num);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6b36c18..bbc7dab 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -427,7 +427,7 @@
if (!gd->pcidelay_done) {
/* wait "pcidelay" ms (if defined)... */
- s = getenv("pcidelay");
+ s = env_get("pcidelay");
if (s) {
int val = simple_strtoul(s, NULL, 10);
for (i = 0; i < val; i++)
@@ -459,7 +459,7 @@
hose_head = NULL;
/* allow env to disable pci init/enum */
- if (getenv("pcidisable") != NULL)
+ if (env_get("pcidisable") != NULL)
return;
/* now call board specific pci_init()... */
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index 6526de8..faf25d9 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -89,7 +89,7 @@
/*
* Only skip configuration if "pciconfighost" is not set
*/
- if (getenv("pciconfighost") == NULL)
+ if (env_get("pciconfighost") == NULL)
return 1;
#else
return 1;
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 7d9c63b..cb5cf8b 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -16,7 +16,6 @@
#include <clk.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
#include <malloc.h>
#include <pci.h>
#include <power-domain.h>
@@ -25,6 +24,7 @@
#include <asm/io.h>
#include <asm/gpio.h>
+#include <linux/ioport.h>
#include <linux/list.h>
#ifndef CONFIG_TEGRA186
@@ -220,9 +220,9 @@
struct tegra_pcie {
struct pci_controller hose;
- struct fdt_resource pads;
- struct fdt_resource afi;
- struct fdt_resource cs;
+ struct resource pads;
+ struct resource afi;
+ struct resource cs;
struct list_head ports;
unsigned long xbar;
@@ -364,13 +364,12 @@
return 0;
}
-static int tegra_pcie_port_parse_dt(const void *fdt, int node,
- struct tegra_pcie_port *port)
+static int tegra_pcie_port_parse_dt(ofnode node, struct tegra_pcie_port *port)
{
const u32 *addr;
int len;
- addr = fdt_getprop(fdt, node, "assigned-addresses", &len);
+ addr = ofnode_get_property(node, "assigned-addresses", &len);
if (!addr) {
error("property \"assigned-addresses\" not found");
return -FDT_ERR_NOTFOUND;
@@ -382,7 +381,7 @@
return 0;
}
-static int tegra_pcie_get_xbar_config(const void *fdt, int node, u32 lanes,
+static int tegra_pcie_get_xbar_config(ofnode node, u32 lanes,
enum tegra_pci_id id, unsigned long *xbar)
{
switch (id) {
@@ -456,14 +455,12 @@
return -FDT_ERR_NOTFOUND;
}
-static int tegra_pcie_parse_port_info(const void *fdt, int node,
- unsigned int *index,
- unsigned int *lanes)
+static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
{
struct fdt_pci_addr addr;
int err;
- err = fdtdec_get_int(fdt, node, "nvidia,num-lanes", 0);
+ err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1);
if (err < 0) {
error("failed to parse \"nvidia,num-lanes\" property");
return err;
@@ -471,7 +468,7 @@
*lanes = err;
- err = fdtdec_get_pci_addr(fdt, node, 0, "reg", &addr);
+ err = ofnode_read_pci_addr(node, 0, "reg", &addr);
if (err < 0) {
error("failed to parse \"reg\" property");
return err;
@@ -487,28 +484,26 @@
return 0;
}
-static int tegra_pcie_parse_dt(const void *fdt, int node, enum tegra_pci_id id,
+static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
struct tegra_pcie *pcie)
{
- int err, subnode;
+ ofnode subnode;
u32 lanes = 0;
+ int err;
- err = fdt_get_named_resource(fdt, node, "reg", "reg-names", "pads",
- &pcie->pads);
+ err = dev_read_resource(dev, 0, &pcie->pads);
if (err < 0) {
error("resource \"pads\" not found");
return err;
}
- err = fdt_get_named_resource(fdt, node, "reg", "reg-names", "afi",
- &pcie->afi);
+ err = dev_read_resource(dev, 1, &pcie->afi);
if (err < 0) {
error("resource \"afi\" not found");
return err;
}
- err = fdt_get_named_resource(fdt, node, "reg", "reg-names", "cs",
- &pcie->cs);
+ err = dev_read_resource(dev, 2, &pcie->cs);
if (err < 0) {
error("resource \"cs\" not found");
return err;
@@ -531,12 +526,11 @@
}
#endif
- fdt_for_each_subnode(subnode, fdt, node) {
+ dev_for_each_subnode(subnode, dev) {
unsigned int index = 0, num_lanes = 0;
struct tegra_pcie_port *port;
- err = tegra_pcie_parse_port_info(fdt, subnode, &index,
- &num_lanes);
+ err = tegra_pcie_parse_port_info(subnode, &index, &num_lanes);
if (err < 0) {
error("failed to obtain root port info");
continue;
@@ -544,7 +538,7 @@
lanes |= num_lanes << (index << 3);
- if (!fdtdec_get_is_enabled(fdt, subnode))
+ if (!ofnode_is_available(subnode))
continue;
port = malloc(sizeof(*port));
@@ -555,7 +549,7 @@
port->num_lanes = num_lanes;
port->index = index;
- err = tegra_pcie_port_parse_dt(fdt, subnode, port);
+ err = tegra_pcie_port_parse_dt(subnode, port);
if (err < 0) {
free(port);
continue;
@@ -565,7 +559,8 @@
port->pcie = pcie;
}
- err = tegra_pcie_get_xbar_config(fdt, node, lanes, id, &pcie->xbar);
+ err = tegra_pcie_get_xbar_config(dev_ofnode(dev), lanes, id,
+ &pcie->xbar);
if (err < 0) {
error("invalid lane configuration");
return err;
@@ -815,7 +810,7 @@
/* BAR 0: type 1 extended configuration space */
fpci = 0xfe100000;
- size = fdt_resource_size(&pcie->cs);
+ size = resource_size(&pcie->cs);
axi = pcie->cs.start;
afi_writel(pcie, axi, AFI_AXI_BAR0_START);
@@ -1099,7 +1094,7 @@
INIT_LIST_HEAD(&pcie->ports);
- if (tegra_pcie_parse_dt(gd->fdt_blob, dev_of_offset(dev), id, pcie))
+ if (tegra_pcie_parse_dt(dev, id, pcie))
return -EINVAL;
return 0;
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 78cde21..610f85c 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -478,6 +478,7 @@
bool ep_mode;
uint svr;
int ret;
+ fdt_size_t cfg_size;
pcie->bus = dev;
@@ -539,8 +540,10 @@
if (svr == SVR_LS2088A || svr == SVR_LS2084A ||
svr == SVR_LS2048A || svr == SVR_LS2044A ||
svr == SVR_LS2081A || svr == SVR_LS2041A) {
+ cfg_size = fdt_resource_size(&pcie->cfg_res);
pcie->cfg_res.start = LS2088A_PCIE1_PHYS_ADDR +
LS2088A_PCIE_PHYS_SIZE * pcie->idx;
+ pcie->cfg_res.end = pcie->cfg_res.start + cfg_size;
pcie->ctrl = pcie->lut + 0x40000;
}
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 308b073..782e3ab 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -118,8 +118,8 @@
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
-#define SVR_LS2081A 0x870919
-#define SVR_LS2041A 0x870915
+#define SVR_LS2081A 0x870918
+#define SVR_LS2041A 0x870914
/* LS1021a PCIE space */
#define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index b7e6188..7d8cb5c 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -5,5 +5,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
obj-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
diff --git a/drivers/pcmcia/ti_pci1410a.c b/drivers/pcmcia/ti_pci1410a.c
deleted file mode 100644
index d83db3f..0000000
--- a/drivers/pcmcia/ti_pci1410a.c
+++ /dev/null
@@ -1,623 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB
- *
- * SPDX-License-Identifier: GPL-2.0+
- *
- ********************************************************************
- *
- * Lots of code copied from:
- *
- * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
- * (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
- *
- * "The ExCA standard specifies that socket controllers should provide
- * two IO and five memory windows per socket, which can be independently
- * configured and positioned in the host address space and mapped to
- * arbitrary segments of card address space. " - David A Hinds. 1999
- *
- * This controller does _not_ meet the ExCA standard.
- *
- * m8xx pcmcia controller brief info:
- * + 8 windows (attrib, mem, i/o)
- * + up to two slots (SLOT_A and SLOT_B)
- * + inputpins, outputpins, event and mask registers.
- * - no offset register. sigh.
- *
- * Because of the lacking offset register we must map the whole card.
- * We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
- * Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
- * * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
- * The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
- * They are maximum 64KByte each...
- */
-
-
-#undef DEBUG /**/
-
-/*
- * PCMCIA support
- */
-#include <common.h>
-#include <command.h>
-#include <config.h>
-#include <pci.h>
-#include <asm/io.h>
-
-#include <pcmcia.h>
-
-#if defined(CONFIG_CMD_PCMCIA)
-
-int pcmcia_on(int ide_base_bus);
-
-static int hardware_disable(int slot);
-static int hardware_enable(int slot);
-static int voltage_set(int slot, int vcc, int vpp);
-static void print_funcid(int func);
-static void print_fixed(volatile char *p);
-static int identify(volatile char *p);
-static int check_ide_device(int slot, int ide_base_bus);
-
-
-/* ------------------------------------------------------------------------- */
-
-
-const char *indent = "\t ";
-
-/* ------------------------------------------------------------------------- */
-
-
-static struct pci_device_id supported[] = {
- { PCI_VENDOR_ID_TI, 0xac50 }, /* Ti PCI1410A */
- { PCI_VENDOR_ID_TI, 0xac56 }, /* Ti PCI1510 */
- { }
-};
-
-static pci_dev_t devbusfn;
-static u32 socket_base;
-static u32 pcmcia_cis_ptr;
-
-int pcmcia_on(int ide_base_bus)
-{
- u16 dev_id;
- u32 socket_status;
- int slot = 0;
- int cis_len;
- u16 io_base;
- u16 io_len;
-
- /*
- * Find the CardBus PCI device(s).
- */
- if ((devbusfn = pci_find_devices(supported, 0)) < 0) {
- printf("Ti CardBus: not found\n");
- return 1;
- }
-
- pci_read_config_word(devbusfn, PCI_DEVICE_ID, &dev_id);
-
- if (dev_id == 0xac56) {
- debug("Enable PCMCIA Ti PCI1510\n");
- } else {
- debug("Enable PCMCIA Ti PCI1410A\n");
- }
-
- pcmcia_cis_ptr = CONFIG_SYS_PCMCIA_CIS_WIN;
- cis_len = CONFIG_SYS_PCMCIA_CIS_WIN_SIZE;
-
- io_base = CONFIG_SYS_PCMCIA_IO_WIN;
- io_len = CONFIG_SYS_PCMCIA_IO_WIN_SIZE;
-
- /*
- * Setup the PCI device.
- */
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &socket_base);
- socket_base &= ~0xf;
-
- socket_status = readl(socket_base+8);
- if ((socket_status & 6) == 0) {
- printf("Card Present: ");
-
- switch (socket_status & 0x3c00) {
-
- case 0x400:
- printf("5V ");
- break;
- case 0x800:
- printf("3.3V ");
- break;
- case 0xc00:
- printf("3.3/5V ");
- break;
- default:
- printf("unsupported Vcc ");
- break;
- }
- switch (socket_status & 0x30) {
- case 0x10:
- printf("16bit PC-Card\n");
- break;
- case 0x20:
- printf("32bit CardBus Card\n");
- break;
- default:
- printf("8bit PC-Card\n");
- break;
- }
- }
-
-
- writeb(0x41, socket_base + 0x806); /* Enable I/O window 0 and memory window 0 */
- writeb(0x0e, socket_base + 0x807); /* Reset I/O window options */
-
- /* Careful: the linux yenta driver do not seem to reset the offset
- * in the i/o windows, so leaving them non-zero is a problem */
-
- writeb(io_base & 0xff, socket_base + 0x808); /* I/O window 0 base address */
- writeb(io_base>>8, socket_base + 0x809);
- writeb((io_base + io_len - 1) & 0xff, socket_base + 0x80a); /* I/O window 0 end address */
- writeb((io_base + io_len - 1)>>8, socket_base + 0x80b);
- writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address 0x000 */
- writeb(0x00, socket_base + 0x837);
-
-
- writeb((pcmcia_cis_ptr&0x000ff000) >> 12,
- socket_base + 0x810); /* Memory window 0 start address bits 19-12 */
- writeb((pcmcia_cis_ptr&0x00f00000) >> 20,
- socket_base + 0x811); /* Memory window 0 start address bits 23-20 */
- writeb(((pcmcia_cis_ptr+cis_len-1) & 0x000ff000) >> 12,
- socket_base + 0x812); /* Memory window 0 end address bits 19-12*/
- writeb(((pcmcia_cis_ptr+cis_len-1) & 0x00f00000) >> 20,
- socket_base + 0x813); /* Memory window 0 end address bits 23-20*/
- writeb(0x00, socket_base + 0x814); /* Memory window 0 offset bits 19-12 */
- writeb(0x40, socket_base + 0x815); /* Memory window 0 offset bits 23-20 and
- * options (read/write, attribute access) */
- writeb(0x00, socket_base + 0x816); /* ExCA card-detect and general control */
- writeb(0x00, socket_base + 0x81e); /* ExCA global control (interrupt modes) */
-
- writeb((pcmcia_cis_ptr & 0xff000000) >> 24,
- socket_base + 0x840); /* Memory window address bits 31-24 */
-
-
- /* turn off voltage */
- if (voltage_set(slot, 0, 0)) {
- return 1;
- }
-
- /* Enable external hardware */
- if (hardware_enable(slot)) {
- return 1;
- }
-
- if (check_ide_device(slot, ide_base_bus)) {
- return 1;
- }
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-
-#if defined(CONFIG_CMD_PCMCIA)
-int pcmcia_off (void)
-{
- int slot = 0;
-
- writeb(0x00, socket_base + 0x806); /* disable all I/O and memory windows */
-
- writeb(0x00, socket_base + 0x808); /* I/O window 0 base address */
- writeb(0x00, socket_base + 0x809);
- writeb(0x00, socket_base + 0x80a); /* I/O window 0 end address */
- writeb(0x00, socket_base + 0x80b);
- writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address */
- writeb(0x00, socket_base + 0x837);
-
- writeb(0x00, socket_base + 0x80c); /* I/O window 1 base address */
- writeb(0x00, socket_base + 0x80d);
- writeb(0x00, socket_base + 0x80e); /* I/O window 1 end address */
- writeb(0x00, socket_base + 0x80f);
- writeb(0x00, socket_base + 0x838); /* I/O window 1 offset address */
- writeb(0x00, socket_base + 0x839);
-
- writeb(0x00, socket_base + 0x810); /* Memory window 0 start address */
- writeb(0x00, socket_base + 0x811);
- writeb(0x00, socket_base + 0x812); /* Memory window 0 end address */
- writeb(0x00, socket_base + 0x813);
- writeb(0x00, socket_base + 0x814); /* Memory window 0 offset */
- writeb(0x00, socket_base + 0x815);
-
- writeb(0xc0, socket_base + 0x840); /* Memory window 0 page address */
-
-
- /* turn off voltage */
- voltage_set(slot, 0, 0);
-
- /* disable external hardware */
- printf ("Shutdown and Poweroff Ti PCI1410A\n");
- hardware_disable(slot);
-
- return 0;
-}
-
-#endif
-
-/* ------------------------------------------------------------------------- */
-
-
-#define MAX_TUPEL_SZ 512
-#define MAX_FEATURES 4
-int ide_devices_found;
-static int check_ide_device(int slot, int ide_base_bus)
-{
- volatile char *ident = NULL;
- volatile char *feature_p[MAX_FEATURES];
- volatile char *p, *start;
- int n_features = 0;
- uchar func_id = ~0;
- uchar code, len;
- ushort config_base = 0;
- int found = 0;
- int i;
- u32 socket_status;
-
- debug ("PCMCIA MEM: %08X\n", pcmcia_cis_ptr);
-
- socket_status = readl(socket_base+8);
-
- if ((socket_status & 6) != 0 || (socket_status & 0x20) != 0) {
- printf("no card or CardBus card\n");
- return 1;
- }
-
- start = p = (volatile char *) pcmcia_cis_ptr;
-
- while ((p - start) < MAX_TUPEL_SZ) {
-
- code = *p; p += 2;
-
- if (code == 0xFF) { /* End of chain */
- break;
- }
-
- len = *p; p += 2;
-#if defined(DEBUG) && (DEBUG > 1)
- {
- volatile uchar *q = p;
- printf ("\nTuple code %02x length %d\n\tData:",
- code, len);
-
- for (i = 0; i < len; ++i) {
- printf (" %02x", *q);
- q+= 2;
- }
- }
-#endif /* DEBUG */
- switch (code) {
- case CISTPL_VERS_1:
- ident = p + 4;
- break;
- case CISTPL_FUNCID:
- /* Fix for broken SanDisk which may have 0x80 bit set */
- func_id = *p & 0x7F;
- break;
- case CISTPL_FUNCE:
- if (n_features < MAX_FEATURES)
- feature_p[n_features++] = p;
- break;
- case CISTPL_CONFIG:
- config_base = (*(p+6) << 8) + (*(p+4));
- debug ("\n## Config_base = %04x ###\n", config_base);
- default:
- break;
- }
- p += 2 * len;
- }
-
- found = identify(ident);
-
- if (func_id != ((uchar)~0)) {
- print_funcid (func_id);
-
- if (func_id == CISTPL_FUNCID_FIXED)
- found = 1;
- else
- return 1; /* no disk drive */
- }
-
- for (i=0; i<n_features; ++i) {
- print_fixed(feature_p[i]);
- }
-
- if (!found) {
- printf("unknown card type\n");
- return 1;
- }
-
- /* select config index 1 */
- writeb(1, pcmcia_cis_ptr + config_base);
-
-#if 0
- printf("Confiuration Option Register: %02x\n", readb(pcmcia_cis_ptr + config_base));
- printf("Card Confiuration and Status Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 2));
- printf("Pin Replacement Register Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 4));
- printf("Socket and Copy Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 6));
-#endif
- ide_devices_found |= (1 << (slot+ide_base_bus));
-
- return 0;
-}
-
-
-static int voltage_set(int slot, int vcc, int vpp)
-{
- u32 socket_control;
- int reg=0;
-
- switch (slot) {
- case 0:
- reg = socket_base + 0x10;
- break;
- default:
- return 1;
- }
-
- socket_control = 0;
-
-
- switch (vcc) {
- case 50:
- socket_control |= 0x20;
- break;
- case 33:
- socket_control |= 0x30;
- break;
- case 0:
- default: ;
- }
-
- switch (vpp) {
- case 120:
- socket_control |= 0x1;
- break;
- case 50:
- socket_control |= 0x2;
- break;
- case 33:
- socket_control |= 0x3;
- break;
- case 0:
- default: ;
- }
-
- writel(socket_control, reg);
-
- debug ("voltage_set: Ti PCI1410A Slot %d, Vcc=%d.%d, Vpp=%d.%d\n",
- slot, vcc/10, vcc%10, vpp/10, vpp%10);
-
- udelay(500);
- return 0;
-}
-
-
-static int hardware_enable(int slot)
-{
- u32 socket_status;
- u16 brg_ctrl;
- int is_82365sl;
-
- socket_status = readl(socket_base+8);
-
- if ((socket_status & 6) == 0) {
-
- switch (socket_status & 0x3c00) {
-
- case 0x400:
- printf("5V ");
- voltage_set(slot, 50, 0);
- break;
- case 0x800:
- voltage_set(slot, 33, 0);
- break;
- case 0xc00:
- voltage_set(slot, 33, 0);
- break;
- default:
- voltage_set(slot, 0, 0);
- break;
- }
- } else {
- voltage_set(slot, 0, 0);
- }
-
- pci_read_config_word(devbusfn, PCI_BRIDGE_CONTROL, &brg_ctrl);
- brg_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
- pci_write_config_word(devbusfn, PCI_BRIDGE_CONTROL, brg_ctrl);
- is_82365sl = ((readb(socket_base+0x800) & 0x0f) == 2);
- writeb(is_82365sl?0x90:0x98, socket_base+0x802);
- writeb(0x67, socket_base+0x803);
- udelay(100000);
-#if 0
- printf("ExCA Id %02x, Card Status %02x, Power config %02x, Interrupt Config %02x, bridge control %04x %d\n",
- readb(socket_base+0x800), readb(socket_base+0x801),
- readb(socket_base+0x802), readb(socket_base+0x803), brg_ctrl, is_82365sl);
-#endif
-
- return ((readb(socket_base+0x801)&0x6c)==0x6c)?0:1;
-}
-
-
-static int hardware_disable(int slot)
-{
- voltage_set(slot, 0, 0);
- return 0;
-}
-
-static void print_funcid(int func)
-{
- puts(indent);
- switch (func) {
- case CISTPL_FUNCID_MULTI:
- puts(" Multi-Function");
- break;
- case CISTPL_FUNCID_MEMORY:
- puts(" Memory");
- break;
- case CISTPL_FUNCID_SERIAL:
- puts(" Serial Port");
- break;
- case CISTPL_FUNCID_PARALLEL:
- puts(" Parallel Port");
- break;
- case CISTPL_FUNCID_FIXED:
- puts(" Fixed Disk");
- break;
- case CISTPL_FUNCID_VIDEO:
- puts(" Video Adapter");
- break;
- case CISTPL_FUNCID_NETWORK:
- puts(" Network Adapter");
- break;
- case CISTPL_FUNCID_AIMS:
- puts(" AIMS Card");
- break;
- case CISTPL_FUNCID_SCSI:
- puts(" SCSI Adapter");
- break;
- default:
- puts(" Unknown");
- break;
- }
- puts(" Card\n");
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void print_fixed(volatile char *p)
-{
- if (p == NULL)
- return;
-
- puts(indent);
-
- switch (*p) {
- case CISTPL_FUNCE_IDE_IFACE:
- { uchar iface = *(p+2);
-
- puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown");
- puts (" interface ");
- break;
- }
- case CISTPL_FUNCE_IDE_MASTER:
- case CISTPL_FUNCE_IDE_SLAVE:
- {
- uchar f1 = *(p+2);
- uchar f2 = *(p+4);
-
- puts((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]");
-
- if (f1 & CISTPL_IDE_UNIQUE) {
- puts(" [unique]");
- }
-
- puts((f1 & CISTPL_IDE_DUAL) ? " [dual]" : " [single]");
-
- if (f2 & CISTPL_IDE_HAS_SLEEP) {
- puts(" [sleep]");
- }
-
- if (f2 & CISTPL_IDE_HAS_STANDBY) {
- puts(" [standby]");
- }
-
- if (f2 & CISTPL_IDE_HAS_IDLE) {
- puts(" [idle]");
- }
-
- if (f2 & CISTPL_IDE_LOW_POWER) {
- puts(" [low power]");
- }
-
- if (f2 & CISTPL_IDE_REG_INHIBIT) {
- puts(" [reg inhibit]");
- }
-
- if (f2 & CISTPL_IDE_HAS_INDEX) {
- puts(" [index]");
- }
-
- if (f2 & CISTPL_IDE_IOIS16) {
- puts(" [IOis16]");
- }
-
- break;
- }
- }
- putc('\n');
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define MAX_IDENT_CHARS 64
-#define MAX_IDENT_FIELDS 4
-
-static char *known_cards[] = {
- "ARGOSY PnPIDE D5",
- NULL
-};
-
-static int identify(volatile char *p)
-{
- char id_str[MAX_IDENT_CHARS];
- char data;
- char *t;
- char **card;
- int i, done;
-
- if (p == NULL)
- return (0); /* Don't know */
-
- t = id_str;
- done =0;
-
- for (i=0; i<=4 && !done; ++i, p+=2) {
- while ((data = *p) != '\0') {
- if (data == 0xFF) {
- done = 1;
- break;
- }
- *t++ = data;
- if (t == &id_str[MAX_IDENT_CHARS-1]) {
- done = 1;
- break;
- }
- p += 2;
- }
- if (!done)
- *t++ = ' ';
- }
- *t = '\0';
- while (--t > id_str) {
- if (*t == ' ') {
- *t = '\0';
- } else {
- break;
- }
- }
- puts(id_str);
- putc('\n');
-
- for (card=known_cards; *card; ++card) {
- debug ("## Compare against \"%s\"\n", *card);
- if (strcmp(*card, id_str) == 0) { /* found! */
- debug ("## CARD FOUND ##\n");
- return 1;
- }
- }
-
- return 0; /* don't know */
-}
-
-#endif /* CONFIG_CMD_PCMCIA */
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 7841554..98f2a1b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -41,6 +41,24 @@
This select a dummy sandbox PHY driver. It used only to implement
the unit tests for the phy framework
+config NOP_PHY
+ bool "NOP PHY driver"
+ depends on PHY
+ help
+ Support for a no-op PHY driver (stubbed PHY driver).
+
+ This is useful when a driver uses the PHY framework but no real PHY
+ hardware exists.
+
+config SPL_NOP_PHY
+ bool "NOP PHY driver in SPL"
+ depends on SPL_PHY
+ help
+ Support for a no-op PHY driver (stubbed PHY driver) in the SPL.
+
+ This is useful when a driver uses the PHY framework but no real PHY
+ hardware exists.
+
config PIPE3_PHY
bool "Support omap's PIPE3 PHY"
depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 6ce96d2..ab56c46 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -6,5 +6,6 @@
#
obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
+obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c
new file mode 100644
index 0000000..2201cc3
--- /dev/null
+++ b/drivers/phy/nop-phy.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ * Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <generic-phy.h>
+
+static const struct udevice_id nop_phy_ids[] = {
+ { .compatible = "nop-phy" },
+ { }
+};
+
+static struct phy_ops nop_phy_ops = {
+};
+
+U_BOOT_DRIVER(nop_phy) = {
+ .name = "nop_phy",
+ .id = UCLASS_PHY,
+ .of_match = nop_phy_ids,
+ .ops = &nop_phy_ops,
+};
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index d8b8d58..68e518f 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -45,6 +45,7 @@
debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy);
assert(phy);
+ phy->dev = NULL;
ret = dev_read_phandle_with_args(dev, "phys", "#phy-cells", 0, index,
&args);
if (ret) {
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 4ab0b3a..bcbe4a1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -60,7 +60,7 @@
framework.
config SPL_PINCTRL
- bool "Support pin controlloers in SPL"
+ bool "Support pin controllers in SPL"
depends on SPL && SPL_DM
help
This option is an SPL-variant of the PINCTRL option.
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index 3c9ae97..a21b640 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -496,16 +496,18 @@
(GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(6)) |
(GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(7)));
+ rk_clrsetreg(&grf->gpio4bl_iomux,
+ GPIO4B1_MASK << GPIO4B1_SHIFT,
+ GPIO4B1_MAC_TXCLK << GPIO4B1_SHIFT);
+
/* switch GPIO4B1 to 12ma drive-strength */
rk_clrsetreg(&grf->gpio1_e[3][1],
GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(1),
GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(1));
- /* Set pull normal for GPIO4B1, pull up for GPIO4B0 */
+ /* Set pull normal for GPIO4B1 */
rk_clrsetreg(&grf->gpio1_p[3][1],
- (GPIO_PULL_MASK << GPIO_PULL_SHIFT(0)) |
(GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)),
- (GPIO_PULL_UP << GPIO_PULL_SHIFT(0)) |
(GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)));
break;
@@ -727,7 +729,7 @@
value |= (mask << (shift + 16)) | (muxval << shift);
writel(value, addr);
- /* Handle pullup/pulldown */
+ /* Handle pullup/pulldown/drive-strength */
if (flags) {
uint val = 0;
@@ -735,10 +737,15 @@
val = 1;
else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
val = 2;
+ else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
+ val = 3;
+
shift = (index & 7) * 2;
ind = index >> 3;
if (banknum == 0)
addr = &priv->pmu->gpio0pull[ind];
+ else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
+ addr = &priv->grf->gpio1_e[banknum - 1][ind];
else
addr = &priv->grf->gpio1_p[banknum - 1][ind];
debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
@@ -777,6 +784,9 @@
if (flags < 0)
return flags;
+ if (fdtdec_get_int(blob, pcfg_node, "drive-strength", 0) == 12)
+ flags |= 1 << PIN_CONFIG_DRIVE_STRENGTH;
+
ret = rk3288_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
flags);
if (ret)
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
index bdf0758..81ce2e3 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
@@ -1,8 +1,11 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
* Author: Andy Yan <andy.yan@rock-chips.com>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
+
#include <common.h>
#include <dm.h>
#include <errno.h>
@@ -16,6 +19,428 @@
DECLARE_GLOBAL_DATA_PTR;
+/* PMUGRF_GPIO0B_IOMUX */
+enum {
+ GPIO0B5_SHIFT = 10,
+ GPIO0B5_MASK = GENMASK(GPIO0B5_SHIFT + 1, GPIO0B5_SHIFT),
+ GPIO0B5_GPIO = 0,
+ GPIO0B5_SPI2_CSN0 = (2 << GPIO0B5_SHIFT),
+
+ GPIO0B4_SHIFT = 8,
+ GPIO0B4_MASK = GENMASK(GPIO0B4_SHIFT + 1, GPIO0B4_SHIFT),
+ GPIO0B4_GPIO = 0,
+ GPIO0B4_SPI2_CLK = (2 << GPIO0B4_SHIFT),
+
+ GPIO0B3_SHIFT = 6,
+ GPIO0B3_MASK = GENMASK(GPIO0B3_SHIFT + 1, GPIO0B3_SHIFT),
+ GPIO0B3_GPIO = 0,
+ GPIO0B3_SPI2_TXD = (2 << GPIO0B3_SHIFT),
+
+ GPIO0B2_SHIFT = 4,
+ GPIO0B2_MASK = GENMASK(GPIO0B2_SHIFT + 1, GPIO0B2_SHIFT),
+ GPIO0B2_GPIO = 0,
+ GPIO0B2_SPI2_RXD = (2 << GPIO0B2_SHIFT),
+};
+
+/*GRF_GPIO0C_IOMUX*/
+enum {
+ GPIO0C7_SHIFT = 14,
+ GPIO0C7_MASK = GENMASK(GPIO0C7_SHIFT + 1, GPIO0C7_SHIFT),
+ GPIO0C7_GPIO = 0,
+ GPIO0C7_LCDC_D19 = (1 << GPIO0C7_SHIFT),
+ GPIO0C7_TRACE_D9 = (2 << GPIO0C7_SHIFT),
+ GPIO0C7_UART1_RTSN = (3 << GPIO0C7_SHIFT),
+
+ GPIO0C6_SHIFT = 12,
+ GPIO0C6_MASK = GENMASK(GPIO0C6_SHIFT + 1, GPIO0C6_SHIFT),
+ GPIO0C6_GPIO = 0,
+ GPIO0C6_LCDC_D18 = (1 << GPIO0C6_SHIFT),
+ GPIO0C6_TRACE_D8 = (2 << GPIO0C6_SHIFT),
+ GPIO0C6_UART1_CTSN = (3 << GPIO0C6_SHIFT),
+
+ GPIO0C5_SHIFT = 10,
+ GPIO0C5_MASK = GENMASK(GPIO0C5_SHIFT + 1, GPIO0C5_SHIFT),
+ GPIO0C5_GPIO = 0,
+ GPIO0C5_LCDC_D17 = (1 << GPIO0C5_SHIFT),
+ GPIO0C5_TRACE_D7 = (2 << GPIO0C5_SHIFT),
+ GPIO0C5_UART1_SOUT = (3 << GPIO0C5_SHIFT),
+
+ GPIO0C4_SHIFT = 8,
+ GPIO0C4_MASK = GENMASK(GPIO0C4_SHIFT + 1, GPIO0C4_SHIFT),
+ GPIO0C4_GPIO = 0,
+ GPIO0C4_LCDC_D16 = (1 << GPIO0C4_SHIFT),
+ GPIO0C4_TRACE_D6 = (2 << GPIO0C4_SHIFT),
+ GPIO0C4_UART1_SIN = (3 << GPIO0C4_SHIFT),
+
+ GPIO0C3_SHIFT = 6,
+ GPIO0C3_MASK = GENMASK(GPIO0C3_SHIFT + 1, GPIO0C3_SHIFT),
+ GPIO0C3_GPIO = 0,
+ GPIO0C3_LCDC_D15 = (1 << GPIO0C3_SHIFT),
+ GPIO0C3_TRACE_D5 = (2 << GPIO0C3_SHIFT),
+ GPIO0C3_MCU_JTAG_TDO = (3 << GPIO0C3_SHIFT),
+
+ GPIO0C2_SHIFT = 4,
+ GPIO0C2_MASK = GENMASK(GPIO0C2_SHIFT + 1, GPIO0C2_SHIFT),
+ GPIO0C2_GPIO = 0,
+ GPIO0C2_LCDC_D14 = (1 << GPIO0C2_SHIFT),
+ GPIO0C2_TRACE_D4 = (2 << GPIO0C2_SHIFT),
+ GPIO0C2_MCU_JTAG_TDI = (3 << GPIO0C2_SHIFT),
+
+ GPIO0C1_SHIFT = 2,
+ GPIO0C1_MASK = GENMASK(GPIO0C1_SHIFT + 1, GPIO0C1_SHIFT),
+ GPIO0C1_GPIO = 0,
+ GPIO0C1_LCDC_D13 = (1 << GPIO0C1_SHIFT),
+ GPIO0C1_TRACE_D3 = (2 << GPIO0C1_SHIFT),
+ GPIO0C1_MCU_JTAG_TRTSN = (3 << GPIO0C1_SHIFT),
+
+ GPIO0C0_SHIFT = 0,
+ GPIO0C0_MASK = GENMASK(GPIO0C0_SHIFT + 1, GPIO0C0_SHIFT),
+ GPIO0C0_GPIO = 0,
+ GPIO0C0_LCDC_D12 = (1 << GPIO0C0_SHIFT),
+ GPIO0C0_TRACE_D2 = (2 << GPIO0C0_SHIFT),
+ GPIO0C0_MCU_JTAG_TDO = (3 << GPIO0C0_SHIFT),
+};
+
+/*GRF_GPIO0D_IOMUX*/
+enum {
+ GPIO0D7_SHIFT = 14,
+ GPIO0D7_MASK = GENMASK(GPIO0D7_SHIFT + 1, GPIO0D7_SHIFT),
+ GPIO0D7_GPIO = 0,
+ GPIO0D7_LCDC_DCLK = (1 << GPIO0D7_SHIFT),
+ GPIO0D7_TRACE_CTL = (2 << GPIO0D7_SHIFT),
+ GPIO0D7_PMU_DEBUG5 = (3 << GPIO0D7_SHIFT),
+
+ GPIO0D6_SHIFT = 12,
+ GPIO0D6_MASK = GENMASK(GPIO0D6_SHIFT + 1, GPIO0D6_SHIFT),
+ GPIO0D6_GPIO = 0,
+ GPIO0D6_LCDC_DEN = (1 << GPIO0D6_SHIFT),
+ GPIO0D6_TRACE_CLK = (2 << GPIO0D6_SHIFT),
+ GPIO0D6_PMU_DEBUG4 = (3 << GPIO0D6_SHIFT),
+
+ GPIO0D5_SHIFT = 10,
+ GPIO0D5_MASK = GENMASK(GPIO0D5_SHIFT + 1, GPIO0D5_SHIFT),
+ GPIO0D5_GPIO = 0,
+ GPIO0D5_LCDC_VSYNC = (1 << GPIO0D5_SHIFT),
+ GPIO0D5_TRACE_D15 = (2 << GPIO0D5_SHIFT),
+ GPIO0D5_PMU_DEBUG3 = (3 << GPIO0D5_SHIFT),
+
+ GPIO0D4_SHIFT = 8,
+ GPIO0D4_MASK = GENMASK(GPIO0D4_SHIFT + 1, GPIO0D4_SHIFT),
+ GPIO0D4_GPIO = 0,
+ GPIO0D4_LCDC_HSYNC = (1 << GPIO0D4_SHIFT),
+ GPIO0D4_TRACE_D14 = (2 << GPIO0D4_SHIFT),
+ GPIO0D4_PMU_DEBUG2 = (3 << GPIO0D4_SHIFT),
+
+ GPIO0D3_SHIFT = 6,
+ GPIO0D3_MASK = GENMASK(GPIO0D3_SHIFT + 1, GPIO0D3_SHIFT),
+ GPIO0D3_GPIO = 0,
+ GPIO0D3_LCDC_D23 = (1 << GPIO0D3_SHIFT),
+ GPIO0D3_TRACE_D13 = (2 << GPIO0D3_SHIFT),
+ GPIO0D3_UART4_SIN = (3 << GPIO0D3_SHIFT),
+
+ GPIO0D2_SHIFT = 4,
+ GPIO0D2_MASK = GENMASK(GPIO0D2_SHIFT + 1, GPIO0D2_SHIFT),
+ GPIO0D2_GPIO = 0,
+ GPIO0D2_LCDC_D22 = (1 << GPIO0D2_SHIFT),
+ GPIO0D2_TRACE_D12 = (2 << GPIO0D2_SHIFT),
+ GPIO0D2_UART4_SOUT = (3 << GPIO0D2_SHIFT),
+
+ GPIO0D1_SHIFT = 2,
+ GPIO0D1_MASK = GENMASK(GPIO0D1_SHIFT + 1, GPIO0D1_SHIFT),
+ GPIO0D1_GPIO = 0,
+ GPIO0D1_LCDC_D21 = (1 << GPIO0D1_SHIFT),
+ GPIO0D1_TRACE_D11 = (2 << GPIO0D1_SHIFT),
+ GPIO0D1_UART4_RTSN = (3 << GPIO0D1_SHIFT),
+
+ GPIO0D0_SHIFT = 0,
+ GPIO0D0_MASK = GENMASK(GPIO0D0_SHIFT + 1, GPIO0D0_SHIFT),
+ GPIO0D0_GPIO = 0,
+ GPIO0D0_LCDC_D20 = (1 << GPIO0D0_SHIFT),
+ GPIO0D0_TRACE_D10 = (2 << GPIO0D0_SHIFT),
+ GPIO0D0_UART4_CTSN = (3 << GPIO0D0_SHIFT),
+};
+
+/*GRF_GPIO2A_IOMUX*/
+enum {
+ GPIO2A7_SHIFT = 14,
+ GPIO2A7_MASK = GENMASK(GPIO2A7_SHIFT + 1, GPIO2A7_SHIFT),
+ GPIO2A7_GPIO = 0,
+ GPIO2A7_SDMMC0_D2 = (1 << GPIO2A7_SHIFT),
+ GPIO2A7_JTAG_TCK = (2 << GPIO2A7_SHIFT),
+
+ GPIO2A6_SHIFT = 12,
+ GPIO2A6_MASK = GENMASK(GPIO2A6_SHIFT + 1, GPIO2A6_SHIFT),
+ GPIO2A6_GPIO = 0,
+ GPIO2A6_SDMMC0_D1 = (1 << GPIO2A6_SHIFT),
+ GPIO2A6_UART2_SIN = (2 << GPIO2A6_SHIFT),
+
+ GPIO2A5_SHIFT = 10,
+ GPIO2A5_MASK = GENMASK(GPIO2A5_SHIFT + 1, GPIO2A5_SHIFT),
+ GPIO2A5_GPIO = 0,
+ GPIO2A5_SDMMC0_D0 = (1 << GPIO2A5_SHIFT),
+ GPIO2A5_UART2_SOUT = (2 << GPIO2A5_SHIFT),
+
+ GPIO2A4_SHIFT = 8,
+ GPIO2A4_MASK = GENMASK(GPIO2A4_SHIFT + 1, GPIO2A4_SHIFT),
+ GPIO2A4_GPIO = 0,
+ GPIO2A4_FLASH_DQS = (1 << GPIO2A4_SHIFT),
+ GPIO2A4_EMMC_CLKOUT = (2 << GPIO2A4_SHIFT),
+
+ GPIO2A3_SHIFT = 6,
+ GPIO2A3_MASK = GENMASK(GPIO2A3_SHIFT + 1, GPIO2A3_SHIFT),
+ GPIO2A3_GPIO = 0,
+ GPIO2A3_FLASH_CSN3 = (1 << GPIO2A3_SHIFT),
+ GPIO2A3_EMMC_RSTNOUT = (2 << GPIO2A3_SHIFT),
+
+ GPIO2A2_SHIFT = 4,
+ GPIO2A2_MASK = GENMASK(GPIO2A2_SHIFT + 1, GPIO2A2_SHIFT),
+ GPIO2A2_GPIO = 0,
+ GPIO2A2_FLASH_CSN2 = (1 << GPIO2A2_SHIFT),
+
+ GPIO2A1_SHIFT = 2,
+ GPIO2A1_MASK = GENMASK(GPIO2A1_SHIFT + 1, GPIO2A1_SHIFT),
+ GPIO2A1_GPIO = 0,
+ GPIO2A1_FLASH_CSN1 = (1 << GPIO2A1_SHIFT),
+
+ GPIO2A0_SHIFT = 0,
+ GPIO2A0_MASK = GENMASK(GPIO2A0_SHIFT + 1, GPIO2A0_SHIFT),
+ GPIO2A0_GPIO = 0,
+ GPIO2A0_FLASH_CSN0 = (1 << GPIO2A0_SHIFT),
+};
+
+/*GRF_GPIO2D_IOMUX*/
+enum {
+ GPIO2D7_SHIFT = 14,
+ GPIO2D7_MASK = GENMASK(GPIO2D7_SHIFT + 1, GPIO2D7_SHIFT),
+ GPIO2D7_GPIO = 0,
+ GPIO2D7_SDIO0_D3 = (1 << GPIO2D7_SHIFT),
+
+ GPIO2D6_SHIFT = 12,
+ GPIO2D6_MASK = GENMASK(GPIO2D6_SHIFT + 1, GPIO2D6_SHIFT),
+ GPIO2D6_GPIO = 0,
+ GPIO2D6_SDIO0_D2 = (1 << GPIO2D6_SHIFT),
+
+ GPIO2D5_SHIFT = 10,
+ GPIO2D5_MASK = GENMASK(GPIO2D5_SHIFT + 1, GPIO2D5_SHIFT),
+ GPIO2D5_GPIO = 0,
+ GPIO2D5_SDIO0_D1 = (1 << GPIO2D5_SHIFT),
+
+ GPIO2D4_SHIFT = 8,
+ GPIO2D4_MASK = GENMASK(GPIO2D4_SHIFT + 1, GPIO2D4_SHIFT),
+ GPIO2D4_GPIO = 0,
+ GPIO2D4_SDIO0_D0 = (1 << GPIO2D4_SHIFT),
+
+ GPIO2D3_SHIFT = 6,
+ GPIO2D3_MASK = GENMASK(GPIO2D3_SHIFT + 1, GPIO2D3_SHIFT),
+ GPIO2D3_GPIO = 0,
+ GPIO2D3_UART0_RTS0 = (1 << GPIO2D3_SHIFT),
+
+ GPIO2D2_SHIFT = 4,
+ GPIO2D2_MASK = GENMASK(GPIO2D2_SHIFT + 1, GPIO2D2_SHIFT),
+ GPIO2D2_GPIO = 0,
+ GPIO2D2_UART0_CTS0 = (1 << GPIO2D2_SHIFT),
+
+ GPIO2D1_SHIFT = 2,
+ GPIO2D1_MASK = GENMASK(GPIO2D1_SHIFT + 1, GPIO2D1_SHIFT),
+ GPIO2D1_GPIO = 0,
+ GPIO2D1_UART0_SOUT = (1 << GPIO2D1_SHIFT),
+
+ GPIO2D0_SHIFT = 0,
+ GPIO2D0_MASK = GENMASK(GPIO2D0_SHIFT + 1, GPIO2D0_SHIFT),
+ GPIO2D0_GPIO = 0,
+ GPIO2D0_UART0_SIN = (1 << GPIO2D0_SHIFT),
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+ GPIO1B7_SHIFT = 14,
+ GPIO1B7_MASK = GENMASK(GPIO1B7_SHIFT + 1, GPIO1B7_SHIFT),
+ GPIO1B7_GPIO = 0,
+ GPIO1B7_SPI1_CSN0 = (2 << GPIO1B7_SHIFT),
+
+ GPIO1B6_SHIFT = 12,
+ GPIO1B6_MASK = GENMASK(GPIO1B6_SHIFT + 1, GPIO1B6_SHIFT),
+ GPIO1B6_GPIO = 0,
+ GPIO1B6_SPI1_CLK = (2 << GPIO1B6_SHIFT),
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+ GPIO1C7_SHIFT = 14,
+ GPIO1C7_MASK = GENMASK(GPIO1C7_SHIFT + 1, GPIO1C7_SHIFT),
+ GPIO1C7_GPIO = 0,
+ GPIO1C7_EMMC_DATA5 = (2 << GPIO1C7_SHIFT),
+ GPIO1C7_SPI0_TXD = (3 << GPIO1C7_SHIFT),
+
+ GPIO1C6_SHIFT = 12,
+ GPIO1C6_MASK = GENMASK(GPIO1C6_SHIFT + 1, GPIO1C6_SHIFT),
+ GPIO1C6_GPIO = 0,
+ GPIO1C6_EMMC_DATA4 = (2 << GPIO1C6_SHIFT),
+ GPIO1C6_SPI0_RXD = (3 << GPIO1C6_SHIFT),
+
+ GPIO1C5_SHIFT = 10,
+ GPIO1C5_MASK = GENMASK(GPIO1C5_SHIFT + 1, GPIO1C5_SHIFT),
+ GPIO1C5_GPIO = 0,
+ GPIO1C5_EMMC_DATA3 = (2 << GPIO1C5_SHIFT),
+
+ GPIO1C4_SHIFT = 8,
+ GPIO1C4_MASK = GENMASK(GPIO1C4_SHIFT + 1, GPIO1C4_SHIFT),
+ GPIO1C4_GPIO = 0,
+ GPIO1C4_EMMC_DATA2 = (2 << GPIO1C4_SHIFT),
+
+ GPIO1C3_SHIFT = 6,
+ GPIO1C3_MASK = GENMASK(GPIO1C3_SHIFT + 1, GPIO1C3_SHIFT),
+ GPIO1C3_GPIO = 0,
+ GPIO1C3_EMMC_DATA1 = (2 << GPIO1C3_SHIFT),
+
+ GPIO1C2_SHIFT = 4,
+ GPIO1C2_MASK = GENMASK(GPIO1C2_SHIFT + 1, GPIO1C2_SHIFT),
+ GPIO1C2_GPIO = 0,
+ GPIO1C2_EMMC_DATA0 = (2 << GPIO1C2_SHIFT),
+
+ GPIO1C1_SHIFT = 2,
+ GPIO1C1_MASK = GENMASK(GPIO1C1_SHIFT + 1, GPIO1C1_SHIFT),
+ GPIO1C1_GPIO = 0,
+ GPIO1C1_SPI1_RXD = (2 << GPIO1C1_SHIFT),
+
+ GPIO1C0_SHIFT = 0,
+ GPIO1C0_MASK = GENMASK(GPIO1C0_SHIFT + 1, GPIO1C0_SHIFT),
+ GPIO1C0_GPIO = 0,
+ GPIO1C0_SPI1_TXD = (2 << GPIO1C0_SHIFT),
+};
+
+/* GRF_GPIO1D_IOMUX*/
+enum {
+ GPIO1D5_SHIFT = 10,
+ GPIO1D5_MASK = GENMASK(GPIO1D5_SHIFT + 1, GPIO1D5_SHIFT),
+ GPIO1D5_GPIO = 0,
+ GPIO1D5_SPI0_CLK = (2 << GPIO1D5_SHIFT),
+
+ GPIO1D3_SHIFT = 6,
+ GPIO1D3_MASK = GENMASK(GPIO1D3_SHIFT + 1, GPIO1D3_SHIFT),
+ GPIO1D3_GPIO = 0,
+ GPIO1D3_EMMC_PWREN = (2 << GPIO1D3_SHIFT),
+
+ GPIO1D2_SHIFT = 4,
+ GPIO1D2_MASK = GENMASK(GPIO1D2_SHIFT + 1, GPIO1D2_SHIFT),
+ GPIO1D2_GPIO = 0,
+ GPIO1D2_EMMC_CMD = (2 << GPIO1D2_SHIFT),
+
+ GPIO1D1_SHIFT = 2,
+ GPIO1D1_MASK = GENMASK(GPIO1D1_SHIFT + 1, GPIO1D1_SHIFT),
+ GPIO1D1_GPIO = 0,
+ GPIO1D1_EMMC_DATA7 = (2 << GPIO1D1_SHIFT),
+ GPIO1D1_SPI0_CSN1 = (3 << GPIO1D1_SHIFT),
+
+ GPIO1D0_SHIFT = 0,
+ GPIO1D0_MASK = GENMASK(GPIO1D0_SHIFT + 1, GPIO1D0_SHIFT),
+ GPIO1D0_GPIO = 0,
+ GPIO1D0_EMMC_DATA6 = (2 << GPIO1D0_SHIFT),
+ GPIO1D0_SPI0_CSN0 = (3 << GPIO1D0_SHIFT),
+};
+
+
+/*GRF_GPIO3B_IOMUX*/
+enum {
+ GPIO3B7_SHIFT = 14,
+ GPIO3B7_MASK = GENMASK(GPIO3B7_SHIFT + 1, GPIO3B7_SHIFT),
+ GPIO3B7_GPIO = 0,
+ GPIO3B7_MAC_RXD0 = (1 << GPIO3B7_SHIFT),
+
+ GPIO3B6_SHIFT = 12,
+ GPIO3B6_MASK = GENMASK(GPIO3B6_SHIFT + 1, GPIO3B6_SHIFT),
+ GPIO3B6_GPIO = 0,
+ GPIO3B6_MAC_TXD3 = (1 << GPIO3B6_SHIFT),
+
+ GPIO3B5_SHIFT = 10,
+ GPIO3B5_MASK = GENMASK(GPIO3B5_SHIFT + 1, GPIO3B5_SHIFT),
+ GPIO3B5_GPIO = 0,
+ GPIO3B5_MAC_TXEN = (1 << GPIO3B5_SHIFT),
+
+ GPIO3B4_SHIFT = 8,
+ GPIO3B4_MASK = GENMASK(GPIO3B4_SHIFT + 1, GPIO3B4_SHIFT),
+ GPIO3B4_GPIO = 0,
+ GPIO3B4_MAC_COL = (1 << GPIO3B4_SHIFT),
+
+ GPIO3B3_SHIFT = 6,
+ GPIO3B3_MASK = GENMASK(GPIO3B3_SHIFT + 1, GPIO3B3_SHIFT),
+ GPIO3B3_GPIO = 0,
+ GPIO3B3_MAC_CRS = (1 << GPIO3B3_SHIFT),
+
+ GPIO3B2_SHIFT = 4,
+ GPIO3B2_MASK = GENMASK(GPIO3B2_SHIFT + 1, GPIO3B2_SHIFT),
+ GPIO3B2_GPIO = 0,
+ GPIO3B2_MAC_TXD2 = (1 << GPIO3B2_SHIFT),
+
+ GPIO3B1_SHIFT = 2,
+ GPIO3B1_MASK = GENMASK(GPIO3B1_SHIFT + 1, GPIO3B1_SHIFT),
+ GPIO3B1_GPIO = 0,
+ GPIO3B1_MAC_TXD1 = (1 << GPIO3B1_SHIFT),
+
+ GPIO3B0_SHIFT = 0,
+ GPIO3B0_MASK = GENMASK(GPIO3B0_SHIFT + 1, GPIO3B0_SHIFT),
+ GPIO3B0_GPIO = 0,
+ GPIO3B0_MAC_TXD0 = (1 << GPIO3B0_SHIFT),
+ GPIO3B0_PWM0 = (2 << GPIO3B0_SHIFT),
+};
+
+/*GRF_GPIO3C_IOMUX*/
+enum {
+ GPIO3C6_SHIFT = 12,
+ GPIO3C6_MASK = GENMASK(GPIO3C6_SHIFT + 1, GPIO3C6_SHIFT),
+ GPIO3C6_GPIO = 0,
+ GPIO3C6_MAC_CLK = (1 << GPIO3C6_SHIFT),
+
+ GPIO3C5_SHIFT = 10,
+ GPIO3C5_MASK = GENMASK(GPIO3C5_SHIFT + 1, GPIO3C5_SHIFT),
+ GPIO3C5_GPIO = 0,
+ GPIO3C5_MAC_RXEN = (1 << GPIO3C5_SHIFT),
+
+ GPIO3C4_SHIFT = 8,
+ GPIO3C4_MASK = GENMASK(GPIO3C4_SHIFT + 1, GPIO3C4_SHIFT),
+ GPIO3C4_GPIO = 0,
+ GPIO3C4_MAC_RXDV = (1 << GPIO3C4_SHIFT),
+
+ GPIO3C3_SHIFT = 6,
+ GPIO3C3_MASK = GENMASK(GPIO3C3_SHIFT + 1, GPIO3C3_SHIFT),
+ GPIO3C3_GPIO = 0,
+ GPIO3C3_MAC_MDC = (1 << GPIO3C3_SHIFT),
+
+ GPIO3C2_SHIFT = 4,
+ GPIO3C2_MASK = GENMASK(GPIO3C2_SHIFT + 1, GPIO3C2_SHIFT),
+ GPIO3C2_GPIO = 0,
+ GPIO3C2_MAC_RXD3 = (1 << GPIO3C2_SHIFT),
+
+ GPIO3C1_SHIFT = 2,
+ GPIO3C1_MASK = GENMASK(GPIO3C1_SHIFT + 1, GPIO3C1_SHIFT),
+ GPIO3C1_GPIO = 0,
+ GPIO3C1_MAC_RXD2 = (1 << GPIO3C1_SHIFT),
+
+ GPIO3C0_SHIFT = 0,
+ GPIO3C0_MASK = GENMASK(GPIO3C0_SHIFT + 1, GPIO3C0_SHIFT),
+ GPIO3C0_GPIO = 0,
+ GPIO3C0_MAC_RXD1 = (1 << GPIO3C0_SHIFT),
+};
+
+/*GRF_GPIO3D_IOMUX*/
+enum {
+ GPIO3D4_SHIFT = 8,
+ GPIO3D4_MASK = GENMASK(GPIO3D4_SHIFT + 1, GPIO3D4_SHIFT),
+ GPIO3D4_GPIO = 0,
+ GPIO3D4_MAC_TXCLK = (1 << GPIO3D4_SHIFT),
+ GPIO3D4_SPI1_CNS1 = (2 << GPIO3D4_SHIFT),
+
+ GPIO3D1_SHIFT = 2,
+ GPIO3D1_MASK = GENMASK(GPIO3D1_SHIFT + 1, GPIO3D1_SHIFT),
+ GPIO3D1_GPIO = 0,
+ GPIO3D1_MAC_RXCLK = (1 << GPIO3D1_SHIFT),
+
+ GPIO3D0_SHIFT = 0,
+ GPIO3D0_MASK = GENMASK(GPIO3D0_SHIFT + 1, GPIO3D0_SHIFT),
+ GPIO3D0_GPIO = 0,
+ GPIO3D0_MAC_MDIO = (1 << GPIO3D0_SHIFT),
+};
+
struct rk3368_pinctrl_priv {
struct rk3368_grf *grf;
struct rk3368_pmu_grf *pmugrf;
@@ -31,8 +456,7 @@
case PERIPH_ID_UART2:
rk_clrsetreg(&grf->gpio2a_iomux,
GPIO2A6_MASK | GPIO2A5_MASK,
- GPIO2A6_UART2_SIN << GPIO2A6_SHIFT |
- GPIO2A5_UART2_SOUT << GPIO2A5_SHIFT);
+ GPIO2A6_UART2_SIN | GPIO2A5_UART2_SOUT);
break;
case PERIPH_ID_UART0:
break;
@@ -44,10 +468,8 @@
rk_clrsetreg(&pmugrf->gpio0d_iomux,
GPIO0D0_MASK | GPIO0D1_MASK |
GPIO0D2_MASK | GPIO0D3_MASK,
- GPIO0D0_GPIO << GPIO0D0_SHIFT |
- GPIO0D1_GPIO << GPIO0D1_SHIFT |
- GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
- GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
+ GPIO0D0_GPIO | GPIO0D1_GPIO |
+ GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
break;
default:
debug("uart id = %d iomux error!\n", uart_id);
@@ -55,6 +477,121 @@
}
}
+static void pinctrl_rk3368_spi_config(struct rk3368_pinctrl_priv *priv,
+ int spi_id)
+{
+ struct rk3368_grf *grf = priv->grf;
+ struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
+
+ switch (spi_id) {
+ case PERIPH_ID_SPI0:
+ /*
+ * eMMC can only be connected with 4 bits, when SPI0 is used.
+ * This is all-or-nothing, so we assume that if someone asks us
+ * to configure SPI0, that their eMMC interface is unused or
+ * configured appropriately.
+ */
+ rk_clrsetreg(&grf->gpio1d_iomux,
+ GPIO1D0_MASK | GPIO1D1_MASK |
+ GPIO1D5_MASK,
+ GPIO1D0_SPI0_CSN0 | GPIO1D1_SPI0_CSN1 |
+ GPIO1D5_SPI0_CLK);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C6_MASK | GPIO1C7_MASK,
+ GPIO1C6_SPI0_RXD | GPIO1C7_SPI0_TXD);
+ break;
+ case PERIPH_ID_SPI1:
+ /*
+ * We don't implement support for configuring SPI1_CSN#1, as it
+ * conflicts with the GMAC (MAC TX clk-out).
+ */
+ rk_clrsetreg(&grf->gpio1b_iomux,
+ GPIO1B6_MASK | GPIO1B7_MASK,
+ GPIO1B6_SPI1_CLK | GPIO1B7_SPI1_CSN0);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C0_MASK | GPIO1C1_MASK,
+ GPIO1C0_SPI1_TXD | GPIO1C1_SPI1_RXD);
+ break;
+ case PERIPH_ID_SPI2:
+ rk_clrsetreg(&pmugrf->gpio0b_iomux,
+ GPIO0B2_MASK | GPIO0B3_MASK |
+ GPIO0B4_MASK | GPIO0B5_MASK,
+ GPIO0B2_SPI2_RXD | GPIO0B3_SPI2_TXD |
+ GPIO0B4_SPI2_CLK | GPIO0B5_SPI2_CSN0);
+ break;
+ default:
+ debug("%s: spi id = %d iomux error!\n", __func__, spi_id);
+ break;
+ }
+}
+
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+static void pinctrl_rk3368_gmac_config(struct rk3368_grf *grf, int gmac_id)
+{
+ rk_clrsetreg(&grf->gpio3b_iomux,
+ GPIO3B0_MASK | GPIO3B1_MASK |
+ GPIO3B2_MASK | GPIO3B5_MASK |
+ GPIO3B6_MASK | GPIO3B7_MASK,
+ GPIO3B0_MAC_TXD0 | GPIO3B1_MAC_TXD1 |
+ GPIO3B2_MAC_TXD2 | GPIO3B5_MAC_TXEN |
+ GPIO3B6_MAC_TXD3 | GPIO3B7_MAC_RXD0);
+ rk_clrsetreg(&grf->gpio3c_iomux,
+ GPIO3C0_MASK | GPIO3C1_MASK |
+ GPIO3C2_MASK | GPIO3C3_MASK |
+ GPIO3C4_MASK | GPIO3C5_MASK |
+ GPIO3C6_MASK,
+ GPIO3C0_MAC_RXD1 | GPIO3C1_MAC_RXD2 |
+ GPIO3C2_MAC_RXD3 | GPIO3C3_MAC_MDC |
+ GPIO3C4_MAC_RXDV | GPIO3C5_MAC_RXEN |
+ GPIO3C6_MAC_CLK);
+ rk_clrsetreg(&grf->gpio3d_iomux,
+ GPIO3D0_MASK | GPIO3D1_MASK |
+ GPIO3D4_MASK,
+ GPIO3D0_MAC_MDIO | GPIO3D1_MAC_RXCLK |
+ GPIO3D4_MAC_TXCLK);
+}
+#endif
+
+static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
+{
+ switch (mmc_id) {
+ case PERIPH_ID_EMMC:
+ debug("mmc id = %d setting registers!\n", mmc_id);
+ rk_clrsetreg(&grf->gpio1c_iomux,
+ GPIO1C2_MASK | GPIO1C3_MASK |
+ GPIO1C4_MASK | GPIO1C5_MASK |
+ GPIO1C6_MASK | GPIO1C7_MASK,
+ GPIO1C2_EMMC_DATA0 |
+ GPIO1C3_EMMC_DATA1 |
+ GPIO1C4_EMMC_DATA2 |
+ GPIO1C5_EMMC_DATA3 |
+ GPIO1C6_EMMC_DATA4 |
+ GPIO1C7_EMMC_DATA5);
+ rk_clrsetreg(&grf->gpio1d_iomux,
+ GPIO1D0_MASK | GPIO1D1_MASK |
+ GPIO1D2_MASK | GPIO1D3_MASK,
+ GPIO1D0_EMMC_DATA6 |
+ GPIO1D1_EMMC_DATA7 |
+ GPIO1D2_EMMC_CMD |
+ GPIO1D3_EMMC_PWREN);
+ rk_clrsetreg(&grf->gpio2a_iomux,
+ GPIO2A3_MASK | GPIO2A4_MASK,
+ GPIO2A3_EMMC_RSTNOUT |
+ GPIO2A4_EMMC_CLKOUT);
+ break;
+ case PERIPH_ID_SDCARD:
+ /*
+ * We assume that the BROM has already set this up
+ * correctly for us and that there's nothing to do
+ * here.
+ */
+ break;
+ default:
+ debug("mmc id = %d iomux error!\n", mmc_id);
+ break;
+ }
+}
+
static int rk3368_pinctrl_request(struct udevice *dev, int func, int flags)
{
struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
@@ -68,6 +605,20 @@
case PERIPH_ID_UART4:
pinctrl_rk3368_uart_config(priv, func);
break;
+ case PERIPH_ID_SPI0:
+ case PERIPH_ID_SPI1:
+ case PERIPH_ID_SPI2:
+ pinctrl_rk3368_spi_config(priv, func);
+ break;
+ case PERIPH_ID_EMMC:
+ case PERIPH_ID_SDCARD:
+ pinctrl_rk3368_sdmmc_config(priv->grf, func);
+ break;
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case PERIPH_ID_GMAC:
+ pinctrl_rk3368_gmac_config(priv->grf, func);
+ break;
+#endif
default:
return -EINVAL;
}
@@ -97,6 +648,20 @@
return PERIPH_ID_UART1;
case 55:
return PERIPH_ID_UART0;
+ case 44:
+ return PERIPH_ID_SPI0;
+ case 45:
+ return PERIPH_ID_SPI1;
+ case 41:
+ return PERIPH_ID_SPI2;
+ case 35:
+ return PERIPH_ID_EMMC;
+ case 32:
+ return PERIPH_ID_SDCARD;
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+ case 27:
+ return PERIPH_ID_GMAC;
+#endif
}
return -ENOENT;
diff --git a/drivers/power/palmas.c b/drivers/power/palmas.c
index c813b21..4e98959 100644
--- a/drivers/power/palmas.c
+++ b/drivers/power/palmas.c
@@ -50,10 +50,9 @@
int ret;
/*
* Currently valid for the dra7xx_evm board:
- * Set TPS659038 LDO1 to 3.0 V
+ * Set TPS659038 LDO1 to 3.0 V or 1.8V
*/
- val = LDO_VOLT_3V0;
- ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, val);
+ ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, voltage);
if (ret) {
printf("tps65903x: could not set LDO1 voltage.\n");
return ret;
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index f488799..f7bdfa5 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -12,7 +12,7 @@
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
-obj-$(CONFIG_PMIC_AS3722) += as3722.o
+obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o
obj-$(CONFIG_PMIC_MAX8997) += max8997.o
obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK8XX) += rk8xx.o
diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c
index c09e1de..4efe8ee 100644
--- a/drivers/power/pmic/as3722.c
+++ b/drivers/power/pmic/as3722.c
@@ -11,253 +11,99 @@
#include <errno.h>
#include <fdtdec.h>
#include <i2c.h>
-
+#include <dm/lists.h>
#include <power/as3722.h>
+#include <power/pmic.h>
-#define AS3722_SD_VOLTAGE(n) (0x00 + (n))
-#define AS3722_GPIO_CONTROL(n) (0x08 + (n))
-#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH (1 << 0)
-#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL (7 << 0)
-#define AS3722_GPIO_CONTROL_INVERT (1 << 7)
-#define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
-#define AS3722_GPIO_SIGNAL_OUT 0x20
-#define AS3722_SD_CONTROL 0x4d
-#define AS3722_LDO_CONTROL 0x4e
-#define AS3722_ASIC_ID1 0x90
-#define AS3722_DEVICE_ID 0x0c
-#define AS3722_ASIC_ID2 0x91
+#define AS3722_NUM_OF_REGS 0x92
-int as3722_read(struct udevice *pmic, u8 reg, u8 *value)
+static int as3722_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
- int err;
+ int ret;
- err = dm_i2c_read(pmic, reg, value, 1);
- if (err < 0)
- return err;
+ ret = dm_i2c_read(dev, reg, buff, len);
+ if (ret < 0)
+ return ret;
return 0;
}
-int as3722_write(struct udevice *pmic, u8 reg, u8 value)
+static int as3722_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
{
- int err;
+ int ret;
- err = dm_i2c_write(pmic, reg, &value, 1);
- if (err < 0)
- return err;
+ ret = dm_i2c_write(dev, reg, buff, len);
+ if (ret < 0)
+ return ret;
return 0;
}
-static int as3722_read_id(struct udevice *pmic, u8 *id, u8 *revision)
+static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp)
{
- int err;
+ int ret;
- err = as3722_read(pmic, AS3722_ASIC_ID1, id);
- if (err) {
- error("failed to read ID1 register: %d", err);
- return err;
+ ret = pmic_reg_read(dev, AS3722_ASIC_ID1);
+ if (ret < 0) {
+ error("failed to read ID1 register: %d", ret);
+ return ret;
}
+ *idp = ret;
- err = as3722_read(pmic, AS3722_ASIC_ID2, revision);
- if (err) {
- error("failed to read ID2 register: %d", err);
- return err;
+ ret = pmic_reg_read(dev, AS3722_ASIC_ID2);
+ if (ret < 0) {
+ error("failed to read ID2 register: %d", ret);
+ return ret;
}
+ *revisionp = ret;
return 0;
}
-int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
+/* TODO(treding@nvidia.com): Add proper regulator support to avoid this */
+int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value)
{
- u8 value;
- int err;
+ int ret;
if (sd > 6)
return -EINVAL;
- err = as3722_read(pmic, AS3722_SD_CONTROL, &value);
- if (err) {
- error("failed to read SD control register: %d", err);
- return err;
- }
-
- value |= 1 << sd;
-
- err = as3722_write(pmic, AS3722_SD_CONTROL, value);
- if (err < 0) {
- error("failed to write SD control register: %d", err);
- return err;
+ ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value);
+ if (ret < 0) {
+ error("failed to write SD%u voltage register: %d", sd, ret);
+ return ret;
}
return 0;
}
-int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value)
+int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value)
{
- int err;
-
- if (sd > 6)
- return -EINVAL;
-
- err = as3722_write(pmic, AS3722_SD_VOLTAGE(sd), value);
- if (err < 0) {
- error("failed to write SD%u voltage register: %d", sd, err);
- return err;
- }
-
- return 0;
-}
-
-int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
-{
- u8 value;
- int err;
+ int ret;
if (ldo > 11)
return -EINVAL;
- err = as3722_read(pmic, AS3722_LDO_CONTROL, &value);
- if (err) {
- error("failed to read LDO control register: %d", err);
- return err;
- }
-
- value |= 1 << ldo;
-
- err = as3722_write(pmic, AS3722_LDO_CONTROL, value);
- if (err < 0) {
- error("failed to write LDO control register: %d", err);
- return err;
- }
-
- return 0;
-}
-
-int as3722_ldo_set_voltage(struct udevice *pmic, unsigned int ldo, u8 value)
-{
- int err;
-
- if (ldo > 11)
- return -EINVAL;
-
- err = as3722_write(pmic, AS3722_LDO_VOLTAGE(ldo), value);
- if (err < 0) {
+ ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value);
+ if (ret < 0) {
error("failed to write LDO%u voltage register: %d", ldo,
- err);
- return err;
+ ret);
+ return ret;
}
return 0;
}
-int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
- unsigned long flags)
+static int as3722_probe(struct udevice *dev)
{
- u8 value = 0;
- int err;
+ uint id, revision;
+ int ret;
- if (flags & AS3722_GPIO_OUTPUT_VDDH)
- value |= AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
-
- if (flags & AS3722_GPIO_INVERT)
- value |= AS3722_GPIO_CONTROL_INVERT;
-
- err = as3722_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
- if (err) {
- error("failed to configure GPIO#%u: %d", gpio, err);
- return err;
- }
-
- return 0;
-}
-
-static int as3722_gpio_set(struct udevice *pmic, unsigned int gpio,
- unsigned int level)
-{
- const char *l;
- u8 value;
- int err;
-
- if (gpio > 7)
- return -EINVAL;
-
- err = as3722_read(pmic, AS3722_GPIO_SIGNAL_OUT, &value);
- if (err < 0) {
- error("failed to read GPIO signal out register: %d", err);
- return err;
- }
-
- if (level == 0) {
- value &= ~(1 << gpio);
- l = "low";
- } else {
- value |= 1 << gpio;
- l = "high";
- }
-
- err = as3722_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
- if (err) {
- error("failed to set GPIO#%u %s: %d", gpio, l, err);
- return err;
- }
-
- return 0;
-}
-
-int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio,
- unsigned int level)
-{
- u8 value;
- int err;
-
- if (gpio > 7)
- return -EINVAL;
-
- if (level == 0)
- value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL;
- else
- value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
-
- err = as3722_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
- if (err) {
- error("failed to configure GPIO#%u as output: %d", gpio, err);
- return err;
- }
-
- err = as3722_gpio_set(pmic, gpio, level);
- if (err < 0) {
- error("failed to set GPIO#%u high: %d", gpio, err);
- return err;
- }
-
- return 0;
-}
-
-/* Temporary function until we get the pmic framework */
-int as3722_get(struct udevice **devp)
-{
- int bus = 0;
- int address = 0x40;
-
- return i2c_get_chip_for_busnum(bus, address, 1, devp);
-}
-
-int as3722_init(struct udevice **devp)
-{
- struct udevice *pmic;
- u8 id, revision;
- const unsigned int bus = 0;
- const unsigned int address = 0x40;
- int err;
-
- err = i2c_get_chip_for_busnum(bus, address, 1, &pmic);
- if (err)
- return err;
- err = as3722_read_id(pmic, &id, &revision);
- if (err < 0) {
- error("failed to read ID: %d", err);
- return err;
+ ret = as3722_read_id(dev, &id, &revision);
+ if (ret < 0) {
+ error("failed to read ID: %d", ret);
+ return ret;
}
if (id != AS3722_DEVICE_ID) {
@@ -265,10 +111,68 @@
return -ENOENT;
}
- debug("AS3722 revision %#x found on I2C bus %u, address %#x\n",
- revision, bus, address);
- if (devp)
- *devp = pmic;
+ debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name);
return 0;
}
+
+#if CONFIG_IS_ENABLED(PMIC_CHILDREN)
+static const struct pmic_child_info pmic_children_info[] = {
+ { .prefix = "sd", .driver = "as3722_stepdown"},
+ { .prefix = "ldo", .driver = "as3722_ldo"},
+ { },
+};
+
+static int as3722_bind(struct udevice *dev)
+{
+ struct udevice *gpio_dev;
+ ofnode regulators_node;
+ int children;
+ int ret;
+
+ regulators_node = dev_read_subnode(dev, "regulators");
+ if (!ofnode_valid(regulators_node)) {
+ debug("%s: %s regulators subnode not found\n", __func__,
+ dev->name);
+ return -ENXIO;
+ }
+
+ children = pmic_bind_children(dev, regulators_node, pmic_children_info);
+ if (!children)
+ debug("%s: %s - no child found\n", __func__, dev->name);
+ ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev);
+ if (ret) {
+ debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static int as3722_reg_count(struct udevice *dev)
+{
+ return AS3722_NUM_OF_REGS;
+}
+
+static struct dm_pmic_ops as3722_ops = {
+ .reg_count = as3722_reg_count,
+ .read = as3722_read,
+ .write = as3722_write,
+};
+
+static const struct udevice_id as3722_ids[] = {
+ { .compatible = "ams,as3722" },
+ { }
+};
+
+U_BOOT_DRIVER(pmic_as3722) = {
+ .name = "as3722_pmic",
+ .id = UCLASS_PMIC,
+ .of_match = as3722_ids,
+#if CONFIG_IS_ENABLED(PMIC_CHILDREN)
+ .bind = as3722_bind,
+#endif
+ .probe = as3722_probe,
+ .ops = &as3722_ops,
+};
diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c
new file mode 100644
index 0000000..d0b681c
--- /dev/null
+++ b/drivers/power/pmic/as3722_gpio.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (C) 2014 NVIDIA Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/gpio.h>
+#include <power/as3722.h>
+#include <power/pmic.h>
+
+#define NUM_GPIOS 8
+
+int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
+ unsigned long flags)
+{
+ u8 value = 0;
+ int err;
+
+ if (flags & AS3722_GPIO_OUTPUT_VDDH)
+ value |= AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
+
+ if (flags & AS3722_GPIO_INVERT)
+ value |= AS3722_GPIO_CONTROL_INVERT;
+
+ err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
+ if (err) {
+ error("failed to configure GPIO#%u: %d", gpio, err);
+ return err;
+ }
+
+ return 0;
+}
+
+static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
+ int level)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ const char *l;
+ u8 value;
+ int err;
+
+ if (gpio >= NUM_GPIOS)
+ return -EINVAL;
+
+ err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT);
+ if (err < 0) {
+ error("failed to read GPIO signal out register: %d", err);
+ return err;
+ }
+ value = err;
+
+ if (level == 0) {
+ value &= ~(1 << gpio);
+ l = "low";
+ } else {
+ value |= 1 << gpio;
+ l = "high";
+ }
+
+ err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
+ if (err) {
+ error("failed to set GPIO#%u %s: %d", gpio, l, err);
+ return err;
+ }
+
+ return 0;
+}
+
+int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio,
+ int value)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int err;
+
+ if (gpio > 7)
+ return -EINVAL;
+
+ if (value == 0)
+ value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL;
+ else
+ value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
+
+ err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
+ if (err) {
+ error("failed to configure GPIO#%u as output: %d", gpio, err);
+ return err;
+ }
+
+ err = as3722_gpio_set_value(pmic, gpio, value);
+ if (err < 0) {
+ error("failed to set GPIO#%u high: %d", gpio, err);
+ return err;
+ }
+
+ return 0;
+}
+
+static int as3722_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->gpio_count = NUM_GPIOS;
+ uc_priv->bank_name = "as3722_";
+
+ return 0;
+}
+
+static const struct dm_gpio_ops gpio_as3722_ops = {
+ .direction_output = as3722_gpio_direction_output,
+ .set_value = as3722_gpio_set_value,
+};
+
+U_BOOT_DRIVER(gpio_as3722) = {
+ .name = "gpio_as3722",
+ .id = UCLASS_GPIO,
+ .ops = &gpio_as3722_ops,
+ .probe = as3722_gpio_probe,
+};
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index f213487..c82a936 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -34,6 +34,15 @@
by the PMIC device. This driver is controlled by a device tree node
which includes voltage limits.
+config REGULATOR_AS3722
+ bool "Enable driver for AS7322 regulator"
+ depends on DM_REGULATOR && PMIC_AS3722
+ help
+ Enable support for the regulator functions of the AS3722. The
+ driver implements enable/disable for step-down bucks and LDOs,
+ but does not yet support change voltages. Currently this must be
+ done using direct register writes to the PMIC.
+
config DM_REGULATOR_PFUZE100
bool "Enable Driver Model for REGULATOR PFUZE100"
depends on DM_REGULATOR && DM_PMIC_PFUZE100
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index ce14d08..18fb870 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -7,6 +7,7 @@
obj-$(CONFIG_$(SPL_)DM_REGULATOR) += regulator-uclass.o
obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o
+obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o
obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
diff --git a/drivers/power/regulator/as3722_regulator.c b/drivers/power/regulator/as3722_regulator.c
new file mode 100644
index 0000000..3e1e6f1
--- /dev/null
+++ b/drivers/power/regulator/as3722_regulator.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * Placeholder regulator driver for as3722.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <power/as3722.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+
+static int stepdown_get_value(struct udevice *dev)
+{
+ return -ENOSYS;
+}
+
+static int stepdown_set_value(struct udevice *dev, int uvolt)
+{
+ return -ENOSYS;
+}
+
+static int stepdown_set_enable(struct udevice *dev, bool enable)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int sd = dev->driver_data;
+ int ret;
+
+ ret = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
+ if (ret < 0) {
+ debug("%s: failed to write SD control register: %d", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int stepdown_get_enable(struct udevice *dev)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int sd = dev->driver_data;
+ int ret;
+
+ ret = pmic_reg_read(pmic, AS3722_SD_CONTROL);
+ if (ret < 0) {
+ debug("%s: failed to read SD control register: %d", __func__,
+ ret);
+ return ret;
+ }
+
+ return ret & (1 << sd) ? true : false;
+}
+
+static int ldo_get_value(struct udevice *dev)
+{
+ return -ENOSYS;
+}
+
+static int ldo_set_value(struct udevice *dev, int uvolt)
+{
+ return -ENOSYS;
+}
+
+static int ldo_set_enable(struct udevice *dev, bool enable)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int ldo = dev->driver_data;
+ int ret;
+
+ ret = pmic_clrsetbits(pmic, AS3722_LDO_CONTROL, 0, 1 << ldo);
+ if (ret < 0) {
+ debug("%s: failed to write LDO control register: %d", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ldo_get_enable(struct udevice *dev)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int ldo = dev->driver_data;
+ int ret;
+
+ ret = pmic_reg_read(pmic, AS3722_LDO_CONTROL);
+ if (ret < 0) {
+ debug("%s: failed to read SD control register: %d", __func__,
+ ret);
+ return ret;
+ }
+
+ return ret & (1 << ldo) ? true : false;
+}
+
+static int as3722_stepdown_probe(struct udevice *dev)
+{
+ struct dm_regulator_uclass_platdata *uc_pdata;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+
+ uc_pdata->type = REGULATOR_TYPE_BUCK;
+
+ return 0;
+}
+
+static int as3722_ldo_probe(struct udevice *dev)
+{
+ struct dm_regulator_uclass_platdata *uc_pdata;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+
+ uc_pdata->type = REGULATOR_TYPE_LDO;
+
+ return 0;
+}
+
+static const struct dm_regulator_ops as3722_stepdown_ops = {
+ .get_value = stepdown_get_value,
+ .set_value = stepdown_set_value,
+ .get_enable = stepdown_get_enable,
+ .set_enable = stepdown_set_enable,
+};
+
+static const struct dm_regulator_ops as3722_ldo_ops = {
+ .get_value = ldo_get_value,
+ .set_value = ldo_set_value,
+ .get_enable = ldo_get_enable,
+ .set_enable = ldo_set_enable,
+};
+
+U_BOOT_DRIVER(as3722_stepdown) = {
+ .name = "as3722_stepdown",
+ .id = UCLASS_REGULATOR,
+ .ops = &as3722_stepdown_ops,
+ .probe = as3722_stepdown_probe,
+};
+
+U_BOOT_DRIVER(as3722_ldo) = {
+ .name = "as3722_ldo",
+ .id = UCLASS_REGULATOR,
+ .ops = &as3722_ldo_ops,
+ .probe = as3722_ldo_probe,
+};
diff --git a/drivers/power/regulator/palmas_regulator.c b/drivers/power/regulator/palmas_regulator.c
index 99614b0..24a7977 100644
--- a/drivers/power/regulator/palmas_regulator.c
+++ b/drivers/power/regulator/palmas_regulator.c
@@ -163,6 +163,38 @@
return pmic_reg_write(dev->parent, adr, ret);
}
+static int palmas_ldo_bypass_enable(struct udevice *dev, bool enabled)
+{
+ int type = dev_get_driver_data(dev_get_parent(dev));
+ struct dm_regulator_uclass_platdata *p;
+ unsigned int adr;
+ int reg;
+
+ if (type == TPS65917) {
+ /* bypass available only on LDO1 and LDO2 */
+ if (dev->driver_data > 2)
+ return -ENOTSUPP;
+ } else if (type == TPS659038) {
+ /* bypass available only on LDO9 */
+ if (dev->driver_data != 9)
+ return -ENOTSUPP;
+ }
+
+ p = dev_get_uclass_platdata(dev);
+ adr = p->ctrl_reg;
+
+ reg = pmic_reg_read(dev->parent, adr);
+ if (reg < 0)
+ return reg;
+
+ if (enabled)
+ reg |= PALMAS_LDO_BYPASS_EN;
+ else
+ reg &= ~PALMAS_LDO_BYPASS_EN;
+
+ return pmic_reg_write(dev->parent, adr, reg);
+}
+
static int palmas_ldo_enable(struct udevice *dev, int op, bool *enable)
{
int ret;
@@ -194,6 +226,10 @@
ret = pmic_reg_write(dev->parent, adr, ret);
if (ret)
return ret;
+
+ ret = palmas_ldo_bypass_enable(dev, false);
+ if (ret && (ret != -ENOTSUPP))
+ return ret;
}
return 0;
diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 00a7cca..b63f941 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -80,18 +80,14 @@
}
ret = pwm_set_config(priv->pwm, priv->pwm_id,
- (priv->period_ns / 100) * duty_cycle, priv->period_ns);
+ priv->period_ns, (priv->period_ns / 100) * duty_cycle);
if (ret) {
dev_err(dev, "Failed to configure PWM\n");
return ret;
}
- ret = pwm_set_enable(priv->pwm, priv->pwm_id, true);
- if (ret) {
- dev_err(dev, "Failed to enable PWM\n");
- return ret;
- }
priv->volt_uV = uvolt;
+
return ret;
}
@@ -144,8 +140,6 @@
if (priv->init_voltage)
pwm_regulator_set_voltage(dev, priv->init_voltage);
- pwm_regulator_enable(dev, 1);
-
return 0;
}
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 28de62d..2364c2d 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -29,6 +29,7 @@
struct rk_pwm_priv *priv = dev_get_priv(dev);
debug("%s: polarity=%u\n", __func__, polarity);
+ priv->enable_conf &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK);
if (polarity)
priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
else
diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c
index d93ac28..b8acc15 100644
--- a/drivers/pwm/tegra_pwm.c
+++ b/drivers/pwm/tegra_pwm.c
@@ -59,7 +59,7 @@
{
struct tegra_pwm_priv *priv = dev_get_priv(dev);
- priv->regs = (struct pwm_ctlr *)devfdt_get_addr(dev);
+ priv->regs = (struct pwm_ctlr *)dev_read_addr(dev);
return 0;
}
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 61afd7a..836be25 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -10,13 +10,22 @@
config SPL_RAM
bool "Enable RAM support in SPL"
- depends on RAM
+ depends on RAM && SPL_DM
help
The RAM subsystem adds a small amount of overhead to the image.
If this is acceptable and you have a need to use RAM drivers in
SPL, enable this option. It might provide a cleaner interface to
setting up RAM (e.g. SDRAM / DDR) within SPL.
+config TPL_RAM
+ bool "Enable RAM support in SPL"
+ depends on RAM && TPL_DM
+ help
+ The RAM subsystem adds a small amount of overhead to the image.
+ If this is acceptable and you have a need to use RAM drivers in
+ TPL, enable this option. It might provide a cleaner interface to
+ setting up RAM (e.g. SDRAM / DDR) within TPL.
+
config STM32_SDRAM
bool "Enable STM32 SDRAM support"
depends on RAM
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index c409c48..51ae6be 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -8,3 +8,5 @@
obj-$(CONFIG_SANDBOX) += sandbox_ram.o
obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
+
+obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
new file mode 100644
index 0000000..b09d03c
--- /dev/null
+++ b/drivers/ram/rockchip/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
new file mode 100644
index 0000000..ca7b1ff
--- /dev/null
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -0,0 +1,1007 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-bindings/memory/rk3368-dmc.h>
+#include <dt-structs.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/grf_rk3368.h>
+#include <asm/arch/ddr_rk3368.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+ struct ram_info info;
+ struct clk ddr_clk;
+ struct rk3368_cru *cru;
+ struct rk3368_grf *grf;
+ struct rk3368_ddr_pctl *pctl;
+ struct rk3368_ddrphy *phy;
+ struct rk3368_pmu_grf *pmugrf;
+ struct rk3368_msch *msch;
+};
+
+struct rk3368_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_rockchip_rk3368_dmc of_plat;
+#endif
+ struct rk3288_sdram_pctl_timing pctl_timing;
+ u32 trefi_mem_ddr3;
+ struct rk3288_sdram_channel chan;
+ struct regmap *map;
+ u32 ddr_freq;
+ u32 memory_schedule;
+ u32 ddr_speed_bin;
+ u32 tfaw_mult;
+};
+
+/* PTCL bits */
+enum {
+ /* PCTL_DFISTCFG0 */
+ DFI_INIT_START = BIT(0),
+ DFI_DATA_BYTE_DISABLE_EN = BIT(2),
+
+ /* PCTL_DFISTCFG1 */
+ DFI_DRAM_CLK_SR_EN = BIT(0),
+ DFI_DRAM_CLK_DPD_EN = BIT(1),
+ ODT_LEN_BL8_W_SHIFT = 16,
+
+ /* PCTL_DFISTCFG2 */
+ DFI_PARITY_INTR_EN = BIT(0),
+ DFI_PARITY_EN = BIT(1),
+
+ /* PCTL_DFILPCFG0 */
+ TLP_RESP_TIME_SHIFT = 16,
+ LP_SR_EN = BIT(8),
+ LP_PD_EN = BIT(0),
+
+ /* PCTL_DFIODTCFG */
+ RANK0_ODT_WRITE_SEL = BIT(3),
+ RANK1_ODT_WRITE_SEL = BIT(11),
+
+ /* PCTL_SCFG */
+ HW_LOW_POWER_EN = BIT(0),
+
+ /* PCTL_MCMD */
+ START_CMD = BIT(31),
+ MCMD_RANK0 = BIT(20),
+ MCMD_RANK1 = BIT(21),
+ DESELECT_CMD = 0,
+ PREA_CMD,
+ REF_CMD,
+ MRS_CMD,
+ ZQCS_CMD,
+ ZQCL_CMD,
+ RSTL_CMD,
+ MRR_CMD = 8,
+ DPDE_CMD,
+
+ /* PCTL_POWCTL */
+ POWER_UP_START = BIT(0),
+
+ /* PCTL_POWSTAT */
+ POWER_UP_DONE = BIT(0),
+
+ /* PCTL_SCTL */
+ INIT_STATE = 0,
+ CFG_STATE,
+ GO_STATE,
+ SLEEP_STATE,
+ WAKEUP_STATE,
+
+ /* PCTL_STAT */
+ LP_TRIG_SHIFT = 4,
+ LP_TRIG_MASK = 7,
+ PCTL_STAT_MSK = 7,
+ INIT_MEM = 0,
+ CONFIG,
+ CONFIG_REQ,
+ ACCESS,
+ ACCESS_REQ,
+ LOW_POWER,
+ LOW_POWER_ENTRY_REQ,
+ LOW_POWER_EXIT_REQ,
+
+ /* PCTL_MCFG */
+ DDR2_DDR3_BL_8 = BIT(0),
+ DDR3_EN = BIT(5),
+ TFAW_TRRD_MULT4 = (0 << 18),
+ TFAW_TRRD_MULT5 = (1 << 18),
+ TFAW_TRRD_MULT6 = (2 << 18),
+};
+
+#define DDR3_MR0_WR(n) \
+ ((n <= 8) ? ((n - 4) << 9) : (((n >> 1) & 0x7) << 9))
+#define DDR3_MR0_CL(n) \
+ ((((n - 4) & 0x7) << 4) | (((n - 4) & 0x8) >> 2))
+#define DDR3_MR0_BL8 \
+ (0 << 0)
+#define DDR3_MR0_DLL_RESET \
+ (1 << 8)
+#define DDR3_MR1_RTT120OHM \
+ ((0 << 9) | (1 << 6) | (0 << 2))
+#define DDR3_MR2_TWL(n) \
+ (((n - 5) & 0x7) << 3)
+
+
+#ifdef CONFIG_TPL_BUILD
+
+static void ddr_set_noc_spr_err_stall(struct rk3368_grf *grf, bool enable)
+{
+ if (enable)
+ rk_setreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL);
+ else
+ rk_clrreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL);
+}
+
+static void ddr_set_ddr3_mode(struct rk3368_grf *grf, bool ddr3_mode)
+{
+ if (ddr3_mode)
+ rk_setreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3);
+ else
+ rk_clrreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3);
+}
+
+static void ddrphy_config(struct rk3368_ddrphy *phy,
+ u32 tcl, u32 tal, u32 tcwl)
+{
+ int i;
+
+ /* Set to DDR3 mode */
+ clrsetbits_le32(&phy->reg[1], 0x3, 0x0);
+
+ /* DDRPHY_REGB: CL, AL */
+ clrsetbits_le32(&phy->reg[0xb], 0xff, tcl << 4 | tal);
+ /* DDRPHY_REGC: CWL */
+ clrsetbits_le32(&phy->reg[0xc], 0x0f, tcwl);
+
+ /* Update drive-strength */
+ writel(0xcc, &phy->reg[0x11]);
+ writel(0xaa, &phy->reg[0x16]);
+ /*
+ * Update NRCOMP/PRCOMP for all 4 channels (for details of all
+ * affected registers refer to the documentation of DDRPHY_REG20
+ * and DDRPHY_REG21 in the RK3368 TRM.
+ */
+ for (i = 0; i < 4; ++i) {
+ writel(0xcc, &phy->reg[0x20 + i * 0x10]);
+ writel(0x44, &phy->reg[0x21 + i * 0x10]);
+ }
+
+ /* Enable write-leveling calibration bypass */
+ setbits_le32(&phy->reg[2], BIT(3));
+}
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+ int i;
+
+ for (i = 0; i < n / sizeof(u32); i++)
+ writel(*src++, dest++);
+}
+
+static void send_command(struct rk3368_ddr_pctl *pctl, u32 rank, u32 cmd)
+{
+ u32 mcmd = START_CMD | cmd | rank;
+
+ debug("%s: writing %x to MCMD\n", __func__, mcmd);
+ writel(mcmd, &pctl->mcmd);
+ while (readl(&pctl->mcmd) & START_CMD)
+ /* spin */;
+}
+
+static void send_mrs(struct rk3368_ddr_pctl *pctl,
+ u32 rank, u32 mr_num, u32 mr_data)
+{
+ u32 mcmd = START_CMD | MRS_CMD | rank | (mr_num << 17) | (mr_data << 4);
+
+ debug("%s: writing %x to MCMD\n", __func__, mcmd);
+ writel(mcmd, &pctl->mcmd);
+ while (readl(&pctl->mcmd) & START_CMD)
+ /* spin */;
+}
+
+static int memory_init(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_sdram_params *params)
+{
+ u32 mr[4];
+ const ulong timeout_ms = 500;
+ ulong tmp;
+
+ /*
+ * Power up DRAM by DDR_PCTL_POWCTL[0] register of PCTL and
+ * wait power up DRAM finish with DDR_PCTL_POWSTAT[0] register
+ * of PCTL.
+ */
+ writel(POWER_UP_START, &pctl->powctl);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: POWER_UP_START did not complete in %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while (!(readl(&pctl->powstat) & POWER_UP_DONE));
+
+ /* Configure MR0 through MR3 */
+ mr[0] = DDR3_MR0_WR(params->pctl_timing.twr) |
+ DDR3_MR0_CL(params->pctl_timing.tcl) |
+ DDR3_MR0_DLL_RESET;
+ mr[1] = DDR3_MR1_RTT120OHM;
+ mr[2] = DDR3_MR2_TWL(params->pctl_timing.tcwl);
+ mr[3] = 0;
+
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.2 Initialization (DDR3 Initialization Sequence)"
+ */
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, DESELECT_CMD);
+ udelay(1);
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, PREA_CMD);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 2, mr[2]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 3, mr[3]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 1, mr[1]);
+ send_mrs(pctl, MCMD_RANK0 | MCMD_RANK1, 0, mr[0]);
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, ZQCL_CMD);
+
+ return 0;
+}
+
+static void move_to_config_state(struct rk3368_ddr_pctl *pctl)
+{
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.1 State transition of PCTL (Moving to Config State)"
+ */
+ u32 state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+ switch (state) {
+ case LOW_POWER:
+ writel(WAKEUP_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+ /* spin */;
+
+ /* fall-through */
+ case ACCESS:
+ case INIT_MEM:
+ writel(CFG_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+ /* spin */;
+ break;
+
+ case CONFIG:
+ return;
+
+ default:
+ break;
+ }
+}
+
+static void move_to_access_state(struct rk3368_ddr_pctl *pctl)
+{
+ /*
+ * Also see RK3368 Technical Reference Manual:
+ * "16.6.1 State transition of PCTL (Moving to Access State)"
+ */
+ u32 state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+ switch (state) {
+ case LOW_POWER:
+ if (((readl(&pctl->stat) >> LP_TRIG_SHIFT) &
+ LP_TRIG_MASK) == 1)
+ return;
+
+ writel(WAKEUP_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+ /* spin */;
+
+ /* fall-through */
+ case INIT_MEM:
+ writel(CFG_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+ /* spin */;
+
+ /* fall-through */
+ case CONFIG:
+ writel(GO_STATE, &pctl->sctl);
+ while ((readl(&pctl->stat) & PCTL_STAT_MSK) == CONFIG)
+ /* spin */;
+ break;
+
+ case ACCESS:
+ return;
+
+ default:
+ break;
+ }
+}
+
+static void ddrctl_reset(struct rk3368_cru *cru)
+{
+ const u32 ctl_reset = BIT(3) | BIT(2);
+ const u32 phy_reset = BIT(1) | BIT(0);
+
+ /*
+ * The PHY reset should be released before the PCTL reset.
+ *
+ * Note that the following sequence (including the number of
+ * us to delay between releasing the PHY and PCTL reset) has
+ * been adapted per feedback received from Rockchips, so do
+ * not try to optimise.
+ */
+ rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset);
+ udelay(1);
+ rk_clrreg(&cru->softrst_con[10], phy_reset);
+ udelay(5);
+ rk_clrreg(&cru->softrst_con[10], ctl_reset);
+}
+
+static void ddrphy_reset(struct rk3368_ddrphy *ddrphy)
+{
+ /*
+ * The analog part of the PHY should be release at least 1000
+ * DRAM cycles before the digital part of the PHY (waiting for
+ * 5us will ensure this for a DRAM clock as low as 200MHz).
+ */
+ clrbits_le32(&ddrphy->reg[0], BIT(3) | BIT(2));
+ udelay(1);
+ setbits_le32(&ddrphy->reg[0], BIT(2));
+ udelay(5);
+ setbits_le32(&ddrphy->reg[0], BIT(3));
+}
+
+static void ddrphy_config_delays(struct rk3368_ddrphy *ddrphy, u32 freq)
+{
+ u32 dqs_dll_delay;
+
+ setbits_le32(&ddrphy->reg[0x13], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x14], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x26], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x27], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x36], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x37], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x46], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x47], BIT(3));
+
+ setbits_le32(&ddrphy->reg[0x56], BIT(4));
+ clrbits_le32(&ddrphy->reg[0x57], BIT(3));
+
+ if (freq <= 400000000)
+ setbits_le32(&ddrphy->reg[0xa4], 0x1f);
+ else
+ clrbits_le32(&ddrphy->reg[0xa4], 0x1f);
+
+ if (freq < 681000000)
+ dqs_dll_delay = 3; /* 67.5 degree delay */
+ else
+ dqs_dll_delay = 2; /* 45 degree delay */
+
+ writel(dqs_dll_delay, &ddrphy->reg[0x28]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x38]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x48]);
+ writel(dqs_dll_delay, &ddrphy->reg[0x58]);
+}
+
+static int dfi_cfg(struct rk3368_ddr_pctl *pctl)
+{
+ const ulong timeout_ms = 200;
+ ulong tmp;
+
+ writel(DFI_DATA_BYTE_DISABLE_EN, &pctl->dfistcfg0);
+
+ writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN,
+ &pctl->dfistcfg1);
+ writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+ writel(7 << TLP_RESP_TIME_SHIFT | LP_SR_EN | LP_PD_EN,
+ &pctl->dfilpcfg0);
+
+ writel(1, &pctl->dfitphyupdtype0);
+
+ writel(0x1f, &pctl->dfitphyrdlat);
+ writel(0, &pctl->dfitphywrdata);
+ writel(0, &pctl->dfiupdcfg); /* phyupd and ctrlupd disabled */
+
+ setbits_le32(&pctl->dfistcfg0, DFI_INIT_START);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: DFI init did not complete within %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while ((readl(&pctl->dfiststat0) & 1) == 0);
+
+ return 0;
+}
+
+static inline u32 ps_to_tCK(const u32 ps, const ulong freq)
+{
+ const ulong MHz = 1000000;
+ return DIV_ROUND_UP(ps * freq, 1000000 * MHz);
+}
+
+static inline u32 ns_to_tCK(const u32 ns, const ulong freq)
+{
+ return ps_to_tCK(ns * 1000, freq);
+}
+
+static inline u32 tCK_to_ps(const ulong tCK, const ulong freq)
+{
+ const ulong MHz = 1000000;
+ return DIV_ROUND_UP(tCK * 1000000 * MHz, freq);
+}
+
+static int pctl_calc_timings(struct rk3368_sdram_params *params,
+ ulong freq)
+{
+ struct rk3288_sdram_pctl_timing *pctl_timing = ¶ms->pctl_timing;
+ const ulong MHz = 1000000;
+ u32 tccd;
+ u32 tfaw_as_ps;
+
+ if (params->ddr_speed_bin != DDR3_1600K) {
+ error("%s: unimplemented DDR3 speed bin %d\n",
+ __func__, params->ddr_speed_bin);
+ return -1;
+ }
+
+ /* PCTL is clocked at 1/2 the DRAM clock; err on the side of caution */
+ pctl_timing->togcnt1u = DIV_ROUND_UP(freq, 2 * MHz);
+ pctl_timing->togcnt100n = DIV_ROUND_UP(freq / 10, 2 * MHz);
+
+ pctl_timing->tinit = 200; /* 200 usec */
+ pctl_timing->trsth = 500; /* 500 usec */
+ pctl_timing->trefi = 78; /* 7.8usec = 78 * 100ns */
+ params->trefi_mem_ddr3 = ns_to_tCK(pctl_timing->trefi * 100, freq);
+
+ if (freq <= (400 * MHz)) {
+ pctl_timing->tcl = 6;
+ pctl_timing->tcwl = 10;
+ } else if (freq <= (533 * MHz)) {
+ pctl_timing->tcl = 8;
+ pctl_timing->tcwl = 6;
+ } else if (freq <= (666 * MHz)) {
+ pctl_timing->tcl = 10;
+ pctl_timing->tcwl = 7;
+ } else {
+ pctl_timing->tcl = 11;
+ pctl_timing->tcwl = 8;
+ }
+
+ pctl_timing->tmrd = 4; /* 4 tCK (all speed bins) */
+ pctl_timing->trfc = ns_to_tCK(350, freq); /* tRFC: 350 (max) @ 8GBit */
+ pctl_timing->trp = max(4u, ps_to_tCK(13750, freq));
+ /*
+ * JESD-79:
+ * READ to WRITE Command Delay = RL + tCCD / 2 + 2tCK - WL
+ */
+ tccd = 4;
+ pctl_timing->trtw = pctl_timing->tcl + tccd/2 + 2 - pctl_timing->tcwl;
+ pctl_timing->tal = 0;
+ pctl_timing->tras = ps_to_tCK(35000, freq);
+ pctl_timing->trc = ps_to_tCK(48750, freq);
+ pctl_timing->trcd = ps_to_tCK(13750, freq);
+ pctl_timing->trrd = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->trtp = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->twr = ps_to_tCK(15000, freq);
+ /* The DDR3 mode-register does only support even values for tWR > 8. */
+ if (pctl_timing->twr > 8)
+ pctl_timing->twr = (pctl_timing->twr + 1) & ~1;
+ pctl_timing->twtr = max(4u, ps_to_tCK(7500, freq));
+ pctl_timing->texsr = 512; /* tEXSR(max) is tDLLLK */
+ pctl_timing->txp = max(3u, ps_to_tCK(6000, freq));
+ pctl_timing->txpdll = max(10u, ps_to_tCK(24000, freq));
+ pctl_timing->tzqcs = max(64u, ps_to_tCK(80000, freq));
+ pctl_timing->tzqcsi = 10000; /* as used by Rockchip */
+ pctl_timing->tdqs = 1; /* fixed for DDR3 */
+ pctl_timing->tcksre = max(5u, ps_to_tCK(10000, freq));
+ pctl_timing->tcksrx = max(5u, ps_to_tCK(10000, freq));
+ pctl_timing->tcke = max(3u, ps_to_tCK(5000, freq));
+ pctl_timing->tmod = max(12u, ps_to_tCK(15000, freq));
+ pctl_timing->trstl = ns_to_tCK(100, freq);
+ pctl_timing->tzqcl = max(256u, ps_to_tCK(320000, freq)); /* tZQoper */
+ pctl_timing->tmrr = 0;
+ pctl_timing->tckesr = pctl_timing->tcke + 1; /* JESD-79: tCKE + 1tCK */
+ pctl_timing->tdpd = 0; /* RK3368 TRM: "allowed values for DDR3: 0" */
+
+
+ /*
+ * The controller can represent tFAW as 4x, 5x or 6x tRRD only.
+ * We want to use the smallest multiplier that satisfies the tFAW
+ * requirements of the given speed-bin. If necessary, we stretch out
+ * tRRD to allow us to operate on a 6x multiplier for tFAW.
+ */
+ tfaw_as_ps = 40000; /* 40ns: tFAW for DDR3-1600K, 2KB page-size */
+ if (tCK_to_ps(pctl_timing->trrd * 6, freq) < tfaw_as_ps) {
+ /* If tFAW is > 6 x tRRD, we need to stretch tRRD */
+ pctl_timing->trrd = ps_to_tCK(DIV_ROUND_UP(40000, 6), freq);
+ params->tfaw_mult = TFAW_TRRD_MULT6;
+ } else if (tCK_to_ps(pctl_timing->trrd * 5, freq) < tfaw_as_ps) {
+ params->tfaw_mult = TFAW_TRRD_MULT6;
+ } else if (tCK_to_ps(pctl_timing->trrd * 4, freq) < tfaw_as_ps) {
+ params->tfaw_mult = TFAW_TRRD_MULT5;
+ } else {
+ params->tfaw_mult = TFAW_TRRD_MULT4;
+ }
+
+ return 0;
+}
+
+static void pctl_cfg(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_sdram_params *params,
+ struct rk3368_grf *grf)
+{
+ /* Configure PCTL timing registers */
+ params->pctl_timing.trefi |= BIT(31); /* see PCTL_TREFI */
+ copy_to_reg(&pctl->togcnt1u, ¶ms->pctl_timing.togcnt1u,
+ sizeof(params->pctl_timing));
+ writel(params->trefi_mem_ddr3, &pctl->trefi_mem_ddr3);
+
+ /* Set up ODT write selector and ODT write length */
+ writel((RANK0_ODT_WRITE_SEL | RANK1_ODT_WRITE_SEL), &pctl->dfiodtcfg);
+ writel(7 << ODT_LEN_BL8_W_SHIFT, &pctl->dfiodtcfg1);
+
+ /* Set up the CL/CWL-dependent timings of DFI */
+ writel((params->pctl_timing.tcl - 1) / 2 - 1, &pctl->dfitrddataen);
+ writel((params->pctl_timing.tcwl - 1) / 2 - 1, &pctl->dfitphywrlat);
+
+ /* DDR3 */
+ writel(params->tfaw_mult | DDR3_EN | DDR2_DDR3_BL_8, &pctl->mcfg);
+ writel(0x001c0004, &grf->ddrc0_con0);
+
+ setbits_le32(&pctl->scfg, HW_LOW_POWER_EN);
+}
+
+static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl,
+ struct rk3368_ddrphy *ddrphy)
+{
+ const u32 trefi = readl(&pctl->trefi);
+ const ulong timeout_ms = 500;
+ ulong tmp;
+
+ /* disable auto-refresh */
+ writel(0 | BIT(31), &pctl->trefi);
+
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x20);
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x21);
+
+ tmp = get_timer(0);
+ do {
+ if (get_timer(tmp) > timeout_ms) {
+ error("%s: did not complete within %ld ms\n",
+ __func__, timeout_ms);
+ return -ETIME;
+ }
+ } while ((readl(&ddrphy->reg[0xff]) & 0xf) != 0xf);
+
+ send_command(pctl, MCMD_RANK0 | MCMD_RANK1, PREA_CMD);
+ clrsetbits_le32(&ddrphy->reg[2], 0x33, 0x20);
+ /* resume auto-refresh */
+ writel(trefi | BIT(31), &pctl->trefi);
+
+ return 0;
+}
+
+static int sdram_col_row_detect(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ struct rk3368_ddr_pctl *pctl = priv->pctl;
+ struct rk3368_msch *msch = priv->msch;
+ const u32 test_pattern = 0x5aa5f00f;
+ int row, col;
+ uintptr_t addr;
+
+ move_to_config_state(pctl);
+ writel(6, &msch->ddrconf);
+ move_to_access_state(pctl);
+
+ /* Detect col */
+ for (col = 11; col >= 9; col--) {
+ writel(0, CONFIG_SYS_SDRAM_BASE);
+ addr = CONFIG_SYS_SDRAM_BASE +
+ (1 << (col + params->chan.bw - 1));
+ writel(test_pattern, addr);
+ if ((readl(addr) == test_pattern) &&
+ (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+ break;
+ }
+
+ if (col == 8) {
+ error("%s: col detect error\n", __func__);
+ return -EINVAL;
+ }
+
+ move_to_config_state(pctl);
+ writel(15, &msch->ddrconf);
+ move_to_access_state(pctl);
+
+ /* Detect row*/
+ for (row = 16; row >= 12; row--) {
+ writel(0, CONFIG_SYS_SDRAM_BASE);
+ addr = CONFIG_SYS_SDRAM_BASE + (1 << (row + 15 - 1));
+ writel(test_pattern, addr);
+ if ((readl(addr) == test_pattern) &&
+ (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+ break;
+ }
+
+ if (row == 11) {
+ error("%s: row detect error\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Record results */
+ debug("%s: col %d, row %d\n", __func__, col, row);
+ params->chan.col = col;
+ params->chan.cs0_row = row;
+ params->chan.cs1_row = row;
+ params->chan.row_3_4 = 0;
+
+ return 0;
+}
+
+static int msch_niu_config(struct rk3368_msch *msch,
+ struct rk3368_sdram_params *params)
+{
+ int i;
+ const u8 cols = params->chan.col - ((params->chan.bw == 2) ? 0 : 1);
+ const u8 rows = params->chan.cs0_row;
+
+ /*
+ * The DDR address-translation table always assumes a 32bit
+ * bus and the comparison below takes care of adjusting for
+ * a 16bit bus (i.e. one column-address is consumed).
+ */
+ const struct {
+ u8 rows;
+ u8 columns;
+ u8 type;
+ } ddrconf_table[] = {
+ /*
+ * C-B-R-D patterns are first. For these we require an
+ * exact match for the columns and rows (as there's
+ * one entry per possible configuration).
+ */
+ [0] = { .rows = 13, .columns = 10, .type = DMC_MSCH_CBRD },
+ [1] = { .rows = 14, .columns = 10, .type = DMC_MSCH_CBRD },
+ [2] = { .rows = 15, .columns = 10, .type = DMC_MSCH_CBRD },
+ [3] = { .rows = 16, .columns = 10, .type = DMC_MSCH_CBRD },
+ [4] = { .rows = 14, .columns = 11, .type = DMC_MSCH_CBRD },
+ [5] = { .rows = 15, .columns = 11, .type = DMC_MSCH_CBRD },
+ [6] = { .rows = 16, .columns = 11, .type = DMC_MSCH_CBRD },
+ [7] = { .rows = 13, .columns = 9, .type = DMC_MSCH_CBRD },
+ [8] = { .rows = 14, .columns = 9, .type = DMC_MSCH_CBRD },
+ [9] = { .rows = 15, .columns = 9, .type = DMC_MSCH_CBRD },
+ [10] = { .rows = 16, .columns = 9, .type = DMC_MSCH_CBRD },
+ /*
+ * 11 through 13 are C-R-B-D patterns. These are
+ * matched for an exact number of columns and to
+ * ensure that the hardware uses at least as many rows
+ * as the pattern requires (i.e. we make sure that
+ * there's no gaps up until we hit the device/chip-select;
+ * however, these patterns can accept up to 16 rows,
+ * as the row-address continues right after the CS
+ * switching)
+ */
+ [11] = { .rows = 15, .columns = 10, .type = DMC_MSCH_CRBD },
+ [12] = { .rows = 14, .columns = 11, .type = DMC_MSCH_CRBD },
+ [13] = { .rows = 13, .columns = 10, .type = DMC_MSCH_CRBD },
+ /*
+ * 14 and 15 are catch-all variants using a C-B-D-R
+ * scheme (i.e. alternating the chip-select every time
+ * C-B overflows) and stuffing the remaining C-bits
+ * into the top. Matching needs to make sure that the
+ * number of columns is either an exact match (i.e. we
+ * can use less the the maximum number of rows) -or-
+ * that the columns exceed what is given in this table
+ * and the rows are an exact match (in which case the
+ * remaining C-bits will be stuffed onto the top after
+ * the device/chip-select switches).
+ */
+ [14] = { .rows = 16, .columns = 10, .type = DMC_MSCH_CBDR },
+ [15] = { .rows = 16, .columns = 9, .type = DMC_MSCH_CBDR },
+ };
+
+ /*
+ * For C-B-R-D, we need an exact match (i.e. both for the number of
+ * columns and rows), while for C-B-D-R, only the the number of
+ * columns needs to match.
+ */
+ for (i = 0; i < ARRAY_SIZE(ddrconf_table); i++) {
+ bool match = false;
+
+ /* If this entry if for a different matcher, then skip it */
+ if (ddrconf_table[i].type != params->memory_schedule)
+ continue;
+
+ /*
+ * Match according to the rules (exact/inexact/at-least)
+ * documented in the ddrconf_table above.
+ */
+ switch (params->memory_schedule) {
+ case DMC_MSCH_CBRD:
+ match = (ddrconf_table[i].columns == cols) &&
+ (ddrconf_table[i].rows == rows);
+ break;
+
+ case DMC_MSCH_CRBD:
+ match = (ddrconf_table[i].columns == cols) &&
+ (ddrconf_table[i].rows <= rows);
+ break;
+
+ case DMC_MSCH_CBDR:
+ match = (ddrconf_table[i].columns == cols) ||
+ ((ddrconf_table[i].columns <= cols) &&
+ (ddrconf_table[i].rows == rows));
+ break;
+
+ default:
+ break;
+ }
+
+ if (match) {
+ debug("%s: setting ddrconf 0x%x\n", __func__, i);
+ writel(i, &msch->ddrconf);
+ return 0;
+ }
+ }
+
+ error("%s: ddrconf (NIU config) not found\n", __func__);
+ return -EINVAL;
+}
+
+static void dram_all_config(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+ const struct rk3288_sdram_channel *info = ¶ms->chan;
+ u32 sys_reg = 0;
+ const int chan = 0;
+
+ sys_reg |= DDR3 << SYS_REG_DDRTYPE_SHIFT;
+ sys_reg |= 0 << SYS_REG_NUM_CH_SHIFT;
+
+ sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
+ sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
+ sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
+ sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
+ sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
+ sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
+ sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
+ sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+ sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
+
+ writel(sys_reg, &pmugrf->os_reg[2]);
+}
+
+static int setup_sdram(struct udevice *dev)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+ struct rk3368_sdram_params *params = dev_get_platdata(dev);
+
+ struct rk3368_ddr_pctl *pctl = priv->pctl;
+ struct rk3368_ddrphy *ddrphy = priv->phy;
+ struct rk3368_cru *cru = priv->cru;
+ struct rk3368_grf *grf = priv->grf;
+ struct rk3368_msch *msch = priv->msch;
+
+ int ret;
+
+ /* The input clock (i.e. DPLL) needs to be 2x the DRAM frequency */
+ ret = clk_set_rate(&priv->ddr_clk, 2 * params->ddr_freq);
+ if (ret < 0) {
+ debug("%s: could not set DDR clock: %d\n", __func__, ret);
+ return ret;
+ }
+
+ /* Update the read-latency for the RK3368 */
+ writel(0x32, &msch->readlatency);
+
+ /* Initialise the DDR PCTL and DDR PHY */
+ ddrctl_reset(cru);
+ ddrphy_reset(ddrphy);
+ ddrphy_config_delays(ddrphy, params->ddr_freq);
+ dfi_cfg(pctl);
+ /* Configure relative system information of grf_ddrc0_con0 register */
+ ddr_set_ddr3_mode(grf, true);
+ ddr_set_noc_spr_err_stall(grf, true);
+ /* Calculate timings */
+ pctl_calc_timings(params, params->ddr_freq);
+ /* Initialise the device timings in protocol controller */
+ pctl_cfg(pctl, params, grf);
+ /* Configure AL, CL ... information of PHY registers */
+ ddrphy_config(ddrphy,
+ params->pctl_timing.tcl,
+ params->pctl_timing.tal,
+ params->pctl_timing.tcwl);
+
+ /* Initialize DRAM and configure with mode-register values */
+ ret = memory_init(pctl, params);
+ if (ret)
+ goto error;
+
+ move_to_config_state(pctl);
+ /* Perform data-training */
+ ddrphy_data_training(pctl, ddrphy);
+ move_to_access_state(pctl);
+
+ /* TODO(prt): could detect rank in training... */
+ params->chan.rank = 2;
+ /* TODO(prt): bus width is not auto-detected (yet)... */
+ params->chan.bw = 2; /* 32bit wide bus */
+ params->chan.dbw = params->chan.dbw; /* 32bit wide bus */
+
+ /* DDR3 is always 8 bank */
+ params->chan.bk = 3;
+ /* Detect col and row number */
+ ret = sdram_col_row_detect(dev);
+ if (ret)
+ goto error;
+
+ /* Configure NIU DDR configuration */
+ ret = msch_niu_config(msch, params);
+ if (ret)
+ goto error;
+
+ /* set up OS_REG to communicate w/ next stage and OS */
+ dram_all_config(dev);
+
+ return 0;
+
+error:
+ printf("DRAM init failed!\n");
+ hang();
+}
+#endif
+
+static int rk3368_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+ int ret = 0;
+
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+
+ ret = regmap_init_mem(dev, &plat->map);
+ if (ret)
+ return ret;
+#endif
+
+ return ret;
+}
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
+ int ret;
+
+ plat->ddr_freq = of_plat->rockchip_ddr_frequency;
+ plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
+ plat->memory_schedule = of_plat->rockchip_memory_schedule;
+
+ ret = regmap_init_mem_platdata(dev, of_plat->reg,
+ ARRAY_SIZE(of_plat->reg) / 2,
+ &plat->map);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+#endif
+
+static int rk3368_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+ struct rk3368_sdram_params *plat = dev_get_platdata(dev);
+ struct rk3368_ddr_pctl *pctl;
+ struct rk3368_ddrphy *ddrphy;
+ struct rk3368_cru *cru;
+ struct rk3368_grf *grf;
+ struct rk3368_msch *msch;
+ int ret;
+ struct udevice *dev_clk;
+#endif
+ struct dram_info *priv = dev_get_priv(dev);
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ ret = conv_of_platdata(dev);
+ if (ret)
+ return ret;
+#endif
+
+ priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+ debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+
+#ifdef CONFIG_TPL_BUILD
+ pctl = regmap_get_range(plat->map, 0);
+ ddrphy = regmap_get_range(plat->map, 1);
+ msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ priv->pctl = pctl;
+ priv->phy = ddrphy;
+ priv->msch = msch;
+ priv->grf = grf;
+
+ ret = rockchip_get_clk(&dev_clk);
+ if (ret)
+ return ret;
+ priv->ddr_clk.id = CLK_DDR;
+ ret = clk_request(dev_clk, &priv->ddr_clk);
+ if (ret)
+ return ret;
+
+ cru = rockchip_get_cru();
+ priv->cru = cru;
+ if (IS_ERR(priv->cru))
+ return PTR_ERR(priv->cru);
+
+ ret = setup_sdram(dev);
+ if (ret)
+ return ret;
+#endif
+
+ priv->info.base = 0;
+ priv->info.size =
+ rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+ /*
+ * we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+ * is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+ * inaccessible for some IP controller.
+ */
+ priv->info.size = min(priv->info.size, (size_t)0xfe000000);
+
+ return 0;
+}
+
+static int rk3368_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+ struct dram_info *priv = dev_get_priv(dev);
+
+ *info = priv->info;
+ return 0;
+}
+
+static struct ram_ops rk3368_dmc_ops = {
+ .get_info = rk3368_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3368_dmc_ids[] = {
+ { .compatible = "rockchip,rk3368-dmc" },
+ { }
+};
+
+U_BOOT_DRIVER(dmc_rk3368) = {
+ .name = "rockchip_rk3368_dmc",
+ .id = UCLASS_RAM,
+ .of_match = rk3368_dmc_ids,
+ .ops = &rk3368_dmc_ops,
+ .probe = rk3368_dmc_probe,
+ .priv_auto_alloc_size = sizeof(struct dram_info),
+ .ofdata_to_platdata = rk3368_dmc_ofdata_to_platdata,
+ .probe = rk3368_dmc_probe,
+ .priv_auto_alloc_size = sizeof(struct dram_info),
+ .platdata_auto_alloc_size = sizeof(struct rk3368_sdram_params),
+};
diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index de3695f..307a297 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -42,6 +42,7 @@
debug("%s(dev=%p, index=%d, reset_ctl=%p)\n", __func__, dev, index,
reset_ctl);
+ reset_ctl->dev = NULL;
ret = dev_read_phandle_with_args(dev, "resets", "#reset-cells", 0,
index, &args);
@@ -87,6 +88,7 @@
debug("%s(dev=%p, name=%s, reset_ctl=%p)\n", __func__, dev, name,
reset_ctl);
+ reset_ctl->dev = NULL;
index = dev_read_stringlist_search(dev, "reset-names", name);
if (index < 0) {
@@ -97,6 +99,15 @@
return reset_get_by_index(dev, index, reset_ctl);
}
+int reset_request(struct reset_ctl *reset_ctl)
+{
+ struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
+
+ debug("%s(reset_ctl=%p)\n", __func__, reset_ctl);
+
+ return ops->request(reset_ctl);
+}
+
int reset_free(struct reset_ctl *reset_ctl)
{
struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
@@ -124,6 +135,29 @@
return ops->rst_deassert(reset_ctl);
}
+int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+ int i, ret;
+
+ for (i = 0; i < count; i++) {
+ debug("%s(reset_ctl[%d]=%p)\n", __func__, i, &reset_ctl[i]);
+
+ /* check if reset has been previously requested */
+ if (!reset_ctl[i].dev)
+ continue;
+
+ ret = reset_assert(&reset_ctl[i]);
+ if (ret)
+ return ret;
+
+ ret = reset_free(&reset_ctl[i]);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
UCLASS_DRIVER(reset) = {
.id = UCLASS_RESET,
.name = "reset",
diff --git a/drivers/rtc/m41t60.c b/drivers/rtc/m41t60.c
index 95083f0..2ddfd4e 100644
--- a/drivers/rtc/m41t60.c
+++ b/drivers/rtc/m41t60.c
@@ -200,7 +200,7 @@
void rtc_reset(void)
{
uchar *const data = rtc_validate();
- char const *const s = getenv("rtccal");
+ char const *const s = env_get("rtccal");
if (!data)
return;
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 7ec7ecc..1a65a3f 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -451,7 +451,7 @@
dev_desc->product[0] = 0;
dev_desc->revision[0] = 0;
dev_desc->removable = false;
-#ifndef CONFIG_BLK
+#if !CONFIG_IS_ENABLED(BLK)
dev_desc->block_read = scsi_read;
dev_desc->block_write = scsi_write;
#endif
@@ -682,7 +682,7 @@
printf("Found %d device(s).\n", scsi_max_devs);
#ifndef CONFIG_SPL_BUILD
- setenv_ulong("scsidevs", scsi_max_devs);
+ env_set_ulong("scsidevs", scsi_max_devs);
#endif
return 0;
}
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 0748a92..a8e9978 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -464,6 +464,14 @@
-t raw Raw mode, Ctrl-C is processed by U-Boot
-t cooked Cooked mode, Ctrl-C terminates
+config SCIF_CONSOLE
+ bool "Renesas SCIF UART support"
+ depends on SH || ARCH_RMOBILE
+ help
+ Select this to enable Renesas SCIF UART. To operate serial ports
+ on systems with RCar or SH SoCs, say Y to this option. If unsure,
+ say N.
+
config UNIPHIER_SERIAL
bool "Support for UniPhier on-chip UART"
depends on ARCH_UNIPHIER
@@ -509,6 +517,13 @@
on STiH410 SoC. This is a basic implementation, it supports
following baudrate 9600, 19200, 38400, 57600 and 115200.
+config STM32X7_SERIAL
+ bool "STMicroelectronics STM32 SoCs on-chip UART"
+ depends on DM_SERIAL && STM32F7
+ help
+ If you have a machine based on a STM32 F7 you can enable its
+ onboard serial ports, say Y to this option. If unsure, say N.
+
config MPC8XX_CONS
bool "Console driver for MPC8XX"
depends on 8xx
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index f360534..998d372 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -23,8 +23,8 @@
*/
static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
-#ifndef CONFIG_SYS_MALLOC_F_LEN
-#error "Serial is required before relocation - define CONFIG_SYS_MALLOC_F_LEN to make this work"
+#if !CONFIG_VAL(SYS_MALLOC_F_LEN)
+#error "Serial is required before relocation - define CONFIG_$(SPL_)SYS_MALLOC_F_LEN to make this work"
#endif
static int serial_check_stdout(const void *blob, struct udevice **devp)
@@ -353,7 +353,7 @@
memset(&sdev, '\0', sizeof(sdev));
strncpy(sdev.name, dev->name, sizeof(sdev.name));
- sdev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT;
+ sdev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_DM;
sdev.priv = dev;
sdev.putc = serial_stub_putc;
sdev.puts = serial_stub_puts;
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 51f7fbc..087785f 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <errno.h>
+#include <clk.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/processor.h>
@@ -214,15 +215,23 @@
static int sh_serial_ofdata_to_platdata(struct udevice *dev)
{
struct sh_serial_platdata *plat = dev_get_platdata(dev);
+ struct clk sh_serial_clk;
fdt_addr_t addr;
+ int ret;
addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
plat->base = addr;
- plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
- 1);
+
+ ret = clk_get_by_name(dev, "fck", &sh_serial_clk);
+ if (!ret)
+ plat->clk = clk_get_rate(&sh_serial_clk);
+ else
+ plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+ "clock", 1);
+
plat->type = dev_get_driver_data(dev);
return 0;
}
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 29799dc..353109c 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -526,9 +526,9 @@
int snlen;
/* Ger seiral number */
- if (!(sn = getenv("serial#"))) {
+ sn = env_get("serial#");
+ if (!sn)
sn = "000000000000";
- }
snlen = strlen(sn);
if (snlen > sizeof(serial_number) - 1) {
printf ("Warning: serial number %s is too long (%d > %lu)\n",
@@ -540,10 +540,9 @@
/* Decide on which type of UDC device to be.
*/
-
- if(!(tt = getenv("usbtty"))) {
+ tt = env_get("usbtty");
+ if (!tt)
tt = "generic";
- }
usbtty_init_terminal_type(strcmp(tt,"cdc_acm"));
/* prepare buffers... */
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8a8e8e4..3c5582a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -188,13 +188,6 @@
Zynq QSPI IP core. This IP is used to connect the flash in
4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
-config OMAP3_SPI
- bool "McSPI driver for OMAP"
- help
- SPI master controller for OMAP24XX and later Multichannel SPI
- (McSPI). This driver be used to access SPI chips on platforms
- embedding this OMAP3 McSPI IP core.
-
endif # if DM_SPI
config SOFT_SPI
@@ -229,4 +222,11 @@
help
Enable support for SPI on MPC8XX
+config OMAP3_SPI
+ bool "McSPI driver for OMAP"
+ help
+ SPI master controller for OMAP24XX and later Multichannel SPI
+ (McSPI). This driver be used to access SPI chips on platforms
+ embedding this OMAP3 McSPI IP core.
+
endmenu # menu "SPI Support"
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index e61c67b..1dfa89a 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -493,6 +493,8 @@
;
while (1) {
+ WATCHDOG_RESET();
+
reg = qspi_read32(priv->flags, ®s->rbsr);
if (reg & QSPI_RBSR_RDBFL_MASK) {
data = qspi_read32(priv->flags, ®s->rbdr[0]);
@@ -530,6 +532,8 @@
i = 0;
while ((RX_BUFFER_SIZE >= len) && (len > 0)) {
+ WATCHDOG_RESET();
+
rbsr_reg = qspi_read32(priv->flags, ®s->rbsr);
if (rbsr_reg & QSPI_RBSR_RDBFL_MASK) {
data = qspi_read32(priv->flags, ®s->rbdr[i]);
@@ -702,6 +706,8 @@
;
while (1) {
+ WATCHDOG_RESET();
+
reg = qspi_read32(priv->flags, ®s->rbsr);
if (reg & QSPI_RBSR_RDBFL_MASK) {
data = qspi_read32(priv->flags, ®s->rbdr[0]);
@@ -757,6 +763,8 @@
static u32 wr_sfaddr;
u32 txbuf;
+ WATCHDOG_RESET();
+
if (dout) {
if (flags & SPI_XFER_BEGIN) {
priv->cur_seqid = *(u8 *)dout;
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 7921ea0..c70d636 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -210,6 +210,14 @@
static int rockchip_spi_calc_modclk(ulong max_freq)
{
+ /*
+ * While this is not strictly correct for the RK3368, as the
+ * GPLL will be 576MHz, things will still work, as the
+ * clk_set_rate(...) implementation in our clock-driver will
+ * chose the next closest rate not exceeding what we request
+ * based on the output of this function.
+ */
+
unsigned div;
const unsigned long gpll_hz = 594000000UL;
@@ -443,6 +451,7 @@
static const struct udevice_id rockchip_spi_ids[] = {
{ .compatible = "rockchip,rk3288-spi" },
+ { .compatible = "rockchip,rk3368-spi" },
{ .compatible = "rockchip,rk3399-spi" },
{ }
};
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 9165934..04b4fce 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -12,7 +12,6 @@
#include <asm/arch/clock.h>
#include <asm/arch-tegra/clk_rst.h>
#include <spi.h>
-#include <fdtdec.h>
#include "tegra_spi.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -100,11 +99,9 @@
static int tegra114_spi_ofdata_to_platdata(struct udevice *bus)
{
struct tegra_spi_platdata *plat = bus->platdata;
- const void *blob = gd->fdt_blob;
- int node = dev_of_offset(bus);
- plat->base = devfdt_get_addr(bus);
- plat->periph_id = clock_decode_periph_id(blob, node);
+ plat->base = dev_read_addr(bus);
+ plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) {
debug("%s: could not decode periph id %d\n", __func__,
@@ -113,10 +110,10 @@
}
/* Use 500KHz as a suitable default */
- plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
- 500000);
- plat->deactivate_delay_us = fdtdec_get_int(blob, node,
- "spi-deactivate-delay", 0);
+ plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
+ 500000);
+ plat->deactivate_delay_us = dev_read_u32_default(bus,
+ "spi-deactivate-delay", 0);
debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
__func__, plat->base, plat->periph_id, plat->frequency,
plat->deactivate_delay_us);
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 299e1b4..e70210d 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -91,7 +91,7 @@
int node = dev_of_offset(bus);
plat->base = devfdt_get_addr(bus);
- plat->periph_id = clock_decode_periph_id(blob, node);
+ plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) {
debug("%s: could not decode periph id %d\n", __func__,
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index 4cbde7b..f242574 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -97,7 +97,7 @@
int node = dev_of_offset(bus);
plat->base = devfdt_get_addr(bus);
- plat->periph_id = clock_decode_periph_id(blob, node);
+ plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) {
debug("%s: could not decode periph id %d\n", __func__,
diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c
index 6d0b5da..2a35a58 100644
--- a/drivers/spi/tegra210_qspi.c
+++ b/drivers/spi/tegra210_qspi.c
@@ -100,7 +100,7 @@
int node = dev_of_offset(bus);
plat->base = devfdt_get_addr(bus);
- plat->periph_id = clock_decode_periph_id(blob, node);
+ plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) {
debug("%s: could not decode periph id %d\n", __func__,
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 17e7dfe..13f1223 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -9,6 +9,24 @@
will be used. The timer is usually a 32 bits free-running up
counter. There may be no real tick, and no timer interrupt.
+config SPL_TIMER
+ bool "Enable driver model for timer drivers in SPL"
+ depends on TIMER && SPL
+ help
+ Enable support for timer drivers in SPL. These can be used to get
+ a timer value when in SPL, or perhaps for implementing a delay
+ function. This enables the drivers in drivers/timer as part of an
+ SPL build.
+
+config TPL_TIMER
+ bool "Enable driver model for timer drivers in TPL"
+ depends on TIMER && TPL
+ help
+ Enable support for timer drivers in TPL. These can be used to get
+ a timer value when in TPL, or perhaps for implementing a delay
+ function. This enables the drivers in drivers/timer as part of an
+ TPL build.
+
config TIMER_EARLY
bool "Allow timer to be used early in U-Boot"
depends on TIMER
@@ -36,7 +54,6 @@
config X86_TSC_TIMER
bool "x86 Time-Stamp Counter (TSC) timer support"
depends on TIMER && X86
- default y if X86
help
Select this to enable Time-Stamp Counter (TSC) timer for x86.
@@ -86,4 +103,11 @@
help
Select this to enable a timer for AE3XX devices.
+config ROCKCHIP_TIMER
+ bool "Rockchip timer support"
+ depends on TIMER
+ help
+ Select this to enable support for the timer found on
+ Rockchip devices.
+
endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index ced7bd6..fa7ce7c 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -4,7 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-$(CONFIG_TIMER) += timer-uclass.o
+obj-y += timer-uclass.o
obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
@@ -14,3 +14,4 @@
obj-$(CONFIG_ARC_TIMER) += arc_timer.o
obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
obj-$(CONFIG_AE3XX_TIMER) += ae3xx_timer.o
+obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
new file mode 100644
index 0000000..0848033
--- /dev/null
+++ b/drivers/timer/rockchip_timer.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <mapmem.h>
+#include <asm/arch/timer.h>
+#include <dt-structs.h>
+#include <timer.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+struct rockchip_timer_plat {
+ struct dtd_rockchip_rk3368_timer dtd;
+};
+#endif
+
+/* Driver private data. Contains timer id. Could be either 0 or 1. */
+struct rockchip_timer_priv {
+ struct rk_timer *timer;
+};
+
+static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+{
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ uint64_t timebase_h, timebase_l;
+ uint64_t cntr;
+
+ timebase_l = readl(&priv->timer->timer_curr_value0);
+ timebase_h = readl(&priv->timer->timer_curr_value1);
+
+ /* timers are down-counting */
+ cntr = timebase_h << 32 | timebase_l;
+ *count = ~0ull - cntr;
+ return 0;
+}
+
+static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+
+ priv->timer = (struct rk_timer *)devfdt_get_addr(dev);
+#endif
+
+ return 0;
+}
+
+static int rockchip_timer_start(struct udevice *dev)
+{
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ const uint64_t reload_val = ~0uLL;
+ const uint32_t reload_val_l = reload_val & 0xffffffff;
+ const uint32_t reload_val_h = reload_val >> 32;
+
+ /* disable timer and reset all control */
+ writel(0, &priv->timer->timer_ctrl_reg);
+ /* write reload value */
+ writel(reload_val_l, &priv->timer->timer_load_count0);
+ writel(reload_val_h, &priv->timer->timer_load_count1);
+ /* enable timer */
+ writel(1, &priv->timer->timer_ctrl_reg);
+
+ return 0;
+}
+
+static int rockchip_timer_probe(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct rockchip_timer_priv *priv = dev_get_priv(dev);
+ struct rockchip_timer_plat *plat = dev_get_platdata(dev);
+
+ priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+ uc_priv->clock_rate = plat->dtd.clock_frequency;
+#endif
+
+ return rockchip_timer_start(dev);
+}
+
+static const struct timer_ops rockchip_timer_ops = {
+ .get_count = rockchip_timer_get_count,
+};
+
+static const struct udevice_id rockchip_timer_ids[] = {
+ { .compatible = "rockchip,rk3368-timer" },
+ {}
+};
+
+U_BOOT_DRIVER(arc_timer) = {
+ .name = "rockchip_rk3368_timer",
+ .id = UCLASS_TIMER,
+ .of_match = rockchip_timer_ids,
+ .probe = rockchip_timer_probe,
+ .ops = &rockchip_timer_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+ .priv_auto_alloc_size = sizeof(struct rockchip_timer_priv),
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ .platdata_auto_alloc_size = sizeof(struct rockchip_timer_plat),
+#endif
+ .ofdata_to_platdata = rockchip_clk_ofdata_to_platdata,
+};
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index ec10b28..a84755f 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -42,6 +42,7 @@
static int timer_pre_probe(struct udevice *dev)
{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk timer_clk;
int err;
@@ -56,6 +57,7 @@
} else
uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob,
dev_of_offset(dev), "clock-frequency", 0);
+#endif
return 0;
}
@@ -81,16 +83,18 @@
int notrace dm_timer_init(void)
{
- const void *blob = gd->fdt_blob;
+ __maybe_unused const void *blob = gd->fdt_blob;
struct udevice *dev = NULL;
- int node;
+ int node = -ENOENT;
int ret;
if (gd->timer)
return 0;
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
/* Check for a chosen timer to be used for tick */
node = fdtdec_get_chosen_node(blob, "tick-timer");
+#endif
if (node < 0) {
/* No chosen timer, trying first available timer */
ret = uclass_first_device_err(UCLASS_TIMER, &dev);
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index 5c4ec00..4d1fc9c 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -11,18 +11,13 @@
#include <dm.h>
#include <malloc.h>
#include <timer.h>
+#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/i8254.h>
#include <asm/ibmpc.h>
#include <asm/msr.h>
#include <asm/u-boot-x86.h>
-/* CPU reference clock frequency: in KHz */
-#define FREQ_83 83200
-#define FREQ_100 99840
-#define FREQ_133 133200
-#define FREQ_166 166400
-
#define MAX_NUM_FREQS 8
DECLARE_GLOBAL_DATA_PTR;
@@ -45,17 +40,17 @@
static struct freq_desc freq_desc_tables[] = {
/* PNW */
- { 6, 0x27, 0, { 0, 0, 0, 0, 0, FREQ_100, 0, FREQ_83 } },
+ { 6, 0x27, 0, { 0, 0, 0, 0, 0, 99840, 0, 83200 } },
/* CLV+ */
- { 6, 0x35, 0, { 0, FREQ_133, 0, 0, 0, FREQ_100, 0, FREQ_83 } },
- /* TNG */
- { 6, 0x4a, 1, { 0, FREQ_100, FREQ_133, 0, 0, 0, 0, 0 } },
- /* VLV2 */
- { 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
+ { 6, 0x35, 0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 } },
+ /* TNG - Intel Atom processor Z3400 series */
+ { 6, 0x4a, 1, { 0, 100000, 133300, 0, 0, 0, 0, 0 } },
+ /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
+ { 6, 0x37, 1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 } },
+ /* ANN - Intel Atom processor Z3500 series */
+ { 6, 0x5a, 1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 } },
/* Ivybridge */
{ 6, 0x3a, 2, { 0, 0, 0, 0, 0, 0, 0, 0 } },
- /* ANN */
- { 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)
@@ -76,35 +71,40 @@
(freq_desc_tables[cpu_index].freqs[freq_id])
/*
- * Do MSR calibration only for known/supported CPUs.
+ * TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is
+ * reliable and the frequency is known (provided by HW).
*
- * Returns the calibration value or 0 if MSR calibration failed.
+ * On these platforms PIT/HPET is generally not available so calibration won't
+ * work at all and there is no other clocksource to act as a watchdog for the
+ * TSC, so we have no other choice than to trust it.
+ *
+ * Returns the TSC frequency in MHz or 0 if HW does not provide it.
*/
-static unsigned long __maybe_unused try_msr_calibrate_tsc(void)
+static unsigned long __maybe_unused cpu_mhz_from_msr(void)
{
u32 lo, hi, ratio, freq_id, freq;
unsigned long res;
int cpu_index;
+ if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
+ return 0;
+
cpu_index = match_cpu(gd->arch.x86, gd->arch.x86_model);
if (cpu_index < 0)
return 0;
if (freq_desc_tables[cpu_index].msr_plat) {
rdmsr(MSR_PLATFORM_INFO, lo, hi);
- ratio = (lo >> 8) & 0x1f;
+ ratio = (lo >> 8) & 0xff;
} else {
rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
ratio = (hi >> 8) & 0x1f;
}
debug("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio);
- if (!ratio)
- goto fail;
-
if (freq_desc_tables[cpu_index].msr_plat == 2) {
/* TODO: Figure out how best to deal with this */
- freq = FREQ_100;
+ freq = 100000;
debug("Using frequency: %u KHz\n", freq);
} else {
/* Get FSB FREQ ID */
@@ -114,18 +114,12 @@
debug("Resolved frequency ID: %u, frequency: %u KHz\n",
freq_id, freq);
}
- if (!freq)
- goto fail;
/* TSC frequency = maximum resolved freq * maximum resolved bus ratio */
res = freq * ratio / 1000;
debug("TSC runs at %lu MHz\n", res);
return res;
-
-fail:
- debug("Fast TSC calibration using MSR failed\n");
- return 0;
}
/*
@@ -347,7 +341,7 @@
if (!uc_priv->clock_rate) {
unsigned long fast_calibrate;
- fast_calibrate = try_msr_calibrate_tsc();
+ fast_calibrate = cpu_mhz_from_msr();
if (!fast_calibrate) {
fast_calibrate = quick_pit_calibrate();
if (!fast_calibrate)
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index da3ec2f..62126aa 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -94,4 +94,6 @@
source "drivers/usb/gadget/Kconfig"
+source "drivers/usb/eth/Kconfig"
+
endif
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 4e642ae..823beb3 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -202,6 +202,10 @@
#ifdef CONFIG_ARM64
case SVR_LS2080A:
case SVR_LS2085A:
+ /* fallthrough */
+ case SVR_LS2088A:
+ /* fallthrough */
+ case SVR_LS2081A:
case SVR_LS1046A:
case SVR_LS1012A:
return IS_SVR_REV(svr, 1, 0);
diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 9ffda9c..1432858 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -96,7 +96,12 @@
1 << 7),
.bPwrOn2PwrGood = 2,
.bHubContrCurrent = 5,
- .DeviceRemovable = {0, 0xff}, /* all ports removeable */
+ {
+ {
+ /* all ports removeable */
+ .DeviceRemovable = {0, 0xff}
+ }
+ }
#if SANDBOX_NUM_PORTS > 8
#error "This code sets up an incorrect mask"
#endif
diff --git a/drivers/usb/eth/Kconfig b/drivers/usb/eth/Kconfig
new file mode 100644
index 0000000..14cfa26
--- /dev/null
+++ b/drivers/usb/eth/Kconfig
@@ -0,0 +1,17 @@
+comment "USB to Ethernet Controller Drivers"
+
+config USB_ETHER_LAN75XX
+ bool "Microchip LAN75XX support"
+ ---help---
+ Say Y here if you would like to support Microchip LAN75XX Hi-Speed
+ USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
+
+config USB_ETHER_LAN78XX
+ bool "Microchip LAN78XX support"
+ ---help---
+ Say Y here if you would like to support Microchip LAN78XX USB 3.1
+ Gen 1 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
index 4c44efc..4b935a3 100644
--- a/drivers/usb/eth/Makefile
+++ b/drivers/usb/eth/Makefile
@@ -9,4 +9,6 @@
obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_USB_ETHER_LAN75XX) += lan7x.o lan75xx.o
+obj-$(CONFIG_USB_ETHER_LAN78XX) += lan7x.o lan78xx.o
obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c
new file mode 100644
index 0000000..1c80158
--- /dev/null
+++ b/drivers/usb/eth/lan75xx.c
@@ -0,0 +1,315 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <usb.h>
+#include <linux/mii.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN75xx specific register/bit defines */
+#define LAN75XX_HW_CFG_BIR BIT(7)
+
+#define LAN75XX_BURST_CAP 0x034
+
+#define LAN75XX_BULK_IN_DLY 0x03C
+
+#define LAN75XX_RFE_CTL 0x060
+
+#define LAN75XX_FCT_RX_CTL 0x090
+
+#define LAN75XX_FCT_TX_CTL 0x094
+
+#define LAN75XX_FCT_RX_FIFO_END 0x098
+
+#define LAN75XX_FCT_TX_FIFO_END 0x09C
+
+#define LAN75XX_FCT_FLOW 0x0A0
+
+/* MAC ADDRESS PERFECT FILTER For LAN75xx */
+#define LAN75XX_ADDR_FILTX 0x300
+#define LAN75XX_ADDR_FILTX_FB_VALID BIT(31)
+
+/*
+ * Lan75xx infrastructure commands
+ */
+static int lan75xx_phy_gig_workaround(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret = 0;
+
+ /* Only internal phy */
+ /* Set the phy in Gig loopback */
+ lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
+ (BMCR_LOOPBACK | BMCR_SPEED1000));
+
+ /* Wait for the link up */
+ ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
+ dev->phy_id, MII_BMSR, BMSR_LSTATUS,
+ true, PHY_CONNECT_TIMEOUT_MS, 1);
+ if (ret)
+ return ret;
+
+ /* phy reset */
+ return lan7x_pmt_phy_reset(udev, dev);
+}
+
+static int lan75xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ uint32_t flow = 0, fct_flow = 0;
+ int ret;
+
+ ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
+ if (ret)
+ return ret;
+ return lan7x_write_reg(udev, FLOW, flow);
+}
+
+static int lan75xx_set_receive_filter(struct usb_device *udev)
+{
+ /* No multicast in u-boot */
+ return lan7x_write_reg(udev, LAN75XX_RFE_CTL,
+ RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
+}
+
+/* starts the TX path */
+static void lan75xx_start_tx_path(struct usb_device *udev)
+{
+ /* Enable Tx at MAC */
+ lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
+
+ /* Enable Tx at SCSRs */
+ lan7x_write_reg(udev, LAN75XX_FCT_TX_CTL, FCT_TX_CTL_EN);
+}
+
+/* Starts the Receive path */
+static void lan75xx_start_rx_path(struct usb_device *udev)
+{
+ /* Enable Rx at MAC */
+ lan7x_write_reg(udev, MAC_RX,
+ LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
+ MAC_RX_FCS_STRIP | MAC_RX_RXEN);
+
+ /* Enable Rx at SCSRs */
+ lan7x_write_reg(udev, LAN75XX_FCT_RX_CTL, FCT_RX_CTL_EN);
+}
+
+static int lan75xx_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev,
+ struct lan7x_private *priv)
+{
+ int ret;
+ u32 val;
+
+ ret = lan7x_basic_reset(udev, dev);
+ if (ret)
+ return ret;
+
+ /* Keep the chip ID */
+ ret = lan7x_read_reg(udev, ID_REV, &val);
+ if (ret)
+ return ret;
+ debug("LAN75xx ID_REV = 0x%08x\n", val);
+
+ priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
+
+ /* Respond to the IN token with a NAK */
+ ret = lan7x_read_reg(udev, HW_CFG, &val);
+ if (ret)
+ return ret;
+ val |= LAN75XX_HW_CFG_BIR;
+ return lan7x_write_reg(udev, HW_CFG, val);
+}
+
+int lan75xx_write_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ unsigned char *enetaddr = pdata->enetaddr;
+ u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
+ u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
+ int ret;
+
+ /* set hardware address */
+ ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX + 4, addr_lo);
+ if (ret)
+ return ret;
+
+ addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID;
+ ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi);
+ if (ret)
+ return ret;
+
+ debug("MAC addr %pM written\n", enetaddr);
+
+ return 0;
+}
+
+static int lan75xx_eth_start(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ int ret;
+ u32 write_buf;
+
+ /* Reset and read Mac addr were done in probe() */
+ ret = lan75xx_write_hwaddr(dev);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_BURST_CAP, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN75XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
+ if (ret)
+ return ret;
+
+ /* set FIFO sizes */
+ write_buf = (MAX_RX_FIFO_SIZE - 512) / 512;
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_RX_FIFO_END, write_buf);
+ if (ret)
+ return ret;
+
+ write_buf = (MAX_TX_FIFO_SIZE - 512) / 512;
+ ret = lan7x_write_reg(udev, LAN75XX_FCT_TX_FIFO_END, write_buf);
+ if (ret)
+ return ret;
+
+ /* Init Tx */
+ ret = lan7x_write_reg(udev, FLOW, 0);
+ if (ret)
+ return ret;
+
+ /* Init Rx. Set Vlan, keep default for VLAN on 75xx */
+ ret = lan75xx_set_receive_filter(udev);
+ if (ret)
+ return ret;
+
+ /* phy workaround for gig link */
+ ret = lan75xx_phy_gig_workaround(udev, ueth);
+ if (ret)
+ return ret;
+
+ /* Init PHY, autonego, and link */
+ ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
+ if (ret)
+ return ret;
+ ret = lan7x_eth_phylib_config_start(dev);
+ if (ret)
+ return ret;
+
+ /*
+ * MAC_CR has to be set after PHY init.
+ * MAC will auto detect the PHY speed.
+ */
+ ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
+ if (ret)
+ return ret;
+ write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
+ ret = lan7x_write_reg(udev, MAC_CR, write_buf);
+ if (ret)
+ return ret;
+
+ lan75xx_start_tx_path(udev);
+ lan75xx_start_rx_path(udev);
+
+ return lan75xx_update_flowcontrol(udev, ueth);
+}
+
+int lan75xx_read_rom_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /*
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ ret = lan7x_read_eeprom_mac(pdata->enetaddr, udev);
+ if (ret)
+ memset(pdata->enetaddr, 0, 6);
+
+ return 0;
+}
+
+static int lan75xx_eth_probe(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /* Do a reset in order to get the MAC address from HW */
+ if (lan75xx_basic_reset(udev, ueth, priv))
+ return 0;
+
+ /* Get the MAC address */
+ /*
+ * We must set the eth->enetaddr from HW because the upper layer
+ * will force to use the environmental var (usbethaddr) or random if
+ * there is no valid MAC address in eth->enetaddr.
+ *
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ lan7x_read_eeprom_mac(pdata->enetaddr, udev);
+ /* Do not return 0 for not finding MAC addr in HW */
+
+ ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
+ if (ret)
+ return ret;
+
+ /* Register phylib */
+ return lan7x_phylib_register(dev);
+}
+
+static const struct eth_ops lan75xx_eth_ops = {
+ .start = lan75xx_eth_start,
+ .send = lan7x_eth_send,
+ .recv = lan7x_eth_recv,
+ .free_pkt = lan7x_free_pkt,
+ .stop = lan7x_eth_stop,
+ .write_hwaddr = lan75xx_write_hwaddr,
+ .read_rom_hwaddr = lan75xx_read_rom_hwaddr,
+};
+
+U_BOOT_DRIVER(lan75xx_eth) = {
+ .name = "lan75xx_eth",
+ .id = UCLASS_ETH,
+ .probe = lan75xx_eth_probe,
+ .remove = lan7x_eth_remove,
+ .ops = &lan75xx_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct lan7x_private),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+
+static const struct usb_device_id lan75xx_eth_id_table[] = {
+ { USB_DEVICE(0x0424, 0x7500) }, /* LAN7500 USB Ethernet */
+ { } /* Terminating entry */
+};
+
+U_BOOT_USB_DEVICE(lan75xx_eth, lan75xx_eth_id_table);
diff --git a/drivers/usb/eth/lan78xx.c b/drivers/usb/eth/lan78xx.c
new file mode 100644
index 0000000..d1e61c3
--- /dev/null
+++ b/drivers/usb/eth/lan78xx.c
@@ -0,0 +1,477 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <usb.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN78xx specific register/bit defines */
+#define LAN78XX_HW_CFG_LED1_EN BIT(21) /* Muxed with EEDO */
+#define LAN78XX_HW_CFG_LED0_EN BIT(20) /* Muxed with EECLK */
+
+#define LAN78XX_USB_CFG0 0x080
+#define LAN78XX_USB_CFG0_BIR BIT(6)
+
+#define LAN78XX_BURST_CAP 0x090
+
+#define LAN78XX_BULK_IN_DLY 0x094
+
+#define LAN78XX_RFE_CTL 0x0B0
+
+#define LAN78XX_FCT_RX_CTL 0x0C0
+
+#define LAN78XX_FCT_TX_CTL 0x0C4
+
+#define LAN78XX_FCT_RX_FIFO_END 0x0C8
+
+#define LAN78XX_FCT_TX_FIFO_END 0x0CC
+
+#define LAN78XX_FCT_FLOW 0x0D0
+
+#define LAN78XX_MAF_BASE 0x400
+#define LAN78XX_MAF_HIX 0x00
+#define LAN78XX_MAF_LOX 0x04
+#define LAN78XX_MAF_HI_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_HIX)
+#define LAN78XX_MAF_LO_BEGIN (LAN78XX_MAF_BASE + LAN78XX_MAF_LOX)
+#define LAN78XX_MAF_HI(index) (LAN78XX_MAF_BASE + (8 * (index)) + \
+ LAN78XX_MAF_HIX)
+#define LAN78XX_MAF_LO(index) (LAN78XX_MAF_BASE + (8 * (index)) + \
+ LAN78XX_MAF_LOX)
+#define LAN78XX_MAF_HI_VALID BIT(31)
+
+/* OTP registers */
+#define LAN78XX_OTP_BASE_ADDR 0x00001000
+
+#define LAN78XX_OTP_PWR_DN (LAN78XX_OTP_BASE_ADDR + 4 * 0x00)
+#define LAN78XX_OTP_PWR_DN_PWRDN_N BIT(0)
+
+#define LAN78XX_OTP_ADDR1 (LAN78XX_OTP_BASE_ADDR + 4 * 0x01)
+#define LAN78XX_OTP_ADDR1_15_11 0x1F
+
+#define LAN78XX_OTP_ADDR2 (LAN78XX_OTP_BASE_ADDR + 4 * 0x02)
+#define LAN78XX_OTP_ADDR2_10_3 0xFF
+
+#define LAN78XX_OTP_RD_DATA (LAN78XX_OTP_BASE_ADDR + 4 * 0x06)
+
+#define LAN78XX_OTP_FUNC_CMD (LAN78XX_OTP_BASE_ADDR + 4 * 0x08)
+#define LAN78XX_OTP_FUNC_CMD_READ BIT(0)
+
+#define LAN78XX_OTP_CMD_GO (LAN78XX_OTP_BASE_ADDR + 4 * 0x0A)
+#define LAN78XX_OTP_CMD_GO_GO BIT(0)
+
+#define LAN78XX_OTP_STATUS (LAN78XX_OTP_BASE_ADDR + 4 * 0x0C)
+#define LAN78XX_OTP_STATUS_BUSY BIT(0)
+
+#define LAN78XX_OTP_INDICATOR_1 0xF3
+#define LAN78XX_OTP_INDICATOR_2 0xF7
+
+/*
+ * Lan78xx infrastructure commands
+ */
+static int lan78xx_read_raw_otp(struct usb_device *udev, u32 offset,
+ u32 length, u8 *data)
+{
+ int i;
+ int ret;
+ u32 buf;
+
+ ret = lan7x_read_reg(udev, LAN78XX_OTP_PWR_DN, &buf);
+ if (ret)
+ return ret;
+
+ if (buf & LAN78XX_OTP_PWR_DN_PWRDN_N) {
+ /* clear it and wait to be cleared */
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_PWR_DN, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_PWR_DN_PWRDN_N",
+ LAN78XX_OTP_PWR_DN,
+ LAN78XX_OTP_PWR_DN_PWRDN_N,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < length; i++) {
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR1,
+ ((offset + i) >> 8) &
+ LAN78XX_OTP_ADDR1_15_11);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_ADDR2,
+ ((offset + i) & LAN78XX_OTP_ADDR2_10_3));
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_FUNC_CMD,
+ LAN78XX_OTP_FUNC_CMD_READ);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, LAN78XX_OTP_CMD_GO,
+ LAN78XX_OTP_CMD_GO_GO);
+
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "LAN78XX_OTP_STATUS_BUSY",
+ LAN78XX_OTP_STATUS,
+ LAN78XX_OTP_STATUS_BUSY,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_read_reg(udev, LAN78XX_OTP_RD_DATA, &buf);
+ if (ret)
+ return ret;
+
+ data[i] = (u8)(buf & 0xFF);
+ }
+
+ return 0;
+}
+
+static int lan78xx_read_otp(struct usb_device *udev, u32 offset,
+ u32 length, u8 *data)
+{
+ u8 sig;
+ int ret;
+
+ ret = lan78xx_read_raw_otp(udev, 0, 1, &sig);
+
+ if (!ret) {
+ if (sig == LAN78XX_OTP_INDICATOR_1)
+ offset = offset;
+ else if (sig == LAN78XX_OTP_INDICATOR_2)
+ offset += 0x100;
+ else
+ return -EINVAL;
+ ret = lan78xx_read_raw_otp(udev, offset, length, data);
+ if (ret)
+ return ret;
+ }
+ debug("LAN78x: MAC address from OTP = %pM\n", data);
+
+ return ret;
+}
+
+static int lan78xx_read_otp_mac(unsigned char *enetaddr,
+ struct usb_device *udev)
+{
+ int ret;
+
+ memset(enetaddr, 0, 6);
+
+ ret = lan78xx_read_otp(udev,
+ EEPROM_MAC_OFFSET,
+ ETH_ALEN,
+ enetaddr);
+ if (!ret && is_valid_ethaddr(enetaddr)) {
+ /* eeprom values are valid so use them */
+ debug("MAC address read from OTP %pM\n", enetaddr);
+ return 0;
+ }
+ debug("MAC address read from OTP invalid %pM\n", enetaddr);
+
+ memset(enetaddr, 0, 6);
+ return -EINVAL;
+}
+
+static int lan78xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ uint32_t flow = 0, fct_flow = 0;
+ int ret;
+
+ ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_FLOW, fct_flow);
+ if (ret)
+ return ret;
+ return lan7x_write_reg(udev, FLOW, flow);
+}
+
+static int lan78xx_read_mac(unsigned char *enetaddr,
+ struct usb_device *udev,
+ struct lan7x_private *priv)
+{
+ u32 val;
+ int ret;
+ int saved = 0, done = 0;
+
+ /*
+ * Depends on chip, some EEPROM pins are muxed with LED function.
+ * disable & restore LED function to access EEPROM.
+ */
+ if ((priv->chipid == ID_REV_CHIP_ID_7800) ||
+ (priv->chipid == ID_REV_CHIP_ID_7850)) {
+ ret = lan7x_read_reg(udev, HW_CFG, &val);
+ if (ret)
+ return ret;
+ saved = val;
+ val &= ~(LAN78XX_HW_CFG_LED1_EN | LAN78XX_HW_CFG_LED0_EN);
+ ret = lan7x_write_reg(udev, HW_CFG, val);
+ if (ret)
+ goto restore;
+ }
+
+ /*
+ * Refer to the doc/README.enetaddr and doc/README.usb for
+ * the U-Boot MAC address policy
+ */
+ /* try reading mac address from EEPROM, then from OTP */
+ ret = lan7x_read_eeprom_mac(enetaddr, udev);
+ if (!ret)
+ done = 1;
+
+restore:
+ if ((priv->chipid == ID_REV_CHIP_ID_7800) ||
+ (priv->chipid == ID_REV_CHIP_ID_7850)) {
+ ret = lan7x_write_reg(udev, HW_CFG, saved);
+ if (ret)
+ return ret;
+ }
+ /* if the EEPROM mac address is good, then exit */
+ if (done)
+ return 0;
+
+ /* try reading mac address from OTP if the device is LAN78xx */
+ return lan78xx_read_otp_mac(enetaddr, udev);
+}
+
+static int lan78xx_set_receive_filter(struct usb_device *udev)
+{
+ /* No multicast in u-boot for now */
+ return lan7x_write_reg(udev, LAN78XX_RFE_CTL,
+ RFE_CTL_BCAST_EN | RFE_CTL_DA_PERFECT);
+}
+
+/* starts the TX path */
+static void lan78xx_start_tx_path(struct usb_device *udev)
+{
+ /* Enable Tx at MAC */
+ lan7x_write_reg(udev, MAC_TX, MAC_TX_TXEN);
+
+ /* Enable Tx at SCSRs */
+ lan7x_write_reg(udev, LAN78XX_FCT_TX_CTL, FCT_TX_CTL_EN);
+}
+
+/* Starts the Receive path */
+static void lan78xx_start_rx_path(struct usb_device *udev)
+{
+ /* Enable Rx at MAC */
+ lan7x_write_reg(udev, MAC_RX,
+ LAN7X_MAC_RX_MAX_SIZE_DEFAULT |
+ MAC_RX_FCS_STRIP | MAC_RX_RXEN);
+
+ /* Enable Rx at SCSRs */
+ lan7x_write_reg(udev, LAN78XX_FCT_RX_CTL, FCT_RX_CTL_EN);
+}
+
+static int lan78xx_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev,
+ struct lan7x_private *priv)
+{
+ int ret;
+ u32 val;
+
+ ret = lan7x_basic_reset(udev, dev);
+ if (ret)
+ return ret;
+
+ /* Keep the chip ID */
+ ret = lan7x_read_reg(udev, ID_REV, &val);
+ if (ret)
+ return ret;
+ debug("LAN78xx ID_REV = 0x%08x\n", val);
+
+ priv->chipid = (val & ID_REV_CHIP_ID_MASK) >> 16;
+
+ /* Respond to the IN token with a NAK */
+ ret = lan7x_read_reg(udev, LAN78XX_USB_CFG0, &val);
+ if (ret)
+ return ret;
+ val |= LAN78XX_USB_CFG0_BIR;
+ return lan7x_write_reg(udev, LAN78XX_USB_CFG0, val);
+}
+
+int lan78xx_write_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ unsigned char *enetaddr = pdata->enetaddr;
+ u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
+ u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]);
+ int ret;
+
+ /* set hardware address */
+ ret = lan7x_write_reg(udev, RX_ADDRL, addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_MAF_LO(0), addr_lo);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_MAF_HI(0),
+ addr_hi | LAN78XX_MAF_HI_VALID);
+ if (ret)
+ return ret;
+
+ debug("MAC addr %pM written\n", enetaddr);
+
+ return 0;
+}
+
+static int lan78xx_eth_start(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ int ret;
+ u32 write_buf;
+
+ /* Reset and read Mac addr were done in probe() */
+ ret = lan78xx_write_hwaddr(dev);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_BURST_CAP, 0);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, INT_STS, 0xFFFFFFFF);
+ if (ret)
+ return ret;
+
+ /* set FIFO sizes */
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_RX_FIFO_END,
+ (MAX_RX_FIFO_SIZE - 512) / 512);
+ if (ret)
+ return ret;
+
+ ret = lan7x_write_reg(udev, LAN78XX_FCT_TX_FIFO_END,
+ (MAX_TX_FIFO_SIZE - 512) / 512);
+ if (ret)
+ return ret;
+
+ /* Init Tx */
+ ret = lan7x_write_reg(udev, FLOW, 0);
+ if (ret)
+ return ret;
+
+ /* Init Rx. Set Vlan, keep default for VLAN on 78xx */
+ ret = lan78xx_set_receive_filter(udev);
+ if (ret)
+ return ret;
+
+ /* Init PHY, autonego, and link */
+ ret = lan7x_eth_phylib_connect(dev, &priv->ueth);
+ if (ret)
+ return ret;
+ ret = lan7x_eth_phylib_config_start(dev);
+ if (ret)
+ return ret;
+
+ /*
+ * MAC_CR has to be set after PHY init.
+ * MAC will auto detect the PHY speed.
+ */
+ ret = lan7x_read_reg(udev, MAC_CR, &write_buf);
+ if (ret)
+ return ret;
+ write_buf |= MAC_CR_AUTO_DUPLEX | MAC_CR_AUTO_SPEED | MAC_CR_ADP;
+ ret = lan7x_write_reg(udev, MAC_CR, write_buf);
+ if (ret)
+ return ret;
+
+ lan78xx_start_tx_path(udev);
+ lan78xx_start_rx_path(udev);
+
+ return lan78xx_update_flowcontrol(udev, &priv->ueth);
+}
+
+int lan78xx_read_rom_hwaddr(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = lan78xx_read_mac(pdata->enetaddr, udev, priv);
+ if (ret)
+ memset(pdata->enetaddr, 0, 6);
+
+ return 0;
+}
+
+static int lan78xx_eth_probe(struct udevice *dev)
+{
+ struct usb_device *udev = dev_get_parent_priv(dev);
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ struct eth_pdata *pdata = dev_get_platdata(dev);
+ int ret;
+
+ /* Do a reset in order to get the MAC address from HW */
+ if (lan78xx_basic_reset(udev, ueth, priv))
+ return 0;
+
+ /* Get the MAC address */
+ /*
+ * We must set the eth->enetaddr from HW because the upper layer
+ * will force to use the environmental var (usbethaddr) or random if
+ * there is no valid MAC address in eth->enetaddr.
+ */
+ lan78xx_read_mac(pdata->enetaddr, udev, priv);
+ /* Do not return 0 for not finding MAC addr in HW */
+
+ ret = usb_ether_register(dev, ueth, RX_URB_SIZE);
+ if (ret)
+ return ret;
+
+ /* Register phylib */
+ return lan7x_phylib_register(dev);
+}
+
+static const struct eth_ops lan78xx_eth_ops = {
+ .start = lan78xx_eth_start,
+ .send = lan7x_eth_send,
+ .recv = lan7x_eth_recv,
+ .free_pkt = lan7x_free_pkt,
+ .stop = lan7x_eth_stop,
+ .write_hwaddr = lan78xx_write_hwaddr,
+ .read_rom_hwaddr = lan78xx_read_rom_hwaddr,
+};
+
+U_BOOT_DRIVER(lan78xx_eth) = {
+ .name = "lan78xx_eth",
+ .id = UCLASS_ETH,
+ .probe = lan78xx_eth_probe,
+ .remove = lan7x_eth_remove,
+ .ops = &lan78xx_eth_ops,
+ .priv_auto_alloc_size = sizeof(struct lan7x_private),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+
+static const struct usb_device_id lan78xx_eth_id_table[] = {
+ { USB_DEVICE(0x0424, 0x7800) }, /* LAN7800 USB Ethernet */
+ { USB_DEVICE(0x0424, 0x7850) }, /* LAN7850 USB Ethernet */
+ { } /* Terminating entry */
+};
+
+U_BOOT_USB_DEVICE(lan78xx_eth, lan78xx_eth_id_table);
diff --git a/drivers/usb/eth/lan7x.c b/drivers/usb/eth/lan7x.c
new file mode 100644
index 0000000..222d327
--- /dev/null
+++ b/drivers/usb/eth/lan7x.c
@@ -0,0 +1,499 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include <miiphy.h>
+#include <memalign.h>
+#include <usb.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/*
+ * Lan7x infrastructure commands
+ */
+int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data)
+{
+ int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
+
+ cpu_to_le32s(&data);
+ tmpbuf[0] = data;
+
+ len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+ USB_VENDOR_REQUEST_WRITE_REGISTER,
+ USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
+ 0, index, tmpbuf, sizeof(data),
+ USB_CTRL_SET_TIMEOUT_MS);
+ if (len != sizeof(data)) {
+ debug("%s failed: index=%d, data=%d, len=%d",
+ __func__, index, data, len);
+ return -EIO;
+ }
+ return 0;
+}
+
+int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data)
+{
+ int len;
+ ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
+
+ len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
+ USB_VENDOR_REQUEST_READ_REGISTER,
+ USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
+ 0, index, tmpbuf, sizeof(*data),
+ USB_CTRL_GET_TIMEOUT_MS);
+ *data = tmpbuf[0];
+ if (len != sizeof(*data)) {
+ debug("%s failed: index=%d, len=%d", __func__, index, len);
+ return -EIO;
+ }
+
+ le32_to_cpus(data);
+ return 0;
+}
+
+static int lan7x_phy_wait_not_busy(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ MII_ACC, MII_ACC_MII_BUSY,
+ false, 100, 0);
+}
+
+int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx)
+{
+ u32 val, addr;
+
+ /* confirm MII not busy */
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("MII is busy in %s\n", __func__);
+ return -ETIMEDOUT;
+ }
+
+ /* set the address, index & direction (read from PHY) */
+ addr = (phy_id << 11) | (idx << 6) |
+ MII_ACC_MII_READ | MII_ACC_MII_BUSY;
+ lan7x_write_reg(udev, MII_ACC, addr);
+
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("Timed out reading MII reg %02X\n", idx);
+ return -ETIMEDOUT;
+ }
+
+ lan7x_read_reg(udev, MII_DATA, &val);
+
+ return val & 0xFFFF;
+}
+
+void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx, int regval)
+{
+ u32 addr;
+
+ /* confirm MII not busy */
+ if (lan7x_phy_wait_not_busy(udev)) {
+ debug("MII is busy in %s\n", __func__);
+ return;
+ }
+
+ lan7x_write_reg(udev, MII_DATA, regval);
+
+ /* set the address, index & direction (write to PHY) */
+ addr = (phy_id << 11) | (idx << 6) |
+ MII_ACC_MII_WRITE | MII_ACC_MII_BUSY;
+ lan7x_write_reg(udev, MII_ACC, addr);
+
+ if (lan7x_phy_wait_not_busy(udev))
+ debug("Timed out writing MII reg %02X\n", idx);
+}
+
+/*
+ * Lan7x phylib wrappers
+ */
+static int lan7x_phylib_mdio_read(struct mii_dev *bus,
+ int addr, int devad, int reg)
+{
+ struct usb_device *udev = dev_get_parent_priv(bus->priv);
+
+ return lan7x_mdio_read(udev, addr, reg);
+}
+
+static int lan7x_phylib_mdio_write(struct mii_dev *bus,
+ int addr, int devad, int reg, u16 val)
+{
+ struct usb_device *udev = dev_get_parent_priv(bus->priv);
+
+ lan7x_mdio_write(udev, addr, reg, (int)val);
+
+ return 0;
+}
+
+/*
+ * Lan7x eeprom functions
+ */
+static int lan7x_eeprom_confirm_not_busy(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ E2P_CMD, E2P_CMD_EPC_BUSY,
+ false, 100, 0);
+}
+
+static int lan7x_wait_eeprom(struct usb_device *udev)
+{
+ return lan7x_wait_for_bit(udev, __func__,
+ E2P_CMD,
+ (E2P_CMD_EPC_BUSY | E2P_CMD_EPC_TIMEOUT),
+ false, 100, 0);
+}
+
+static int lan7x_read_eeprom(struct usb_device *udev,
+ u32 offset, u32 length, u8 *data)
+{
+ u32 val;
+ int i, ret;
+
+ ret = lan7x_eeprom_confirm_not_busy(udev);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < length; i++) {
+ val = E2P_CMD_EPC_BUSY | E2P_CMD_EPC_CMD_READ |
+ (offset & E2P_CMD_EPC_ADDR_MASK);
+ lan7x_write_reg(udev, E2P_CMD, val);
+
+ ret = lan7x_wait_eeprom(udev);
+ if (ret)
+ return ret;
+
+ lan7x_read_reg(udev, E2P_DATA, &val);
+ data[i] = val & 0xFF;
+ offset++;
+ }
+ return ret;
+}
+
+/*
+ * Lan7x phylib functions
+ */
+int lan7x_phylib_register(struct udevice *udev)
+{
+ struct usb_device *usbdev = dev_get_parent_priv(udev);
+ struct lan7x_private *priv = dev_get_priv(udev);
+ int ret;
+
+ priv->mdiobus = mdio_alloc();
+ if (!priv->mdiobus) {
+ printf("mdio_alloc failed\n");
+ return -ENOMEM;
+ }
+ priv->mdiobus->read = lan7x_phylib_mdio_read;
+ priv->mdiobus->write = lan7x_phylib_mdio_write;
+ sprintf(priv->mdiobus->name,
+ "lan7x_mdiobus-d%hu-p%hu", usbdev->devnum, usbdev->portnr);
+ priv->mdiobus->priv = (void *)udev;
+
+ ret = mdio_register(priv->mdiobus);
+ if (ret) {
+ printf("mdio_register failed\n");
+ free(priv->mdiobus);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+int lan7x_eth_phylib_connect(struct udevice *udev, struct ueth_data *dev)
+{
+ struct lan7x_private *priv = dev_get_priv(udev);
+
+ priv->phydev = phy_connect(priv->mdiobus, dev->phy_id,
+ udev, PHY_INTERFACE_MODE_MII);
+
+ if (!priv->phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
+ return 0;
+}
+
+int lan7x_eth_phylib_config_start(struct udevice *udev)
+{
+ struct lan7x_private *priv = dev_get_priv(udev);
+ int ret;
+
+ /* configure supported modes */
+ priv->phydev->supported = PHY_BASIC_FEATURES |
+ SUPPORTED_1000baseT_Full |
+ SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause;
+
+ priv->phydev->advertising = ADVERTISED_10baseT_Half |
+ ADVERTISED_10baseT_Full |
+ ADVERTISED_100baseT_Half |
+ ADVERTISED_100baseT_Full |
+ ADVERTISED_1000baseT_Full |
+ ADVERTISED_Pause |
+ ADVERTISED_Asym_Pause |
+ ADVERTISED_Autoneg;
+
+ priv->phydev->autoneg = AUTONEG_ENABLE;
+
+ ret = genphy_config_aneg(priv->phydev);
+ if (ret) {
+ printf("genphy_config_aneg failed\n");
+ return ret;
+ }
+ ret = phy_startup(priv->phydev);
+ if (ret) {
+ printf("phy_startup failed\n");
+ return ret;
+ }
+
+ debug("** %s() speed %i duplex %i adv %X supp %X\n", __func__,
+ priv->phydev->speed, priv->phydev->duplex,
+ priv->phydev->advertising, priv->phydev->supported);
+
+ return 0;
+}
+
+int lan7x_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev,
+ uint32_t *flow, uint32_t *fct_flow)
+{
+ uint32_t lcladv, rmtadv;
+ u8 cap = 0;
+ struct lan7x_private *priv = dev_get_priv(udev->dev);
+
+ debug("** %s()\n", __func__);
+ debug("** %s() priv->phydev->speed %i duplex %i\n", __func__,
+ priv->phydev->speed, priv->phydev->duplex);
+
+ if (priv->phydev->duplex == DUPLEX_FULL) {
+ lcladv = lan7x_mdio_read(udev, dev->phy_id, MII_ADVERTISE);
+ rmtadv = lan7x_mdio_read(udev, dev->phy_id, MII_LPA);
+ cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
+
+ debug("TX Flow ");
+ if (cap & FLOW_CTRL_TX) {
+ *flow = (FLOW_CR_TX_FCEN | 0xFFFF);
+ /* set fct_flow thresholds to 20% and 80% */
+ *fct_flow = ((MAX_RX_FIFO_SIZE * 2) / (10 * 512))
+ & 0x7FUL;
+ *fct_flow <<= 8UL;
+ *fct_flow |= ((MAX_RX_FIFO_SIZE * 8) / (10 * 512))
+ & 0x7FUL;
+ debug("EN ");
+ } else {
+ debug("DIS ");
+ }
+ debug("RX Flow ");
+ if (cap & FLOW_CTRL_RX) {
+ *flow |= FLOW_CR_RX_FCEN;
+ debug("EN");
+ } else {
+ debug("DIS");
+ }
+ }
+ debug("\n");
+ return 0;
+}
+
+int lan7x_read_eeprom_mac(unsigned char *enetaddr, struct usb_device *udev)
+{
+ int ret;
+
+ memset(enetaddr, 0, 6);
+
+ ret = lan7x_read_eeprom(udev, 0, 1, enetaddr);
+
+ if ((ret == 0) && (enetaddr[0] == EEPROM_INDICATOR)) {
+ ret = lan7x_read_eeprom(udev,
+ EEPROM_MAC_OFFSET, ETH_ALEN,
+ enetaddr);
+ if ((ret == 0) && is_valid_ethaddr(enetaddr)) {
+ /* eeprom values are valid so use them */
+ debug("MAC address read from EEPROM %pM\n",
+ enetaddr);
+ return 0;
+ }
+ }
+ debug("MAC address read from EEPROM invalid %pM\n", enetaddr);
+
+ memset(enetaddr, 0, 6);
+ return -EINVAL;
+}
+
+int lan7x_pmt_phy_reset(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret;
+ u32 data;
+
+ ret = lan7x_read_reg(udev, PMT_CTL, &data);
+ if (ret)
+ return ret;
+ ret = lan7x_write_reg(udev, PMT_CTL, data | PMT_CTL_PHY_RST);
+ if (ret)
+ return ret;
+
+ /* for LAN7x, we need to check PMT_CTL_READY asserted */
+ ret = lan7x_wait_for_bit(udev, "PMT_CTL_PHY_RST",
+ PMT_CTL, PMT_CTL_PHY_RST,
+ false, 1000, 0); /* could take over 125mS */
+ if (ret)
+ return ret;
+
+ return lan7x_wait_for_bit(udev, "PMT_CTL_READY",
+ PMT_CTL, PMT_CTL_READY,
+ true, 1000, 0);
+}
+
+int lan7x_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+ int ret;
+
+ dev->phy_id = LAN7X_INTERNAL_PHY_ID; /* fixed phy id */
+
+ ret = lan7x_write_reg(udev, HW_CFG, HW_CFG_LRST);
+ if (ret)
+ return ret;
+
+ ret = lan7x_wait_for_bit(udev, "HW_CFG_LRST",
+ HW_CFG, HW_CFG_LRST,
+ false, 1000, 0);
+ if (ret)
+ return ret;
+
+ debug("USB devnum %d portnr %d\n", udev->devnum, udev->portnr);
+
+ return lan7x_pmt_phy_reset(udev, dev);
+}
+
+void lan7x_eth_stop(struct udevice *dev)
+{
+ debug("** %s()\n", __func__);
+}
+
+int lan7x_eth_send(struct udevice *dev, void *packet, int length)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ int err;
+ int actual_len;
+ u32 tx_cmd_a;
+ u32 tx_cmd_b;
+ ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
+ PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
+
+ debug("** %s(), len %d, buf %#x\n", __func__, length,
+ (unsigned int)(ulong) msg);
+ if (length > PKTSIZE)
+ return -ENOSPC;
+
+ /* LAN7x disable all TX offload features for u-boot */
+ tx_cmd_a = (u32) (length & TX_CMD_A_LEN_MASK) | TX_CMD_A_FCS;
+ tx_cmd_b = 0;
+ cpu_to_le32s(&tx_cmd_a);
+ cpu_to_le32s(&tx_cmd_b);
+
+ /* prepend cmd_a and cmd_b */
+ memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
+ memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
+ memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
+ length);
+ err = usb_bulk_msg(ueth->pusb_dev,
+ usb_sndbulkpipe(ueth->pusb_dev, ueth->ep_out),
+ (void *)msg,
+ length + sizeof(tx_cmd_a) +
+ sizeof(tx_cmd_b),
+ &actual_len, USB_BULK_SEND_TIMEOUT_MS);
+ debug("Tx: len = %u, actual = %u, err = %d\n",
+ (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
+ (unsigned int)actual_len, err);
+
+ return err;
+}
+
+int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+ struct ueth_data *ueth = &priv->ueth;
+ uint8_t *ptr;
+ int ret, len;
+ u32 packet_len = 0;
+ u32 rx_cmd_a = 0;
+
+ len = usb_ether_get_rx_bytes(ueth, &ptr);
+ debug("%s: first try, len=%d\n", __func__, len);
+ if (!len) {
+ if (!(flags & ETH_RECV_CHECK_DEVICE))
+ return -EAGAIN;
+ ret = usb_ether_receive(ueth, RX_URB_SIZE);
+ if (ret == -EAGAIN)
+ return ret;
+
+ len = usb_ether_get_rx_bytes(ueth, &ptr);
+ debug("%s: second try, len=%d\n", __func__, len);
+ }
+
+ /*
+ * 1st 4 bytes contain the length of the actual data plus error info.
+ * Extract data length.
+ */
+ if (len < sizeof(packet_len)) {
+ debug("Rx: incomplete packet length\n");
+ goto err;
+ }
+ memcpy(&rx_cmd_a, ptr, sizeof(rx_cmd_a));
+ le32_to_cpus(&rx_cmd_a);
+ if (rx_cmd_a & RX_CMD_A_RXE) {
+ debug("Rx: Error header=%#x", rx_cmd_a);
+ goto err;
+ }
+ packet_len = (u16) (rx_cmd_a & RX_CMD_A_LEN_MASK);
+
+ if (packet_len > len - sizeof(packet_len)) {
+ debug("Rx: too large packet: %d\n", packet_len);
+ goto err;
+ }
+
+ /*
+ * For LAN7x, the length in command A does not
+ * include command A, B, and C length.
+ * So use it as is.
+ */
+
+ *packetp = ptr + 10;
+ return packet_len;
+
+err:
+ usb_ether_advance_rxbuf(ueth, -1);
+ return -EINVAL;
+}
+
+int lan7x_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ packet_len = ALIGN(packet_len, 4);
+ usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
+
+ return 0;
+}
+
+int lan7x_eth_remove(struct udevice *dev)
+{
+ struct lan7x_private *priv = dev_get_priv(dev);
+
+ debug("** %s()\n", __func__);
+ free(priv->phydev);
+ mdio_unregister(priv->mdiobus);
+ mdio_free(priv->mdiobus);
+
+ return 0;
+}
diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h
new file mode 100644
index 0000000..4f4b3f8
--- /dev/null
+++ b/drivers/usb/eth/lan7x.h
@@ -0,0 +1,230 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <console.h>
+#include <watchdog.h>
+
+/* USB Vendor Requests */
+#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
+#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
+#define USB_VENDOR_REQUEST_GET_STATS 0xA2
+
+/* Tx Command A */
+#define TX_CMD_A_FCS BIT(22)
+#define TX_CMD_A_LEN_MASK 0x000FFFFF
+
+/* Rx Command A */
+#define RX_CMD_A_RXE BIT(18)
+#define RX_CMD_A_LEN_MASK 0x00003FFF
+
+/* SCSRs */
+#define ID_REV 0x00
+#define ID_REV_CHIP_ID_MASK 0xFFFF0000
+#define ID_REV_CHIP_ID_7500 0x7500
+#define ID_REV_CHIP_ID_7800 0x7800
+#define ID_REV_CHIP_ID_7850 0x7850
+
+#define INT_STS 0x0C
+
+#define HW_CFG 0x010
+#define HW_CFG_LRST BIT(1)
+
+#define PMT_CTL 0x014
+#define PMT_CTL_PHY_PWRUP BIT(10)
+#define PMT_CTL_READY BIT(7)
+#define PMT_CTL_PHY_RST BIT(4)
+
+#define E2P_CMD 0x040
+#define E2P_CMD_EPC_BUSY BIT(31)
+#define E2P_CMD_EPC_CMD_READ 0x00000000
+#define E2P_CMD_EPC_TIMEOUT BIT(10)
+#define E2P_CMD_EPC_ADDR_MASK 0x000001FF
+
+#define E2P_DATA 0x044
+
+#define RFE_CTL_BCAST_EN BIT(10)
+#define RFE_CTL_DA_PERFECT BIT(1)
+
+#define FCT_RX_CTL_EN BIT(31)
+
+#define FCT_TX_CTL_EN BIT(31)
+
+#define MAC_CR 0x100
+#define MAC_CR_ADP BIT(13)
+#define MAC_CR_AUTO_DUPLEX BIT(12)
+#define MAC_CR_AUTO_SPEED BIT(11)
+
+#define MAC_RX 0x104
+#define MAC_RX_FCS_STRIP BIT(4)
+#define MAC_RX_RXEN BIT(0)
+
+#define MAC_TX 0x108
+#define MAC_TX_TXEN BIT(0)
+
+#define FLOW 0x10C
+#define FLOW_CR_TX_FCEN BIT(30)
+#define FLOW_CR_RX_FCEN BIT(29)
+
+#define RX_ADDRH 0x118
+#define RX_ADDRL 0x11C
+
+#define MII_ACC 0x120
+#define MII_ACC_MII_READ 0x00000000
+#define MII_ACC_MII_WRITE 0x00000002
+#define MII_ACC_MII_BUSY BIT(0)
+
+#define MII_DATA 0x124
+
+#define SS_USB_PKT_SIZE 1024
+#define HS_USB_PKT_SIZE 512
+#define FS_USB_PKT_SIZE 64
+
+#define MAX_RX_FIFO_SIZE (12 * 1024)
+#define MAX_TX_FIFO_SIZE (12 * 1024)
+#define DEFAULT_BULK_IN_DELAY 0x0800
+
+#define EEPROM_INDICATOR 0xA5
+#define EEPROM_MAC_OFFSET 0x01
+
+/* Some extra defines */
+#define LAN7X_INTERNAL_PHY_ID 1
+
+#define LAN7X_MAC_RX_MAX_SIZE(mtu) \
+ ((mtu) << 16) /* Max frame size */
+#define LAN7X_MAC_RX_MAX_SIZE_DEFAULT \
+ LAN7X_MAC_RX_MAX_SIZE(ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */)
+
+/* Timeouts */
+#define USB_CTRL_SET_TIMEOUT_MS 5000
+#define USB_CTRL_GET_TIMEOUT_MS 5000
+#define USB_BULK_SEND_TIMEOUT_MS 5000
+#define USB_BULK_RECV_TIMEOUT_MS 5000
+#define TIMEOUT_RESOLUTION_MS 50
+#define PHY_CONNECT_TIMEOUT_MS 5000
+
+#define RX_URB_SIZE 2048
+
+/* driver private */
+struct lan7x_private {
+ struct ueth_data ueth;
+ u32 chipid; /* Chip or device ID */
+ struct mii_dev *mdiobus;
+ struct phy_device *phydev;
+};
+
+/*
+ * Lan7x infrastructure commands
+ */
+
+int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data);
+
+int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data);
+
+static inline int lan7x_wait_for_bit(struct usb_device *udev,
+ const char *prefix, const u32 reg,
+ const u32 mask, const bool set,
+ const unsigned int timeout_ms,
+ const bool breakable)
+{
+ u32 val;
+ unsigned long start = get_timer(0);
+
+ while (1) {
+ lan7x_read_reg(udev, reg, &val);
+
+ if (!set)
+ val = ~val;
+
+ if ((val & mask) == mask)
+ return 0;
+
+ if (get_timer(start) > timeout_ms)
+ break;
+
+ if (breakable && ctrlc()) {
+ puts("Abort\n");
+ return -EINTR;
+ }
+
+ udelay(1);
+ WATCHDOG_RESET();
+ }
+
+ debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg,
+ mask, set);
+
+ return -ETIMEDOUT;
+}
+
+int lan7x_mdio_read(struct usb_device *udev, int phy_id, int idx);
+
+void lan7x_mdio_write(struct usb_device *udev, int phy_id, int idx,
+ int regval);
+
+static inline int lan7x_mdio_wait_for_bit(struct usb_device *udev,
+ const char *prefix,
+ int phy_id, const u32 reg,
+ const u32 mask, const bool set,
+ const unsigned int timeout_ms,
+ const bool breakable)
+{
+ u32 val;
+ unsigned long start = get_timer(0);
+
+ while (1) {
+ val = lan7x_mdio_read(udev, phy_id, reg);
+
+ if (!set)
+ val = ~val;
+
+ if ((val & mask) == mask)
+ return 0;
+
+ if (get_timer(start) > timeout_ms)
+ break;
+
+ if (breakable && ctrlc()) {
+ puts("Abort\n");
+ return -EINTR;
+ }
+
+ udelay(1);
+ WATCHDOG_RESET();
+ }
+
+ debug("%s: Timeout (reg=0x%x mask=%08x wait_set=%i)\n", prefix, reg,
+ mask, set);
+
+ return -ETIMEDOUT;
+}
+
+int lan7x_phylib_register(struct udevice *udev);
+
+int lan7x_eth_phylib_connect(struct udevice *udev, struct ueth_data *dev);
+
+int lan7x_eth_phylib_config_start(struct udevice *udev);
+
+int lan7x_pmt_phy_reset(struct usb_device *udev,
+ struct ueth_data *dev);
+
+int lan7x_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev,
+ uint32_t *flow, uint32_t *fct_flow);
+
+int lan7x_read_eeprom_mac(unsigned char *enetaddr, struct usb_device *udev);
+
+int lan7x_basic_reset(struct usb_device *udev,
+ struct ueth_data *dev);
+
+void lan7x_eth_stop(struct udevice *dev);
+
+int lan7x_eth_send(struct udevice *dev, void *packet, int length);
+
+int lan7x_eth_recv(struct udevice *dev, int flags, uchar **packetp);
+
+int lan7x_free_pkt(struct udevice *dev, uchar *packet, int packet_len);
+
+int lan7x_eth_remove(struct udevice *dev);
diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index ed441f3..e09351b 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -26,7 +26,7 @@
unsigned short product;
};
-static const struct r8152_dongle const r8152_dongles[] = {
+static const struct r8152_dongle r8152_dongles[] = {
/* Realtek */
{ 0x0bda, 0x8050 },
{ 0x0bda, 0x8152 },
@@ -59,7 +59,7 @@
bool gmii;
};
-static const struct r8152_version const r8152_versions[] = {
+static const struct r8152_version r8152_versions[] = {
{ 0x4c00, RTL_VER_01, 0 },
{ 0x4c10, RTL_VER_02, 0 },
{ 0x5c00, RTL_VER_03, 1 },
diff --git a/drivers/usb/gadget/designware_udc.c b/drivers/usb/gadget/designware_udc.c
index 0db7a3b..a25f501 100644
--- a/drivers/usb/gadget/designware_udc.c
+++ b/drivers/usb/gadget/designware_udc.c
@@ -601,7 +601,7 @@
if ((ep != 0) && (udc_device->device_state < STATE_ADDRESSED))
return;
- tt = getenv("usbtty");
+ tt = env_get("usbtty");
if (!tt)
tt = "generic";
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 4137d76..2cf5c8d 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2384,12 +2384,12 @@
strlcpy(host_addr, CONFIG_USBNET_HOST_ADDR, sizeof(host_addr));
#endif
/* Check if the user overruled the MAC addresses */
- if (getenv("usbnet_devaddr"))
- strlcpy(dev_addr, getenv("usbnet_devaddr"),
+ if (env_get("usbnet_devaddr"))
+ strlcpy(dev_addr, env_get("usbnet_devaddr"),
sizeof(dev_addr));
- if (getenv("usbnet_hostaddr"))
- strlcpy(host_addr, getenv("usbnet_hostaddr"),
+ if (env_get("usbnet_hostaddr"))
+ strlcpy(host_addr, env_get("usbnet_hostaddr"),
sizeof(host_addr));
if (!is_eth_addr_valid(dev_addr)) {
@@ -2420,8 +2420,8 @@
gadget = dev->gadget;
usb_gadget_connect(gadget);
- if (getenv("cdc_connect_timeout"))
- timeout = simple_strtoul(getenv("cdc_connect_timeout"),
+ if (env_get("cdc_connect_timeout"))
+ timeout = simple_strtoul(env_get("cdc_connect_timeout"),
NULL, 10) * CONFIG_SYS_HZ;
ts = get_timer(0);
while (!dev->network_started) {
@@ -2685,7 +2685,7 @@
l_priv = priv;
get_ether_addr(CONFIG_USBNET_DEVADDR, pdata->enetaddr);
- eth_setenv_enetaddr("usbnet_devaddr", pdata->enetaddr);
+ eth_env_set_enetaddr("usbnet_devaddr", pdata->enetaddr);
return 0;
}
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index dfa4359..bc4be71 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -725,7 +725,7 @@
cdev->req->context = f_dfu;
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
g_dnl_set_serialnumber((char *)s);
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 7cd6d24..d05b74b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -212,7 +212,7 @@
f->hs_descriptors = fb_hs_function;
}
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
g_dnl_set_serialnumber((char *)s);
@@ -426,7 +426,7 @@
sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
strncat(response, str_num, chars_left);
} else if (!strcmp_l1("serialno", cmd)) {
- s = getenv("serial#");
+ s = env_get("serial#");
if (s)
strncat(response, s, chars_left);
else
@@ -441,7 +441,7 @@
}
sprintf(envstr, "fastboot.%s", cmd);
- s = getenv(envstr);
+ s = env_get(envstr);
if (s) {
strncat(response, s, chars_left);
} else {
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index a60e948..cd4d9e6 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -891,6 +891,7 @@
}
if (dev->out_ep->driver_data) {
+ free(dev->out_req->buf);
dev->out_req->buf = NULL;
usb_ep_free_request(dev->out_ep, dev->out_req);
usb_ep_disable(dev->out_ep);
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index bc2c1f1..67ad72b 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -31,6 +31,13 @@
SoCs, which includes Armada8K, Armada3700 and other Armada
family SoCs.
+config USB_XHCI_PCI
+ bool "Support for PCI-based xHCI USB controller"
+ depends on DM_USB
+ default y if X86
+ help
+ Enables support for the PCI-based xHCI controller.
+
config USB_XHCI_ROCKCHIP
bool "Support for Rockchip on-chip xHCI USB controller"
depends on ARCH_ROCKCHIP
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b57c6cd..62c431b 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -225,7 +225,7 @@
"phy_type", &len);
#endif
else
- phy_type = getenv("usb_phy_type");
+ phy_type = env_get("usb_phy_type");
if (!phy_type) {
#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index fb78462..03f8d32 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -6,6 +6,8 @@
#include <common.h>
#include <clk.h>
+#include <dm/ofnode.h>
+#include <generic-phy.h>
#include <reset.h>
#include <asm/io.h>
#include <dm.h>
@@ -18,43 +20,143 @@
*/
struct generic_ehci {
struct ehci_ctrl ctrl;
+ struct clk *clocks;
+ struct reset_ctl *resets;
+ struct phy phy;
+ int clock_count;
+ int reset_count;
};
static int ehci_usb_probe(struct udevice *dev)
{
+ struct generic_ehci *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
- int i;
+ int i, err, ret, clock_nb, reset_nb;
- for (i = 0; ; i++) {
- struct clk clk;
- int ret;
+ err = 0;
+ priv->clock_count = 0;
+ clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
+ "#clock-cells");
+ if (clock_nb > 0) {
+ priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+ GFP_KERNEL);
+ if (!priv->clocks)
+ return -ENOMEM;
- ret = clk_get_by_index(dev, i, &clk);
- if (ret < 0)
- break;
- if (clk_enable(&clk))
- printf("failed to enable clock %d\n", i);
- clk_free(&clk);
+ for (i = 0; i < clock_nb; i++) {
+ err = clk_get_by_index(dev, i, &priv->clocks[i]);
+
+ if (err < 0)
+ break;
+ err = clk_enable(&priv->clocks[i]);
+ if (err) {
+ error("failed to enable clock %d\n", i);
+ clk_free(&priv->clocks[i]);
+ goto clk_err;
+ }
+ priv->clock_count++;
+ }
+ } else {
+ if (clock_nb != -ENOENT) {
+ error("failed to get clock phandle(%d)\n", clock_nb);
+ return clock_nb;
+ }
}
- for (i = 0; ; i++) {
- struct reset_ctl reset;
- int ret;
+ priv->reset_count = 0;
+ reset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "resets",
+ "#reset-cells");
+ if (reset_nb > 0) {
+ priv->resets = devm_kcalloc(dev, reset_nb,
+ sizeof(struct reset_ctl),
+ GFP_KERNEL);
+ if (!priv->resets)
+ return -ENOMEM;
- ret = reset_get_by_index(dev, i, &reset);
- if (ret < 0)
- break;
- if (reset_deassert(&reset))
- printf("failed to deassert reset %d\n", i);
- reset_free(&reset);
+ for (i = 0; i < reset_nb; i++) {
+ err = reset_get_by_index(dev, i, &priv->resets[i]);
+ if (err < 0)
+ break;
+
+ if (reset_deassert(&priv->resets[i])) {
+ error("failed to deassert reset %d\n", i);
+ reset_free(&priv->resets[i]);
+ goto reset_err;
+ }
+ priv->reset_count++;
+ }
+ } else {
+ if (reset_nb != -ENOENT) {
+ error("failed to get reset phandle(%d)\n", reset_nb);
+ goto clk_err;
+ }
+ }
+
+ err = generic_phy_get_by_index(dev, 0, &priv->phy);
+ if (err) {
+ if (err != -ENOENT) {
+ error("failed to get usb phy\n");
+ goto reset_err;
+ }
+ } else {
+
+ err = generic_phy_init(&priv->phy);
+ if (err) {
+ error("failed to init usb phy\n");
+ goto reset_err;
+ }
}
hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
- return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+ err = ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+ if (err)
+ goto phy_err;
+
+ return 0;
+
+phy_err:
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ error("failed to release phy\n");
+ }
+
+reset_err:
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ error("failed to assert all resets\n");
+clk_err:
+ ret = clk_release_all(priv->clocks, priv->clock_count);
+ if (ret)
+ error("failed to disable all clocks\n");
+
+ return err;
+}
+
+static int ehci_usb_remove(struct udevice *dev)
+{
+ struct generic_ehci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ehci_deregister(dev);
+ if (ret)
+ return ret;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ return ret;
+ }
+
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ return ret;
+
+ return clk_release_all(priv->clocks, priv->clock_count);
}
static const struct udevice_id ehci_usb_ids[] = {
@@ -67,7 +169,7 @@
.id = UCLASS_USB,
.of_match = ehci_usb_ids,
.probe = ehci_usb_probe,
- .remove = ehci_deregister,
+ .remove = ehci_usb_remove,
.ops = &ehci_usb_ops,
.priv_auto_alloc_size = sizeof(struct generic_ehci),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 13aa70d..3243c1d 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -52,8 +52,8 @@
0, /* wHubCharacteristics */
10, /* bPwrOn2PwrGood */
0, /* bHubCntrCurrent */
- {}, /* Device removable */
- {} /* at most 7 ports! XXX */
+ { /* Device removable */
+ } /* at most 7 ports! XXX */
},
{
0x12, /* bLength */
@@ -148,9 +148,12 @@
static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
{
- if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+ int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
+
+ if (port < 0 || port >= max_ports) {
/* Printing the message would cause a scan failure! */
- debug("The request port(%u) is not configured\n", port);
+ debug("The request port(%u) exceeds maximum port number\n",
+ port);
return NULL;
}
@@ -205,6 +208,7 @@
{
int i, ret = 0;
uint32_t cmd, reg;
+ int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
if (!ctrl || !ctrl->hcor)
return -EINVAL;
@@ -219,7 +223,7 @@
100 * 1000);
if (!ret) {
- for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
+ for (i = 0; i < max_ports; i++) {
reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
reg |= EHCI_PS_SUSP;
ehci_writel(&ctrl->hcor->or_portsc[i], reg);
@@ -937,7 +941,7 @@
return -1;
}
-const struct ehci_ops default_ehci_ops = {
+static const struct ehci_ops default_ehci_ops = {
.set_usb_mode = ehci_set_usbmode,
.get_port_speed = ehci_get_port_speed,
.powerup_fixup = ehci_powerup_fixup,
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 7dc37f0..1c72330 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -17,7 +17,6 @@
#include <usb.h>
#include <usb/ulpi.h>
#include <libfdt.h>
-#include <fdtdec.h>
#include "ehci.h"
@@ -695,12 +694,11 @@
static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config)
{
- const void *blob = gd->fdt_blob;
- int node = dev_of_offset(dev);
const char *phy, *mode;
- config->reg = (struct usb_ctlr *)devfdt_get_addr(dev);
- mode = fdt_getprop(blob, node, "dr_mode", NULL);
+ config->reg = (struct usb_ctlr *)dev_read_addr(dev);
+ debug("reg=%p\n", config->reg);
+ mode = dev_read_string(dev, "dr_mode");
if (mode) {
if (0 == strcmp(mode, "host"))
config->dr_mode = DR_MODE_HOST;
@@ -717,28 +715,24 @@
config->dr_mode = DR_MODE_HOST;
}
- phy = fdt_getprop(blob, node, "phy_type", NULL);
+ phy = dev_read_string(dev, "phy_type");
config->utmi = phy && 0 == strcmp("utmi", phy);
config->ulpi = phy && 0 == strcmp("ulpi", phy);
- config->enabled = fdtdec_get_is_enabled(blob, node);
- config->has_legacy_mode = fdtdec_get_bool(blob, node,
- "nvidia,has-legacy-mode");
- config->periph_id = clock_decode_periph_id(blob, node);
+ config->has_legacy_mode = dev_read_bool(dev, "nvidia,has-legacy-mode");
+ config->periph_id = clock_decode_periph_id(dev);
if (config->periph_id == PERIPH_ID_NONE) {
debug("%s: Missing/invalid peripheral ID\n", __func__);
return -EINVAL;
}
- gpio_request_by_name_nodev(offset_to_ofnode(node), "nvidia,vbus-gpio",
- 0, &config->vbus_gpio, GPIOD_IS_OUT);
- gpio_request_by_name_nodev(offset_to_ofnode(node),
- "nvidia,phy-reset-gpio", 0,
- &config->phy_reset_gpio, GPIOD_IS_OUT);
- debug("enabled=%d, legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, "
- "vbus=%d, phy_reset=%d, dr_mode=%d\n",
- config->enabled, config->has_legacy_mode, config->utmi,
- config->ulpi, config->periph_id,
- gpio_get_number(&config->vbus_gpio),
- gpio_get_number(&config->phy_reset_gpio), config->dr_mode);
+ gpio_request_by_name(dev, "nvidia,vbus-gpio", 0, &config->vbus_gpio,
+ GPIOD_IS_OUT);
+ gpio_request_by_name(dev, "nvidia,phy-reset-gpio", 0,
+ &config->phy_reset_gpio, GPIOD_IS_OUT);
+ debug("legacy_mode=%d, utmi=%d, ulpi=%d, periph_id=%d, vbus=%d, phy_reset=%d, dr_mode=%d, reg=%p\n",
+ config->has_legacy_mode, config->utmi, config->ulpi,
+ config->periph_id, gpio_get_number(&config->vbus_gpio),
+ gpio_get_number(&config->phy_reset_gpio), config->dr_mode,
+ config->reg);
return 0;
}
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 2ab830d..7c39bec 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -11,9 +11,8 @@
#include <usb.h>
-#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-#endif
+/* Section 2.2.3 - N_PORTS */
+#define MAX_HC_PORTS 15
/*
* Register Space.
@@ -62,7 +61,7 @@
uint32_t _reserved_1_[6];
uint32_t or_configflag;
#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */
- uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS];
+ uint32_t or_portsc[MAX_HC_PORTS];
#define PORTSC_PSPD(x) (((x) >> 26) & 0x3)
#define PORTSC_PSPD_FS 0x0
#define PORTSC_PSPD_LS 0x1
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index f85738f..e22ee97 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -5,7 +5,11 @@
*/
#include <common.h>
+#include <clk.h>
#include <dm.h>
+#include <dm/ofnode.h>
+#include <generic-phy.h>
+#include <reset.h>
#include "ohci.h"
#if !defined(CONFIG_USB_OHCI_NEW)
@@ -14,18 +18,133 @@
struct generic_ohci {
ohci_t ohci;
+ struct clk *clocks; /* clock list */
+ struct reset_ctl *resets; /* reset list */
+ struct phy phy;
+ int clock_count; /* number of clock in clock list */
+ int reset_count; /* number of reset in reset list */
};
static int ohci_usb_probe(struct udevice *dev)
{
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int i, err, ret, clock_nb, reset_nb;
- return ohci_register(dev, regs);
+ err = 0;
+ priv->clock_count = 0;
+ clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+ if (clock_nb > 0) {
+ priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+ GFP_KERNEL);
+ if (!priv->clocks)
+ return -ENOMEM;
+
+ for (i = 0; i < clock_nb; i++) {
+ err = clk_get_by_index(dev, i, &priv->clocks[i]);
+ if (err < 0)
+ break;
+
+ err = clk_enable(&priv->clocks[i]);
+ if (err) {
+ error("failed to enable clock %d\n", i);
+ clk_free(&priv->clocks[i]);
+ goto clk_err;
+ }
+ priv->clock_count++;
+ }
+ } else if (clock_nb != -ENOENT) {
+ error("failed to get clock phandle(%d)\n", clock_nb);
+ return clock_nb;
+ }
+
+ priv->reset_count = 0;
+ reset_nb = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
+ if (reset_nb > 0) {
+ priv->resets = devm_kcalloc(dev, reset_nb,
+ sizeof(struct reset_ctl),
+ GFP_KERNEL);
+ if (!priv->resets)
+ return -ENOMEM;
+
+ for (i = 0; i < reset_nb; i++) {
+ err = reset_get_by_index(dev, i, &priv->resets[i]);
+ if (err < 0)
+ break;
+
+ err = reset_deassert(&priv->resets[i]);
+ if (err) {
+ error("failed to deassert reset %d\n", i);
+ reset_free(&priv->resets[i]);
+ goto reset_err;
+ }
+ priv->reset_count++;
+ }
+ } else if (reset_nb != -ENOENT) {
+ error("failed to get reset phandle(%d)\n", reset_nb);
+ goto clk_err;
+ }
+
+ err = generic_phy_get_by_index(dev, 0, &priv->phy);
+ if (err) {
+ if (err != -ENOENT) {
+ error("failed to get usb phy\n");
+ goto reset_err;
+ }
+ } else {
+
+ err = generic_phy_init(&priv->phy);
+ if (err) {
+ error("failed to init usb phy\n");
+ goto reset_err;
+ }
+ }
+
+ err = ohci_register(dev, regs);
+ if (err)
+ goto phy_err;
+
+ return 0;
+
+phy_err:
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ error("failed to release phy\n");
+ }
+
+reset_err:
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ error("failed to assert all resets\n");
+clk_err:
+ ret = clk_release_all(priv->clocks, priv->clock_count);
+ if (ret)
+ error("failed to disable all clocks\n");
+
+ return err;
}
static int ohci_usb_remove(struct udevice *dev)
{
- return ohci_deregister(dev);
+ struct generic_ohci *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = ohci_deregister(dev);
+ if (ret)
+ return ret;
+
+ if (generic_phy_valid(&priv->phy)) {
+ ret = generic_phy_exit(&priv->phy);
+ if (ret)
+ return ret;
+ }
+
+ ret = reset_release_all(priv->resets, priv->reset_count);
+ if (ret)
+ return ret;
+
+ return clk_release_all(priv->clocks, priv->clock_count);
}
static const struct udevice_id ohci_usb_ids[] = {
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 110ddc9..0b8a501 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -139,6 +139,17 @@
return ops->reset_root_port(bus, udev);
}
+int usb_update_hub_device(struct usb_device *udev)
+{
+ struct udevice *bus = udev->controller_dev;
+ struct dm_usb_ops *ops = usb_get_ops(bus);
+
+ if (!ops->update_hub_device)
+ return -ENOSYS;
+
+ return ops->update_hub_device(bus, udev);
+}
+
int usb_stop(void)
{
struct udevice *bus;
@@ -177,7 +188,6 @@
#ifdef CONFIG_USB_STORAGE
usb_stor_reset();
#endif
- usb_hub_reset();
uc_priv->companion_device_count = 0;
usb_started = 0;
@@ -230,7 +240,6 @@
int ret;
asynch_allowed = 1;
- usb_hub_reset();
ret = uclass_get(UCLASS_USB, &uc);
if (ret)
@@ -373,8 +382,8 @@
}
/* returns 0 if no match, 1 if match */
-int usb_match_device(const struct usb_device_descriptor *desc,
- const struct usb_device_id *id)
+static int usb_match_device(const struct usb_device_descriptor *desc,
+ const struct usb_device_id *id)
{
if ((id->match_flags & USB_DEVICE_ID_MATCH_VENDOR) &&
id->idVendor != le16_to_cpu(desc->idVendor))
@@ -410,9 +419,9 @@
}
/* returns 0 if no match, 1 if match */
-int usb_match_one_id_intf(const struct usb_device_descriptor *desc,
- const struct usb_interface_descriptor *int_desc,
- const struct usb_device_id *id)
+static int usb_match_one_id_intf(const struct usb_device_descriptor *desc,
+ const struct usb_interface_descriptor *int_desc,
+ const struct usb_device_id *id)
{
/* The interface class, subclass, protocol and number should never be
* checked for a match if the device class is Vendor Specific,
@@ -445,9 +454,9 @@
}
/* returns 0 if no match, 1 if match */
-int usb_match_one_id(struct usb_device_descriptor *desc,
- struct usb_interface_descriptor *int_desc,
- const struct usb_device_id *id)
+static int usb_match_one_id(struct usb_device_descriptor *desc,
+ struct usb_interface_descriptor *int_desc,
+ const struct usb_device_id *id)
{
if (!usb_match_device(desc, id))
return 0;
@@ -680,7 +689,7 @@
return change;
}
-int usb_child_post_bind(struct udevice *dev)
+static int usb_child_post_bind(struct udevice *dev)
{
struct usb_dev_platdata *plat = dev_get_parent_platdata(dev);
int val;
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 33961cd..4191a89 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -9,8 +9,21 @@
*/
#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <generic-phy.h>
+#include <usb.h>
+
+#include "xhci.h"
#include <asm/io.h>
#include <linux/usb/dwc3.h>
+#include <linux/usb/otg.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct xhci_dwc3_platdata {
+ struct phy usb_phy;
+};
void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
{
@@ -19,7 +32,7 @@
DWC3_GCTL_PRTCAPDIR(mode));
}
-void dwc3_phy_reset(struct dwc3 *dwc3_reg)
+static void dwc3_phy_reset(struct dwc3 *dwc3_reg)
{
/* Assert USB3 PHY reset */
setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
@@ -97,3 +110,79 @@
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
}
+
+#ifdef CONFIG_DM_USB
+static int xhci_dwc3_probe(struct udevice *dev)
+{
+ struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ struct xhci_hcor *hcor;
+ struct xhci_hccr *hccr;
+ struct dwc3 *dwc3_reg;
+ enum usb_dr_mode dr_mode;
+ int ret;
+
+ hccr = (struct xhci_hccr *)((uintptr_t)dev_read_addr(dev));
+ hcor = (struct xhci_hcor *)((uintptr_t)hccr +
+ HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+ ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
+ if (ret) {
+ if (ret != -ENOENT) {
+ error("Failed to get USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ } else {
+ ret = generic_phy_init(&plat->usb_phy);
+ if (ret) {
+ error("Can't init USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ }
+
+ dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
+
+ dwc3_core_init(dwc3_reg);
+
+ dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+ if (dr_mode == USB_DR_MODE_UNKNOWN)
+ /* by default set dual role mode to HOST */
+ dr_mode = USB_DR_MODE_HOST;
+
+ dwc3_set_mode(dwc3_reg, dr_mode);
+
+ return xhci_register(dev, hccr, hcor);
+}
+
+static int xhci_dwc3_remove(struct udevice *dev)
+{
+ struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+ int ret;
+
+ if (generic_phy_valid(&plat->usb_phy)) {
+ ret = generic_phy_exit(&plat->usb_phy);
+ if (ret) {
+ error("Can't deinit USB PHY for %s\n", dev->name);
+ return ret;
+ }
+ }
+
+ return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_dwc3_ids[] = {
+ { .compatible = "snps,dwc3" },
+ { }
+};
+
+U_BOOT_DRIVER(xhci_dwc3) = {
+ .name = "xhci-dwc3",
+ .id = UCLASS_USB,
+ .of_match = xhci_dwc3_ids,
+ .probe = xhci_dwc3_probe,
+ .remove = xhci_dwc3_remove,
+ .ops = &xhci_usb_ops,
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
+ .platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 62db51d..d5eab3a 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -96,6 +96,25 @@
}
/**
+ * Free the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl host controller data structure
+ * @return none
+ */
+static void xhci_scratchpad_free(struct xhci_ctrl *ctrl)
+{
+ if (!ctrl->scratchpad)
+ return;
+
+ ctrl->dcbaa->dev_context_ptrs[0] = 0;
+
+ free((void *)(uintptr_t)ctrl->scratchpad->sp_array[0]);
+ free(ctrl->scratchpad->sp_array);
+ free(ctrl->scratchpad);
+ ctrl->scratchpad = NULL;
+}
+
+/**
* frees the "xhci_container_ctx" pointer passed
*
* @param ptr pointer to "xhci_container_ctx" to be freed
@@ -155,6 +174,7 @@
{
xhci_ring_free(ctrl->event_ring);
xhci_ring_free(ctrl->cmd_ring);
+ xhci_scratchpad_free(ctrl);
xhci_free_virt_devices(ctrl);
free(ctrl->erst.entries);
free(ctrl->dcbaa);
@@ -320,6 +340,70 @@
}
/**
+ * Set up the scratchpad buffer array and scratchpad buffers
+ *
+ * @ctrl host controller data structure
+ * @return -ENOMEM if buffer allocation fails, 0 on success
+ */
+static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
+{
+ struct xhci_hccr *hccr = ctrl->hccr;
+ struct xhci_hcor *hcor = ctrl->hcor;
+ struct xhci_scratchpad *scratchpad;
+ int num_sp;
+ uint32_t page_size;
+ void *buf;
+ int i;
+
+ num_sp = HCS_MAX_SCRATCHPAD(xhci_readl(&hccr->cr_hcsparams2));
+ if (!num_sp)
+ return 0;
+
+ scratchpad = malloc(sizeof(*scratchpad));
+ if (!scratchpad)
+ goto fail_sp;
+ ctrl->scratchpad = scratchpad;
+
+ scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64));
+ if (!scratchpad->sp_array)
+ goto fail_sp2;
+ ctrl->dcbaa->dev_context_ptrs[0] =
+ cpu_to_le64((uintptr_t)scratchpad->sp_array);
+
+ page_size = xhci_readl(&hcor->or_pagesize) & 0xffff;
+ for (i = 0; i < 16; i++) {
+ if ((0x1 & page_size) != 0)
+ break;
+ page_size = page_size >> 1;
+ }
+ BUG_ON(i == 16);
+
+ page_size = 1 << (i + 12);
+ buf = memalign(page_size, num_sp * page_size);
+ if (!buf)
+ goto fail_sp3;
+ memset(buf, '\0', num_sp * page_size);
+ xhci_flush_cache((uintptr_t)buf, num_sp * page_size);
+
+ for (i = 0; i < num_sp; i++) {
+ uintptr_t ptr = (uintptr_t)buf + i * page_size;
+ scratchpad->sp_array[i] = cpu_to_le64(ptr);
+ }
+
+ return 0;
+
+fail_sp3:
+ free(scratchpad->sp_array);
+
+fail_sp2:
+ free(scratchpad);
+ ctrl->scratchpad = NULL;
+
+fail_sp:
+ return -ENOMEM;
+}
+
+/**
* Allocates the Container context
*
* @param ctrl Host controller data structure
@@ -499,6 +583,9 @@
xhci_writeq(&ctrl->ir_set->erst_base, val_64);
+ /* set up the scratchpad buffer array and scratchpad buffers */
+ xhci_scratchpad_alloc(ctrl);
+
/* initializing the virtual devices to NULL */
for (i = 0; i < MAX_HC_SLOTS; ++i)
ctrl->devs[i] = NULL;
@@ -626,14 +713,21 @@
* @param udev pointer to the Device Data Structure
* @return returns negative value on failure else 0 on success
*/
-void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, int slot_id,
- int speed, int hop_portnr)
+void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
+ struct usb_device *udev, int hop_portnr)
{
struct xhci_virt_device *virt_dev;
struct xhci_ep_ctx *ep0_ctx;
struct xhci_slot_ctx *slot_ctx;
u32 port_num = 0;
u64 trb_64 = 0;
+ int slot_id = udev->slot_id;
+ int speed = udev->speed;
+ int route = 0;
+#ifdef CONFIG_DM_USB
+ struct usb_device *dev = udev;
+ struct usb_hub_device *hub;
+#endif
virt_dev = ctrl->devs[slot_id];
@@ -644,7 +738,32 @@
slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->in_ctx);
/* Only the control endpoint is valid - one endpoint context */
- slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | 0);
+ slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
+
+#ifdef CONFIG_DM_USB
+ /* Calculate the route string for this device */
+ port_num = dev->portnr;
+ while (!usb_hub_is_root_hub(dev->dev)) {
+ hub = dev_get_uclass_priv(dev->dev);
+ /*
+ * Each hub in the topology is expected to have no more than
+ * 15 ports in order for the route string of a device to be
+ * unique. SuperSpeed hubs are restricted to only having 15
+ * ports, but FS/LS/HS hubs are not. The xHCI specification
+ * says that if the port number the device is greater than 15,
+ * that portion of the route string shall be set to 15.
+ */
+ if (port_num > 15)
+ port_num = 15;
+ route |= port_num << (hub->hub_depth * 4);
+ dev = dev_get_parent_priv(dev->dev);
+ port_num = dev->portnr;
+ dev = dev_get_parent_priv(dev->dev->parent);
+ }
+
+ debug("route string %x\n", route);
+#endif
+ slot_ctx->dev_info |= route;
switch (speed) {
case USB_SPEED_SUPER:
@@ -664,6 +783,20 @@
BUG();
}
+#ifdef CONFIG_DM_USB
+ /* Set up TT fields to support FS/LS devices */
+ if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
+ dev = dev_get_parent_priv(udev->dev);
+ if (dev->speed == USB_SPEED_HIGH) {
+ hub = dev_get_uclass_priv(udev->dev);
+ if (hub->tt.multi)
+ slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
+ slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr));
+ slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id));
+ }
+ }
+#endif
+
port_num = hop_portnr;
debug("port_num = %d\n", port_num);
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 63daaa6..e4a0ef4 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -8,66 +8,10 @@
#include <common.h>
#include <dm.h>
-#include <errno.h>
#include <pci.h>
#include <usb.h>
-
#include "xhci.h"
-#ifndef CONFIG_DM_USB
-
-/*
- * Create the appropriate control structures to manage a new XHCI host
- * controller.
- */
-int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
- struct xhci_hcor **ret_hcor)
-{
- struct xhci_hccr *hccr;
- struct xhci_hcor *hcor;
- pci_dev_t pdev;
- uint32_t cmd;
- int len;
-
- pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index);
- if (pdev < 0) {
- printf("XHCI host controller not found\n");
- return -1;
- }
-
- hccr = (struct xhci_hccr *)pci_map_bar(pdev,
- PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
- len = HC_LENGTH(xhci_readl(&hccr->cr_capbase));
- hcor = (struct xhci_hcor *)((uint32_t)hccr + len);
-
- debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
- (uint32_t)hccr, (uint32_t)hcor, len);
-
- *ret_hccr = hccr;
- *ret_hcor = hcor;
-
- /* enable busmaster */
- pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- pci_write_config_dword(pdev, PCI_COMMAND, cmd);
-
- return 0;
-}
-
-/*
- * Destroy the appropriate control structures corresponding * to the XHCI host
- * controller
- */
-void xhci_hcd_stop(int index)
-{
-}
-
-#else
-
-struct xhci_pci_priv {
- struct xhci_ctrl ctrl; /* Needs to come first in this struct! */
-};
-
static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
struct xhci_hcor **ret_hcor)
{
@@ -103,17 +47,6 @@
return xhci_register(dev, hccr, hcor);
}
-static int xhci_pci_remove(struct udevice *dev)
-{
- int ret;
-
- ret = xhci_deregister(dev);
- if (ret)
- return ret;
-
- return 0;
-}
-
static const struct udevice_id xhci_pci_ids[] = {
{ .compatible = "xhci-pci" },
{ }
@@ -123,11 +56,11 @@
.name = "xhci_pci",
.id = UCLASS_USB,
.probe = xhci_pci_probe,
- .remove = xhci_pci_remove,
+ .remove = xhci_deregister,
.of_match = xhci_pci_ids,
.ops = &xhci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
- .priv_auto_alloc_size = sizeof(struct xhci_pci_priv),
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};
@@ -137,5 +70,3 @@
};
U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
-
-#endif /* CONFIG_DM_USB */
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 2675a8f..579e670 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -280,8 +280,15 @@
fields[0] = lower_32_bits(val_64);
fields[1] = upper_32_bits(val_64);
fields[2] = 0;
- fields[3] = TRB_TYPE(cmd) | EP_ID_FOR_TRB(ep_index) |
- SLOT_ID_FOR_TRB(slot_id) | ctrl->cmd_ring->cycle_state;
+ fields[3] = TRB_TYPE(cmd) | SLOT_ID_FOR_TRB(slot_id) |
+ ctrl->cmd_ring->cycle_state;
+
+ /*
+ * Only 'reset endpoint', 'stop endpoint' and 'set TR dequeue pointer'
+ * commands need endpoint id encoded.
+ */
+ if (cmd >= TRB_RESET_EP && cmd <= TRB_SET_DEQ)
+ fields[3] |= EP_ID_FOR_TRB(ep_index);
queue_trb(ctrl, ctrl->cmd_ring, false, fields);
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 3201177..9b82ee5 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -50,8 +50,8 @@
cpu_to_le16(0x8), /* wHubCharacteristics */
10, /* bPwrOn2PwrGood */
0, /* bHubCntrCurrent */
- {}, /* Device removable */
- {} /* at most 7 ports! XXX */
+ { /* Device removable */
+ } /* at most 7 ports! XXX */
},
{
0x12, /* bLength */
@@ -192,7 +192,7 @@
* @param hcor pointer to host controller operation registers
* @return -EBUSY if XHCI Controller is not halted else status of handshake
*/
-int xhci_reset(struct xhci_hcor *hcor)
+static int xhci_reset(struct xhci_hcor *hcor)
{
u32 cmd;
u32 state;
@@ -332,8 +332,8 @@
ifdesc = &udev->config.if_desc[0];
ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
- /* Zero the input context control */
- ctrl_ctx->add_flags = 0;
+ /* Initialize the input context control */
+ ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
ctrl_ctx->drop_flags = 0;
/* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
@@ -415,8 +415,7 @@
* so setting up the slot context.
*/
debug("Setting up addressable devices %p\n", ctrl->dcbaa);
- xhci_setup_addressable_virt_dev(ctrl, udev->slot_id, udev->speed,
- root_portnr);
+ xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr);
ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
@@ -481,7 +480,7 @@
* @param udev pointer to the Device Data Structure
* @return Returns 0 on succes else return error code on failure
*/
-int _xhci_alloc_device(struct usb_device *udev)
+static int _xhci_alloc_device(struct usb_device *udev)
{
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
union xhci_trb *event;
@@ -668,12 +667,14 @@
uint32_t reg;
volatile uint32_t *status_reg;
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
+ struct xhci_hccr *hccr = ctrl->hccr;
struct xhci_hcor *hcor = ctrl->hcor;
+ int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
if ((req->requesttype & USB_RT_PORT) &&
- le16_to_cpu(req->index) > CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) {
- printf("The request port(%d) is not configured\n",
- le16_to_cpu(req->index) - 1);
+ le16_to_cpu(req->index) > max_ports) {
+ printf("The request port(%d) exceeds maximum port number\n",
+ le16_to_cpu(req->index) - 1);
return -EINVAL;
}
@@ -727,6 +728,7 @@
case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
switch (le16_to_cpu(req->value) >> 8) {
case USB_DT_HUB:
+ case USB_DT_SS_HUB:
debug("USB_DT_HUB config\n");
srcptr = &descriptor.hub;
srclen = 0x8;
@@ -1113,26 +1115,6 @@
#endif /* CONFIG_DM_USB */
#ifdef CONFIG_DM_USB
-/*
-static struct usb_device *get_usb_device(struct udevice *dev)
-{
- struct usb_device *udev;
-
- if (device_get_uclass_id(dev) == UCLASS_USB)
- udev = dev_get_uclass_priv(dev);
- else
- udev = dev_get_parent_priv(dev);
-
- return udev;
-}
-*/
-static bool is_root_hub(struct udevice *dev)
-{
- if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB)
- return true;
-
- return false;
-}
static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
unsigned long pipe, void *buffer, int length,
@@ -1147,10 +1129,10 @@
hub = udev->dev;
if (device_get_uclass_id(hub) == UCLASS_USB_HUB) {
/* Figure out our port number on the root hub */
- if (is_root_hub(hub)) {
+ if (usb_hub_is_root_hub(hub)) {
root_portnr = udev->portnr;
} else {
- while (!is_root_hub(hub->parent))
+ while (!usb_hub_is_root_hub(hub->parent))
hub = hub->parent;
uhop = dev_get_parent_priv(hub);
root_portnr = uhop->portnr;
@@ -1188,6 +1170,64 @@
return _xhci_alloc_device(udev);
}
+static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
+{
+ struct xhci_ctrl *ctrl = dev_get_priv(dev);
+ struct usb_hub_device *hub = dev_get_uclass_priv(udev->dev);
+ struct xhci_virt_device *virt_dev;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_container_ctx *out_ctx;
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_slot_ctx *slot_ctx;
+ int slot_id = udev->slot_id;
+ unsigned think_time;
+
+ debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
+
+ /* Ignore root hubs */
+ if (usb_hub_is_root_hub(udev->dev))
+ return 0;
+
+ virt_dev = ctrl->devs[slot_id];
+ BUG_ON(!virt_dev);
+
+ out_ctx = virt_dev->out_ctx;
+ in_ctx = virt_dev->in_ctx;
+
+ ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
+ /* Initialize the input context control */
+ ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
+ ctrl_ctx->drop_flags = 0;
+
+ xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
+
+ /* slot context */
+ xhci_slot_copy(ctrl, in_ctx, out_ctx);
+ slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
+
+ /* Update hub related fields */
+ slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
+ if (hub->tt.multi && udev->speed == USB_SPEED_HIGH)
+ slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
+ slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
+ /*
+ * Set TT think time - convert from ns to FS bit times.
+ * Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns
+ *
+ * 0 = 8 FS bit times, 1 = 16 FS bit times,
+ * 2 = 24 FS bit times, 3 = 32 FS bit times.
+ *
+ * This field shall be 0 if the device is not a high-spped hub.
+ */
+ think_time = hub->tt.think_time;
+ if (think_time != 0)
+ think_time = (think_time / 666) - 1;
+ if (udev->speed == USB_SPEED_HIGH)
+ slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
+
+ return xhci_configure_endpoints(udev, false);
+}
+
int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
struct xhci_hcor *hcor)
{
@@ -1240,6 +1280,7 @@
.bulk = xhci_submit_bulk_msg,
.interrupt = xhci_submit_int_msg,
.alloc_device = xhci_alloc_device,
+ .update_hub_device = xhci_update_hub_device,
};
#endif
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 2afa386..a497d9d 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -30,7 +30,7 @@
/* Max number of USB devices for any host controller - limit in section 6.1 */
#define MAX_HC_SLOTS 256
/* Section 5.3.3 - MaxPorts */
-#define MAX_HC_PORTS 127
+#define MAX_HC_PORTS 255
/* Up to 16 ms to halt an HC */
#define XHCI_MAX_HALT_USEC (16*1000)
@@ -102,8 +102,8 @@
#define HCS_MAX_INTRS(p) (((p) >> 8) & 0x7ff)
/* bits 24:31, Max Ports - max value is 0x7F = 127 ports */
#define HCS_MAX_PORTS_SHIFT 24
-#define HCS_MAX_PORTS_MASK (0x7f << HCS_MAX_PORTS_SHIFT)
-#define HCS_MAX_PORTS(p) (((p) >> 24) & 0x7f)
+#define HCS_MAX_PORTS_MASK (0xff << HCS_MAX_PORTS_SHIFT)
+#define HCS_MAX_PORTS(p) (((p) >> 24) & 0xff)
/* HCSPARAMS2 - hcs_params2 - bitmasks */
/* bits 0:3, frames or uframes that SW needs to queue transactions
@@ -111,9 +111,10 @@
#define HCS_IST(p) (((p) >> 0) & 0xf)
/* bits 4:7, max number of Event Ring segments */
#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
+/* bits 21:25 Hi 5 bits of Scratchpad buffers SW must allocate for the HW */
/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
-/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
-#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
+/* bits 27:31 Lo 5 bits of Scratchpad buffers SW must allocate for the HW */
+#define HCS_MAX_SCRATCHPAD(p) ((((p) >> 16) & 0x3e0) | (((p) >> 27) & 0x1f))
/* HCSPARAMS3 - hcs_params3 - bitmasks */
/* bits 0:7, Max U1 to U0 latency for the roothub ports */
@@ -171,9 +172,7 @@
volatile uint64_t or_dcbaap;
volatile uint32_t or_config;
volatile uint32_t reserved_2[241];
- struct xhci_hcor_port_regs portregs[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS];
-
- uint32_t reserved_4[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS * 254];
+ struct xhci_hcor_port_regs portregs[MAX_HC_PORTS];
};
/* USBCMD - USB command - command bitmasks */
@@ -482,10 +481,9 @@
* @type: Type of context. Used to calculated offsets to contained contexts.
* @size: Size of the context data
* @bytes: The raw context data given to HW
- * @dma: dma address of the bytes
*
* Represents either a Device or Input context. Holds a pointer to the raw
- * memory used for the context (bytes) and dma address of it (dma).
+ * memory used for the context (bytes).
*/
struct xhci_container_ctx {
unsigned type;
@@ -550,12 +548,12 @@
* The Slot ID of the hub that isolates the high speed signaling from
* this low or full-speed device. '0' if attached to root hub port.
*/
-#define TT_SLOT (0xff)
+#define TT_SLOT(p) (((p) & 0xff) << 0)
/*
* The number of the downstream facing port of the high-speed hub
* '0' if the device is not low or full speed.
*/
-#define TT_PORT (0xff << 8)
+#define TT_PORT(p) (((p) & 0xff) << 8)
#define TT_THINK_TIME(p) (((p) & 0x3) << 16)
/* dev_state bitmasks */
@@ -1038,6 +1036,10 @@
unsigned int erst_size;
};
+struct xhci_scratchpad {
+ u64 *sp_array;
+};
+
/*
* Each segment table entry is 4*32bits long. 1K seems like an ok size:
* (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
@@ -1225,6 +1227,7 @@
struct xhci_intr_reg *ir_set;
struct xhci_erst erst;
struct xhci_erst_entry entry[ERST_NUM_SEGS];
+ struct xhci_scratchpad *scratchpad;
struct xhci_virt_device *devs[MAX_HC_SLOTS];
int rootdev;
};
@@ -1244,8 +1247,8 @@
void xhci_slot_copy(struct xhci_ctrl *ctrl,
struct xhci_container_ctx *in_ctx,
struct xhci_container_ctx *out_ctx);
-void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, int slot_id,
- int speed, int hop_portnr);
+void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
+ struct usb_device *udev, int hop_portnr);
void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr,
u32 slot_id, u32 ep_index, trb_type cmd);
void xhci_acknowledge_event(struct xhci_ctrl *ctrl);
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 61dfed8..082cc4a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -562,36 +562,9 @@
console jump but can help speed up operation when scrolling
is slow.
-config VIDEO_CT69000
- bool "Enable Chips & Technologies 69000 video driver"
- depends on VIDEO
- help
- This enables a frame buffer driver for the Chips & Technologies
- ct69000, a fairly old graphics device (circa 2000) which is used
- on some hardware. It operates over the ISA bus, and supports
- some acceleration features.
-
- For the CT69000 and SMI_LYNXEM drivers, videomode is
- selected via environment 'videomode'. Two different ways
- are possible:
- - "videomode=num" 'num' is a standard LiLo mode numbers.
- Following standard modes are supported (* is default):
-
- Colors 640x480 800x600 1024x768 1152x864 1280x1024
- -------------+---------------------------------------------
- 8 bits | 0x301* 0x303 0x305 0x161 0x307
- 15 bits | 0x310 0x313 0x316 0x162 0x319
- 16 bits | 0x311 0x314 0x317 0x163 0x31A
- 24 bits | 0x312 0x315 0x318 ? 0x31B
- -------------+---------------------------------------------
- (i.e. setenv videomode 317; saveenv; reset;)
-
- - "videomode=bootargs" all the video parameters are parsed
- from the bootargs. (See drivers/video/videomodes.c)
-
config SYS_CONSOLE_BG_COL
hex "Background colour"
- depends on CFB_CONSOLE || VIDEO_CT69000
+ depends on CFB_CONSOLE
default 0x00
help
Defines the background colour for the console. The value is from
@@ -602,7 +575,7 @@
config SYS_CONSOLE_FG_COL
hex "Foreground colour"
- depends on CFB_CONSOLE || VIDEO_CT69000
+ depends on CFB_CONSOLE
default 0xa0
help
Defines the foreground colour for the console. The value is from
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ac5371f..5cf8909 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -28,16 +28,13 @@
obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o
-obj-$(CONFIG_L5F31188) += l5f31188.o
obj-$(CONFIG_PXA_LCD) += pxa_lcd.o
obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o
obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
obj-$(CONFIG_S6E63D6) += s6e63d6.o
obj-$(CONFIG_LD9040) += ld9040.o
-obj-$(CONFIG_SED156X) += sed156x.o
obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
-obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
@@ -49,7 +46,6 @@
obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o
-obj-$(CONFIG_VIDEO_SM501) += sm501.o
obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
obj-$(CONFIG_VIDEO_VESA) += vesa.o
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
index 07a29ea..5b6c422 100644
--- a/drivers/video/ati_radeon_fb.c
+++ b/drivers/video/ati_radeon_fb.c
@@ -637,7 +637,8 @@
videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
/* get video mode via environment */
- if ((penv = getenv ("videomode")) != NULL) {
+ penv = env_get("videomode");
+ if (penv) {
/* deceide if it is a string */
if (penv[0] <= '9') {
videomode = (int) simple_strtoul (penv, NULL, 16);
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index f548020..6c5425c 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -72,16 +72,6 @@
#include <video.h>
#include <linux/compiler.h>
-/*
- * Defines for the CT69000 driver
- */
-#ifdef CONFIG_VIDEO_CT69000
-
-#define VIDEO_FB_LITTLE_ENDIAN
-#define VIDEO_HW_RECTFILL
-#define VIDEO_HW_BITBLT
-#endif
-
#if defined(CONFIG_VIDEO_MXS)
#define VIDEO_FB_16BPP_WORD_SWAP
#endif
@@ -1866,7 +1856,7 @@
splash_get_pos(&video_logo_xpos, &video_logo_ypos);
#ifdef CONFIG_SPLASH_SCREEN
- s = getenv("splashimage");
+ s = env_get("splashimage");
if (s != NULL) {
ret = splash_screen_prepare();
if (ret < 0)
diff --git a/drivers/video/ct69000.c b/drivers/video/ct69000.c
deleted file mode 100644
index a74e4e6..0000000
--- a/drivers/video/ct69000.c
+++ /dev/null
@@ -1,1168 +0,0 @@
-/* ported from ctfb.c (linux kernel):
- * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de>
- *
- * Ported to U-Boot:
- * (C) Copyright 2002 Denis Peter, MPL AG Switzerland
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-
-#ifdef CONFIG_VIDEO
-
-#include <pci.h>
-#include <video_fb.h>
-#include "videomodes.h"
-
-/* debug */
-#undef VGA_DEBUG
-#undef VGA_DUMP_REG
-#ifdef VGA_DEBUG
-#undef _DEBUG
-#define _DEBUG 1
-#else
-#undef _DEBUG
-#define _DEBUG 0
-#endif
-
-/* Macros */
-#ifndef min
-#define min( a, b ) ( ( a ) < ( b ) ) ? ( a ) : ( b )
-#endif
-#ifndef max
-#define max( a, b ) ( ( a ) > ( b ) ) ? ( a ) : ( b )
-#endif
-#ifdef minmax
-#error "term minmax already used."
-#endif
-#define minmax( a, x, b ) max( ( a ), min( ( x ), ( b ) ) )
-#define N_ELTS( x ) ( sizeof( x ) / sizeof( x[ 0 ] ) )
-
-/* CT Register Offsets */
-#define CT_AR_O 0x3c0 /* Index and Data write port of the attribute Registers */
-#define CT_GR_O 0x3ce /* Index port of the Graphic Controller Registers */
-#define CT_SR_O 0x3c4 /* Index port of the Sequencer Controller */
-#define CT_CR_O 0x3d4 /* Index port of the CRT Controller */
-#define CT_XR_O 0x3d6 /* Extended Register index */
-#define CT_MSR_W_O 0x3c2 /* Misc. Output Register (write only) */
-#define CT_LUT_MASK_O 0x3c6 /* Color Palette Mask */
-#define CT_LUT_START_O 0x3c8 /* Color Palette Write Mode Index */
-#define CT_LUT_RGB_O 0x3c9 /* Color Palette Data Port */
-#define CT_STATUS_REG0_O 0x3c2 /* Status Register 0 (read only) */
-#define CT_STATUS_REG1_O 0x3da /* Input Status Register 1 (read only) */
-
-#define CT_FP_O 0x3d0 /* Index port of the Flat panel Registers */
-#define CT_MR_O 0x3d2 /* Index Port of the Multimedia Extension */
-
-/* defines for the memory mapped registers */
-#define BR00_o 0x400000 /* Source and Destination Span Register */
-#define BR01_o 0x400004 /* Pattern/Source Expansion Background Color & Transparency Key Register */
-#define BR02_o 0x400008 /* Pattern/Source Expansion Foreground Color Register */
-#define BR03_o 0x40000C /* Monochrome Source Control Register */
-#define BR04_o 0x400010 /* BitBLT Control Register */
-#define BR05_o 0x400014 /* Pattern Address Registe */
-#define BR06_o 0x400018 /* Source Address Register */
-#define BR07_o 0x40001C /* Destination Address Register */
-#define BR08_o 0x400020 /* Destination Width & Height Register */
-#define BR09_o 0x400024 /* Source Expansion Background Color & Transparency Key Register */
-#define BR0A_o 0x400028 /* Source Expansion Foreground Color Register */
-
-#define CURSOR_SIZE 0x1000 /* in KByte for HW Cursor */
-#define PATTERN_ADR (pGD->dprBase + CURSOR_SIZE) /* pattern Memory after Cursor Memory */
-#define PATTERN_SIZE 8*8*4 /* 4 Bytes per Pixel 8 x 8 Pixel */
-#define ACCELMEMORY (CURSOR_SIZE + PATTERN_SIZE) /* reserved Memory for BITBlt and hw cursor */
-
-/* Some Mode definitions */
-#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
-#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
-#define FB_SYNC_EXT 4 /* external sync */
-#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
-#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
- /* vtotal = 144d/288n/576i => PAL */
- /* vtotal = 121d/242n/484i => NTSC */
-#define FB_SYNC_ON_GREEN 32 /* sync on green */
-
-#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
-#define FB_VMODE_INTERLACED 1 /* interlaced */
-#define FB_VMODE_DOUBLE 2 /* double scan */
-#define FB_VMODE_MASK 255
-
-#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
-#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
-#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
-
-#define text 0
-#define fntwidth 8
-
-/* table for VGA Initialization */
-typedef struct {
- const unsigned char reg;
- const unsigned char val;
-} CT_CFG_TABLE;
-
-/* this table provides some basic initialisations such as Memory Clock etc */
-static CT_CFG_TABLE xreg[] = {
- {0x09, 0x01}, /* CRT Controller Extensions Enable */
- {0x0A, 0x02}, /* Frame Buffer Mapping */
- {0x0B, 0x01}, /* PCI Write Burst support */
- {0x20, 0x00}, /* BitBLT Configuration */
- {0x40, 0x03}, /* Memory Access Control */
- {0x60, 0x00}, /* Video Pin Control */
- {0x61, 0x00}, /* DPMS Synch control */
- {0x62, 0x00}, /* GPIO Pin Control */
- {0x63, 0xBD}, /* GPIO Pin Data */
- {0x67, 0x00}, /* Pin Tri-State */
- {0x80, 0x80}, /* Pixel Pipeline Config 0 register */
- {0xA0, 0x00}, /* Cursor 1 Control Reg */
- {0xA1, 0x00}, /* Cursor 1 Vertical Extension Reg */
- {0xA2, 0x00}, /* Cursor 1 Base Address Low */
- {0xA3, 0x00}, /* Cursor 1 Base Address High */
- {0xA4, 0x00}, /* Cursor 1 X-Position Low */
- {0xA5, 0x00}, /* Cursor 1 X-Position High */
- {0xA6, 0x00}, /* Cursor 1 Y-Position Low */
- {0xA7, 0x00}, /* Cursor 1 Y-Position High */
- {0xA8, 0x00}, /* Cursor 2 Control Reg */
- {0xA9, 0x00}, /* Cursor 2 Vertical Extension Reg */
- {0xAA, 0x00}, /* Cursor 2 Base Address Low */
- {0xAB, 0x00}, /* Cursor 2 Base Address High */
- {0xAC, 0x00}, /* Cursor 2 X-Position Low */
- {0xAD, 0x00}, /* Cursor 2 X-Position High */
- {0xAE, 0x00}, /* Cursor 2 Y-Position Low */
- {0xAF, 0x00}, /* Cursor 2 Y-Position High */
- {0xC0, 0x7D}, /* Dot Clock 0 VCO M-Divisor */
- {0xC1, 0x07}, /* Dot Clock 0 VCO N-Divisor */
- {0xC3, 0x34}, /* Dot Clock 0 Divisor select */
- {0xC4, 0x55}, /* Dot Clock 1 VCO M-Divisor */
- {0xC5, 0x09}, /* Dot Clock 1 VCO N-Divisor */
- {0xC7, 0x24}, /* Dot Clock 1 Divisor select */
- {0xC8, 0x7D}, /* Dot Clock 2 VCO M-Divisor */
- {0xC9, 0x07}, /* Dot Clock 2 VCO N-Divisor */
- {0xCB, 0x34}, /* Dot Clock 2 Divisor select */
- {0xCC, 0x38}, /* Memory Clock 0 VCO M-Divisor */
- {0xCD, 0x03}, /* Memory Clock 0 VCO N-Divisor */
- {0xCE, 0x90}, /* Memory Clock 0 Divisor select */
- {0xCF, 0x06}, /* Clock Config */
- {0xD0, 0x0F}, /* Power Down */
- {0xD1, 0x01}, /* Power Down BitBLT */
- {0xFF, 0xFF} /* end of table */
-};
-/* Clock Config:
- * =============
- *
- * PD Registers:
- * -------------
- * Bit2 and Bit4..6 are used for the Loop Divisor and Post Divisor.
- * They are encoded as follows:
- *
- * +---+--------------+
- * | 2 | Loop Divisor |
- * +---+--------------+
- * | 1 | 1 |
- * +---+--------------+
- * | 0 | 4 |
- * +---+--------------+
- * Note: The Memory Clock does not have a Loop Divisor.
- * +---+---+---+--------------+
- * | 6 | 5 | 4 | Post Divisor |
- * +---+---+---+--------------+
- * | 0 | 0 | 0 | 1 |
- * +---+---+---+--------------+
- * | 0 | 0 | 1 | 2 |
- * +---+---+---+--------------+
- * | 0 | 1 | 0 | 4 |
- * +---+---+---+--------------+
- * | 0 | 1 | 1 | 8 |
- * +---+---+---+--------------+
- * | 1 | 0 | 0 | 16 |
- * +---+---+---+--------------+
- * | 1 | 0 | 1 | 32 |
- * +---+---+---+--------------+
- * | 1 | 1 | X | reserved |
- * +---+---+---+--------------+
- *
- * All other bits are reserved in these registers.
- *
- * Clock VCO M Registers:
- * ----------------------
- * These Registers contain the M Value -2.
- *
- * Clock VCO N Registers:
- * ----------------------
- * These Registers contain the N Value -2.
- *
- * Formulas:
- * ---------
- * Fvco = (Fref * Loop Divisor * M/N), whereas 100MHz < Fvco < 220MHz
- * Fout = Fvco / Post Divisor
- *
- * Dot Clk0 (default 25MHz):
- * -------------------------
- * Fvco = 14.318 * 127 / 9 = 202.045MHz
- * Fout = 202.045MHz / 8 = 25.25MHz
- * Post Divisor = 8
- * Loop Divisor = 1
- * XRC0 = (M - 2) = 125 = 0x7D
- * XRC1 = (N - 2) = 7 = 0x07
- * XRC3 = 0x34
- *
- * Dot Clk1 (default 28MHz):
- * -------------------------
- * Fvco = 14.318 * 87 / 11 = 113.24MHz
- * Fout = 113.24MHz / 4 = 28.31MHz
- * Post Divisor = 4
- * Loop Divisor = 1
- * XRC4 = (M - 2) = 85 = 0x55
- * XRC5 = (N - 2) = 9 = 0x09
- * XRC7 = 0x24
- *
- * Dot Clk2 (variable for extended modes set to 25MHz):
- * ----------------------------------------------------
- * Fvco = 14.318 * 127 / 9 = 202.045MHz
- * Fout = 202.045MHz / 8 = 25.25MHz
- * Post Divisor = 8
- * Loop Divisor = 1
- * XRC8 = (M - 2) = 125 = 0x7D
- * XRC9 = (N - 2) = 7 = 0x07
- * XRCB = 0x34
- *
- * Memory Clk for most modes >50MHz:
- * ----------------------------------
- * Fvco = 14.318 * 58 / 5 = 166MHz
- * Fout = 166MHz / 2 = 83MHz
- * Post Divisor = 2
- * XRCC = (M - 2) = 57 = 0x38
- * XRCD = (N - 2) = 3 = 0x03
- * XRCE = 0x90
- *
- * Note Bit7 enables the clock source from the VCO
- *
- */
-
-/*******************************************************************
- * Chips struct
- *******************************************************************/
-struct ctfb_chips_properties {
- int device_id; /* PCI Device ID */
- unsigned long max_mem; /* memory for frame buffer */
- int vld_set; /* value of VLD if bit2 in clock control is set */
- int vld_not_set; /* value of VLD if bit2 in clock control is set */
- int mn_diff; /* difference between M/N Value + mn_diff = M/N Register */
- int mn_min; /* min value of M/N Value */
- int mn_max; /* max value of M/N Value */
- int vco_min; /* VCO Min in MHz */
- int vco_max; /* VCO Max in MHz */
-};
-
-static const struct ctfb_chips_properties chips[] = {
- {PCI_DEVICE_ID_CT_69000, 0x200000, 1, 4, -2, 3, 257, 100, 220},
- {PCI_DEVICE_ID_CT_65555, 0x100000, 16, 4, 0, 1, 255, 48, 220}, /* NOT TESTED */
- {0, 0, 0, 0, 0, 0, 0, 0, 0} /* Terminator */
-};
-
-/*
- * The Graphic Device
- */
-GraphicDevice ctfb;
-
-/*******************************************************************************
-*
-* Low Level Routines
-*/
-
-/*******************************************************************************
-*
-* Read CT ISA register
-*/
-#ifdef VGA_DEBUG
-static unsigned char
-ctRead (unsigned short index)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- if (index == CT_AR_O)
- /* synch the Flip Flop */
- in8 (pGD->isaBase + CT_STATUS_REG1_O);
-
- return (in8 (pGD->isaBase + index));
-}
-#endif
-/*******************************************************************************
-*
-* Write CT ISA register
-*/
-static void
-ctWrite (unsigned short index, unsigned char val)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-
- out8 ((pGD->isaBase + index), val);
-}
-
-/*******************************************************************************
-*
-* Read CT ISA register indexed
-*/
-static unsigned char
-ctRead_i (unsigned short index, char reg)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- if (index == CT_AR_O)
- /* synch the Flip Flop */
- in8 (pGD->isaBase + CT_STATUS_REG1_O);
- out8 ((pGD->isaBase + index), reg);
- return (in8 (pGD->isaBase + index + 1));
-}
-
-/*******************************************************************************
-*
-* Write CT ISA register indexed
-*/
-static void
-ctWrite_i (unsigned short index, char reg, char val)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- if (index == CT_AR_O) {
- /* synch the Flip Flop */
- in8 (pGD->isaBase + CT_STATUS_REG1_O);
- out8 ((pGD->isaBase + index), reg);
- out8 ((pGD->isaBase + index), val);
- } else {
- out8 ((pGD->isaBase + index), reg);
- out8 ((pGD->isaBase + index + 1), val);
- }
-}
-
-/*******************************************************************************
-*
-* Write a table of CT ISA register
-*/
-static void
-ctLoadRegs (unsigned short index, CT_CFG_TABLE * regTab)
-{
- while (regTab->reg != 0xFF) {
- ctWrite_i (index, regTab->reg, regTab->val);
- regTab++;
- }
-}
-
-/*****************************************************************************/
-static void
-SetArRegs (void)
-{
- int i, tmp;
-
- for (i = 0; i < 0x10; i++)
- ctWrite_i (CT_AR_O, i, i);
- if (text)
- tmp = 0x04;
- else
- tmp = 0x41;
-
- ctWrite_i (CT_AR_O, 0x10, tmp); /* Mode Control Register */
- ctWrite_i (CT_AR_O, 0x11, 0x00); /* Overscan Color Register */
- ctWrite_i (CT_AR_O, 0x12, 0x0f); /* Memory Plane Enable Register */
- if (fntwidth == 9)
- tmp = 0x08;
- else
- tmp = 0x00;
- ctWrite_i (CT_AR_O, 0x13, tmp); /* Horizontal Pixel Panning */
- ctWrite_i (CT_AR_O, 0x14, 0x00); /* Color Select Register */
- ctWrite (CT_AR_O, 0x20); /* enable video */
-}
-
-/*****************************************************************************/
-static void
-SetGrRegs (void)
-{ /* Set Graphics Mode */
- int i;
-
- for (i = 0; i < 0x05; i++)
- ctWrite_i (CT_GR_O, i, 0);
- if (text) {
- ctWrite_i (CT_GR_O, 0x05, 0x10);
- ctWrite_i (CT_GR_O, 0x06, 0x02);
- } else {
- ctWrite_i (CT_GR_O, 0x05, 0x40);
- ctWrite_i (CT_GR_O, 0x06, 0x05);
- }
- ctWrite_i (CT_GR_O, 0x07, 0x0f);
- ctWrite_i (CT_GR_O, 0x08, 0xff);
-}
-
-/*****************************************************************************/
-static void
-SetSrRegs (void)
-{
- int tmp = 0;
-
- ctWrite_i (CT_SR_O, 0x00, 0x00); /* reset */
- /*rr( sr, 0x01, tmp );
- if( fntwidth == 8 ) tmp |= 0x01; else tmp &= ~0x01;
- wr( sr, 0x01, tmp ); */
- if (fntwidth == 8)
- ctWrite_i (CT_SR_O, 0x01, 0x01); /* Clocking Mode Register */
- else
- ctWrite_i (CT_SR_O, 0x01, 0x00); /* Clocking Mode Register */
- ctWrite_i (CT_SR_O, 0x02, 0x0f); /* Enable CPU wr access to given memory plane */
- ctWrite_i (CT_SR_O, 0x03, 0x00); /* Character Map Select Register */
- if (text)
- tmp = 0x02;
- else
- tmp = 0x0e;
- ctWrite_i (CT_SR_O, 0x04, tmp); /* Enable CPU accesses to the rest of the 256KB
- total VGA memory beyond the first 64KB and set
- fb mapping mode. */
- ctWrite_i (CT_SR_O, 0x00, 0x03); /* enable */
-}
-
-/*****************************************************************************/
-static void
-SetBitsPerPixelIntoXrRegs (int bpp)
-{
- unsigned int n = (bpp >> 3), tmp; /* only for 15, 8, 16, 24 bpp */
- static char md[4] = { 0x04, 0x02, 0x05, 0x06 }; /* DisplayColorMode */
- static char off[4] = { ~0x20, ~0x30, ~0x20, ~0x10 }; /* mask */
- static char on[4] = { 0x10, 0x00, 0x10, 0x20 }; /* mask */
- if (bpp == 15)
- n = 0;
- tmp = ctRead_i (CT_XR_O, 0x20);
- tmp &= off[n];
- tmp |= on[n];
- ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
- ctWrite_i (CT_XR_O, 0x81, md[n]);
-}
-
-/*****************************************************************************/
-static void
-SetCrRegs (struct ctfb_res_modes *var, int bits_per_pixel)
-{ /* he -le- ht|0 hd -ri- hs -h- he */
- unsigned char cr[0x7a];
- int i, tmp;
- unsigned int hd, hs, he, ht, hbe; /* Horizontal. */
- unsigned int vd, vs, ve, vt; /* vertical */
- unsigned int bpp, wd, dblscan, interlaced, bcast, CrtHalfLine;
- unsigned int CompSyncCharClkDelay, CompSyncPixelClkDelay;
- unsigned int NTSC_PAL_HorizontalPulseWidth, BlDelayCtrl;
- unsigned int HorizontalEqualizationPulses;
- unsigned int HorizontalSerration1Start, HorizontalSerration2Start;
-
- const int LineCompare = 0x3ff;
- unsigned int TextScanLines = 1; /* this is in fact a vertical zoom factor */
- unsigned int RAMDAC_BlankPedestalEnable = 0; /* 1=en-, 0=disable, see XR82 */
-
- hd = (var->xres) / 8; /* HDisp. */
- hs = (var->xres + var->right_margin) / 8; /* HsStrt */
- he = (var->xres + var->right_margin + var->hsync_len) / 8; /* HsEnd */
- ht = (var->left_margin + var->xres + var->right_margin + var->hsync_len) / 8; /* HTotal */
- hbe = ht - 1; /* HBlankEnable todo docu wants ht here, but it does not work */
- /* ve -up- vt|0 vd -lo- vs -v- ve */
- vd = var->yres; /* VDisplay */
- vs = var->yres + var->lower_margin; /* VSyncStart */
- ve = var->yres + var->lower_margin + var->vsync_len; /* VSyncEnd */
- vt = var->upper_margin + var->yres + var->lower_margin + var->vsync_len; /* VTotal */
- bpp = bits_per_pixel;
- dblscan = (var->vmode & FB_VMODE_DOUBLE) ? 1 : 0;
- interlaced = var->vmode & FB_VMODE_INTERLACED;
- bcast = var->sync & FB_SYNC_BROADCAST;
- CrtHalfLine = bcast ? (hd >> 1) : 0;
- BlDelayCtrl = bcast ? 1 : 0;
- CompSyncCharClkDelay = 0; /* 2 bit */
- CompSyncPixelClkDelay = 0; /* 3 bit */
- if (bcast) {
- NTSC_PAL_HorizontalPulseWidth = 7; /*( var->hsync_len >> 1 ) + 1 */
- HorizontalEqualizationPulses = 0; /* inverse value */
- HorizontalSerration1Start = 31; /* ( ht >> 1 ) */
- HorizontalSerration2Start = 89; /* ( ht >> 1 ) */
- } else {
- NTSC_PAL_HorizontalPulseWidth = 0;
- /* 4 bit: hsync pulse width = ( ( CR74[4:0] - CR74[5] )
- * / 2 ) + 1 --> CR74[4:0] = 2*(hs-1) + CR74[5] */
- HorizontalEqualizationPulses = 1; /* inverse value */
- HorizontalSerration1Start = 0; /* ( ht >> 1 ) */
- HorizontalSerration2Start = 0; /* ( ht >> 1 ) */
- }
-
- if (bpp == 15)
- bpp = 16;
- wd = var->xres * bpp / 64; /* double words per line */
- if (interlaced) { /* we divide all vertical timings, exept vd */
- vs >>= 1;
- ve >>= 1;
- vt >>= 1;
- }
- memset (cr, 0, sizeof (cr));
- cr[0x00] = 0xff & (ht - 5);
- cr[0x01] = hd - 1; /* soll:4f ist 59 */
- cr[0x02] = hd;
- cr[0x03] = (hbe & 0x1F) | 0x80; /* hd + ht - hd */
- cr[0x04] = hs;
- cr[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
- cr[0x06] = (vt - 2) & 0xFF;
- cr[0x30] = (vt - 2) >> 8;
- cr[0x07] = ((vt & 0x100) >> 8)
- | ((vd & 0x100) >> 7)
- | ((vs & 0x100) >> 6)
- | ((vs & 0x100) >> 5)
- | ((LineCompare & 0x100) >> 4)
- | ((vt & 0x200) >> 4)
- | ((vd & 0x200) >> 3)
- | ((vs & 0x200) >> 2);
- cr[0x08] = 0x00;
- cr[0x09] = (dblscan << 7)
- | ((LineCompare & 0x200) >> 3)
- | ((vs & 0x200) >> 4)
- | (TextScanLines - 1);
- cr[0x10] = vs & 0xff; /* VSyncPulseStart */
- cr[0x32] = (vs & 0xf00) >> 8; /* VSyncPulseStart */
- cr[0x11] = (ve & 0x0f); /* | 0x20; */
- cr[0x12] = (vd - 1) & 0xff; /* LineCount */
- cr[0x31] = ((vd - 1) & 0xf00) >> 8; /* LineCount */
- cr[0x13] = wd & 0xff;
- cr[0x41] = (wd & 0xf00) >> 8;
- cr[0x15] = vs & 0xff;
- cr[0x33] = (vs & 0xf00) >> 8;
- cr[0x38] = (0x100 & (ht - 5)) >> 8;
- cr[0x3C] = 0xc0 & hbe;
- cr[0x16] = (vt - 1) & 0xff; /* vbe - docu wants vt here, */
- cr[0x17] = 0xe3; /* but it does not work */
- cr[0x18] = 0xff & LineCompare;
- cr[0x22] = 0xff; /* todo? */
- cr[0x70] = interlaced ? (0x80 | CrtHalfLine) : 0x00; /* check:0xa6 */
- cr[0x71] = 0x80 | (RAMDAC_BlankPedestalEnable << 6)
- | (BlDelayCtrl << 5)
- | ((0x03 & CompSyncCharClkDelay) << 3)
- | (0x07 & CompSyncPixelClkDelay); /* todo: see XR82 */
- cr[0x72] = HorizontalSerration1Start;
- cr[0x73] = HorizontalSerration2Start;
- cr[0x74] = (HorizontalEqualizationPulses << 5)
- | NTSC_PAL_HorizontalPulseWidth;
- /* todo: ct69000 has also 0x75-79 */
- /* now set the registers */
- for (i = 0; i <= 0x0d; i++) { /*CR00 .. CR0D */
- ctWrite_i (CT_CR_O, i, cr[i]);
- }
- for (i = 0x10; i <= 0x18; i++) { /*CR10 .. CR18 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- }
- i = 0x22; /*CR22 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- for (i = 0x30; i <= 0x33; i++) { /*CR30 .. CR33 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- }
- i = 0x38; /*CR38 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- i = 0x3C; /*CR3C */
- ctWrite_i (CT_CR_O, i, cr[i]);
- for (i = 0x40; i <= 0x41; i++) { /*CR40 .. CR41 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- }
- for (i = 0x70; i <= 0x74; i++) { /*CR70 .. CR74 */
- ctWrite_i (CT_CR_O, i, cr[i]);
- }
- tmp = ctRead_i (CT_CR_O, 0x40);
- tmp &= 0x0f;
- tmp |= 0x80;
- ctWrite_i (CT_CR_O, 0x40, tmp); /* StartAddressEnable */
-}
-
-/* pixelclock control */
-
-/*****************************************************************************
- We have a rational number p/q and need an m/n which is very close to p/q
- but has m and n within mnmin and mnmax. We have no floating point in the
- kernel. We can use long long without divide. And we have time to compute...
-******************************************************************************/
-static unsigned int
-FindBestPQFittingMN (unsigned int p, unsigned int q, unsigned int mnmin,
- unsigned int mnmax, unsigned int *pm, unsigned int *pn)
-{
- /* this code is not for general purpose usable but good for our number ranges */
- unsigned int n = mnmin, m = 0;
- long long int L = 0, P = p, Q = q, H = P >> 1;
- long long int D = 0x7ffffffffffffffLL;
- for (n = mnmin; n <= mnmax; n++) {
- m = mnmin; /* p/q ~ m/n -> p*n ~ m*q -> p*n-x*q ~ 0 */
- L = P * n - m * Q; /* n * vco - m * fref should be near 0 */
- while (L > 0 && m < mnmax) {
- L -= q; /* difference is greater as 0 subtract fref */
- m++; /* and increment m */
- }
- /* difference is less or equal than 0 or m > maximum */
- if (m > mnmax)
- break; /* no solution: if we increase n we get the same situation */
- /* L is <= 0 now */
- if (-L > H && m > mnmin) { /* if difference > the half fref */
- L += q; /* we take the situation before */
- m--; /* because its closer to 0 */
- }
- L = (L < 0) ? -L : +L; /* absolute value */
- if (D < L) /* if last difference was better take next n */
- continue;
- D = L;
- *pm = m;
- *pn = n; /* keep improved data */
- if (D == 0)
- break; /* best result we can get */
- }
- return (unsigned int) (0xffffffff & D);
-}
-
-/* that is the hardware < 69000 we have to manage
- +---------+ +-------------------+ +----------------------+ +--+
- | REFCLK |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__
- | 14.3MHz | |(NTSCDS) (÷1, ÷5) | |Select (RDS) (÷1, ÷4) | | | |
- +---------+ +-------------------+ +----------------------+ +--+ |
- ___________________________________________________________________|
- |
- | fvco fout
- | +--------+ +------------+ +-----+ +-------------------+ +----+
- +-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |--->
- +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
- | +--------+ +------------+ +-----+ | +-------------------+ +----+
- | |
- | +--+ +---------------+ |
- |____|÷M|___|VCO Loop Divide|__________|
- | | |(VLD)(÷4, ÷16) |
- +--+ +---------------+
-****************************************************************************
- that is the hardware >= 69000 we have to manage
- +---------+ +--+
- | REFCLK |__|÷N|__
- | 14.3MHz | | | |
- +---------+ +--+ |
- __________________|
- |
- | fvco fout
- | +--------+ +------------+ +-----+ +-------------------+ +----+
- +-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |--->
- +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
- | +--------+ +------------+ +-----+ | +-------------------+ +----+
- | |
- | +--+ +---------------+ |
- |____|÷M|___|VCO Loop Divide|__________|
- | | |(VLD)(÷1, ÷4) |
- +--+ +---------------+
-
-
-*/
-
-#define VIDEO_FREF 14318180; /* Hz */
-/*****************************************************************************/
-static int
-ReadPixClckFromXrRegsBack (struct ctfb_chips_properties *param)
-{
- unsigned int m, n, vld, pd, PD, fref, xr_cb, i, pixclock;
- i = 0;
- pixclock = -1;
- fref = VIDEO_FREF;
- m = ctRead_i (CT_XR_O, 0xc8);
- n = ctRead_i (CT_XR_O, 0xc9);
- m -= param->mn_diff;
- n -= param->mn_diff;
- xr_cb = ctRead_i (CT_XR_O, 0xcb);
- PD = (0x70 & xr_cb) >> 4;
- pd = 1;
- for (i = 0; i < PD; i++) {
- pd *= 2;
- }
- vld = (0x04 & xr_cb) ? param->vld_set : param->vld_not_set;
- if (n * vld * m) {
- unsigned long long p = 1000000000000LL * pd * n;
- unsigned long long q = (long long) fref * vld * m;
- while ((p > 0xffffffffLL) || (q > 0xffffffffLL)) {
- p >>= 1; /* can't divide with long long so we scale down */
- q >>= 1;
- }
- pixclock = (unsigned) p / (unsigned) q;
- } else
- printf ("Invalid data in xr regs.\n");
- return pixclock;
-}
-
-/*****************************************************************************/
-static void
-FindAndSetPllParamIntoXrRegs (unsigned int pixelclock,
- struct ctfb_chips_properties *param)
-{
- unsigned int m, n, vld, pd, PD, fref, xr_cb;
- unsigned int fvcomin, fvcomax, pclckmin, pclckmax, pclk;
- unsigned int pfreq, fvco, new_pixclock;
- unsigned int D,nback,mback;
-
- fref = VIDEO_FREF;
- pd = 1;
- PD = 0;
- fvcomin = param->vco_min;
- fvcomax = param->vco_max; /* MHz */
- pclckmin = 1000000 / fvcomax + 1; /* 4546 */
- pclckmax = 32000000 / fvcomin - 1; /* 666665 */
- pclk = minmax (pclckmin, pixelclock, pclckmax); /* ps pp */
- pfreq = 250 * (4000000000U / pclk);
- fvco = pfreq; /* Hz */
- new_pixclock = 0;
- while (fvco < fvcomin * 1000000) {
- /* double VCO starting with the pixelclock frequency
- * as long as it is lower than the minimal VCO frequency */
- fvco *= 2;
- pd *= 2;
- PD++;
- }
- /* fvco is exactly pd * pixelclock and higher than the ninmal VCO frequency */
- /* first try */
- vld = param->vld_set;
- D=FindBestPQFittingMN (fvco / vld, fref, param->mn_min, param->mn_max, &m, &n); /* rds = 1 */
- mback=m;
- nback=n;
- /* second try */
- vld = param->vld_not_set;
- if(D<FindBestPQFittingMN (fvco / vld, fref, param->mn_min, param->mn_max, &m, &n)) { /* rds = 1 */
- /* first try was better */
- m=mback;
- n=nback;
- vld = param->vld_set;
- }
- m += param->mn_diff;
- n += param->mn_diff;
- debug("VCO %d, pd %d, m %d n %d vld %d\n", fvco, pd, m, n, vld);
- xr_cb = ((0x7 & PD) << 4) | (vld == param->vld_set ? 0x04 : 0);
- /* All four of the registers used for dot clock 2 (XRC8 - XRCB) must be
- * written, and in order from XRC8 to XRCB, before the hardware will
- * update the synthesizer s settings.
- */
- ctWrite_i (CT_XR_O, 0xc8, m);
- ctWrite_i (CT_XR_O, 0xc9, n); /* xrca does not exist in CT69000 and CT69030 */
- ctWrite_i (CT_XR_O, 0xca, 0); /* because of a hw bug I guess, but we write */
- ctWrite_i (CT_XR_O, 0xcb, xr_cb); /* 0 to it for savety */
- new_pixclock = ReadPixClckFromXrRegsBack (param);
- debug("pixelclock.set = %d, pixelclock.real = %d\n",
- pixelclock, new_pixclock);
-}
-
-/*****************************************************************************/
-static void
-SetMsrRegs (struct ctfb_res_modes *mode)
-{
- unsigned char h_synch_high, v_synch_high;
-
- h_synch_high = (mode->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 0x40; /* horizontal Synch High active */
- v_synch_high = (mode->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 0x80; /* vertical Synch High active */
- ctWrite (CT_MSR_W_O, (h_synch_high | v_synch_high | 0x29));
- /* upper64K==0x20, CLC2select==0x08, RAMenable==0x02!(todo), CGA==0x01
- * Selects the upper 64KB page.Bit5=1
- * CLK2 (left reserved in standard VGA) Bit3|2=1|0
- * Disables CPU access to frame buffer. Bit1=0
- * Sets the I/O address decode for ST01, FCR, and all CR registers
- * to the 3Dx I/O address range (CGA emulation). Bit0=1
- */
-}
-
-/************************************************************************************/
-#ifdef VGA_DUMP_REG
-
-static void
-ctDispRegs (unsigned short index, int from, int to)
-{
- unsigned char status;
- int i;
-
- for (i = from; i < to; i++) {
- status = ctRead_i (index, i);
- printf ("%02X: is %02X\n", i, status);
- }
-}
-
-void
-video_dump_reg (void)
-{
- int i;
-
- printf ("Extended Regs:\n");
- ctDispRegs (CT_XR_O, 0, 0xC);
- ctDispRegs (CT_XR_O, 0xe, 0xf);
- ctDispRegs (CT_XR_O, 0x20, 0x21);
- ctDispRegs (CT_XR_O, 0x40, 0x50);
- ctDispRegs (CT_XR_O, 0x60, 0x64);
- ctDispRegs (CT_XR_O, 0x67, 0x68);
- ctDispRegs (CT_XR_O, 0x70, 0x72);
- ctDispRegs (CT_XR_O, 0x80, 0x83);
- ctDispRegs (CT_XR_O, 0xA0, 0xB0);
- ctDispRegs (CT_XR_O, 0xC0, 0xD3);
- printf ("Sequencer Regs:\n");
- ctDispRegs (CT_SR_O, 0, 0x8);
- printf ("Graphic Regs:\n");
- ctDispRegs (CT_GR_O, 0, 0x9);
- printf ("CRT Regs:\n");
- ctDispRegs (CT_CR_O, 0, 0x19);
- ctDispRegs (CT_CR_O, 0x22, 0x23);
- ctDispRegs (CT_CR_O, 0x30, 0x34);
- ctDispRegs (CT_CR_O, 0x38, 0x39);
- ctDispRegs (CT_CR_O, 0x3C, 0x3D);
- ctDispRegs (CT_CR_O, 0x40, 0x42);
- ctDispRegs (CT_CR_O, 0x70, 0x80);
- /* don't display the attributes */
-}
-
-#endif
-
-/***************************************************************
- * Wait for BitBlt ready
- */
-static int
-video_wait_bitblt (unsigned long addr)
-{
- unsigned long br04;
- int i = 0;
- br04 = in32r (addr);
- while (br04 & 0x80000000) {
- udelay (1);
- br04 = in32r (addr);
- if (i++ > 1000000) {
- printf ("ERROR Timeout %lx\n", br04);
- return 1;
- }
- }
- return 0;
-}
-
-/***************************************************************
- * Set up BitBlt Registrs
- */
-static void
-SetDrawingEngine (int bits_per_pixel)
-{
- unsigned long br04, br00;
- unsigned char tmp;
-
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
-
- tmp = ctRead_i (CT_XR_O, 0x20); /* BitBLT Configuration */
- tmp |= 0x02; /* reset BitBLT */
- ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
- udelay (10);
- tmp &= 0xfd; /* release reset BitBLT */
- ctWrite_i (CT_XR_O, 0x20, tmp); /* BitBLT Configuration */
- video_wait_bitblt (pGD->pciBase + BR04_o);
-
- /* set pattern Address */
- out32r (pGD->pciBase + BR05_o, PATTERN_ADR & 0x003ffff8);
- br04 = 0;
- if (bits_per_pixel == 1) {
- br04 |= 0x00040000; /* monochome Pattern */
- br04 |= 0x00001000; /* monochome source */
- }
- br00 = ((pGD->winSizeX * pGD->gdfBytesPP) << 16) + (pGD->winSizeX * pGD->gdfBytesPP); /* bytes per scanline */
- out32r (pGD->pciBase + BR00_o, br00); /* */
- out32r (pGD->pciBase + BR08_o, (10 << 16) + 10); /* dummy */
- out32r (pGD->pciBase + BR04_o, br04); /* write all 0 */
- out32r (pGD->pciBase + BR07_o, 0); /* destination */
- video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-
-/****************************************************************************
-* supported Video Chips
-*/
-static struct pci_device_id supported[] = {
- {PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69000},
- {}
-};
-
-/*******************************************************************************
-*
-* Init video chip
-*/
-void *
-video_hw_init (void)
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- unsigned short device_id;
- pci_dev_t devbusfn;
- int videomode;
- unsigned long t1, hsynch, vsynch;
- unsigned int pci_mem_base, *vm;
- int tmp, i, bits_per_pixel;
- char *penv;
- struct ctfb_res_modes *res_mode;
- struct ctfb_res_modes var_mode;
- struct ctfb_chips_properties *chips_param;
- /* Search for video chip */
-
- if ((devbusfn = pci_find_devices (supported, 0)) < 0) {
-#ifdef CONFIG_VIDEO_ONBOARD
- printf ("Video: Controller not found !\n");
-#endif
- return (NULL);
- }
-
- /* PCI setup */
- pci_write_config_dword (devbusfn, PCI_COMMAND,
- (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
- pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
- pci_mem_base = pci_mem_to_phys (devbusfn, pci_mem_base);
-
- /* get chips params */
- for (chips_param = (struct ctfb_chips_properties *) &chips[0];
- chips_param->device_id != 0; chips_param++) {
- if (chips_param->device_id == device_id)
- break;
- }
- if (chips_param->device_id == 0) {
-#ifdef CONFIG_VIDEO_ONBOARD
- printf ("Video: controller 0x%X not supported\n", device_id);
-#endif
- return NULL;
- }
- /* supported Video controller found */
- printf ("Video: ");
-
- tmp = 0;
- videomode = 0x301;
- /* get video mode via environment */
- if ((penv = getenv ("videomode")) != NULL) {
- /* deceide if it is a string */
- if (penv[0] <= '9') {
- videomode = (int) simple_strtoul (penv, NULL, 16);
- tmp = 1;
- }
- } else {
- tmp = 1;
- }
- if (tmp) {
- /* parameter are vesa modes */
- /* search params */
- for (i = 0; i < VESA_MODES_COUNT; i++) {
- if (vesa_modes[i].vesanr == videomode)
- break;
- }
- if (i == VESA_MODES_COUNT) {
- printf ("no VESA Mode found, switching to mode 0x301 ");
- i = 0;
- }
- res_mode =
- (struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].
- resindex];
- bits_per_pixel = vesa_modes[i].bits_per_pixel;
- } else {
-
- res_mode = (struct ctfb_res_modes *) &var_mode;
- bits_per_pixel = video_get_params (res_mode, penv);
- }
-
- /* calculate available color depth for controller memory */
- if (bits_per_pixel == 15)
- tmp = 2;
- else
- tmp = bits_per_pixel >> 3; /* /8 */
- if (((chips_param->max_mem -
- ACCELMEMORY) / (res_mode->xres * res_mode->yres)) < tmp) {
- tmp =
- ((chips_param->max_mem -
- ACCELMEMORY) / (res_mode->xres * res_mode->yres));
- if (tmp == 0) {
- printf
- ("No matching videomode found .-> reduce resolution\n");
- return NULL;
- } else {
- printf ("Switching back to %d Bits per Pixel ",
- tmp << 3);
- bits_per_pixel = tmp << 3;
- }
- }
-
- /* calculate hsynch and vsynch freq (info only) */
- t1 = (res_mode->left_margin + res_mode->xres +
- res_mode->right_margin + res_mode->hsync_len) / 8;
- t1 *= 8;
- t1 *= res_mode->pixclock;
- t1 /= 1000;
- hsynch = 1000000000L / t1;
- t1 *=
- (res_mode->upper_margin + res_mode->yres +
- res_mode->lower_margin + res_mode->vsync_len);
- t1 /= 1000;
- vsynch = 1000000000L / t1;
-
- /* fill in Graphic device struct */
- sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
- res_mode->yres, bits_per_pixel, (hsynch / 1000),
- (vsynch / 1000));
- printf ("%s\n", pGD->modeIdent);
- pGD->winSizeX = res_mode->xres;
- pGD->winSizeY = res_mode->yres;
- pGD->plnSizeX = res_mode->xres;
- pGD->plnSizeY = res_mode->yres;
- switch (bits_per_pixel) {
- case 8:
- pGD->gdfBytesPP = 1;
- pGD->gdfIndex = GDF__8BIT_INDEX;
- break;
- case 15:
- pGD->gdfBytesPP = 2;
- pGD->gdfIndex = GDF_15BIT_555RGB;
- break;
- case 16:
- pGD->gdfBytesPP = 2;
- pGD->gdfIndex = GDF_16BIT_565RGB;
- break;
- case 24:
- pGD->gdfBytesPP = 3;
- pGD->gdfIndex = GDF_24BIT_888RGB;
- break;
- }
- pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
- pGD->pciBase = pci_mem_base;
- pGD->frameAdrs = pci_mem_base;
- pGD->memSize = chips_param->max_mem;
- /* Cursor Start Address */
- pGD->dprBase =
- (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) + pci_mem_base;
- if ((pGD->dprBase & 0x0fff) != 0) {
- /* allign it */
- pGD->dprBase &= 0xfffff000;
- pGD->dprBase += 0x00001000;
- }
- debug("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
- PATTERN_ADR);
- pGD->vprBase = pci_mem_base; /* Dummy */
- pGD->cprBase = pci_mem_base; /* Dummy */
- /* set up Hardware */
-
- ctWrite (CT_MSR_W_O, 0x01);
-
- /* set the extended Registers */
- ctLoadRegs (CT_XR_O, xreg);
- /* set atribute registers */
- SetArRegs ();
- /* set Graphics register */
- SetGrRegs ();
- /* set sequencer */
- SetSrRegs ();
-
- /* set msr */
- SetMsrRegs (res_mode);
-
- /* set CRT Registers */
- SetCrRegs (res_mode, bits_per_pixel);
- /* set color mode */
- SetBitsPerPixelIntoXrRegs (bits_per_pixel);
-
- /* set PLL */
- FindAndSetPllParamIntoXrRegs (res_mode->pixclock, chips_param);
-
- ctWrite_i (CT_SR_O, 0, 0x03); /* clear synchronous reset */
- /* Clear video memory */
- i = pGD->memSize / 4;
- vm = (unsigned int *) pGD->pciBase;
- while (i--)
- *vm++ = 0;
- SetDrawingEngine (bits_per_pixel);
-#ifdef VGA_DUMP_REG
- video_dump_reg ();
-#endif
-
- return ((void *) &ctfb);
-}
-
- /*******************************************************************************
-*
-* Set a RGB color in the LUT (8 bit index)
-*/
-void
-video_set_lut (unsigned int index, /* color number */
- unsigned char r, /* red */
- unsigned char g, /* green */
- unsigned char b /* blue */
- )
-{
-
- ctWrite (CT_LUT_MASK_O, 0xff);
-
- ctWrite (CT_LUT_START_O, (char) index);
-
- ctWrite (CT_LUT_RGB_O, r); /* red */
- ctWrite (CT_LUT_RGB_O, g); /* green */
- ctWrite (CT_LUT_RGB_O, b); /* blue */
- udelay (1);
- ctWrite (CT_LUT_MASK_O, 0xff);
-}
-
-/*******************************************************************************
-*
-* Drawing engine fill on screen region
-*/
-void
-video_hw_rectfill (unsigned int bpp, /* bytes per pixel */
- unsigned int dst_x, /* dest pos x */
- unsigned int dst_y, /* dest pos y */
- unsigned int dim_x, /* frame width */
- unsigned int dim_y, /* frame height */
- unsigned int color /* fill color */
- )
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- unsigned long *p, br04;
-
- video_wait_bitblt (pGD->pciBase + BR04_o);
-
- p = (unsigned long *) PATTERN_ADR;
- dim_x *= bpp;
- if (bpp == 3)
- bpp++; /* 24Bit needs a 32bit pattern */
- memset (p, color, (bpp * sizeof (unsigned char) * 8 * 8)); /* 8 x 8 pattern data */
- out32r (pGD->pciBase + BR07_o, ((pGD->winSizeX * dst_y) + dst_x) * pGD->gdfBytesPP); /* destination */
- br04 = in32r (pGD->pciBase + BR04_o) & 0xffffff00;
- br04 |= 0xF0; /* write Pattern P -> D */
- out32r (pGD->pciBase + BR04_o, br04); /* */
- out32r (pGD->pciBase + BR08_o, (dim_y << 16) + dim_x); /* starts the BITBlt */
- video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-
-/*******************************************************************************
-*
-* Drawing engine bitblt with screen region
-*/
-void
-video_hw_bitblt (unsigned int bpp, /* bytes per pixel */
- unsigned int src_x, /* source pos x */
- unsigned int src_y, /* source pos y */
- unsigned int dst_x, /* dest pos x */
- unsigned int dst_y, /* dest pos y */
- unsigned int dim_x, /* frame width */
- unsigned int dim_y /* frame height */
- )
-{
- GraphicDevice *pGD = (GraphicDevice *) & ctfb;
- unsigned long br04;
-
- br04 = in32r (pGD->pciBase + BR04_o);
-
- /* to prevent data corruption due to overlap, we have to
- * find out if, and how the frames overlaps */
- if (src_x < dst_x) {
- /* src is more left than dest
- * the frame may overlap -> start from right to left */
- br04 |= 0x00000100; /* set bit 8 */
- src_x += dim_x;
- dst_x += dim_x;
- } else {
- br04 &= 0xfffffeff; /* clear bit 8 left to right */
- }
- if (src_y < dst_y) {
- /* src is higher than dst
- * the frame may overlap => start from bottom */
- br04 |= 0x00000200; /* set bit 9 */
- src_y += dim_y;
- dst_y += dim_y;
- } else {
- br04 &= 0xfffffdff; /* clear bit 9 top to bottom */
- }
- dim_x *= bpp;
- out32r (pGD->pciBase + BR06_o, ((pGD->winSizeX * src_y) + src_x) * pGD->gdfBytesPP); /* source */
- out32r (pGD->pciBase + BR07_o, ((pGD->winSizeX * dst_y) + dst_x) * pGD->gdfBytesPP); /* destination */
- br04 &= 0xffffff00;
- br04 |= 0x000000CC; /* S -> D */
- out32r (pGD->pciBase + BR04_o, br04); /* */
- out32r (pGD->pciBase + BR08_o, (dim_y << 16) + dim_x); /* start the BITBlt */
- video_wait_bitblt (pGD->pciBase + BR04_o);
-}
-#endif /* CONFIG_VIDEO */
diff --git a/drivers/video/l5f31188.c b/drivers/video/l5f31188.c
deleted file mode 100644
index 3312dcf..0000000
--- a/drivers/video/l5f31188.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
- * Hyungwon Hwang <human.hwang@samsung.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/mipi_dsim.h>
-
-#define SCAN_FROM_LEFT_TO_RIGHT 0
-#define SCAN_FROM_RIGHT_TO_LEFT 1
-#define SCAN_FROM_TOP_TO_BOTTOM 0
-#define SCAN_FROM_BOTTOM_TO_TOP 1
-
-static void l5f31188_sleep_in(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x10, 0x00);
-}
-
-static void l5f31188_sleep_out(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
-}
-
-static void l5f31188_set_gamma(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x26, 0x00);
-}
-
-static void l5f31188_display_off(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00);
-}
-
-static void l5f31188_display_on(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
-}
-
-static void l5f31188_ctl_memory_access(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops,
- int h_direction, int v_direction)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x36,
- (((h_direction & 0x1) << 1) | (v_direction & 0x1)));
-}
-
-static void l5f31188_set_pixel_format(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x3A, 0x70);
-}
-
-static void l5f31188_write_disbv(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops, unsigned int brightness)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x51, brightness);
-}
-
-static void l5f31188_write_ctrld(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x53, 0x2C);
-}
-
-static void l5f31188_write_cabc(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops,
- unsigned int wm_mode)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x55, wm_mode);
-}
-
-static void l5f31188_write_cabcmb(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops, unsigned int min_brightness)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x5E,
- min_brightness);
-}
-
-static void l5f31188_set_extension(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- const unsigned char data_to_send[] = {
- 0xB9, 0xFF, 0x83, 0x94
- };
-
- ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
- (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_dgc_lut(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- const unsigned char data_to_send[] = {
- 0xC1, 0x01, 0x00, 0x04, 0x0E, 0x18, 0x1E, 0x26,
- 0x2F, 0x36, 0x3E, 0x47, 0x4E, 0x56, 0x5D, 0x65,
- 0x6D, 0x75, 0x7D, 0x84, 0x8C, 0x94, 0x9C, 0xA4,
- 0xAD, 0xB5, 0xBD, 0xC5, 0xCC, 0xD4, 0xDE, 0xE5,
- 0xEE, 0xF7, 0xFF, 0x3F, 0x9A, 0xCE, 0xD4, 0x21,
- 0xA1, 0x26, 0x54, 0x00, 0x00, 0x04, 0x0E, 0x19,
- 0x1F, 0x27, 0x30, 0x37, 0x40, 0x48, 0x50, 0x58,
- 0x60, 0x67, 0x6F, 0x77, 0x7F, 0x87, 0x8F, 0x97,
- 0x9F, 0xA7, 0xB0, 0xB8, 0xC0, 0xC8, 0xCE, 0xD8,
- 0xE0, 0xE7, 0xF0, 0xF7, 0xFF, 0x3C, 0xEB, 0xFD,
- 0x2F, 0x66, 0xA8, 0x2C, 0x46, 0x00, 0x00, 0x04,
- 0x0E, 0x18, 0x1E, 0x26, 0x30, 0x38, 0x41, 0x4A,
- 0x52, 0x5A, 0x62, 0x6B, 0x73, 0x7B, 0x83, 0x8C,
- 0x94, 0x9C, 0xA5, 0xAD, 0xB6, 0xBD, 0xC5, 0xCC,
- 0xD4, 0xDD, 0xE3, 0xEB, 0xF2, 0xF9, 0xFF, 0x3F,
- 0xA4, 0x8A, 0x8F, 0xC7, 0x33, 0xF5, 0xE9, 0x00
- };
- ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
- (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_tcon(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- const unsigned char data_to_send[] = {
- 0xC7, 0x00, 0x20
- };
- ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
- (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_ptba(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- const unsigned char data_to_send[] = {
- 0xBF, 0x06, 0x10
- };
- ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE,
- (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
-}
-
-static void l5f31188_set_eco(struct mipi_dsim_device *dev,
- struct mipi_dsim_master_ops *ops)
-{
- ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xC6, 0x0C);
-}
-
-static int l5f31188_panel_init(struct mipi_dsim_device *dev)
-{
- struct mipi_dsim_master_ops *ops = dev->master_ops;
-
- l5f31188_set_extension(dev, ops);
- l5f31188_set_dgc_lut(dev, ops);
-
- l5f31188_set_eco(dev, ops);
- l5f31188_set_tcon(dev, ops);
- l5f31188_set_ptba(dev, ops);
- l5f31188_set_gamma(dev, ops);
- l5f31188_ctl_memory_access(dev, ops,
- SCAN_FROM_LEFT_TO_RIGHT, SCAN_FROM_TOP_TO_BOTTOM);
- l5f31188_set_pixel_format(dev, ops);
- l5f31188_write_disbv(dev, ops, 0xFF);
- l5f31188_write_ctrld(dev, ops);
- l5f31188_write_cabc(dev, ops, 0x0);
- l5f31188_write_cabcmb(dev, ops, 0x0);
-
- l5f31188_sleep_out(dev, ops);
-
- /* 120 msec */
- udelay(120 * 1000);
-
- return 0;
-}
-
-static void l5f31188_display_enable(struct mipi_dsim_device *dev)
-{
- struct mipi_dsim_master_ops *ops = dev->master_ops;
- l5f31188_display_on(dev, ops);
-}
-
-static struct mipi_dsim_lcd_driver l5f31188_dsim_ddi_driver = {
- .name = "l5f31188",
- .id = -1,
-
- .mipi_panel_init = l5f31188_panel_init,
- .mipi_display_on = l5f31188_display_enable,
-};
-
-void l5f31188_init(void)
-{
- exynos_mipi_dsi_register_lcd_driver(&l5f31188_dsim_ddi_driver);
-}
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index 1c74e97..e0565e1 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -246,7 +246,8 @@
tmp = 0;
videomode = 0x310;
/* get video mode via environment */
- if ((penv = getenv ("videomode")) != NULL) {
+ penv = env_get("videomode");
+ if (penv) {
/* decide if it is a string */
if (penv[0] <= '9') {
videomode = (int) simple_strtoul (penv, NULL, 16);
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 51d06d6..78e595e 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -816,7 +816,7 @@
videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
/* get video mode via environment */
- penv = getenv("videomode");
+ penv = env_get("videomode");
if (penv) {
/* decide if it is a string */
if (penv[0] <= '9') {
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 0ddce3d..9d810ba 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -161,7 +161,7 @@
puts("Video: ");
/* Suck display configuration from "videomode" variable */
- penv = getenv("videomode");
+ penv = env_get("videomode");
if (!penv) {
puts("MXSFB: 'videomode' variable not set!\n");
return NULL;
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 872dc0f..8005003 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -14,5 +14,7 @@
obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o
obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
-obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o
+obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o
+obj-mipi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_mipi.o
+obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o $(obj-mipi-y)
endif
diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c
new file mode 100644
index 0000000..953b47f
--- /dev/null
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <panel.h>
+#include <regmap.h>
+#include "rk_mipi.h"
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <dm/uclass-internal.h>
+#include <linux/kernel.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/rockchip_mipi_dsi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MHz 1000000
+
+/* Select mipi dsi source, big or little vop */
+static int rk_mipi_dsi_source_select(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+ struct rk3288_grf *grf = priv->grf;
+ struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
+
+ /* Select the video source */
+ switch (disp_uc_plat->source_id) {
+ case VOP_B:
+ rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,
+ RK3288_DSI0_LCDC_SEL_BIG
+ << RK3288_DSI0_LCDC_SEL_SHIFT);
+ break;
+ case VOP_L:
+ rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK,
+ RK3288_DSI0_LCDC_SEL_LIT
+ << RK3288_DSI0_LCDC_SEL_SHIFT);
+ break;
+ default:
+ debug("%s: Invalid VOP id\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* Setup mipi dphy working mode */
+static void rk_mipi_dphy_mode_set(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+ struct rk3288_grf *grf = priv->grf;
+ int val;
+
+ /* Set Controller as TX mode */
+ val = RK3288_DPHY_TX0_RXMODE_DIS << RK3288_DPHY_TX0_RXMODE_SHIFT;
+ rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val);
+
+ /* Exit tx stop mode */
+ val |= RK3288_DPHY_TX0_TXSTOPMODE_EN
+ << RK3288_DPHY_TX0_TXSTOPMODE_SHIFT;
+ rk_clrsetreg(&grf->soc_con8,
+ RK3288_DPHY_TX0_TXSTOPMODE_MASK, val);
+
+ /* Disable turnequest */
+ val |= RK3288_DPHY_TX0_TURNREQUEST_EN
+ << RK3288_DPHY_TX0_TURNREQUEST_SHIFT;
+ rk_clrsetreg(&grf->soc_con8,
+ RK3288_DPHY_TX0_TURNREQUEST_MASK, val);
+}
+
+/*
+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
+ * enable backlight.
+ */
+static int rk_mipi_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *timing)
+{
+ int ret;
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ /* Fill the mipi controller parameter */
+ priv->ref_clk = 24 * MHz;
+ priv->sys_clk = priv->ref_clk;
+ priv->pix_clk = timing->pixelclock.typ;
+ priv->phy_clk = priv->pix_clk * 6;
+ priv->txbyte_clk = priv->phy_clk / 8;
+ priv->txesc_clk = 20 * MHz;
+
+ /* Select vop port, big or little */
+ rk_mipi_dsi_source_select(dev);
+
+ /* Set mipi dphy work mode */
+ rk_mipi_dphy_mode_set(dev);
+
+ /* Config and enable mipi dsi according to timing */
+ ret = rk_mipi_dsi_enable(dev, timing);
+ if (ret) {
+ debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /* Config and enable mipi phy */
+ ret = rk_mipi_phy_enable(dev);
+ if (ret) {
+ debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /* Enable backlight */
+ ret = panel_enable_backlight(priv->panel);
+ if (ret) {
+ debug("%s: panel_enable_backlight() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ if (IS_ERR(priv->grf)) {
+ debug("%s: Get syscon grf failed (ret=%p)\n",
+ __func__, priv->grf);
+ return -ENXIO;
+ }
+ priv->regs = dev_read_addr(dev);
+ if (priv->regs == FDT_ADDR_T_NONE) {
+ debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__,
+ priv->regs);
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+/*
+ * Probe function: check panel existence and readingit's timing. Then config
+ * mipi dsi controller and enable it according to the timing parameter.
+ */
+static int rk_mipi_probe(struct udevice *dev)
+{
+ int ret;
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
+ &priv->panel);
+ if (ret) {
+ debug("%s: Can not find panel (err=%d)\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct dm_display_ops rk_mipi_dsi_ops = {
+ .read_timing = rk_mipi_read_timing,
+ .enable = rk_mipi_enable,
+};
+
+static const struct udevice_id rk_mipi_dsi_ids[] = {
+ { .compatible = "rockchip,rk3288_mipi_dsi" },
+ { }
+};
+
+U_BOOT_DRIVER(rk_mipi_dsi) = {
+ .name = "rk_mipi_dsi",
+ .id = UCLASS_DISPLAY,
+ .of_match = rk_mipi_dsi_ids,
+ .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
+ .probe = rk_mipi_probe,
+ .ops = &rk_mipi_dsi_ops,
+ .priv_auto_alloc_size = sizeof(struct rk_mipi_priv),
+};
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c
new file mode 100644
index 0000000..9ef202b
--- /dev/null
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <panel.h>
+#include <regmap.h>
+#include "rk_mipi.h"
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <dm/uclass-internal.h>
+#include <linux/kernel.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
+#include <asm/arch/grf_rk3399.h>
+#include <asm/arch/rockchip_mipi_dsi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Select mipi dsi source, big or little vop */
+static int rk_mipi_dsi_source_select(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+ struct rk3399_grf_regs *grf = priv->grf;
+ struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
+
+ /* Select the video source */
+ switch (disp_uc_plat->source_id) {
+ case VOP_B:
+ rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
+ GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
+ break;
+ case VOP_L:
+ rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
+ GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
+ break;
+ default:
+ debug("%s: Invalid VOP id\n", __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* Setup mipi dphy working mode */
+static void rk_mipi_dphy_mode_set(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+ struct rk3399_grf_regs *grf = priv->grf;
+ int val;
+
+ /* Set Controller as TX mode */
+ val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
+ rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
+
+ /* Exit tx stop mode */
+ val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
+ rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
+
+ /* Disable turnequest */
+ val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
+ rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
+}
+
+/*
+ * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
+ * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
+ * enable backlight.
+ */
+static int rk_display_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *timing)
+{
+ int ret;
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ /* Fill the mipi controller parameter */
+ priv->ref_clk = 24 * MHz;
+ priv->sys_clk = priv->ref_clk;
+ priv->pix_clk = timing->pixelclock.typ;
+ priv->phy_clk = priv->pix_clk * 6;
+ priv->txbyte_clk = priv->phy_clk / 8;
+ priv->txesc_clk = 20 * MHz;
+
+ /* Select vop port, big or little */
+ rk_mipi_dsi_source_select(dev);
+
+ /* Set mipi dphy work mode */
+ rk_mipi_dphy_mode_set(dev);
+
+ /* Config and enable mipi dsi according to timing */
+ ret = rk_mipi_dsi_enable(dev, timing);
+ if (ret) {
+ debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /* Config and enable mipi phy */
+ ret = rk_mipi_phy_enable(dev);
+ if (ret) {
+ debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /* Enable backlight */
+ ret = panel_enable_backlight(priv->panel);
+ if (ret) {
+ debug("%s: panel_enable_backlight() failed (err=%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
+{
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+ if (priv->grf <= 0) {
+ debug("%s: Get syscon grf failed (ret=%p)\n",
+ __func__, priv->grf);
+ return -ENXIO;
+ }
+ priv->regs = dev_read_addr(dev);
+ if (priv->regs == FDT_ADDR_T_NONE) {
+ debug("%s: Get MIPI dsi address failed\n", __func__);
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+/*
+ * Probe function: check panel existence and readingit's timing. Then config
+ * mipi dsi controller and enable it according to the timing parameter.
+ */
+static int rk_mipi_probe(struct udevice *dev)
+{
+ int ret;
+ struct rk_mipi_priv *priv = dev_get_priv(dev);
+
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
+ &priv->panel);
+ if (ret) {
+ debug("%s: Can not find panel (err=%d)\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct dm_display_ops rk_mipi_dsi_ops = {
+ .read_timing = rk_mipi_read_timing,
+ .enable = rk_display_enable,
+};
+
+static const struct udevice_id rk_mipi_dsi_ids[] = {
+ { .compatible = "rockchip,rk3399_mipi_dsi" },
+ { }
+};
+
+U_BOOT_DRIVER(rk_mipi_dsi) = {
+ .name = "rk_mipi_dsi",
+ .id = UCLASS_DISPLAY,
+ .of_match = rk_mipi_dsi_ids,
+ .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
+ .probe = rk_mipi_probe,
+ .ops = &rk_mipi_dsi_ops,
+ .priv_auto_alloc_size = sizeof(struct rk_mipi_priv),
+};
diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c
index 1199a30..d537755 100644
--- a/drivers/video/rockchip/rk_mipi.c
+++ b/drivers/video/rockchip/rk_mipi.c
@@ -12,6 +12,7 @@
#include <fdtdec.h>
#include <panel.h>
#include <regmap.h>
+#include "rk_mipi.h"
#include <syscon.h>
#include <asm/gpio.h>
#include <asm/hardware.h>
@@ -22,38 +23,11 @@
#include <asm/arch/cru_rk3399.h>
#include <asm/arch/grf_rk3399.h>
#include <asm/arch/rockchip_mipi_dsi.h>
-#include <dt-bindings/clock/rk3288-cru.h>
DECLARE_GLOBAL_DATA_PTR;
-/*
- * Private information for rk mipi
- *
- * @regs: mipi controller address
- * @grf: GRF register
- * @panel: panel assined by device tree
- * @ref_clk: reference clock for mipi dsi pll
- * @sysclk: config clock for mipi dsi register
- * @pix_clk: pixel clock for vop->dsi data transmission
- * @phy_clk: mipi dphy output clock
- * @txbyte_clk: clock for dsi->dphy high speed data transmission
- * @txesc_clk: clock for tx esc mode
- */
-struct rk_mipi_priv {
- uintptr_t regs;
- struct rk3399_grf_regs *grf;
- struct udevice *panel;
- struct mipi_dsi *dsi;
- u32 ref_clk;
- u32 sys_clk;
- u32 pix_clk;
- u32 phy_clk;
- u32 txbyte_clk;
- u32 txesc_clk;
-};
-
-static int rk_mipi_read_timing(struct udevice *dev,
- struct display_timing *timing)
+int rk_mipi_read_timing(struct udevice *dev,
+ struct display_timing *timing)
{
int ret;
@@ -102,46 +76,18 @@
writel(dat, addr);
}
-static int rk_mipi_dsi_enable(struct udevice *dev,
- const struct display_timing *timing)
+int rk_mipi_dsi_enable(struct udevice *dev,
+ const struct display_timing *timing)
{
int node, timing_node;
int val;
struct rk_mipi_priv *priv = dev_get_priv(dev);
uintptr_t regs = priv->regs;
- struct display_plat *disp_uc_plat = dev_get_uclass_platdata(dev);
u32 txbyte_clk = priv->txbyte_clk;
u32 txesc_clk = priv->txesc_clk;
txesc_clk = txbyte_clk/(txbyte_clk/txesc_clk + 1);
- /* Select the video source */
- switch (disp_uc_plat->source_id) {
- case VOP_B:
- rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
- GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
- break;
- case VOP_L:
- rk_clrsetreg(&priv->grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
- GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
- break;
- default:
- debug("%s: Invalid VOP id\n", __func__);
- return -EINVAL;
- }
-
- /* Set Controller as TX mode */
- val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
- rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
-
- /* Exit tx stop mode */
- val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
- rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
-
- /* Disable turnequest */
- val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
- rk_clrsetreg(&priv->grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
-
/* Set Display timing parameter */
rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ);
rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ);
@@ -249,7 +195,7 @@
* fsfreqrang value ,cap ,lpf and so on according to the given pix clk rate,
* and then enable phy.
*/
-static int rk_mipi_phy_enable(struct udevice *dev)
+int rk_mipi_phy_enable(struct udevice *dev)
{
int i;
struct rk_mipi_priv *priv = dev_get_priv(dev);
@@ -385,107 +331,3 @@
return 0;
}
-/*
- * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
- * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
- * enable backlight.
- */
-static int rk_display_enable(struct udevice *dev, int panel_bpp,
- const struct display_timing *timing)
-{
- int ret;
- struct rk_mipi_priv *priv = dev_get_priv(dev);
-
- /* Fill the mipi controller parameter */
- priv->ref_clk = 24 * MHz;
- priv->sys_clk = priv->ref_clk;
- priv->pix_clk = timing->pixelclock.typ;
- priv->phy_clk = priv->pix_clk * 6;
- priv->txbyte_clk = priv->phy_clk / 8;
- priv->txesc_clk = 20 * MHz;
-
- /* Config and enable mipi dsi according to timing */
- ret = rk_mipi_dsi_enable(dev, timing);
- if (ret) {
- debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
- __func__, ret);
- return ret;
- }
-
- /* Config and enable mipi phy */
- ret = rk_mipi_phy_enable(dev);
- if (ret) {
- debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
- __func__, ret);
- return ret;
- }
-
- /* Enable backlight */
- ret = panel_enable_backlight(priv->panel);
- if (ret) {
- debug("%s: panel_enable_backlight() failed (err=%d)\n",
- __func__, ret);
- return ret;
- }
-
- return 0;
-}
-
-static int rk_mipi_ofdata_to_platdata(struct udevice *dev)
-{
- struct rk_mipi_priv *priv = dev_get_priv(dev);
-
- priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
- if (priv->grf <= 0) {
- debug("%s: Get syscon grf failed (ret=%p)\n",
- __func__, priv->grf);
- return -ENXIO;
- }
- priv->regs = devfdt_get_addr(dev);
- if (priv->regs <= 0) {
- debug("%s: Get MIPI dsi address failed (ret=%lu)\n", __func__,
- priv->regs);
- return -ENXIO;
- }
-
- return 0;
-}
-
-/*
- * Probe function: check panel existence and readingit's timing. Then config
- * mipi dsi controller and enable it according to the timing parameter.
- */
-static int rk_mipi_probe(struct udevice *dev)
-{
- int ret;
- struct rk_mipi_priv *priv = dev_get_priv(dev);
-
- ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
- &priv->panel);
- if (ret) {
- debug("%s: Can not find panel (err=%d)\n", __func__, ret);
- return ret;
- }
-
- return 0;
-}
-
-static const struct dm_display_ops rk_mipi_dsi_ops = {
- .read_timing = rk_mipi_read_timing,
- .enable = rk_display_enable,
-};
-
-static const struct udevice_id rk_mipi_dsi_ids[] = {
- { .compatible = "rockchip,rk3399_mipi_dsi" },
- { }
-};
-
-U_BOOT_DRIVER(rk_mipi_dsi) = {
- .name = "rk_mipi_dsi",
- .id = UCLASS_DISPLAY,
- .of_match = rk_mipi_dsi_ids,
- .ofdata_to_platdata = rk_mipi_ofdata_to_platdata,
- .probe = rk_mipi_probe,
- .ops = &rk_mipi_dsi_ops,
- .priv_auto_alloc_size = sizeof(struct rk_mipi_priv),
-};
diff --git a/drivers/video/rockchip/rk_mipi.h b/drivers/video/rockchip/rk_mipi.h
new file mode 100644
index 0000000..de6ac52
--- /dev/null
+++ b/drivers/video/rockchip/rk_mipi.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Eric Gao <eric.gao@rock-chips.com>
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __RK_MIPI_H
+#define __RK_MIPI_H
+
+struct rk_mipi_priv {
+ uintptr_t regs;
+ void *grf;
+ struct udevice *panel;
+ struct mipi_dsi *dsi;
+ u32 ref_clk;
+ u32 sys_clk;
+ u32 pix_clk;
+ u32 phy_clk;
+ u32 txbyte_clk;
+ u32 txesc_clk;
+};
+
+int rk_mipi_read_timing(struct udevice *dev,
+ struct display_timing *timing);
+
+int rk_mipi_dsi_enable(struct udevice *dev,
+ const struct display_timing *timing);
+
+int rk_mipi_phy_enable(struct udevice *dev);
+
+
+#endif
diff --git a/drivers/video/sed156x.c b/drivers/video/sed156x.c
deleted file mode 100644
index 2c906ec..0000000
--- a/drivers/video/sed156x.c
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * (C) Copyright 2003
- *
- * Pantelis Antoniou <panto@intracom.gr>
- * Intracom S.A.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <watchdog.h>
-
-#include <sed156x.h>
-
-/* configure according to the selected display */
-#if defined(CONFIG_SED156X_PG12864Q)
-#define LCD_WIDTH 128
-#define LCD_HEIGHT 64
-#define LCD_LINES 64
-#define LCD_PAGES 9
-#define LCD_COLUMNS 132
-#else
-#error Unsupported SED156x configuration
-#endif
-
-/* include the font data */
-#include <video_font.h>
-
-#if VIDEO_FONT_WIDTH != 8 || VIDEO_FONT_HEIGHT != 16
-#error Expecting VIDEO_FONT_WIDTH == 8 && VIDEO_FONT_HEIGHT == 16
-#endif
-
-#define LCD_BYTE_WIDTH (LCD_WIDTH / 8)
-#define VIDEO_FONT_BYTE_WIDTH (VIDEO_FONT_WIDTH / 8)
-
-#define LCD_TEXT_WIDTH (LCD_WIDTH / VIDEO_FONT_WIDTH)
-#define LCD_TEXT_HEIGHT (LCD_HEIGHT / VIDEO_FONT_HEIGHT)
-
-#define LCD_BYTE_LINESZ (LCD_BYTE_WIDTH * VIDEO_FONT_HEIGHT)
-
-const int sed156x_text_width = LCD_TEXT_WIDTH;
-const int sed156x_text_height = LCD_TEXT_HEIGHT;
-
-/**************************************************************************************/
-
-#define SED156X_SPI_RXD() (SED156X_SPI_RXD_PORT & SED156X_SPI_RXD_MASK)
-
-#define SED156X_SPI_TXD(x) \
- do { \
- if (x) \
- SED156X_SPI_TXD_PORT |= SED156X_SPI_TXD_MASK; \
- else \
- SED156X_SPI_TXD_PORT &= ~SED156X_SPI_TXD_MASK; \
- } while(0)
-
-#define SED156X_SPI_CLK(x) \
- do { \
- if (x) \
- SED156X_SPI_CLK_PORT |= SED156X_SPI_CLK_MASK; \
- else \
- SED156X_SPI_CLK_PORT &= ~SED156X_SPI_CLK_MASK; \
- } while(0)
-
-#define SED156X_SPI_CLK_TOGGLE() (SED156X_SPI_CLK_PORT ^= SED156X_SPI_CLK_MASK)
-
-#define SED156X_SPI_BIT_DELAY() /* no delay */
-
-#define SED156X_CS(x) \
- do { \
- if (x) \
- SED156X_CS_PORT |= SED156X_CS_MASK; \
- else \
- SED156X_CS_PORT &= ~SED156X_CS_MASK; \
- } while(0)
-
-#define SED156X_A0(x) \
- do { \
- if (x) \
- SED156X_A0_PORT |= SED156X_A0_MASK; \
- else \
- SED156X_A0_PORT &= ~SED156X_A0_MASK; \
- } while(0)
-
-/**************************************************************************************/
-
-/*** LCD Commands ***/
-
-#define LCD_ON 0xAF /* Display ON */
-#define LCD_OFF 0xAE /* Display OFF */
-#define LCD_LADDR 0x40 /* Display start line set + (6-bit) address */
-#define LCD_PADDR 0xB0 /* Page address set + (4-bit) page */
-#define LCD_CADRH 0x10 /* Column address set upper + (4-bit) column hi */
-#define LCD_CADRL 0x00 /* Column address set lower + (4-bit) column lo */
-#define LCD_ADC_NRM 0xA0 /* ADC select Normal */
-#define LCD_ADC_REV 0xA1 /* ADC select Reverse */
-#define LCD_DSP_NRM 0xA6 /* LCD display Normal */
-#define LCD_DSP_REV 0xA7 /* LCD display Reverse */
-#define LCD_DPT_NRM 0xA4 /* Display all points Normal */
-#define LCD_DPT_ALL 0xA5 /* Display all points ON */
-#define LCD_BIAS9 0xA2 /* LCD bias set 1/9 */
-#define LCD_BIAS7 0xA3 /* LCD bias set 1/7 */
-#define LCD_CAINC 0xE0 /* Read/modify/write */
-#define LCD_CAEND 0xEE /* End */
-#define LCD_RESET 0xE2 /* Reset */
-#define LCD_C_NRM 0xC0 /* Common output mode select Normal direction */
-#define LCD_C_RVS 0xC8 /* Common output mode select Reverse direction */
-#define LCD_PWRMD 0x28 /* Power control set + (3-bit) mode */
-#define LCD_RESRT 0x20 /* V5 v. reg. int. resistor ratio set + (3-bit) ratio */
-#define LCD_EVSET 0x81 /* Electronic volume mode set + byte = (6-bit) volume */
-#define LCD_SIOFF 0xAC /* Static indicator OFF */
-#define LCD_SION 0xAD /* Static indicator ON + byte = (2-bit) mode */
-#define LCD_NOP 0xE3 /* NOP */
-#define LCD_TEST 0xF0 /* Test/Test mode reset (Note: *DO NOT USE*) */
-
-/*-------------------------------------------------------------------------------
- Compound commands
- -------------------------------------------------------------------------------
- Command Description Commands
- ---------- ------------------------ -------------------------------------
- POWS_ON POWER SAVER ON command LCD_OFF, LCD_D_ALL
- POWS_OFF POWER SAVER OFF command LCD_D_NRM
- SLEEPON SLEEP mode LCD_SIOFF, POWS_ON
- SLEEPOFF SLEEP mode cancel LCD_D_NRM, LCD_SION, LCD_SIS_???
- STDBYON STAND BY mode LCD_SION, POWS_ON
- STDBYOFF STAND BY mode cancel LCD_D_NRM
- -------------------------------------------------------------------------------*/
-
-/*** LCD various parameters ***/
-#define LCD_PPB 8 /* Pixels per byte (display is B/W, 1 bit per pixel) */
-
-/*** LCD Status byte masks ***/
-#define LCD_S_BUSY 0x80 /* Status Read - BUSY mask */
-#define LCD_S_ADC 0x40 /* Status Read - ADC mask */
-#define LCD_S_ONOFF 0x20 /* Status Read - ON/OFF mask */
-#define LCD_S_RESET 0x10 /* Status Read - RESET mask */
-
-/*** LCD commands parameter masks ***/
-#define LCD_M_LADDR 0x3F /* Display start line (6-bit) address mask */
-#define LCD_M_PADDR 0x0F /* Page address (4-bit) page mask */
-#define LCD_M_CADRH 0x0F /* Column address upper (4-bit) column hi mask */
-#define LCD_M_CADRL 0x0F /* Column address lower (4-bit) column lo mask */
-#define LCD_M_PWRMD 0x07 /* Power control (3-bit) mode mask */
-#define LCD_M_RESRT 0x07 /* V5 v. reg. int. resistor ratio (3-bit) ratio mask */
-#define LCD_M_EVSET 0x3F /* Electronic volume mode byte (6-bit) volume mask */
-#define LCD_M_SION 0x03 /* Static indicator ON (2-bit) mode mask */
-
-/*** LCD Power control cirquits control masks ***/
-#define LCD_PWRBSTR 0x04 /* Power control mode - Booster cirquit ON */
-#define LCD_PWRVREG 0x02 /* Power control mode - Voltage regulator cirquit ON */
-#define LCD_PWRVFOL 0x01 /* Power control mode - Voltage follower cirquit ON */
-
-/*** LCD Static indicator states ***/
-#define LCD_SIS_OFF 0x00 /* Static indicator register set - OFF state */
-#define LCD_SIS_BL 0x01 /* Static indicator register set - 1s blink state */
-#define LCD_SIS_RBL 0x02 /* Static indicator register set - .5s rapid blink state */
-#define LCD_SIS_ON 0x03 /* Static indicator register set - constantly on state */
-
-/*** LCD functions special parameters (commands) ***/
-#define LCD_PREVP 0x80 /* Page number for moving to previous */
-#define LCD_NEXTP 0x81 /* or next page */
-#define LCD_ERR_P 0xFF /* Error in page number */
-
-/*** LCD initialization settings ***/
-#define LCD_BIAS LCD_BIAS9 /* Bias: 1/9 */
-#define LCD_ADCMODE LCD_ADC_NRM /* ADC mode: normal */
-#define LCD_COMDIR LCD_C_NRM /* Common output mode: normal */
-#define LCD_RRATIO 0 /* Resistor ratio: 0 */
-#define LCD_CNTRST 0x1C /* electronic volume: 1Ch */
-#define LCD_POWERM (LCD_PWRBSTR | LCD_PWRVREG | LCD_PWRVFOL) /* Power mode: All on */
-
-/**************************************************************************************/
-
-static inline unsigned int sed156x_transfer(unsigned int val)
-{
- unsigned int rx;
- int b;
-
- rx = 0; b = 8;
- while (--b >= 0) {
- SED156X_SPI_TXD(val & 0x80);
- val <<= 1;
- SED156X_SPI_CLK_TOGGLE();
- SED156X_SPI_BIT_DELAY();
- rx <<= 1;
- if (SED156X_SPI_RXD())
- rx |= 1;
- SED156X_SPI_CLK_TOGGLE();
- SED156X_SPI_BIT_DELAY();
- }
-
- return rx;
-}
-
-unsigned int sed156x_data_transfer(unsigned int val)
-{
- unsigned int rx;
-
- SED156X_SPI_CLK(1);
- SED156X_CS(0);
- SED156X_A0(1);
-
- rx = sed156x_transfer(val);
-
- SED156X_CS(1);
-
- return rx;
-}
-
-void sed156x_data_block_transfer(const u8 *p, int size)
-{
- SED156X_SPI_CLK(1);
- SED156X_CS(0);
- SED156X_A0(1);
-
- while (--size >= 0)
- sed156x_transfer(*p++);
-
- SED156X_CS(1);
-}
-
-unsigned int sed156x_cmd_transfer(unsigned int val)
-{
- unsigned int rx;
-
- SED156X_SPI_CLK(1);
- SED156X_CS(0);
- SED156X_A0(0);
-
- rx = sed156x_transfer(val);
-
- SED156X_CS(1);
- SED156X_A0(1);
-
- return rx;
-}
-
-/******************************************************************************/
-
-static u8 hw_screen[LCD_PAGES][LCD_COLUMNS];
-static u8 last_hw_screen[LCD_PAGES][LCD_COLUMNS];
-static u8 sw_screen[LCD_BYTE_WIDTH * LCD_HEIGHT];
-
-void sed156x_sync(void)
-{
- int i, j, last_page;
- u8 *d;
- const u8 *s, *e, *b, *r;
- u8 v0, v1, v2, v3, v4, v5, v6, v7;
-
- /* copy and rotate sw_screen to hw_screen */
- for (i = 0; i < LCD_HEIGHT / 8; i++) {
-
- d = &hw_screen[i][0];
- s = &sw_screen[LCD_BYTE_WIDTH * 8 * i + LCD_BYTE_WIDTH - 1];
-
- for (j = 0; j < LCD_WIDTH / 8; j++) {
-
- v0 = s[0 * LCD_BYTE_WIDTH];
- v1 = s[1 * LCD_BYTE_WIDTH];
- v2 = s[2 * LCD_BYTE_WIDTH];
- v3 = s[3 * LCD_BYTE_WIDTH];
- v4 = s[4 * LCD_BYTE_WIDTH];
- v5 = s[5 * LCD_BYTE_WIDTH];
- v6 = s[6 * LCD_BYTE_WIDTH];
- v7 = s[7 * LCD_BYTE_WIDTH];
-
- d[0] = ((v7 & 0x01) << 7) |
- ((v6 & 0x01) << 6) |
- ((v5 & 0x01) << 5) |
- ((v4 & 0x01) << 4) |
- ((v3 & 0x01) << 3) |
- ((v2 & 0x01) << 2) |
- ((v1 & 0x01) << 1) |
- (v0 & 0x01) ;
-
- d[1] = ((v7 & 0x02) << 6) |
- ((v6 & 0x02) << 5) |
- ((v5 & 0x02) << 4) |
- ((v4 & 0x02) << 3) |
- ((v3 & 0x02) << 2) |
- ((v2 & 0x02) << 1) |
- ((v1 & 0x02) << 0) |
- ((v0 & 0x02) >> 1) ;
-
- d[2] = ((v7 & 0x04) << 5) |
- ((v6 & 0x04) << 4) |
- ((v5 & 0x04) << 3) |
- ((v4 & 0x04) << 2) |
- ((v3 & 0x04) << 1) |
- (v2 & 0x04) |
- ((v1 & 0x04) >> 1) |
- ((v0 & 0x04) >> 2) ;
-
- d[3] = ((v7 & 0x08) << 4) |
- ((v6 & 0x08) << 3) |
- ((v5 & 0x08) << 2) |
- ((v4 & 0x08) << 1) |
- (v3 & 0x08) |
- ((v2 & 0x08) >> 1) |
- ((v1 & 0x08) >> 2) |
- ((v0 & 0x08) >> 3) ;
-
- d[4] = ((v7 & 0x10) << 3) |
- ((v6 & 0x10) << 2) |
- ((v5 & 0x10) << 1) |
- (v4 & 0x10) |
- ((v3 & 0x10) >> 1) |
- ((v2 & 0x10) >> 2) |
- ((v1 & 0x10) >> 3) |
- ((v0 & 0x10) >> 4) ;
-
- d[5] = ((v7 & 0x20) << 2) |
- ((v6 & 0x20) << 1) |
- (v5 & 0x20) |
- ((v4 & 0x20) >> 1) |
- ((v3 & 0x20) >> 2) |
- ((v2 & 0x20) >> 3) |
- ((v1 & 0x20) >> 4) |
- ((v0 & 0x20) >> 5) ;
-
- d[6] = ((v7 & 0x40) << 1) |
- (v6 & 0x40) |
- ((v5 & 0x40) >> 1) |
- ((v4 & 0x40) >> 2) |
- ((v3 & 0x40) >> 3) |
- ((v2 & 0x40) >> 4) |
- ((v1 & 0x40) >> 5) |
- ((v0 & 0x40) >> 6) ;
-
- d[7] = (v7 & 0x80) |
- ((v6 & 0x80) >> 1) |
- ((v5 & 0x80) >> 2) |
- ((v4 & 0x80) >> 3) |
- ((v3 & 0x80) >> 4) |
- ((v2 & 0x80) >> 5) |
- ((v1 & 0x80) >> 6) |
- ((v0 & 0x80) >> 7) ;
-
- d += 8;
- s--;
- }
- }
-
- /* and now output only the differences */
- for (i = 0; i < LCD_PAGES; i++) {
-
- b = &hw_screen[i][0];
- e = &hw_screen[i][LCD_COLUMNS];
-
- d = &last_hw_screen[i][0];
- s = b;
-
- last_page = -1;
-
- /* update only the differences */
- do {
- while (s < e && *s == *d) {
- s++;
- d++;
- }
- if (s == e)
- break;
- r = s;
- while (s < e && *s != *d)
- *d++ = *s++;
-
- j = r - b;
-
- if (i != last_page) {
- sed156x_cmd_transfer(LCD_PADDR | i);
- last_page = i;
- }
-
- sed156x_cmd_transfer(LCD_CADRH | ((j >> 4) & 0x0F));
- sed156x_cmd_transfer(LCD_CADRL | (j & 0x0F));
- sed156x_data_block_transfer(r, s - r);
-
- } while (s < e);
- }
-
-/********
- for (i = 0; i < LCD_PAGES; i++) {
- sed156x_cmd_transfer(LCD_PADDR | i);
- sed156x_cmd_transfer(LCD_CADRH | 0);
- sed156x_cmd_transfer(LCD_CADRL | 0);
- sed156x_data_block_transfer(&hw_screen[i][0], LCD_COLUMNS);
- }
- memcpy(last_hw_screen, hw_screen, sizeof(last_hw_screen));
-********/
-}
-
-void sed156x_clear(void)
-{
- memset(sw_screen, 0, sizeof(sw_screen));
-}
-
-void sed156x_output_at(int x, int y, const char *str, int size)
-{
- int i, j;
- u8 *p;
- const u8 *s;
-
- if ((unsigned int)y >= LCD_TEXT_HEIGHT || (unsigned int)x >= LCD_TEXT_WIDTH)
- return;
-
- p = &sw_screen[y * VIDEO_FONT_HEIGHT * LCD_BYTE_WIDTH + x * VIDEO_FONT_BYTE_WIDTH];
-
- while (--size >= 0) {
-
- s = &video_fontdata[((int)*str++ & 0xff) * VIDEO_FONT_BYTE_WIDTH * VIDEO_FONT_HEIGHT];
- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) {
- for (j = 0; j < VIDEO_FONT_BYTE_WIDTH; j++)
- *p++ = *s++;
- p += LCD_BYTE_WIDTH - VIDEO_FONT_BYTE_WIDTH;
- }
- p -= (LCD_BYTE_LINESZ - VIDEO_FONT_BYTE_WIDTH);
-
- if (x >= LCD_TEXT_WIDTH)
- break;
- x++;
- }
-}
-
-void sed156x_reverse_at(int x, int y, int size)
-{
- int i, j;
- u8 *p;
-
- if ((unsigned int)y >= LCD_TEXT_HEIGHT || (unsigned int)x >= LCD_TEXT_WIDTH)
- return;
-
- p = &sw_screen[y * VIDEO_FONT_HEIGHT * LCD_BYTE_WIDTH + x * VIDEO_FONT_BYTE_WIDTH];
-
- while (--size >= 0) {
-
- for (i = 0; i < VIDEO_FONT_HEIGHT; i++) {
- for (j = 0; j < VIDEO_FONT_BYTE_WIDTH; j++, p++)
- *p = ~*p;
- p += LCD_BYTE_WIDTH - VIDEO_FONT_BYTE_WIDTH;
- }
- p -= (LCD_BYTE_LINESZ - VIDEO_FONT_BYTE_WIDTH);
-
- if (x >= LCD_TEXT_WIDTH)
- break;
- x++;
- }
-}
-
-void sed156x_scroll_line(void)
-{
- memmove(&sw_screen[0],
- &sw_screen[LCD_BYTE_LINESZ],
- LCD_BYTE_WIDTH * (LCD_HEIGHT - VIDEO_FONT_HEIGHT));
-}
-
-void sed156x_scroll(int dx, int dy)
-{
- u8 *p1 = NULL, *p2 = NULL, *p3 = NULL; /* pacify gcc */
- int adx, ady, i, sz;
-
- adx = dx > 0 ? dx : -dx;
- ady = dy > 0 ? dy : -dy;
-
- /* overscroll? erase everything */
- if (adx >= LCD_TEXT_WIDTH || ady >= LCD_TEXT_HEIGHT) {
- memset(sw_screen, 0, sizeof(sw_screen));
- return;
- }
-
- sz = LCD_BYTE_LINESZ * ady;
- if (dy > 0) {
- p1 = &sw_screen[0];
- p2 = &sw_screen[sz];
- p3 = &sw_screen[LCD_BYTE_WIDTH * LCD_HEIGHT - sz];
- } else if (dy < 0) {
- p1 = &sw_screen[sz];
- p2 = &sw_screen[0];
- p3 = &sw_screen[0];
- }
-
- if (ady > 0) {
- memmove(p1, p2, LCD_BYTE_WIDTH * LCD_HEIGHT - sz);
- memset(p3, 0, sz);
- }
-
- sz = VIDEO_FONT_BYTE_WIDTH * adx;
- if (dx > 0) {
- p1 = &sw_screen[0];
- p2 = &sw_screen[0] + sz;
- p3 = &sw_screen[0] + LCD_BYTE_WIDTH - sz;
- } else if (dx < 0) {
- p1 = &sw_screen[0] + sz;
- p2 = &sw_screen[0];
- p3 = &sw_screen[0];
- }
-
- /* xscroll */
- if (adx > 0) {
- for (i = 0; i < LCD_HEIGHT; i++) {
- memmove(p1, p2, LCD_BYTE_WIDTH - sz);
- memset(p3, 0, sz);
- p1 += LCD_BYTE_WIDTH;
- p2 += LCD_BYTE_WIDTH;
- p3 += LCD_BYTE_WIDTH;
- }
- }
-}
-
-void sed156x_init(void)
-{
- int i;
-
- SED156X_CS(1);
- SED156X_A0(1);
-
- /* Send initialization commands to the LCD */
- sed156x_cmd_transfer(LCD_OFF); /* Turn display OFF */
- sed156x_cmd_transfer(LCD_BIAS); /* set the LCD Bias, */
- sed156x_cmd_transfer(LCD_ADCMODE); /* ADC mode, */
- sed156x_cmd_transfer(LCD_COMDIR); /* common output mode, */
- sed156x_cmd_transfer(LCD_RESRT | LCD_RRATIO); /* resistor ratio, */
- sed156x_cmd_transfer(LCD_EVSET); /* electronic volume, */
- sed156x_cmd_transfer(LCD_CNTRST);
- sed156x_cmd_transfer(LCD_PWRMD | LCD_POWERM); /* and power mode */
- sed156x_cmd_transfer(LCD_PADDR | 0); /* cursor home */
- sed156x_cmd_transfer(LCD_CADRH | 0);
- sed156x_cmd_transfer(LCD_CADRL | 0);
- sed156x_cmd_transfer(LCD_LADDR | 0); /* and display start line */
- sed156x_cmd_transfer(LCD_DSP_NRM); /* LCD display Normal */
-
- /* clear everything */
- memset(sw_screen, 0, sizeof(sw_screen));
- memset(hw_screen, 0, sizeof(hw_screen));
- memset(last_hw_screen, 0, sizeof(last_hw_screen));
-
- for (i = 0; i < LCD_PAGES; i++) {
- sed156x_cmd_transfer(LCD_PADDR | i);
- sed156x_cmd_transfer(LCD_CADRH | 0);
- sed156x_cmd_transfer(LCD_CADRL | 0);
- sed156x_data_block_transfer(&hw_screen[i][0], LCD_COLUMNS);
- }
-
- sed156x_clear();
- sed156x_sync();
- sed156x_cmd_transfer(LCD_ON); /* Turn display ON */
-}
diff --git a/drivers/video/sm501.c b/drivers/video/sm501.c
deleted file mode 100644
index a468bd9..0000000
--- a/drivers/video/sm501.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * (C) Copyright 2005
- * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Basic video support for SMI SM501 "Voyager" graphic controller
- */
-
-#include <common.h>
-
-#include <asm/io.h>
-#include <pci.h>
-#include <video_fb.h>
-#include <sm501.h>
-
-#define read8(ptrReg) \
- *(volatile unsigned char *)(sm501.isaBase + ptrReg)
-
-#define write8(ptrReg,value) \
- *(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
-
-#define read16(ptrReg) \
- (*(volatile unsigned short *)(sm501.isaBase + ptrReg))
-
-#define write16(ptrReg,value) \
- (*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
-
-#define read32(ptrReg) \
- (*(volatile unsigned int *)(sm501.isaBase + ptrReg))
-
-#define write32(ptrReg, value) \
- (*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
-
-GraphicDevice sm501;
-
-void write_be32(int off, unsigned int val)
-{
- out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
-}
-
-void write_le32(int off, unsigned int val)
-{
- out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
-}
-
-void (*write_reg32)(int off, unsigned int val) = write_be32;
-
-/*-----------------------------------------------------------------------------
- * SmiSetRegs --
- *-----------------------------------------------------------------------------
- */
-static void SmiSetRegs (void)
-{
- /*
- * The content of the chipset register depends on the board (clocks,
- * ...)
- */
- const SMI_REGS *preg = board_get_regs ();
- while (preg->Index) {
- write_reg32 (preg->Index, preg->Value);
- /*
- * Insert a delay between
- */
- udelay (1000);
- preg ++;
- }
-}
-
-#ifdef CONFIG_VIDEO_SM501_PCI
-static struct pci_device_id sm501_pci_tbl[] = {
- { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
- {}
-};
-#endif
-
-/*
- * We do not enforce board code to provide empty/unused
- * functions for this driver and define weak default
- * functions here.
- */
-unsigned int __board_video_init (void)
-{
- return 0;
-}
-
-unsigned int board_video_init (void)
- __attribute__((weak, alias("__board_video_init")));
-
-unsigned int __board_video_get_fb (void)
-{
- return 0;
-}
-
-unsigned int board_video_get_fb (void)
- __attribute__((weak, alias("__board_video_get_fb")));
-
-void __board_validate_screen (unsigned int base)
-{
-}
-
-void board_validate_screen (unsigned int base)
- __attribute__((weak, alias("__board_validate_screen")));
-
-/*-----------------------------------------------------------------------------
- * video_hw_init --
- *-----------------------------------------------------------------------------
- */
-void *video_hw_init (void)
-{
-#ifdef CONFIG_VIDEO_SM501_PCI
- unsigned int pci_mem_base, pci_mmio_base;
- unsigned int id;
- unsigned short device_id;
- pci_dev_t devbusfn;
- int mem;
-#endif
- unsigned int *vm, i;
-
- memset (&sm501, 0, sizeof (GraphicDevice));
-
-#ifdef CONFIG_VIDEO_SM501_PCI
- printf("Video: ");
-
- /* Look for SM501/SM502 chips */
- devbusfn = pci_find_devices(sm501_pci_tbl, 0);
- if (devbusfn < 0) {
- printf ("PCI Controller not found.\n");
- goto not_pci;
- }
-
- /* Setup */
- pci_write_config_dword (devbusfn, PCI_COMMAND,
- (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
- pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
- pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
- pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
- sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
- sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
-
- if (sm501.isaBase)
- write_reg32 = write_le32;
-
- mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
- mem = (mem & 0x0000e000) >> 13;
- switch (mem) {
- case 1:
- mem = 8;
- break;
- case 2:
- mem = 16;
- break;
- case 3:
- mem = 32;
- break;
- case 4:
- mem = 64;
- break;
- case 5:
- mem = 2;
- break;
- case 0:
- default:
- mem = 4;
- }
- printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
-not_pci:
-#endif
- /*
- * Initialization of the access to the graphic chipset Retreive base
- * address of the chipset (see board/RPXClassic/eccx.c)
- */
- if (!sm501.isaBase) {
- sm501.isaBase = board_video_init ();
- if (!sm501.isaBase)
- return NULL;
- }
-
- if (!sm501.frameAdrs) {
- sm501.frameAdrs = board_video_get_fb ();
- if (!sm501.frameAdrs)
- return NULL;
- }
-
- sm501.winSizeX = board_get_width ();
- sm501.winSizeY = board_get_height ();
-
-#if defined(CONFIG_VIDEO_SM501_8BPP)
- sm501.gdfIndex = GDF__8BIT_INDEX;
- sm501.gdfBytesPP = 1;
-
-#elif defined(CONFIG_VIDEO_SM501_16BPP)
- sm501.gdfIndex = GDF_16BIT_565RGB;
- sm501.gdfBytesPP = 2;
-
-#elif defined(CONFIG_VIDEO_SM501_32BPP)
- sm501.gdfIndex = GDF_32BIT_X888RGB;
- sm501.gdfBytesPP = 4;
-#else
-#error Unsupported SM501 BPP
-#endif
-
- sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
-
- /* Load Smi registers */
- SmiSetRegs ();
-
- /* (see board/RPXClassic/RPXClassic.c) */
- board_validate_screen (sm501.isaBase);
-
- /* Clear video memory */
- i = sm501.memSize/4;
- vm = (unsigned int *)sm501.frameAdrs;
- while(i--)
- *vm++ = 0;
-
- return (&sm501);
-}
diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index 47752b2..4164fa1 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -12,7 +12,6 @@
#include <errno.h>
#include <display.h>
#include <edid.h>
-#include <fdtdec.h>
#include <lcd.h>
#include <video.h>
#include <asm/gpio.h>
@@ -334,7 +333,6 @@
{
struct display_plat *disp_uc_plat;
struct dc_ctlr *dc_ctlr;
- const void *blob = gd->fdt_blob;
struct udevice *dp_dev;
const int href_to_sync = 1, vref_to_sync = 1;
int panel_bpp = 18; /* default 18 bits per pixel */
@@ -363,9 +361,8 @@
return ret;
}
- dc_ctlr = (struct dc_ctlr *)fdtdec_get_addr(blob, dev_of_offset(dev),
- "reg");
- if (fdtdec_decode_display_timing(blob, dev_of_offset(dev), 0, timing)) {
+ dc_ctlr = (struct dc_ctlr *)dev_read_addr(dev);
+ if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) {
debug("%s: Failed to decode display timing\n", __func__);
return -EINVAL;
}
@@ -416,6 +413,7 @@
debug("dc: failed to update window\n");
return ret;
}
+ debug("%s: ready\n", __func__);
return 0;
}
diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c
index c38b3e5..95d743d 100644
--- a/drivers/video/tegra124/dp.c
+++ b/drivers/video/tegra124/dp.c
@@ -10,7 +10,6 @@
#include <dm.h>
#include <div64.h>
#include <errno.h>
-#include <fdtdec.h>
#include <video_bridge.h>
#include <asm/io.h>
#include <asm/arch-tegra/dc.h>
@@ -1572,7 +1571,7 @@
{
struct tegra_dp_plat *plat = dev_get_platdata(dev);
- plat->base = devfdt_get_addr(dev);
+ plat->base = dev_read_addr(dev);
return 0;
}
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index 4324071..700ab25 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -7,9 +7,9 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
-#include <fdtdec.h>
#include <malloc.h>
#include <panel.h>
+#include <syscon.h>
#include <video_bridge.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
@@ -759,15 +759,12 @@
const struct display_timing *timing)
{
struct tegra_dc_sor_data *sor = dev_get_priv(dev);
- const void *blob = gd->fdt_blob;
struct dc_ctlr *disp_ctrl;
u32 reg_val;
- int node;
/* Use the first display controller */
debug("%s\n", __func__);
- node = dev_of_offset(dc_dev);
- disp_ctrl = (struct dc_ctlr *)fdtdec_get_addr(blob, node, "reg");
+ disp_ctrl = (struct dc_ctlr *)dev_read_addr(dc_dev);
tegra_dc_sor_enable_dc(disp_ctrl);
tegra_dc_sor_config_panel(sor, 0, link_cfg, timing);
@@ -974,16 +971,13 @@
{
struct tegra_dc_sor_data *sor = dev_get_priv(dev);
int dc_reg_ctx[DC_REG_SAVE_SPACE];
- const void *blob = gd->fdt_blob;
struct dc_ctlr *disp_ctrl;
unsigned long dc_int_mask;
- int node;
int ret;
debug("%s\n", __func__);
/* Use the first display controller */
- node = dev_of_offset(dc_dev);
- disp_ctrl = (struct dc_ctlr *)fdtdec_get_addr(blob, node, "reg");
+ disp_ctrl = (struct dc_ctlr *)dev_read_addr(dev);
/* Sleep mode */
tegra_sor_writel(sor, SUPER_STATE1, SUPER_STATE1_ASY_HEAD_OP_SLEEP |
@@ -1050,18 +1044,13 @@
static int tegra_sor_ofdata_to_platdata(struct udevice *dev)
{
struct tegra_dc_sor_data *priv = dev_get_priv(dev);
- const void *blob = gd->fdt_blob;
- int node;
int ret;
- priv->base = (void *)fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
+ priv->base = (void *)dev_read_addr(dev);
- node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA124_PMC);
- if (node < 0) {
- debug("%s: Cannot find PMC\n", __func__);
- return -ENOENT;
- }
- priv->pmc_base = (void *)fdtdec_get_addr(blob, node, "reg");
+ priv->pmc_base = (void *)syscon_get_first_range(TEGRA_SYSCON_PMC);
+ if (IS_ERR(priv->pmc_base))
+ return PTR_ERR(priv->pmc_base);
ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "nvidia,panel",
&priv->panel);
diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c
index cf71ad1..6d96b33 100644
--- a/drivers/video/videomodes.c
+++ b/drivers/video/videomodes.c
@@ -165,7 +165,8 @@
/* first search for the environment containing the real param string */
s = penv;
- if ((p = getenv (s)) != NULL)
+ p = env_get(s);
+ if (p)
s = p;
/*
@@ -234,7 +235,7 @@
int video_get_video_mode(unsigned int *xres, unsigned int *yres,
unsigned int *depth, unsigned int *freq, const char **options)
{
- char *p = getenv("video-mode");
+ char *p = env_get("video-mode");
if (!p)
return 0;
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d360a17..fc46b67 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -19,7 +19,16 @@
default y if AM33XX
help
Say Y here to enable the OMAP3+ watchdog driver.
-
+
+config TANGIER_WATCHDOG
+ bool "Intel Tangier watchdog"
+ depends on INTEL_MID
+ select HW_WATCHDOG
+ help
+ This enables support for watchdog controller available on
+ Intel Tangier SoC. If you're using a board with Intel Tangier
+ SoC, say Y here.
+
config ULP_WATCHDOG
bool "i.MX7ULP watchdog"
help
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 3230cbb..ab6a6b7 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -14,6 +14,7 @@
obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
+obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
obj-$(CONFIG_WDT) += wdt-uclass.o
obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c
new file mode 100644
index 0000000..9cf4baf
--- /dev/null
+++ b/drivers/watchdog/tangier_wdt.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <watchdog.h>
+#include <asm/scu.h>
+
+/* Hardware timeout in seconds */
+#define WDT_PRETIMEOUT 15
+#define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
+#define WDT_TIMEOUT_MAX 170
+#define WDT_DEFAULT_TIMEOUT 90
+
+#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#define WATCHDOG_HEARTBEAT 60000
+#else
+#define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_TIMEOUT_MSECS
+#endif
+
+enum {
+ SCU_WATCHDOG_START = 0,
+ SCU_WATCHDOG_STOP = 1,
+ SCU_WATCHDOG_KEEPALIVE = 2,
+ SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
+};
+
+void hw_watchdog_reset(void)
+{
+ static unsigned long last;
+ unsigned long now;
+
+ if (gd->timer)
+ now = timer_get_us();
+ else
+ now = rdtsc() / 1000;
+
+ /* Do not flood SCU */
+ if (last > now)
+ last = 0;
+
+ if (unlikely((now - last) > (WDT_PRETIMEOUT / 2) * 1000000)) {
+ last = now;
+ scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
+ }
+}
+
+int hw_watchdog_disable(void)
+{
+ return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
+}
+
+void hw_watchdog_init(void)
+{
+ u32 timeout = WATCHDOG_HEARTBEAT / 1000;
+ int in_size;
+ struct ipc_wd_start {
+ u32 pretimeout;
+ u32 timeout;
+ } ipc_wd_start = { timeout - WDT_PRETIMEOUT, timeout };
+
+ /*
+ * SCU expects the input size for watchdog IPC
+ * to be based on 4 bytes
+ */
+ in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
+
+ scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
+ (u32 *)&ipc_wd_start, in_size, NULL, 0);
+}
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index bb9ae80..8a30f02 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -13,14 +13,14 @@
DECLARE_GLOBAL_DATA_PTR;
-int wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
{
const struct wdt_ops *ops = device_get_ops(dev);
if (!ops->start)
return -ENOSYS;
- return ops->start(dev, timeout, flags);
+ return ops->start(dev, timeout_ms, flags);
}
int wdt_stop(struct udevice *dev)
diff --git a/dts/Kconfig b/dts/Kconfig
index 1bc9656..b4b7ddc 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -32,6 +32,14 @@
which is not enough to support device tree. Enable this option to
allow such boards to be supported by U-Boot SPL.
+config TPL_OF_CONTROL
+ bool "Enable run-time configuration via Device Tree in TPL"
+ depends on TPL && OF_CONTROL
+ help
+ Some boards use device tree in U-Boot but only have 4KB of SRAM
+ which is not enough to support device tree. Enable this option to
+ allow such boards to be supported by U-Boot TPL.
+
config OF_LIVE
bool "Enable use of a live tree"
depends on OF_CONTROL
@@ -136,4 +144,25 @@
declarations for each node. See README.platdata for more
information.
+config TPL_OF_PLATDATA
+ bool "Generate platform data for use in TPL"
+ depends on TPL_OF_CONTROL
+ help
+ For very constrained SPL environments the overhead of decoding
+ device tree nodes and converting their contents into platform data
+ is too large. This overhead includes libfdt code as well as the
+ device tree contents itself. The latter is fairly compact, but the
+ former can add 3KB or more to a Thumb 2 Image.
+
+ This option enables generation of platform data from the device
+ tree as C code. This code creates devices using U_BOOT_DEVICE()
+ declarations. The benefit is that it allows driver code to access
+ the platform data directly in C structures, avoidin the libfdt
+ overhead.
+
+ This option works by generating C structure declarations for each
+ compatible string, then adding platform data and U_BOOT_DEVICE
+ declarations for each node. See README.platdata for more
+ information.
+
endmenu
diff --git a/env/Kconfig b/env/Kconfig
new file mode 100644
index 0000000..748f534
--- /dev/null
+++ b/env/Kconfig
@@ -0,0 +1,475 @@
+menu "Environment"
+
+choice
+ prompt "Select the location of the environment"
+ default ENV_IS_IN_MMC if ARCH_SUNXI
+ default ENV_IS_IN_FAT if ARCH_BCM283X
+ default ENV_IS_IN_MMC if ARCH_UNIPHIER
+ default ENV_IS_IN_MMC if ARCH_EXYNOS4
+ default ENV_IS_IN_MMC if MX6SX || MX7D
+ default ENV_IS_IN_FLASH if ARCH_CINTEGRATOR
+ default ENV_IS_IN_SPI_FLASH if ARMADA_XP
+ default ENV_IS_IN_MMC if TEGRA30 || TEGRA124
+ default ENV_IS_IN_MMC if TEGRA_ARMV8_COMMON
+ default ENV_IS_IN_FLASH if ARCH_INTEGRATOR_CP
+ default ENV_IS_IN_FLASH if M548x || M547x || M5282 || MCF547x_8x
+ default ENV_IS_IN_FLASH if MCF532x || MCF52x2
+ default ENV_IS_IN_FLASH if MPC86xx || MPC83xx
+ default ENV_IS_IN_FLASH if ARCH_MPC8572 || ARCH_MPC8548 || ARCH_MPC8641
+ default ENV_IS_IN_FLASH if SH && !CPU_SH4
+ default ENV_IS_IN_SPI_FLASH if INTEL_BAYTRAIL
+ default ENV_IS_IN_SPI_FLASH if INTEL_BROADWELL
+ default ENV_IS_IN_SPI_FLASH if NORTHBRIDGE_INTEL_IVYBRIDGE
+ default ENV_IS_IN_SPI_FLASH if INTEL_QUARK
+ default ENV_IS_IN_SPI_FLASH if INTEL_QUEENSBAY
+ default ENV_IS_IN_FAT if MMC_OMAP_HS && TI_COMMON_CMD_OPTIONS
+ default ENV_IS_NOWHERE
+ help
+ At present the environment can be stored in only one place. Use this
+ option to select the location. This is either a device (where the
+ environemnt information is simply written to a fixed location or
+ partition on the device) or a filesystem (where the environment
+ information is written to a file).
+
+config ENV_IS_NOWHERE
+ bool "Environment is not stored"
+ help
+ Define this if you don't want to or can't have an environment stored
+ on a storage medium. In this case the environemnt will still exist
+ while U-Boot is running, but once U-Boot exits it will not be
+ stored. U-Boot will therefore always start up with a default
+ environment.
+
+config ENV_IS_IN_DATAFLASH
+ bool "Environment in dataflash"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a DataFlash memory device which you
+ want to use for the environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These three #defines specify the offset and size of the
+ environment area within the total memory of your DataFlash placed
+ at the specified address.
+
+config ENV_IS_IN_EEPROM
+ bool "Environment in EEPROM"
+ depends on !CHAIN_OF_TRUST
+ help
+ Use this if you have an EEPROM or similar serial access
+ device and a driver for it.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the
+ environment area within the total memory of your EEPROM.
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR:
+ If defined, specified the chip address of the EEPROM device.
+ The default address is zero.
+
+ - CONFIG_SYS_I2C_EEPROM_BUS:
+ If defined, specified the i2c bus of the EEPROM device.
+
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
+ If defined, the number of bits used to address bytes in a
+ single page in the EEPROM device. A 64 byte page, for example
+ would require six bits.
+
+ - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
+ If defined, the number of milliseconds to delay between
+ page writes. The default is zero milliseconds.
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
+ The length in bytes of the EEPROM memory array address. Note
+ that this is NOT the chip address length!
+
+ - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
+ EEPROM chips that implement "address overflow" are ones
+ like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ address and the extra bits end up in the "chip address" bit
+ slots. This makes a 24WC08 (1Kbyte) chip look like four 256
+ byte chips.
+
+ Note that we consider the length of the address field to
+ still be one byte because the extra address bits are hidden
+ in the chip address.
+
+ - CONFIG_SYS_EEPROM_SIZE:
+ The size in bytes of the EEPROM device.
+
+ - CONFIG_ENV_EEPROM_IS_ON_I2C
+ define this, if you have I2C and SPI activated, and your
+ EEPROM, which holds the environment, is on the I2C bus.
+
+ - CONFIG_I2C_ENV_EEPROM_BUS
+ if you have an Environment on an EEPROM reached over
+ I2C muxes, you can define here, how to reach this
+ EEPROM. For example:
+
+ #define CONFIG_I2C_ENV_EEPROM_BUS 1
+
+ EEPROM which holds the environment, is reached over
+ a pca9547 i2c mux with address 0x70, channel 3.
+
+config ENV_IS_IN_FAT
+ bool "Environment is in a FAT filesystem"
+ depends on !CHAIN_OF_TRUST
+ select FAT_WRITE
+ help
+ Define this if you want to use the FAT file system for the environment.
+
+ - CONFIG_FAT_WRITE:
+ This must be enabled. Otherwise it cannot save the environment file.
+
+config ENV_IS_IN_FLASH
+ bool "Environment in flash memory"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a flash device which you want to use for the
+ environment.
+
+ a) The environment occupies one whole flash sector, which is
+ "embedded" in the text segment with the U-Boot code. This
+ happens usually with "bottom boot sector" or "top boot
+ sector" type flash chips, which have several smaller
+ sectors at the start or the end. For instance, such a
+ layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
+ such a case you would place the environment in one of the
+ 4 kB sectors - with U-Boot code before and after it. With
+ "top boot sector" type flash chips, you would put the
+ environment in one of the last sectors, leaving a gap
+ between U-Boot and the environment.
+
+ CONFIG_ENV_OFFSET:
+
+ Offset of environment data (variable area) to the
+ beginning of flash memory; for instance, with bottom boot
+ type flash chips the second sector can be used: the offset
+ for this sector is given here.
+
+ CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
+
+ CONFIG_ENV_ADDR:
+
+ This is just another way to specify the start address of
+ the flash sector containing the environment (instead of
+ CONFIG_ENV_OFFSET).
+
+ CONFIG_ENV_SECT_SIZE:
+
+ Size of the sector containing the environment.
+
+
+ b) Sometimes flash chips have few, equal sized, BIG sectors.
+ In such a case you don't want to spend a whole sector for
+ the environment.
+
+ CONFIG_ENV_SIZE:
+
+ If you use this in combination with CONFIG_ENV_IS_IN_FLASH
+ and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
+ of this flash sector for the environment. This saves
+ memory for the RAM copy of the environment.
+
+ It may also save flash memory if you decide to use this
+ when your environment is "embedded" within U-Boot code,
+ since then the remainder of the flash sector could be used
+ for U-Boot code. It should be pointed out that this is
+ STRONGLY DISCOURAGED from a robustness point of view:
+ updating the environment in flash makes it always
+ necessary to erase the WHOLE sector. If something goes
+ wrong before the contents has been restored from a copy in
+ RAM, your target system will be dead.
+
+ CONFIG_ENV_ADDR_REDUND
+ CONFIG_ENV_SIZE_REDUND
+
+ These settings describe a second storage area used to hold
+ a redundant copy of the environment data, so that there is
+ a valid backup copy in case there is a power failure during
+ a "saveenv" operation.
+
+ BE CAREFUL! Any changes to the flash layout, and some changes to the
+ source code will make it necessary to adapt <board>/u-boot.lds*
+ accordingly!
+
+config ENV_IS_IN_MMC
+ bool "Environment in an MMC device"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have an MMC device which you want to use for the
+ environment.
+
+ CONFIG_SYS_MMC_ENV_DEV:
+
+ Specifies which MMC device the environment is stored in.
+
+ CONFIG_SYS_MMC_ENV_PART (optional):
+
+ Specifies which MMC partition the environment is stored in. If not
+ set, defaults to partition 0, the user area. Common values might be
+ 1 (first MMC boot partition), 2 (second MMC boot partition).
+
+ CONFIG_ENV_OFFSET:
+ CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the environment
+ area within the specified MMC device.
+
+ If offset is positive (the usual case), it is treated as relative to
+ the start of the MMC partition. If offset is negative, it is treated
+ as relative to the end of the MMC partition. This can be useful if
+ your board may be fitted with different MMC devices, which have
+ different sizes for the MMC partitions, and you always want the
+ environment placed at the very end of the partition, to leave the
+ maximum possible space before it, to store other data.
+
+ These two values are in units of bytes, but must be aligned to an
+ MMC sector boundary.
+
+ CONFIG_ENV_OFFSET_REDUND (optional):
+
+ Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
+ hold a redundant copy of the environment data. This provides a
+ valid backup copy in case the other copy is corrupted, e.g. due
+ to a power failure during a "saveenv" operation.
+
+ This value may also be positive or negative; this is handled in the
+ same way as CONFIG_ENV_OFFSET.
+
+ This value is also in units of bytes, but must also be aligned to
+ an MMC sector boundary.
+
+ CONFIG_ENV_SIZE_REDUND (optional):
+
+ This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
+ set. If this value is set, it must be set to the same value as
+ CONFIG_ENV_SIZE.
+
+config ENV_IS_IN_NAND
+ bool "Environment in a NAND device"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a NAND device which you want to use for the
+ environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the environment
+ area within the first NAND device. CONFIG_ENV_OFFSET must be
+ aligned to an erase block boundary.
+
+ - CONFIG_ENV_OFFSET_REDUND (optional):
+
+ This setting describes a second storage area of CONFIG_ENV_SIZE
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
+ aligned to an erase block boundary.
+
+ - CONFIG_ENV_RANGE (optional):
+
+ Specifies the length of the region in which the environment
+ can be written. This should be a multiple of the NAND device's
+ block size. Specifying a range with more erase blocks than
+ are needed to hold CONFIG_ENV_SIZE allows bad blocks within
+ the range to be avoided.
+
+ - CONFIG_ENV_OFFSET_OOB (optional):
+
+ Enables support for dynamically retrieving the offset of the
+ environment from block zero's out-of-band data. The
+ "nand env.oob" command can be used to record this offset.
+ Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
+ using CONFIG_ENV_OFFSET_OOB.
+
+config ENV_IS_IN_NVRAM
+ bool "Environment in a non-volatile RAM"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have some non-volatile memory device
+ (NVRAM, battery buffered SRAM) which you want to use for the
+ environment.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines are used to determine the memory area you
+ want to use for environment. It is assumed that this memory
+ can just be read and written to, without any special
+ provision.
+
+config ENV_IS_IN_ONENAND
+ bool "Environment is in OneNAND"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you want to put your local device's environment in
+ OneNAND.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines are used to determine the device range you
+ want to use for environment. It is assumed that this memory
+ can just be read and written to, without any special
+ provision.
+
+config ENV_IS_IN_REMOTE
+ bool "Environment is in remove memory space"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a remote memory space which you
+ want to use for the local device's environment.
+
+ - CONFIG_ENV_ADDR:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the address and size of the
+ environment area within the remote memory space. The
+ local device can get the environment from remote memory
+ space by SRIO or PCIE links.
+
+config ENV_IS_IN_SPI_FLASH
+ bool "Environment is in SPI flash"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have a SPI Flash memory device which you
+ want to use for the environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the
+ environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SECT_SIZE:
+
+ Define the SPI flash's sector size.
+
+ - CONFIG_ENV_OFFSET_REDUND (optional):
+
+ This setting describes a second storage area of CONFIG_ENV_SIZE
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SPI_BUS (optional):
+ - CONFIG_ENV_SPI_CS (optional):
+
+ Define the SPI bus and chip select. If not defined they will be 0.
+
+ - CONFIG_ENV_SPI_MAX_HZ (optional):
+
+ Define the SPI max work clock. If not defined then use 1MHz.
+
+ - CONFIG_ENV_SPI_MODE (optional):
+
+ Define the SPI work mode. If not defined then use SPI_MODE_3.
+
+config ENV_IS_IN_UBI
+ bool "Environment in a UBI volume"
+ depends on !CHAIN_OF_TRUST
+ help
+ Define this if you have an UBI volume that you want to use for the
+ environment. This has the benefit of wear-leveling the environment
+ accesses, which is important on NAND.
+
+ - CONFIG_ENV_UBI_PART:
+
+ Define this to a string that is the mtd partition containing the UBI.
+
+ - CONFIG_ENV_UBI_VOLUME:
+
+ Define this to the name of the volume that you want to store the
+ environment in.
+
+ - CONFIG_ENV_UBI_VOLUME_REDUND:
+
+ Define this to the name of another volume to store a second copy of
+ the environment in. This will enable redundant environments in UBI.
+ It is assumed that both volumes are in the same MTD partition.
+
+ - CONFIG_UBI_SILENCE_MSG
+ - CONFIG_UBIFS_SILENCE_MSG
+
+ You will probably want to define these to avoid a really noisy system
+ when storing the env in UBI.
+
+endchoice
+
+config ENV_FAT_INTERFACE
+ string "Name of the block device for the environment"
+ depends on ENV_IS_IN_FAT
+ default "mmc" if TI_COMMON_CMD_OPTIONS || ARCH_ZYNQMP || ARCH_AT91
+ help
+ Define this to a string that is the name of the block device.
+
+config ENV_FAT_DEVICE_AND_PART
+ string "Device and partition for where to store the environemt in FAT"
+ depends on ENV_IS_IN_FAT
+ default "0:1" if TI_COMMON_CMD_OPTIONS
+ default "0:auto" if ARCH_ZYNQMP
+ default "0" if ARCH_AT91
+ help
+ Define this to a string to specify the partition of the device. It can
+ be as following:
+
+ "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
+ - "D:P": device D partition P. Error occurs if device D has no
+ partition table.
+ - "D:0": device D.
+ - "D" or "D:": device D partition 1 if device D has partition
+ table, or the whole device D if has no partition
+ table.
+ - "D:auto": first partition in device D with bootable flag set.
+ If none, first valid partition in device D. If no
+ partition table then means device D.
+
+config ENV_FAT_FILE
+ string "Name of the FAT file to use for the environemnt"
+ depends on ENV_IS_IN_FAT
+ default "uboot.env"
+ help
+ It's a string of the FAT file name. This file use to store the
+ environment.
+
+if ARCH_SUNXI
+
+config ENV_OFFSET
+ hex "Environment Offset"
+ depends on !ENV_IS_IN_UBI
+ depends on !ENV_IS_NOWHERE
+ default 0x88000 if ARCH_SUNXI
+ help
+ Offset from the start of the device (or partition)
+
+config ENV_SIZE
+ hex "Environment Size"
+ depends on !ENV_IS_NOWHERE
+ default 0x20000 if ARCH_SUNXI
+ help
+ Size of the environment storage area
+
+config ENV_UBI_PART
+ string "UBI partition name"
+ depends on ENV_IS_IN_UBI
+ help
+ MTD partition containing the UBI device
+
+config ENV_UBI_VOLUME
+ string "UBI volume name"
+ depends on ENV_IS_IN_UBI
+ help
+ Name of the volume that you want to store the environment in.
+
+endif
+
+endmenu
diff --git a/env/Makefile b/env/Makefile
new file mode 100644
index 0000000..8df5b9d
--- /dev/null
+++ b/env/Makefile
@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2004-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += common.o env.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += attr.o
+obj-y += callback.o
+obj-y += flags.o
+obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += dataflash.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
+extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o
+extra-$(CONFIG_ENV_IS_IN_FLASH) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += embedded.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += mmc.o
+obj-$(CONFIG_ENV_IS_IN_FAT) += fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += ext4.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += nand.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += nvram.o
+obj-$(CONFIG_ENV_IS_IN_ONENAND) += onenand.o
+obj-$(CONFIG_ENV_IS_IN_SATA) += sata.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
+obj-$(CONFIG_ENV_IS_IN_REMOTE) += remote.o
+obj-$(CONFIG_ENV_IS_IN_UBI) += ubi.o
+obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
+endif
+
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+# environment
+ifdef CONFIG_TPL_BUILD
+obj-$(CONFIG_TPL_ENV_SUPPORT) += attr.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += flags.o
+obj-$(CONFIG_TPL_ENV_SUPPORT) += callback.o
+else
+obj-$(CONFIG_SPL_ENV_SUPPORT) += attr.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += flags.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += callback.o
+endif
+ifneq ($(CONFIG_TPL_ENV_SUPPORT)$(CONFIG_SPL_ENV_SUPPORT),)
+obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += mmc.o
+obj-$(CONFIG_ENV_IS_IN_FAT) += fat.o
+obj-$(CONFIG_ENV_IS_IN_EXT4) += ext4.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += nand.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += flash.o
+endif
+endif
+
+CFLAGS_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null)
diff --git a/common/env_attr.c b/env/attr.c
similarity index 100%
rename from common/env_attr.c
rename to env/attr.c
diff --git a/common/env_callback.c b/env/callback.c
similarity index 98%
rename from common/env_callback.c
rename to env/callback.c
index 1957cc1..be70980 100644
--- a/common/env_callback.c
+++ b/env/callback.c
@@ -51,7 +51,7 @@
int ret = 1;
if (first_call) {
- callback_list = getenv(ENV_CALLBACK_VAR);
+ callback_list = env_get(ENV_CALLBACK_VAR);
first_call = 0;
}
diff --git a/common/env_common.c b/env/common.c
similarity index 88%
rename from common/env_common.c
rename to env/common.c
index d9c0c4e..688d5ab 100644
--- a/common/env_common.c
+++ b/env/common.c
@@ -27,49 +27,13 @@
.change_ok = env_flags_validate,
};
-__weak uchar env_get_char_spec(int index)
-{
- return *((uchar *)(gd->env_addr + index));
-}
-
-static uchar env_get_char_init(int index)
-{
- /* if crc was bad, use the default environment */
- if (gd->env_valid)
- return env_get_char_spec(index);
- else
- return default_environment[index];
-}
-
-uchar env_get_char_memory(int index)
-{
- return *env_get_addr(index);
-}
-
-uchar env_get_char(int index)
-{
- /* if relocated to RAM */
- if (gd->flags & GD_FLG_RELOC)
- return env_get_char_memory(index);
- else
- return env_get_char_init(index);
-}
-
-const uchar *env_get_addr(int index)
-{
- if (gd->env_valid)
- return (uchar *)(gd->env_addr + index);
- else
- return &default_environment[index];
-}
-
/*
* Read an environment variable as a boolean
* Return -1 if variable does not exist (default to true)
*/
-int getenv_yesno(const char *var)
+int env_get_yesno(const char *var)
{
- char *s = getenv(var);
+ char *s = env_get(var);
if (s == NULL)
return -1;
@@ -80,7 +44,7 @@
/*
* Look up the variable from the default environment
*/
-char *getenv_default(const char *name)
+char *env_get_default(const char *name)
{
char *ret_val;
unsigned long really_valid = gd->env_valid;
@@ -89,7 +53,7 @@
/* Pretend that the image is bad. */
gd->flags &= ~GD_FLG_ENV_READY;
gd->env_valid = 0;
- ret_val = getenv(name);
+ ret_val = env_get(name);
gd->env_valid = really_valid;
gd->flags = real_gd_flags;
return ret_val;
@@ -316,7 +280,7 @@
set_default_env("!bad CRC");
#endif
} else {
- env_relocate_spec();
+ env_load();
}
}
diff --git a/common/env_dataflash.c b/env/dataflash.c
similarity index 74%
rename from common/env_dataflash.c
rename to env/dataflash.c
index 034e323..77bc595 100644
--- a/common/env_dataflash.c
+++ b/env/dataflash.c
@@ -14,11 +14,7 @@
DECLARE_GLOBAL_DATA_PTR;
-env_t *env_ptr;
-
-char *env_name_spec = "dataflash";
-
-uchar env_get_char_spec(int index)
+static int env_dataflash_get_char(int index)
{
uchar c;
@@ -27,7 +23,7 @@
return c;
}
-void env_relocate_spec(void)
+static int env_dataflash_load(void)
{
ulong crc, new = 0;
unsigned off;
@@ -48,13 +44,15 @@
env_import(buf, 1);
else
set_default_env("!bad CRC");
+
+ return 0;
}
#ifdef CONFIG_ENV_OFFSET_REDUND
#error No support for redundant environment on dataflash yet!
#endif
-int saveenv(void)
+static int env_dataflash_save(void)
{
env_t env_new;
int ret;
@@ -68,17 +66,10 @@
CONFIG_ENV_SIZE);
}
-/*
- * Initialize environment use
- *
- * We are still running from ROM, so data use is limited.
- * Use a (moderately small) buffer on the stack
- */
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+U_BOOT_ENV_LOCATION(dataflash) = {
+ .location = ENVL_DATAFLASH,
+ ENV_NAME("dataflash")
+ .get_char = env_dataflash_get_char,
+ .load = env_dataflash_load,
+ .save = env_save_ptr(env_dataflash_save),
+};
diff --git a/common/env_eeprom.c b/env/eeprom.c
similarity index 85%
rename from common/env_eeprom.c
rename to env/eeprom.c
index 5f63a6c..08ef630 100644
--- a/common/env_eeprom.c
+++ b/env/eeprom.c
@@ -21,10 +21,6 @@
DECLARE_GLOBAL_DATA_PTR;
-env_t *env_ptr;
-
-char *env_name_spec = "EEPROM";
-
static int eeprom_bus_read(unsigned dev_addr, unsigned offset,
uchar *buffer, unsigned cnt)
{
@@ -65,13 +61,13 @@
return rcode;
}
-uchar env_get_char_spec(int index)
+static int env_eeprom_get_char(int index)
{
uchar c;
unsigned int off = CONFIG_ENV_OFFSET;
#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 2)
+ if (gd->env_valid == ENV_REDUND)
off = CONFIG_ENV_OFFSET_REDUND;
#endif
eeprom_bus_read(CONFIG_SYS_DEF_EEPROM_ADDR,
@@ -80,7 +76,7 @@
return c;
}
-void env_relocate_spec(void)
+static int env_eeprom_load(void)
{
char buf_env[CONFIG_ENV_SIZE];
unsigned int off = CONFIG_ENV_OFFSET;
@@ -128,21 +124,21 @@
gd->env_addr = 0;
gd->env_valid = 0;
} else if (crc_ok[0] && !crc_ok[1]) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (!crc_ok[0] && crc_ok[1]) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else {
/* both ok - check serial */
if (flags[0] == ACTIVE_FLAG && flags[1] == OBSOLETE_FLAG)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
else if (flags[0] == OBSOLETE_FLAG && flags[1] == ACTIVE_FLAG)
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
else if (flags[0] == 0xFF && flags[1] == 0)
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
else if (flags[1] == 0xFF && flags[0] == 0)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
else /* flags are equal - almost impossible */
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
}
#else /* CONFIG_ENV_OFFSET_REDUND */
@@ -170,7 +166,7 @@
}
if (crc == new) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else {
gd->env_valid = 0;
}
@@ -178,7 +174,7 @@
off = CONFIG_ENV_OFFSET;
#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 2)
+ if (gd->env_valid == ENV_REDUND)
off = CONFIG_ENV_OFFSET_REDUND;
#endif
@@ -186,9 +182,11 @@
off, (uchar *)buf_env, CONFIG_ENV_SIZE);
env_import(buf_env, 1);
+
+ return 0;
}
-int saveenv(void)
+static int env_eeprom_save(void)
{
env_t env_new;
int rc;
@@ -198,14 +196,12 @@
char flag_obsolete = OBSOLETE_FLAG;
#endif
- BUG_ON(env_ptr != NULL);
-
rc = env_export(&env_new);
if (rc)
return rc;
#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 1) {
+ if (gd->env_valid == ENV_VALID) {
off = CONFIG_ENV_OFFSET_REDUND;
off_red = CONFIG_ENV_OFFSET;
}
@@ -222,24 +218,19 @@
off_red + offsetof(env_t, flags),
(uchar *)&flag_obsolete, 1);
- if (gd->env_valid == 1)
- gd->env_valid = 2;
+ if (gd->env_valid == ENV_VALID)
+ gd->env_valid = ENV_REDUND;
else
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
}
#endif
return rc;
}
-/*
- * Initialize Environment use
- *
- * We are still running from ROM, so data use is limited.
- * Use a (moderately small) buffer on the stack
- */
-int env_init(void)
-{
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
- return 0;
-}
+U_BOOT_ENV_LOCATION(eeprom) = {
+ .location = ENVL_EEPROM,
+ ENV_NAME("EEPROM")
+ .get_char = env_eeprom_get_char,
+ .load = env_eeprom_load,
+ .save = env_save_ptr(env_eeprom_save),
+};
diff --git a/common/env_embedded.c b/env/embedded.c
similarity index 71%
rename from common/env_embedded.c
rename to env/embedded.c
index b368fda..43694db 100644
--- a/common/env_embedded.c
+++ b/env/embedded.c
@@ -30,25 +30,16 @@
*/
#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_BUILD_ENVCRC)
/*
- * Only put the environment in it's own section when we are building
+ * Put the environment in the .text section when we are building
* U-Boot proper. The host based program "tools/envcrc" does not need
- * a seperate section. Note that ENV_CRC is only defined when building
- * U-Boot itself.
+ * a seperate section.
*/
-#if defined(CONFIG_SYS_USE_PPCENV) && \
- defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
-/* XXX - This only works with GNU C */
-# define __PPCENV__ __attribute__ ((section(".ppcenv")))
-# define __PPCTEXT__ __attribute__ ((section(".text")))
-
-#elif defined(USE_HOSTCC) /* Native for 'tools/envcrc' */
-# define __PPCENV__ /*XXX DO_NOT_DEL_THIS_COMMENT*/
-# define __PPCTEXT__ /*XXX DO_NOT_DEL_THIS_COMMENT*/
+#if defined(USE_HOSTCC) /* Native for 'tools/envcrc' */
+# define __UBOOT_ENV_SECTION__ /*XXX DO_NOT_DEL_THIS_COMMENT*/
#else /* Environment is embedded in U-Boot's .text section */
/* XXX - This only works with GNU C */
-# define __PPCENV__ __attribute__ ((section(".text")))
-# define __PPCTEXT__ __attribute__ ((section(".text")))
+# define __UBOOT_ENV_SECTION__ __attribute__ ((section(".text")))
#endif
/*
@@ -79,7 +70,7 @@
#include <env_default.h>
#ifdef CONFIG_ENV_ADDR_REDUND
-env_t redundand_environment __PPCENV__ = {
+env_t redundand_environment __UBOOT_ENV_SECTION__ = {
0, /* CRC Sum: invalid */
0, /* Flags: invalid */
{
@@ -96,7 +87,7 @@
* .data/.sdata section.
*
*/
-unsigned long env_size __PPCTEXT__ = sizeof(env_t);
+unsigned long env_size __UBOOT_ENV_SECTION__ = sizeof(env_t);
/*
* Add in absolutes.
diff --git a/env/env.c b/env/env.c
new file mode 100644
index 0000000..2b8b961
--- /dev/null
+++ b/env/env.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <environment.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct env_driver *env_driver_lookup(enum env_location loc)
+{
+ struct env_driver *drv;
+ const int n_ents = ll_entry_count(struct env_driver, env_driver);
+ struct env_driver *entry;
+
+ drv = ll_entry_start(struct env_driver, env_driver);
+ for (entry = drv; entry != drv + n_ents; entry++) {
+ if (loc == entry->location)
+ return entry;
+ }
+
+ /* Not found */
+ return NULL;
+}
+
+static enum env_location env_get_default_location(void)
+{
+ if IS_ENABLED(CONFIG_ENV_IS_IN_DATAFLASH)
+ return ENVL_DATAFLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
+ return ENVL_EEPROM;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT)
+ return ENVL_FAT;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_FLASH)
+ return ENVL_FLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
+ return ENVL_MMC;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_NAND)
+ return ENVL_NAND;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_NVRAM)
+ return ENVL_NVRAM;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_REMOTE)
+ return ENVL_REMOTE;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)
+ return ENVL_SPI_FLASH;
+ else if IS_ENABLED(CONFIG_ENV_IS_IN_UBI)
+ return ENVL_UBI;
+ else if IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
+ return ENVL_NOWHERE;
+ else
+ return ENVL_UNKNOWN;
+}
+
+struct env_driver *env_driver_lookup_default(void)
+{
+ enum env_location loc = env_get_default_location();
+ struct env_driver *drv;
+
+ drv = env_driver_lookup(loc);
+ if (!drv) {
+ debug("%s: No environment driver for location %d\n", __func__,
+ loc);
+ return NULL;
+ }
+
+ return drv;
+}
+
+int env_get_char(int index)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret;
+
+ if (!gd->env_valid)
+ return default_environment[index];
+ if (!drv)
+ return -ENODEV;
+ if (!drv->get_char)
+ return *(uchar *)(gd->env_addr + index);
+ ret = drv->get_char(index);
+ if (ret < 0) {
+ debug("%s: Environment failed to load (err=%d)\n",
+ __func__, ret);
+ }
+
+ return ret;
+}
+
+int env_load(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret = 0;
+
+ if (!drv)
+ return -ENODEV;
+ if (!drv->load)
+ return 0;
+ drv->load(); /* TODO(sjg@chromium.org): Make this return an error */
+ if (ret) {
+ debug("%s: Environment failed to load (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int env_save(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret;
+
+ if (!drv)
+ return -ENODEV;
+ if (!drv->save)
+ return -ENOSYS;
+ ret = drv->save();
+ if (ret) {
+ debug("%s: Environment failed to save (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int env_init(void)
+{
+ struct env_driver *drv = env_driver_lookup_default();
+ int ret = -ENOENT;
+
+ if (!drv)
+ return -ENODEV;
+ if (drv->init)
+ ret = drv->init();
+ if (ret == -ENOENT) {
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 0;
+
+ return 0;
+ } else if (ret) {
+ debug("%s: Environment failed to init (err=%d)\n", __func__,
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/common/env_ext4.c b/env/ext4.c
similarity index 91%
rename from common/env_ext4.c
rename to env/ext4.c
index adefa7d..6520221 100644
--- a/common/env_ext4.c
+++ b/env/ext4.c
@@ -31,23 +31,10 @@
#include <ext4fs.h>
#include <mmc.h>
-char *env_name_spec = "EXT4";
-
-env_t *env_ptr;
-
DECLARE_GLOBAL_DATA_PTR;
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
+static int env_ext4_save(void)
{
env_t env_new;
struct blk_desc *dev_desc = NULL;
@@ -88,7 +75,7 @@
}
#endif /* CONFIG_CMD_SAVEENV */
-void env_relocate_spec(void)
+static int env_ext4_load(void)
{
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
struct blk_desc *dev_desc = NULL;
@@ -122,8 +109,17 @@
}
env_import(buf, 1);
- return;
+ return 0;
err_env_relocate:
set_default_env(NULL);
+
+ return -EIO;
}
+
+U_BOOT_ENV_LOCATION(ext4) = {
+ .location = ENVL_EXT4,
+ ENV_NAME("EXT4")
+ .load = env_ext4_load,
+ .save = env_save_ptr(env_ext4_save),
+};
diff --git a/env/fat.c b/env/fat.c
new file mode 100644
index 0000000..ec49c39
--- /dev/null
+++ b/env/fat.c
@@ -0,0 +1,124 @@
+/*
+ * (c) Copyright 2011 by Tigris Elektronik GmbH
+ *
+ * Author:
+ * Maximilian Schwerin <mvs@tigris.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <search.h>
+#include <errno.h>
+#include <fat.h>
+#include <mmc.h>
+
+#ifdef CONFIG_SPL_BUILD
+/* TODO(sjg@chromium.org): Figure out why this is needed */
+# if !defined(CONFIG_TARGET_AM335X_EVM) || defined(CONFIG_SPL_OS_BOOT)
+# define LOADENV
+# endif
+#else
+# define LOADENV
+# if defined(CONFIG_CMD_SAVEENV)
+# define CMD_SAVEENV
+# endif
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CMD_SAVEENV
+static int env_fat_save(void)
+{
+ env_t env_new;
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+ loff_t size;
+
+ err = env_export(&env_new);
+ if (err)
+ return err;
+
+ part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
+ CONFIG_ENV_FAT_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ return 1;
+
+ dev = dev_desc->devnum;
+ if (fat_set_blk_dev(dev_desc, &info) != 0) {
+ printf("\n** Unable to use %s %d:%d for saveenv **\n",
+ CONFIG_ENV_FAT_INTERFACE, dev, part);
+ return 1;
+ }
+
+ err = file_fat_write(CONFIG_ENV_FAT_FILE, (void *)&env_new, 0, sizeof(env_t),
+ &size);
+ if (err == -1) {
+ printf("\n** Unable to write \"%s\" from %s%d:%d **\n",
+ CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
+ return 1;
+ }
+
+ puts("done\n");
+ return 0;
+}
+#endif /* CMD_SAVEENV */
+
+#ifdef LOADENV
+static int env_fat_load(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+ struct blk_desc *dev_desc = NULL;
+ disk_partition_t info;
+ int dev, part;
+ int err;
+
+ part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
+ CONFIG_ENV_FAT_DEVICE_AND_PART,
+ &dev_desc, &info, 1);
+ if (part < 0)
+ goto err_env_relocate;
+
+ dev = dev_desc->devnum;
+ if (fat_set_blk_dev(dev_desc, &info) != 0) {
+ printf("\n** Unable to use %s %d:%d for loading the env **\n",
+ CONFIG_ENV_FAT_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ err = file_fat_read(CONFIG_ENV_FAT_FILE, buf, CONFIG_ENV_SIZE);
+ if (err == -1) {
+ printf("\n** Unable to read \"%s\" from %s%d:%d **\n",
+ CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part);
+ goto err_env_relocate;
+ }
+
+ env_import(buf, 1);
+ return 0;
+
+err_env_relocate:
+ set_default_env(NULL);
+
+ return -EIO;
+}
+#endif /* LOADENV */
+
+U_BOOT_ENV_LOCATION(fat) = {
+ .location = ENVL_FAT,
+ ENV_NAME("FAT")
+#ifdef LOADENV
+ .load = env_fat_load,
+#endif
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_fat_save),
+#endif
+};
diff --git a/common/env_flags.c b/env/flags.c
similarity index 97%
rename from common/env_flags.c
rename to env/flags.c
index 3c50620..4b0ddb6 100644
--- a/common/env_flags.c
+++ b/env/flags.c
@@ -15,7 +15,7 @@
#include "fw_env.h"
#include <env_attr.h>
#include <env_flags.h>
-#define getenv fw_getenv
+#define env_get fw_getenv
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#else
#include <common.h>
@@ -308,7 +308,7 @@
*/
enum env_flags_vartype env_flags_get_type(const char *name)
{
- const char *flags_list = getenv(ENV_FLAGS_VAR);
+ const char *flags_list = env_get(ENV_FLAGS_VAR);
char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
if (env_flags_lookup(flags_list, name, flags))
@@ -325,7 +325,7 @@
*/
enum env_flags_varaccess env_flags_get_varaccess(const char *name)
{
- const char *flags_list = getenv(ENV_FLAGS_VAR);
+ const char *flags_list = env_get(ENV_FLAGS_VAR);
char flags[ENV_FLAGS_ATTR_MAX_LEN + 1];
if (env_flags_lookup(flags_list, name, flags))
@@ -426,7 +426,7 @@
int ret = 1;
if (first_call) {
- flags_list = getenv(ENV_FLAGS_VAR);
+ flags_list = env_get(ENV_FLAGS_VAR);
first_call = 0;
}
/* look in the ".flags" and static for a reference to this variable */
@@ -541,7 +541,7 @@
return 1;
} else if (item->flags &
ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR) {
- const char *defval = getenv_default(name);
+ const char *defval = env_get_default(name);
if (defval == NULL)
defval = "";
diff --git a/common/env_flash.c b/env/flash.c
similarity index 79%
rename from common/env_flash.c
rename to env/flash.c
index 004e884..b60be57 100644
--- a/common/env_flash.c
+++ b/env/flash.c
@@ -20,10 +20,12 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_FLASH)
-#define CMD_SAVEENV
-#elif defined(CONFIG_ENV_ADDR_REDUND)
-#error CONFIG_ENV_ADDR_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_FLASH
+#ifndef CONFIG_SPL_BUILD
+# if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_FLASH)
+# define CMD_SAVEENV
+# elif defined(CONFIG_ENV_ADDR_REDUND)
+# error CONFIG_ENV_ADDR_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_FLASH
+# endif
#endif
#if defined(CONFIG_ENV_SIZE_REDUND) && \
@@ -31,34 +33,45 @@
#error CONFIG_ENV_SIZE_REDUND should not be less then CONFIG_ENV_SIZE
#endif
-char *env_name_spec = "Flash";
+/* TODO(sjg@chromium.org): Figure out all these special cases */
+#if (!defined(CONFIG_MICROBLAZE) && !defined(CONFIG_ARCH_ZYNQ) && \
+ !defined(CONFIG_TARGET_MCCMON6) && !defined(CONFIG_TARGET_X600) && \
+ !defined(CONFIG_TARGET_EDMINIV2)) || \
+ !defined(CONFIG_SPL_BUILD)
+#define LOADENV
+#endif
+
+#if !defined(CONFIG_TARGET_X600) || !defined(CONFIG_SPL_BUILD)
+#define INITENV
+#endif
#ifdef ENV_IS_EMBEDDED
env_t *env_ptr = &environment;
-static env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
+static __maybe_unused env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
#else /* ! ENV_IS_EMBEDDED */
env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
-static env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
+static __maybe_unused env_t *flash_addr = (env_t *)CONFIG_ENV_ADDR;
#endif /* ENV_IS_EMBEDDED */
-#if defined(CMD_SAVEENV) || defined(CONFIG_ENV_ADDR_REDUND)
/* CONFIG_ENV_ADDR is supposed to be on sector boundary */
-static ulong end_addr = CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;
-#endif
+static ulong __maybe_unused end_addr =
+ CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1;
#ifdef CONFIG_ENV_ADDR_REDUND
-static env_t *flash_addr_new = (env_t *)CONFIG_ENV_ADDR_REDUND;
+
+static env_t __maybe_unused *flash_addr_new = (env_t *)CONFIG_ENV_ADDR_REDUND;
/* CONFIG_ENV_ADDR_REDUND is supposed to be on sector boundary */
-static ulong end_addr_new = CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;
+static ulong __maybe_unused end_addr_new =
+ CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1;
#endif /* CONFIG_ENV_ADDR_REDUND */
-
#ifdef CONFIG_ENV_ADDR_REDUND
-int env_init(void)
+#ifdef INITENV
+static int env_flash_init(void)
{
int crc1_ok = 0, crc2_ok = 0;
@@ -75,35 +88,36 @@
if (crc1_ok && !crc2_ok) {
gd->env_addr = addr1;
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (!crc1_ok && crc2_ok) {
gd->env_addr = addr2;
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (!crc1_ok && !crc2_ok) {
gd->env_addr = addr_default;
gd->env_valid = 0;
} else if (flag1 == ACTIVE_FLAG && flag2 == OBSOLETE_FLAG) {
gd->env_addr = addr1;
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (flag1 == OBSOLETE_FLAG && flag2 == ACTIVE_FLAG) {
gd->env_addr = addr2;
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (flag1 == flag2) {
gd->env_addr = addr1;
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else if (flag1 == 0xFF) {
gd->env_addr = addr1;
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else if (flag2 == 0xFF) {
gd->env_addr = addr2;
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
}
return 0;
}
+#endif
#ifdef CMD_SAVEENV
-int saveenv(void)
+static int env_flash_save(void)
{
env_t env_new;
char *saved_data = NULL;
@@ -207,11 +221,12 @@
#else /* ! CONFIG_ENV_ADDR_REDUND */
-int env_init(void)
+#ifdef INITENV
+static int env_flash_init(void)
{
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
gd->env_addr = (ulong)&(env_ptr->data);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
return 0;
}
@@ -219,9 +234,10 @@
gd->env_valid = 0;
return 0;
}
+#endif
#ifdef CMD_SAVEENV
-int saveenv(void)
+static int env_flash_save(void)
{
env_t env_new;
int rc = 1;
@@ -291,7 +307,8 @@
#endif /* CONFIG_ENV_ADDR_REDUND */
-void env_relocate_spec(void)
+#ifdef LOADENV
+static int env_flash_load(void)
{
#ifdef CONFIG_ENV_ADDR_REDUND
if (gd->env_addr != (ulong)&(flash_addr->data)) {
@@ -309,7 +326,7 @@
crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc) {
char flag = OBSOLETE_FLAG;
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new);
flash_write(&flag,
(ulong)&(flash_addr_new->flags),
@@ -321,7 +338,7 @@
(flash_addr->flags & ACTIVE_FLAG) == ACTIVE_FLAG) {
char flag = ACTIVE_FLAG;
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
flash_sect_protect(0, (ulong)flash_addr, end_addr);
flash_write(&flag,
(ulong)&(flash_addr->flags),
@@ -329,10 +346,27 @@
flash_sect_protect(1, (ulong)flash_addr, end_addr);
}
- if (gd->env_valid == 2)
+ if (gd->env_valid == ENV_REDUND)
puts("*** Warning - some problems detected "
"reading environment; recovered successfully\n\n");
#endif /* CONFIG_ENV_ADDR_REDUND */
env_import((char *)flash_addr, 1);
+
+ return 0;
}
+#endif /* LOADENV */
+
+U_BOOT_ENV_LOCATION(flash) = {
+ .location = ENVL_FLASH,
+ ENV_NAME("Flash")
+#ifdef LOADENV
+ .load = env_flash_load,
+#endif
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_flash_save),
+#endif
+#ifdef INITENV
+ .init = env_flash_init,
+#endif
+};
diff --git a/common/env_mmc.c b/env/mmc.c
similarity index 89%
rename from common/env_mmc.c
rename to env/mmc.c
index bb760a0..3f3092d 100644
--- a/common/env_mmc.c
+++ b/env/mmc.c
@@ -23,14 +23,6 @@
#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
#endif
-char *env_name_spec = "MMC";
-
-#ifdef ENV_IS_EMBEDDED
-env_t *env_ptr = &environment;
-#else /* ! ENV_IS_EMBEDDED */
-env_t *env_ptr;
-#endif /* ENV_IS_EMBEDDED */
-
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_ENV_OFFSET)
@@ -82,15 +74,6 @@
return CONFIG_SYS_MMC_ENV_DEV;
}
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
#ifdef CONFIG_SYS_MMC_ENV_PART
__weak uint mmc_get_env_part(struct mmc *mmc)
{
@@ -145,7 +128,7 @@
#endif
}
-#ifdef CONFIG_CMD_SAVEENV
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_SPL_BUILD)
static inline int write_env(struct mmc *mmc, unsigned long size,
unsigned long offset, const void *buffer)
{
@@ -160,7 +143,7 @@
return (n == blk_cnt) ? 0 : -1;
}
-int saveenv(void)
+static int env_mmc_save(void)
{
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
int dev = mmc_get_env_dev();
@@ -180,7 +163,7 @@
goto fini;
#ifdef CONFIG_ENV_OFFSET_REDUND
- if (gd->env_valid == 1)
+ if (gd->env_valid == ENV_VALID)
copy = 1;
#endif
@@ -200,14 +183,14 @@
ret = 0;
#ifdef CONFIG_ENV_OFFSET_REDUND
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
#endif
fini:
fini_mmc_for_env(mmc);
return ret;
}
-#endif /* CONFIG_CMD_SAVEENV */
+#endif /* CONFIG_CMD_SAVEENV && !CONFIG_SPL_BUILD */
static inline int read_env(struct mmc *mmc, unsigned long size,
unsigned long offset, const void *buffer)
@@ -224,7 +207,7 @@
}
#ifdef CONFIG_ENV_OFFSET_REDUND
-void env_relocate_spec(void)
+static int env_mmc_load(void)
{
#if !defined(ENV_IS_EMBEDDED)
struct mmc *mmc;
@@ -241,13 +224,13 @@
errmsg = init_mmc_for_env(mmc);
if (errmsg) {
- ret = 1;
+ ret = -EIO;
goto err;
}
if (mmc_get_env_addr(mmc, 0, &offset1) ||
mmc_get_env_addr(mmc, 1, &offset2)) {
- ret = 1;
+ ret = -EIO;
goto fini;
}
@@ -262,13 +245,13 @@
if (read1_fail && read2_fail) {
errmsg = "!bad CRC";
- ret = 1;
+ ret = -EIO;
goto fini;
} else if (!read1_fail && read2_fail) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
env_import((char *)tmp_env1, 1);
} else if (read1_fail && !read2_fail) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
env_import((char *)tmp_env2, 1);
} else {
env_import_redund((char *)tmp_env1, (char *)tmp_env2);
@@ -281,10 +264,12 @@
err:
if (ret)
set_default_env(errmsg);
+
#endif
+ return ret;
}
#else /* ! CONFIG_ENV_OFFSET_REDUND */
-void env_relocate_spec(void)
+static int env_mmc_load(void)
{
#if !defined(ENV_IS_EMBEDDED)
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
@@ -298,18 +283,18 @@
errmsg = init_mmc_for_env(mmc);
if (errmsg) {
- ret = 1;
+ ret = -EIO;
goto err;
}
if (mmc_get_env_addr(mmc, 0, &offset)) {
- ret = 1;
+ ret = -EIO;
goto fini;
}
if (read_env(mmc, CONFIG_ENV_SIZE, offset, buf)) {
errmsg = "!read failed";
- ret = 1;
+ ret = -EIO;
goto fini;
}
@@ -322,5 +307,15 @@
if (ret)
set_default_env(errmsg);
#endif
+ return ret;
}
#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(mmc) = {
+ .location = ENVL_MMC,
+ ENV_NAME("MMC")
+ .load = env_mmc_load,
+#ifndef CONFIG_SPL_BUILD
+ .save = env_save_ptr(env_mmc_save),
+#endif
+};
diff --git a/common/env_nand.c b/env/nand.c
similarity index 87%
rename from common/env_nand.c
rename to env/nand.c
index 760f685..dea7b00 100644
--- a/common/env_nand.c
+++ b/env/nand.c
@@ -24,7 +24,8 @@
#include <search.h>
#include <errno.h>
-#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_NAND) && \
+ !defined(CONFIG_SPL_BUILD)
#define CMD_SAVEENV
#elif defined(CONFIG_ENV_OFFSET_REDUND)
#error CONFIG_ENV_OFFSET_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_NAND
@@ -39,8 +40,6 @@
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE
#endif
-char *env_name_spec = "NAND";
-
#if defined(ENV_IS_EMBEDDED)
env_t *env_ptr = &environment;
#elif defined(CONFIG_NAND_ENV_DST)
@@ -63,7 +62,7 @@
* This way the SPL loads not only the U-Boot image from NAND but
* also the environment.
*/
-int env_init(void)
+static int env_nand_init(void)
{
#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_NAND_ENV_DST)
int crc1_ok = 0, crc2_ok = 0;
@@ -84,37 +83,37 @@
return 0;
} else if (crc1_ok && !crc2_ok) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
}
#ifdef CONFIG_ENV_OFFSET_REDUND
else if (!crc1_ok && crc2_ok) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else {
/* both ok - check serial */
if (tmp_env1->flags == 255 && tmp_env2->flags == 0)
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
else if (tmp_env2->flags == 255 && tmp_env1->flags == 0)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
else if (tmp_env1->flags > tmp_env2->flags)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
else if (tmp_env2->flags > tmp_env1->flags)
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
else /* flags are equal - almost impossible */
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
}
- if (gd->env_valid == 2)
+ if (gd->env_valid == ENV_REDUND)
env_ptr = tmp_env2;
else
#endif
- if (gd->env_valid == 1)
+ if (gd->env_valid == ENV_VALID)
env_ptr = tmp_env1;
gd->env_addr = (ulong)env_ptr->data;
#else /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
#endif /* ENV_IS_EMBEDDED || CONFIG_NAND_ENV_DST */
return 0;
@@ -158,12 +157,12 @@
return 0;
}
-struct env_location {
+struct nand_env_location {
const char *name;
const nand_erase_options_t erase_opts;
};
-static int erase_and_write_env(const struct env_location *location,
+static int erase_and_write_env(const struct nand_env_location *location,
u_char *env_new)
{
struct mtd_info *mtd;
@@ -184,12 +183,12 @@
return ret;
}
-int saveenv(void)
+static int env_nand_save(void)
{
int ret = 0;
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
int env_idx = 0;
- static const struct env_location location[] = {
+ static const struct nand_env_location location[] = {
{
.name = "NAND",
.erase_opts = {
@@ -217,14 +216,15 @@
return ret;
#ifdef CONFIG_ENV_OFFSET_REDUND
- env_idx = (gd->env_valid == 1);
+ env_idx = (gd->env_valid == ENV_VALID);
#endif
ret = erase_and_write_env(&location[env_idx], (u_char *)env_new);
#ifdef CONFIG_ENV_OFFSET_REDUND
if (!ret) {
/* preset other copy for next write */
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID :
+ ENV_REDUND;
return ret;
}
@@ -302,7 +302,7 @@
}
if (oob_buf[0] == ENV_OOB_MARKER) {
- *result = oob_buf[1] * mtd->erasesize;
+ *result = ovoid ob_buf[1] * mtd->erasesize;
} else if (oob_buf[0] == ENV_OOB_MARKER_OLD) {
*result = oob_buf[1];
} else {
@@ -315,17 +315,21 @@
#endif
#ifdef CONFIG_ENV_OFFSET_REDUND
-void env_relocate_spec(void)
+static int env_nand_load(void)
{
-#if !defined(ENV_IS_EMBEDDED)
+#if defined(ENV_IS_EMBEDDED)
+ return 0;
+#else
int read1_fail = 0, read2_fail = 0;
env_t *tmp_env1, *tmp_env2;
+ int ret = 0;
tmp_env1 = (env_t *)malloc(CONFIG_ENV_SIZE);
tmp_env2 = (env_t *)malloc(CONFIG_ENV_SIZE);
if (tmp_env1 == NULL || tmp_env2 == NULL) {
puts("Can't allocate buffers for environment\n");
set_default_env("!malloc() failed");
+ ret = -EIO;
goto done;
}
@@ -342,10 +346,10 @@
set_default_env("!bad env area");
goto done;
} else if (!read1_fail && read2_fail) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
env_import((char *)tmp_env1, 1);
} else if (read1_fail && !read2_fail) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
env_import((char *)tmp_env2, 1);
} else {
env_import_redund((char *)tmp_env1, (char *)tmp_env2);
@@ -355,6 +359,7 @@
free(tmp_env1);
free(tmp_env2);
+ return ret;
#endif /* ! ENV_IS_EMBEDDED */
}
#else /* ! CONFIG_ENV_OFFSET_REDUND */
@@ -363,7 +368,7 @@
* device i.e., nand_dev_desc + 0. This is also the behaviour using
* the new NAND code.
*/
-void env_relocate_spec(void)
+static int env_nand_load(void)
{
#if !defined(ENV_IS_EMBEDDED)
int ret;
@@ -386,10 +391,22 @@
ret = readenv(CONFIG_ENV_OFFSET, (u_char *)buf);
if (ret) {
set_default_env("!readenv() failed");
- return;
+ return -EIO;
}
env_import(buf, 1);
#endif /* ! ENV_IS_EMBEDDED */
+
+ return 0;
}
#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(nand) = {
+ .location = ENVL_NAND,
+ ENV_NAME("NAND")
+ .load = env_nand_load,
+#if defined(CMD_SAVEENV)
+ .save = env_save_ptr(env_nand_save),
+#endif
+ .init = env_nand_init,
+};
diff --git a/env/nowhere.c b/env/nowhere.c
new file mode 100644
index 0000000..d60de49
--- /dev/null
+++ b/env/nowhere.c
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2000-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Andreas Heppel <aheppel@sysgo.de>
+
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/stddef.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+U_BOOT_ENV_LOCATION(nowhere) = {
+ .location = ENVL_NOWHERE,
+ ENV_NAME("nowhere")
+};
diff --git a/common/env_nvram.c b/env/nvram.c
similarity index 85%
rename from common/env_nvram.c
rename to env/nvram.c
index 524f07d..5fb3115 100644
--- a/common/env_nvram.c
+++ b/env/nvram.c
@@ -36,15 +36,12 @@
#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
extern void *nvram_read(void *dest, const long src, size_t count);
extern void nvram_write(long dest, const void *src, size_t count);
-env_t *env_ptr;
#else
env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
#endif
-char *env_name_spec = "NVRAM";
-
#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
-uchar env_get_char_spec(int index)
+static int env_nvram_get_char(int index)
{
uchar c;
@@ -54,7 +51,7 @@
}
#endif
-void env_relocate_spec(void)
+static int env_nvram_load(void)
{
char buf[CONFIG_ENV_SIZE];
@@ -64,9 +61,11 @@
memcpy(buf, (void *)CONFIG_ENV_ADDR, CONFIG_ENV_SIZE);
#endif
env_import(buf, 1);
+
+ return 0;
}
-int saveenv(void)
+static int env_nvram_save(void)
{
env_t env_new;
int rcode = 0;
@@ -89,7 +88,7 @@
*
* We are still running from ROM, so data use is limited
*/
-int env_init(void)
+static int env_nvram_init(void)
{
#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE)
ulong crc;
@@ -104,7 +103,7 @@
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
gd->env_addr = (ulong)&env_ptr->data;
#endif
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else {
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
@@ -112,3 +111,14 @@
return 0;
}
+
+U_BOOT_ENV_LOCATION(nvram) = {
+ .location = ENVL_NVRAM,
+ ENV_NAME("NVRAM")
+#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE
+ .get_char = env_nvram_get_char,
+#endif
+ .load = env_nvram_load,
+ .save = env_save_ptr(env_nvram_save),
+ .init = env_nvram_init,
+};
diff --git a/common/env_onenand.c b/env/onenand.c
similarity index 88%
rename from common/env_onenand.c
rename to env/onenand.c
index cc3d670..2e3045c 100644
--- a/common/env_onenand.c
+++ b/env/onenand.c
@@ -21,14 +21,12 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
-char *env_name_spec = "OneNAND";
-
#define ONENAND_MAX_ENV_SIZE CONFIG_ENV_SIZE
#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
DECLARE_GLOBAL_DATA_PTR;
-void env_relocate_spec(void)
+static int env_onenand_load(void)
{
struct mtd_info *mtd = &onenand_mtd;
#ifdef CONFIG_ENV_ADDR_FLEX
@@ -60,10 +58,12 @@
rc = env_import(buf, 1);
if (rc)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
+
+ return rc ? 0 : -EIO;
}
-int saveenv(void)
+static int env_onenand_save(void)
{
env_t env_new;
int ret;
@@ -106,11 +106,9 @@
return 0;
}
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+U_BOOT_ENV_LOCATION(onenand) = {
+ .location = ENVL_ONENAND,
+ ENV_NAME("OneNAND")
+ .load = env_onenand_load,
+ .save = env_save_ptr(env_onenand_save),
+};
diff --git a/common/env_remote.c b/env/remote.c
similarity index 72%
rename from common/env_remote.c
rename to env/remote.c
index eb977ee..c013fdd 100644
--- a/common/env_remote.c
+++ b/env/remote.c
@@ -11,8 +11,6 @@
#include <environment.h>
#include <linux/stddef.h>
-char *env_name_spec = "Remote";
-
#ifdef ENV_IS_EMBEDDED
env_t *env_ptr = &environment;
#else /* ! ENV_IS_EMBEDDED */
@@ -25,21 +23,19 @@
#define CONFIG_ENV_OFFSET 0
#endif
-int env_init(void)
+static int env_remote_init(void)
{
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
gd->env_addr = (ulong)&(env_ptr->data);
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
return 0;
}
- gd->env_addr = (ulong)default_environment;
- gd->env_valid = 0;
- return 0;
+ return -ENOENT;
}
#ifdef CONFIG_CMD_SAVEENV
-int saveenv(void)
+static int env_remote_save(void)
{
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
printf("Can not support the 'saveenv' when boot from SRIO or PCIE!\n");
@@ -50,9 +46,19 @@
}
#endif /* CONFIG_CMD_SAVEENV */
-void env_relocate_spec(void)
+static int env_remote_load(void)
{
#ifndef ENV_IS_EMBEDDED
env_import((char *)env_ptr, 1);
#endif
+
+ return 0;
}
+
+U_BOOT_ENV_LOCATION(remote) = {
+ .location = ENVL_REMOTE,
+ ENV_NAME("Remote")
+ .load = env_remote_load,
+ .save = env_save_ptr(env_remote_save),
+ .init = env_remote_init,
+};
diff --git a/common/env_sata.c b/env/sata.c
similarity index 83%
rename from common/env_sata.c
rename to env/sata.c
index b0cee35..a770297 100644
--- a/common/env_sata.c
+++ b/env/sata.c
@@ -24,8 +24,6 @@
#error CONFIG_ENV_OFFSET or CONFIG_ENV_SIZE not defined
#endif
-char *env_name_spec = "SATA";
-
DECLARE_GLOBAL_DATA_PTR;
__weak int sata_get_env_dev(void)
@@ -33,15 +31,6 @@
return CONFIG_SYS_SATA_ENV_DEV;
}
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
#ifdef CONFIG_CMD_SAVEENV
static inline int write_env(struct blk_desc *sata, unsigned long size,
unsigned long offset, void *buffer)
@@ -56,7 +45,7 @@
return (n == blk_cnt) ? 0 : -1;
}
-int saveenv(void)
+static int env_sata_save(void)
{
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
struct blk_desc *sata = NULL;
@@ -102,26 +91,36 @@
return (n == blk_cnt) ? 0 : -1;
}
-void env_relocate_spec(void)
+static void env_sata_load(void)
{
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
struct blk_desc *sata = NULL;
int env_sata;
if (sata_initialize())
- return;
+ return -EIO;
env_sata = sata_get_env_dev();
sata = sata_get_dev(env_sata);
if (sata == NULL) {
- printf("Unknown SATA(%d) device for environment!\n",
- env_sata);
- return;
+ printf("Unknown SATA(%d) device for environment!\n", env_sata);
+ return -EIO;
}
- if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf))
- return set_default_env(NULL);
+ if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) {
+ set_default_env(NULL);
+ return -EIO;
+ }
env_import(buf, 1);
+
+ return 0;
}
+
+U_BOOT_ENV_LOCATION(sata) = {
+ .location = ENVL_ESATA,
+ ENV_NAME("SATA")
+ .load = env_sata_load,
+ .save = env_save_ptr(env_sata_save),
+};
diff --git a/common/env_sf.c b/env/sf.c
similarity index 86%
rename from common/env_sf.c
rename to env/sf.c
index 45f441a..6f74371 100644
--- a/common/env_sf.c
+++ b/env/sf.c
@@ -32,9 +32,15 @@
# define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#endif
+#ifndef CONFIG_SPL_BUILD
+#define CMD_SAVEENV
+#endif
+
#ifdef CONFIG_ENV_OFFSET_REDUND
+#ifdef CMD_SAVEENV
static ulong env_offset = CONFIG_ENV_OFFSET;
static ulong env_new_offset = CONFIG_ENV_OFFSET_REDUND;
+#endif
#define ACTIVE_FLAG 1
#define OBSOLETE_FLAG 0
@@ -42,8 +48,6 @@
DECLARE_GLOBAL_DATA_PTR;
-char *env_name_spec = "SPI Flash";
-
static struct spi_flash *env_flash;
static int setup_flash_device(void)
@@ -57,7 +61,7 @@
0, 0, &new);
if (ret) {
set_default_env("!spi_flash_probe_bus_cs() failed");
- return 1;
+ return ret;
}
env_flash = dev_get_uclass_priv(new);
@@ -69,7 +73,7 @@
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
if (!env_flash) {
set_default_env("!spi_flash_probe() failed");
- return 1;
+ return -EIO;
}
}
#endif
@@ -77,7 +81,8 @@
}
#if defined(CONFIG_ENV_OFFSET_REDUND)
-int saveenv(void)
+#ifdef CMD_SAVEENV
+static int env_sf_save(void)
{
env_t env_new;
char *saved_buffer = NULL, flag = OBSOLETE_FLAG;
@@ -90,10 +95,10 @@
ret = env_export(&env_new);
if (ret)
- return ret;
+ return -EIO;
env_new.flags = ACTIVE_FLAG;
- if (gd->env_valid == 1) {
+ if (gd->env_valid == ENV_VALID) {
env_new_offset = CONFIG_ENV_OFFSET_REDUND;
env_offset = CONFIG_ENV_OFFSET;
} else {
@@ -107,7 +112,7 @@
saved_offset = env_new_offset + CONFIG_ENV_SIZE;
saved_buffer = memalign(ARCH_DMA_MINALIGN, saved_size);
if (!saved_buffer) {
- ret = 1;
+ ret = -ENOMEM;
goto done;
}
ret = spi_flash_read(env_flash, saved_offset,
@@ -145,7 +150,7 @@
puts("done\n");
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
printf("Valid environment: %d\n", (int)gd->env_valid);
@@ -155,8 +160,9 @@
return ret;
}
+#endif /* CMD_SAVEENV */
-void env_relocate_spec(void)
+static int env_sf_load(void)
{
int ret;
int crc1_ok = 0, crc2_ok = 0;
@@ -170,6 +176,7 @@
CONFIG_ENV_SIZE);
if (!tmp_env1 || !tmp_env2) {
set_default_env("!malloc() failed");
+ ret = -EIO;
goto out;
}
@@ -196,32 +203,33 @@
if (!crc1_ok && !crc2_ok) {
set_default_env("!bad CRC");
+ ret = -EIO;
goto err_read;
} else if (crc1_ok && !crc2_ok) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (!crc1_ok && crc2_ok) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else if (tmp_env1->flags == ACTIVE_FLAG &&
tmp_env2->flags == OBSOLETE_FLAG) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (tmp_env1->flags == OBSOLETE_FLAG &&
tmp_env2->flags == ACTIVE_FLAG) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else if (tmp_env1->flags == tmp_env2->flags) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (tmp_env1->flags == 0xFF) {
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
} else if (tmp_env2->flags == 0xFF) {
- gd->env_valid = 2;
+ gd->env_valid = ENV_REDUND;
} else {
/*
* this differs from code in env_flash.c, but I think a sane
* default path is desirable.
*/
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
}
- if (gd->env_valid == 1)
+ if (gd->env_valid == ENV_VALID)
ep = tmp_env1;
else
ep = tmp_env2;
@@ -238,9 +246,12 @@
out:
free(tmp_env1);
free(tmp_env2);
+
+ return ret;
}
#else
-int saveenv(void)
+#ifdef CMD_SAVEENV
+static int env_sf_save(void)
{
u32 saved_size, saved_offset, sector;
char *saved_buffer = NULL;
@@ -299,8 +310,9 @@
return ret;
}
+#endif /* CMD_SAVEENV */
-void env_relocate_spec(void)
+static int env_sf_load(void)
{
int ret;
char *buf = NULL;
@@ -308,7 +320,7 @@
buf = (char *)memalign(ARCH_DMA_MINALIGN, CONFIG_ENV_SIZE);
if (!buf) {
set_default_env("!malloc() failed");
- return;
+ return -EIO;
}
ret = setup_flash_device();
@@ -324,21 +336,23 @@
ret = env_import(buf, 1);
if (ret)
- gd->env_valid = 1;
+ gd->env_valid = ENV_VALID;
err_read:
spi_flash_free(env_flash);
env_flash = NULL;
out:
free(buf);
+
+ return ret;
}
#endif
-int env_init(void)
-{
- /* SPI flash isn't usable before relocation */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
+U_BOOT_ENV_LOCATION(sf) = {
+ .location = ENVL_SPI_FLASH,
+ ENV_NAME("SPI Flash")
+ .load = env_sf_load,
+#ifdef CMD_SAVEENV
+ .save = env_save_ptr(env_sf_save),
+#endif
+};
diff --git a/common/env_ubi.c b/env/ubi.c
similarity index 90%
rename from common/env_ubi.c
rename to env/ubi.c
index 95b527d..1c4653d 100644
--- a/common/env_ubi.c
+++ b/env/ubi.c
@@ -16,24 +16,11 @@
#include <ubi_uboot.h>
#undef crc32
-char *env_name_spec = "UBI";
-
-env_t *env_ptr;
-
DECLARE_GLOBAL_DATA_PTR;
-int env_init(void)
-{
- /* use default */
- gd->env_addr = (ulong)&default_environment[0];
- gd->env_valid = 1;
-
- return 0;
-}
-
#ifdef CONFIG_CMD_SAVEENV
#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
-int saveenv(void)
+static int env_ubi_save(void)
{
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
int ret;
@@ -48,7 +35,7 @@
return 1;
}
- if (gd->env_valid == 1) {
+ if (gd->env_valid == ENV_VALID) {
puts("Writing to redundant UBI... ");
if (ubi_volume_write(CONFIG_ENV_UBI_VOLUME_REDUND,
(void *)env_new, CONFIG_ENV_SIZE)) {
@@ -70,12 +57,12 @@
puts("done\n");
- gd->env_valid = gd->env_valid == 2 ? 1 : 2;
+ gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
return 0;
}
#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-int saveenv(void)
+static int env_ubi_save(void)
{
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
int ret;
@@ -104,7 +91,7 @@
#endif /* CONFIG_CMD_SAVEENV */
#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
-void env_relocate_spec(void)
+static int env_ubi_load(void)
{
ALLOC_CACHE_ALIGN_BUFFER(char, env1_buf, CONFIG_ENV_SIZE);
ALLOC_CACHE_ALIGN_BUFFER(char, env2_buf, CONFIG_ENV_SIZE);
@@ -128,7 +115,7 @@
printf("\n** Cannot find mtd partition \"%s\"\n",
CONFIG_ENV_UBI_PART);
set_default_env(NULL);
- return;
+ return -EIO;
}
if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, (void *)tmp_env1,
@@ -144,9 +131,11 @@
}
env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+
+ return 0;
}
#else /* ! CONFIG_SYS_REDUNDAND_ENVIRONMENT */
-void env_relocate_spec(void)
+static int env_ubi_load(void)
{
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
@@ -164,16 +153,24 @@
printf("\n** Cannot find mtd partition \"%s\"\n",
CONFIG_ENV_UBI_PART);
set_default_env(NULL);
- return;
+ return -EIO;
}
if (ubi_volume_read(CONFIG_ENV_UBI_VOLUME, buf, CONFIG_ENV_SIZE)) {
printf("\n** Unable to read env from %s:%s **\n",
CONFIG_ENV_UBI_PART, CONFIG_ENV_UBI_VOLUME);
set_default_env(NULL);
- return;
+ return -EIO;
}
env_import(buf, 1);
+
+ return 0;
}
#endif /* CONFIG_SYS_REDUNDAND_ENVIRONMENT */
+
+U_BOOT_ENV_LOCATION(ubi) = {
+ .location = ENVL_UBI,
+ .load = env_ubi_load,
+ .save = env_save_ptr(env_ubi_save),
+};
diff --git a/fs/Kconfig b/fs/Kconfig
index e6438ad..e6803ac 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -18,4 +18,6 @@
source "fs/cramfs/Kconfig"
+source "fs/yaffs2/Kconfig"
+
endmenu
diff --git a/fs/fs.c b/fs/fs.c
index 595ff1f..13cd362 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -348,7 +348,7 @@
if (fs_size(argv[3], &size) < 0)
return CMD_RET_FAILURE;
- setenv_hex("filesize", size);
+ env_set_hex("filesize", size);
return 0;
}
@@ -379,7 +379,7 @@
if (ep == argv[3] || *ep != '\0')
return CMD_RET_USAGE;
} else {
- addr_str = getenv("loadaddr");
+ addr_str = env_get("loadaddr");
if (addr_str != NULL)
addr = simple_strtoul(addr_str, NULL, 16);
else
@@ -388,7 +388,7 @@
if (argc >= 5) {
filename = argv[4];
} else {
- filename = getenv("bootfile");
+ filename = env_get("bootfile");
if (!filename) {
puts("** No boot file defined **\n");
return 1;
@@ -417,8 +417,8 @@
}
puts("\n");
- setenv_hex("fileaddr", addr);
- setenv_hex("filesize", len_read);
+ env_set_hex("fileaddr", addr);
+ env_set_hex("filesize", len_read);
return 0;
}
@@ -509,7 +509,7 @@
return CMD_RET_FAILURE;
if (argc == 4)
- setenv(argv[3], uuid);
+ env_set(argv[3], uuid);
else
printf("%s\n", uuid);
@@ -529,7 +529,7 @@
info = fs_get_info(fs_type);
if (argc == 4)
- setenv(argv[3], info->name);
+ env_set(argv[3], info->name);
else
printf("%s\n", info->name);
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index db29489..8f1c9d1 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -941,7 +941,7 @@
err = ubifs_read(filename, (void *)(uintptr_t)addr, 0, size, &actread);
if (err == 0) {
- setenv_hex("filesize", actread);
+ env_set_hex("filesize", actread);
printf("Done\n");
}
diff --git a/fs/yaffs2/Kconfig b/fs/yaffs2/Kconfig
new file mode 100644
index 0000000..45ffdf6
--- /dev/null
+++ b/fs/yaffs2/Kconfig
@@ -0,0 +1,7 @@
+config YAFFS2
+ bool "YAFFS2 filesystem support"
+ help
+ This provides access to YAFFS2 filesystems. Yet Another Flash
+ Filesystem 2 is a filesystem designed specifically for NAND flash.
+ It incorporates bad-block management and ensures that device
+ writes are sequential regardless of filesystem activity.
diff --git a/include/_exports.h b/include/_exports.h
index 6ff4364..5416041 100644
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -31,8 +31,8 @@
EXPORT_FUNC(vprintf, int, vprintf, const char *, va_list)
EXPORT_FUNC(do_reset, int, do_reset, cmd_tbl_t *,
int , int , char * const [])
- EXPORT_FUNC(getenv, char *, getenv, const char*)
- EXPORT_FUNC(setenv, int, setenv, const char *, const char *)
+ EXPORT_FUNC(env_get, char *, env_get, const char*)
+ EXPORT_FUNC(env_set, int, env_set, const char *, const char *)
EXPORT_FUNC(simple_strtoul, unsigned long, simple_strtoul,
const char *, char **, unsigned int)
EXPORT_FUNC(strict_strtoul, int, strict_strtoul,
diff --git a/include/ahci.h b/include/ahci.h
index 818f344..29f4ba1 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -218,8 +218,20 @@
* devices it finds.
*
* @ahci_dev: AHCI parent device
+ * @base: Base address of AHCI port
* @return 0 if OK, -ve on error
*/
-int ahci_probe_scsi(struct udevice *ahci_dev);
+int ahci_probe_scsi(struct udevice *ahci_dev, ulong base);
+
+/**
+ * ahci_probe_scsi_pci() - probe and scan the attached SCSI bus on PCI
+ *
+ * Note that the SCSI device will itself bind block devices for any storage
+ * devices it finds.
+ *
+ * @ahci_dev: AHCI parent device
+ * @return 0 if OK, -ve on error
+ */
+int ahci_probe_scsi_pci(struct udevice *ahci_dev);
#endif
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index fb90be9..944f581 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -49,7 +49,7 @@
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
+ unsigned long env_valid; /* Environment valid? enum env_valid */
unsigned long ram_top; /* Top address of RAM used by U-Boot */
unsigned long relocaddr; /* Start address of U-Boot in RAM */
@@ -76,7 +76,7 @@
struct device_node *of_root;
#endif
struct jt_funcs *jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
+ char env_buf[32]; /* buffer for env_get() before reloc. */
#ifdef CONFIG_TRACE
void *trace_buff; /* The trace buffer */
#endif
@@ -88,7 +88,7 @@
#endif
unsigned int timebase_h;
unsigned int timebase_l;
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
unsigned long malloc_base; /* base address of early malloc() */
unsigned long malloc_limit; /* limit address */
unsigned long malloc_ptr; /* current address */
diff --git a/include/blk.h b/include/blk.h
index ef29a07..61b5628 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -31,6 +31,7 @@
IF_TYPE_SATA,
IF_TYPE_HOST,
IF_TYPE_SYSTEMACE,
+ IF_TYPE_NVME,
IF_TYPE_COUNT, /* Number of interface types */
};
@@ -62,7 +63,7 @@
char vendor[40+1]; /* IDE model, SCSI Vendor */
char product[20+1]; /* IDE Serial no, SCSI product */
char revision[8+1]; /* firmware revision */
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
/*
* For now we have a few functions which take struct blk_desc as a
* parameter. This field allows them to look up the associated
@@ -174,7 +175,7 @@
#endif
-#ifdef CONFIG_BLK
+#if CONFIG_IS_ENABLED(BLK)
struct udevice;
/* Operations on block devices */
diff --git a/include/clk.h b/include/clk.h
index 5a5c2ff..c5988f7 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -98,6 +98,21 @@
* @return 0 if OK, or a negative error code.
*/
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
+
+/**
+ * clk_release_all() - Disable (turn off)/Free an array of previously
+ * requested clocks.
+ *
+ * For each clock contained in the clock array, this function will check if
+ * clock has been previously requested and then will disable and free it.
+ *
+ * @clk: A clock struct array that was previously successfully
+ * requested by clk_request/get_by_*().
+ * @count Number of clock contained in the array
+ * @return zero on success, or -ve error code.
+ */
+int clk_release_all(struct clk *clk, int count);
+
#else
static inline int clk_get_by_index(struct udevice *dev, int index,
struct clk *clk)
@@ -110,6 +125,12 @@
{
return -ENOSYS;
}
+
+static inline int clk_release_all(struct clk *clk, int count)
+{
+ return -ENOSYS;
+}
+
#endif
/**
diff --git a/include/command.h b/include/command.h
index 08f0486..767cabb 100644
--- a/include/command.h
+++ b/include/command.h
@@ -80,11 +80,10 @@
* void function (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
*/
-#if defined(CONFIG_CMD_MEMORY) \
- || defined(CONFIG_CMD_I2C) \
- || defined(CONFIG_CMD_ITEST) \
- || defined(CONFIG_CMD_PCI) \
- || defined(CONFIG_CMD_PORTIO)
+#if defined(CONFIG_CMD_MEMORY) || \
+ defined(CONFIG_CMD_I2C) || \
+ defined(CONFIG_CMD_ITEST) || \
+ defined(CONFIG_CMD_PCI)
#define CMD_DATA_SIZE
extern int cmd_get_data_size(char* arg, int default_size);
#endif
diff --git a/include/common.h b/include/common.h
index 751665f..aaed131 100644
--- a/include/common.h
+++ b/include/common.h
@@ -286,6 +286,7 @@
*/
int arch_fixup_fdt(void *blob);
+int reserve_mmu(void);
/* common/flash.c */
void flash_perror (int);
@@ -310,16 +311,45 @@
void env_relocate (void);
int envmatch (uchar *, int);
-/* Avoid unfortunate conflict with libc's getenv() */
-#ifdef CONFIG_SANDBOX
-#define getenv uboot_getenv
-#endif
-char *getenv (const char *);
-int getenv_f (const char *name, char *buf, unsigned len);
-ulong getenv_ulong(const char *name, int base, ulong default_val);
+/**
+ * env_get() - Look up the value of an environment variable
+ *
+ * In U-Boot proper this can be called before relocation (which is when the
+ * environment is loaded from storage, i.e. GD_FLG_ENV_READY is 0). In that
+ * case this function calls env_get_f().
+ *
+ * @varname: Variable to look up
+ * @return value of variable, or NULL if not found
+ */
+char *env_get(const char *varname);
/**
- * getenv_hex() - Return an environment variable as a hex value
+ * env_get_f() - Look up the value of an environment variable (early)
+ *
+ * This function is called from env_get() if the environment has not been
+ * loaded yet (GD_FLG_ENV_READY flag is 0). Some environment locations will
+ * support reading the value (slowly) and some will not.
+ *
+ * @varname: Variable to look up
+ * @return value of variable, or NULL if not found
+ */
+int env_get_f(const char *name, char *buf, unsigned len);
+
+/**
+ * env_get_ulong() - Return an environment variable as an integer value
+ *
+ * Most U-Boot environment variables store hex values. For those which store
+ * (e.g.) base-10 integers, this function can be used to read the value.
+ *
+ * @name: Variable to look up
+ * @base: Base to use (e.g. 10 for base 10, 2 for binary)
+ * @default_val: Default value to return if no value is found
+ * @return the value found, or @default_val if none
+ */
+ulong env_get_ulong(const char *name, int base, ulong default_val);
+
+/**
+ * env_get_hex() - Return an environment variable as a hex value
*
* Decode an environment as a hex number (it may or may not have a 0x
* prefix). If the environment variable cannot be found, or does not start
@@ -328,27 +358,54 @@
* @varname: Variable to decode
* @default_val: Value to return on error
*/
-ulong getenv_hex(const char *varname, ulong default_val);
+ulong env_get_hex(const char *varname, ulong default_val);
/*
* Read an environment variable as a boolean
* Return -1 if variable does not exist (default to true)
*/
-int getenv_yesno(const char *var);
-int saveenv (void);
-int setenv (const char *, const char *);
-int setenv_ulong(const char *varname, ulong value);
-int setenv_hex(const char *varname, ulong value);
+int env_get_yesno(const char *var);
+
/**
- * setenv_addr - Set an environment variable to an address in hex
+ * env_set() - set an environment variable
+ *
+ * This sets or deletes the value of an environment variable. For setting the
+ * value the variable is created if it does not already exist.
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable, or NULL or "" to delete the variable
+ * @return 0 if OK, 1 on error
+ */
+int env_set(const char *varname, const char *value);
+
+/**
+ * env_set_ulong() - set an environment variable to an integer
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable (will be converted to a string)
+ * @return 0 if OK, 1 on error
+ */
+int env_set_ulong(const char *varname, ulong value);
+
+/**
+ * env_set_hex() - set an environment variable to a hex value
+ *
+ * @varname: Variable to adjust
+ * @value: Value to set for the variable (will be converted to a hex string)
+ * @return 0 if OK, 1 on error
+ */
+int env_set_hex(const char *varname, ulong value);
+
+/**
+ * env_set_addr - Set an environment variable to an address in hex
*
* @varname: Environment variable to set
* @addr: Value to set it to
* @return 0 if ok, 1 on error
*/
-static inline int setenv_addr(const char *varname, const void *addr)
+static inline int env_set_addr(const char *varname, const void *addr)
{
- return setenv_hex(varname, (ulong)addr);
+ return env_set_hex(varname, (ulong)addr);
}
#ifdef CONFIG_AUTO_COMPLETE
@@ -692,9 +749,9 @@
/* lib/net_utils.c */
#include <net.h>
-static inline struct in_addr getenv_ip(char *var)
+static inline struct in_addr env_get_ip(char *var)
{
- return string_to_ip(getenv(var));
+ return string_to_ip(env_get(var));
}
int pcmcia_init (void);
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
deleted file mode 100644
index 06610f9..0000000
--- a/include/config_cmd_all.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright 2007 Freescale Semiconductor, Inc.
- *
- * This file is licensed under the terms of the GNU General Public
- * License Version 2. This file is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef _CONFIG_CMD_ALL_H
-#define _CONFIG_CMD_ALL_H
-
-/*
- * Alphabetical list of all possible commands.
- */
-
-#define CONFIG_CMD_MFSL /* FSL support for Microblaze */
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_ONENAND /* OneNAND support */
-#define CONFIG_CMD_PCI /* pciinfo */
-#define CONFIG_CMD_PCMCIA /* PCMCIA support */
-#define CONFIG_CMD_PORTIO /* Port I/O */
-#define CONFIG_CMD_REGINFO /* Register dump */
-#define CONFIG_CMD_REISER /* Reiserfs support */
-#define CONFIG_CMD_READ /* Read data from partition */
-#define CONFIG_CMD_SANDBOX /* sb command to access sandbox features */
-#define CONFIG_CMD_SAVES /* save S record dump */
-#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
-#define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */
-#define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */
-#define CONFIG_CMD_ZFS /* ZFS Support */
-
-#endif /* _CONFIG_CMD_ALL_H */
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index d8dab8e..9ed6b98 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -198,7 +198,7 @@
BOOT_TARGET_DEVICES_references_IDE_without_CONFIG_IDE
#endif
-#if defined(CONFIG_CMD_PCI_ENUM) || defined(CONFIG_DM_PCI)
+#if defined(CONFIG_DM_PCI)
#define BOOTENV_RUN_NET_PCI_ENUM "run boot_net_pci_enum; "
#define BOOTENV_SHARED_PCI \
"boot_net_pci_enum=pci enum\0"
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index d1411f0..961a83d 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -33,10 +33,6 @@
#define CONFIG_FS_FAT
#endif
-#if defined(CONFIG_ENV_IS_IN_FAT) && !defined(CONFIG_FAT_WRITE)
-#define CONFIG_FAT_WRITE
-#endif
-
#if (defined(CONFIG_CMD_EXT4) || defined(CONFIG_CMD_EXT2)) && \
!defined(CONFIG_FS_EXT4)
#define CONFIG_FS_EXT4
diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h
index 6ec577b..4bbcd13 100644
--- a/include/config_fsl_chain_trust.h
+++ b/include/config_fsl_chain_trust.h
@@ -28,7 +28,7 @@
* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
*/
-#ifdef CONFIG_BOOTARGS
+#ifdef CONFIG_USE_BOOTARGS
#define CONFIG_SET_BOOTARGS "setenv bootargs \'" CONFIG_BOOTARGS" \';"
#else
#define CONFIG_SET_BOOTARGS "setenv bootargs \'root=/dev/ram " \
diff --git a/include/config_phylib_all_drivers.h b/include/config_phylib_all_drivers.h
index 12828c6..496ef58 100644
--- a/include/config_phylib_all_drivers.h
+++ b/include/config_phylib_all_drivers.h
@@ -16,7 +16,6 @@
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_MARVELL
-#define CONFIG_PHY_MICREL
#define CONFIG_PHY_BROADCOM
#define CONFIG_PHY_DAVICOM
#define CONFIG_PHY_REALTEK
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h
index d05cc61..892ceff 100644
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -30,7 +30,6 @@
* NET options
*/
#define CONFIG_SYS_RX_ETH_BUFFER 0
-#define CONFIG_PHY_GIGE
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_PHY_MARVELL
diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h
index 0d3794d..3869d90 100644
--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -33,7 +33,6 @@
* NET options
*/
#define CONFIG_SYS_RX_ETH_BUFFER 0
-#define CONFIG_PHY_GIGE
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_PHY_MARVELL
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index f9a6771..f2313a5 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -356,7 +356,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -680,7 +679,6 @@
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
#define CONFIG_SYS_FSL_B4860QDS_XFI_ERR
@@ -692,15 +690,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index eadfa75..19c772c 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -181,7 +181,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_DDR_LAW 11
@@ -259,8 +258,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
#endif /* CONFIG_TSEC_ENET */
/*
@@ -288,11 +285,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 4395eb9..92ff88b 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -77,8 +77,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
@@ -293,7 +291,6 @@
/* NAND */
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -458,8 +455,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
/* TBI PHY configuration for SGMII mode */
#define CONFIG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
@@ -513,11 +508,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 629a326..8c664b1 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -77,8 +77,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
@@ -200,7 +198,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (1024 * 1024)
/* 8Bit NAND Flash - K9F1G08U0B */
@@ -395,8 +392,6 @@
#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
#define CONFIG_ETHPRIME "eTSEC1"
-
-#define CONFIG_PHY_GIGE
#endif /* CONFIG_TSEC_ENET */
/*
@@ -431,11 +426,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 0fbf457..c56cbd9 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -161,8 +161,8 @@
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE 16
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 57328c6..57bc578 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -33,9 +33,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define CONFIG_MII 1
@@ -179,7 +176,7 @@
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ env/embedded.o(.text);
#ifdef NORFLASH_PS32BIT
# define CONFIG_ENV_OFFSET (0x8000)
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index f6027e2..df0733e 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -85,8 +85,8 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
#define CONFIG_ENV_OFFSET 0x4000 /* Address of Environment Sector*/
#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 2bdfe80..da8333a 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -29,8 +29,8 @@
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*
* Command line configuration.
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index 0722ea1..5a2f0e2 100644
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -31,7 +31,7 @@
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text)
+ env/embedded.o(.text)
/*
* BOOTP options
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index e6bd7f3..f5693d8 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -39,8 +39,8 @@
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 6bcd6b6..339a03c 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -40,8 +40,8 @@
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index cc703aa..3f2d9a9 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -32,7 +32,7 @@
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ env/embedded.o(.text*);
/*
* BOOTP options
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index d50c874..45e4be2 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -44,8 +44,6 @@
# define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-# define CONFIG_BOOTARGS "root=/dev/mtdblock3 rw rootfstype=jffs2"
-
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
# ifndef CONFIG_SYS_DISCOVER_PHY
# define FECDUPLEX FULL
@@ -185,7 +183,7 @@
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*)
+ env/embedded.o(.text*)
/*-----------------------------------------------------------------------
* Cache Configuration
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 45cdf9d..1b5cae2 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -25,10 +25,6 @@
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-#ifdef CONFIG_NANDFLASH_SIZE
-# define CONFIG_CMD_NAND
-#endif
-
#define CONFIG_SYS_UNIFY_CACHE
#define CONFIG_MCFFEC
@@ -189,8 +185,8 @@
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*-----------------------------------------------------------------------
* Cache Configuration
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 26639fc..a0e582e 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -25,10 +25,6 @@
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */
-#ifdef CONFIG_NANDFLASH_SIZE
-# define CONFIG_CMD_NAND
-#endif
-
#define CONFIG_SYS_UNIFY_CACHE
#define CONFIG_MCFFEC
@@ -189,8 +185,8 @@
#define CONFIG_ENV_SECT_SIZE 0x2000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/*-----------------------------------------------------------------------
* Cache Configuration
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index b4b1ba8..6822b4c 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -36,9 +36,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/* Command line configuration */
-#undef CONFIG_CMD_NAND
-
/*
* NAND FLASH
*/
@@ -70,22 +67,6 @@
#define CONFIG_SYS_FEC0_PHYADDR 0
#define CONFIG_SYS_FEC1_PHYADDR 1
-
-#ifdef CONFIG_SYS_NAND_BOOT
-#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw rootfstype=jffs2 " \
- "mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro," \
- "-(jffs2) console=ttyS0,115200"
-#else
-#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=" \
- __stringify(CONFIG_SERVERIP) ":/tftpboot/" \
- __stringify(CONFIG_IPADDR) " ip=" \
- __stringify(CONFIG_IPADDR) ":" \
- __stringify(CONFIG_SERVERIP)":" \
- __stringify(CONFIG_GATEWAYIP)": " \
- __stringify(CONFIG_NETMASK) \
- "::eth0:off:rw console=ttyS0,115200"
-#endif
-
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_IPADDR 192.168.1.2
#define CONFIG_NETMASK 255.255.255.0
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 6eb8ead..f6d9251 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -48,7 +48,6 @@
# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
# define CONFIG_ETHPRIME "FEC0"
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 8702b89..f1acf07 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -35,9 +35,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/* Command line configuration */
-#undef CONFIG_CMD_PCI
-
/* Network configuration */
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
@@ -54,7 +51,6 @@
# define MCFFEC_TOUT_LOOP 50000
# define CONFIG_HAS_ETH1
-# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
# define CONFIG_ETHPRIME "FEC0"
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 9dca52e..b51d695 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -25,9 +25,6 @@
#undef CONFIG_HW_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_SLTTMR
#define CONFIG_FSLDMAFEC
@@ -68,9 +65,6 @@
#ifdef CONFIG_CMD_USB
# define CONFIG_USB_OHCI_NEW
-# ifndef CONFIG_CMD_PCI
-# define CONFIG_CMD_PCI
-# endif
# define CONFIG_PCI_OHCI
# undef CONFIG_SYS_USB_OHCI_BOARD_INIT
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index d95be2b..56af0e3 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -25,9 +25,6 @@
#undef CONFIG_HW_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-/* Command line configuration */
-#define CONFIG_CMD_PCI
-
#define CONFIG_SLTTMR
#define CONFIG_FSLDMAFEC
@@ -67,9 +64,6 @@
#ifdef CONFIG_CMD_USB
# define CONFIG_USB_OHCI_NEW
-# ifndef CONFIG_CMD_PCI
-# define CONFIG_CMD_PCI
-# endif
/*# define CONFIG_PCI_OHCI*/
# define CONFIG_SYS_USB_OHCI_REGS_BASE 0x80041000
# define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 17090da..1e6d057 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -62,10 +62,6 @@
#define CONFIG_NETMASK 255.0.0.0
#define CONFIG_BOOTCOMMAND "run flashboot"
-#define CONFIG_BOOTARGS "ubi.mtd=4 root=ubi0:rootfs rw " \
- "rootfstype=ubifs rootflags=sync " \
- "console=ttyCPM0,115200N8 " \
- "ip=${ipaddr}:::${netmask}:mcr3k:eth0:off"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CONFIG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
@@ -151,7 +147,4 @@
#define BOOTFLAG_COLD 0x01
#define BOOTFLAG_WARM 0x02
-/* Misc Settings */
-#define CONFIG_CMD_REGINFO
-
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 25d5cab..8460b81 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -415,7 +415,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index cf0c723..3a031a8 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -264,7 +264,6 @@
"mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024)
@@ -464,7 +463,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index be1a6af..e2cc815 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -240,7 +240,6 @@
"mtdparts=e0600000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)"
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024) /* 0x00008000 */
@@ -443,7 +442,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
@@ -586,8 +584,6 @@
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index b8f8f49..7f99bd2 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -319,10 +319,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 428f3ab..a60f1b3 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -403,10 +403,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -561,8 +557,6 @@
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 18f7523..b984ea5 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -462,10 +462,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -720,8 +716,6 @@
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 221c35c..fac4a22 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -419,7 +419,6 @@
#ifdef CONFIG_TSEC_ENET
#define CONFIG_MII
-#define CONFIG_PHY_GIGE /* In case CONFIG_CMD_MII is specified */
#define CONFIG_TSEC1
@@ -473,11 +472,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
#if defined(CONFIG_COMPACT_FLASH) || defined(CONFIG_SATA_SIL3114) \
|| defined(CONFIG_USB_STORAGE)
#define CONFIG_SUPPORT_VFAT
@@ -486,10 +480,6 @@
#if defined(CONFIG_SATA_SIL3114) || defined(CONFIG_USB_STORAGE)
#endif
-#ifdef CONFIG_PCI
- #define CONFIG_CMD_PCI
-#endif
-
/* Watchdog */
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -692,12 +682,6 @@
#define CONFIG_NETDEV "eth0"
-#ifdef CONFIG_MPC8349ITX
-#define CONFIG_HOSTNAME "mpc8349emitx"
-#else
-#define CONFIG_HOSTNAME "mpc8349emitxgp"
-#endif
-
/* Default path and filenames */
#define CONFIG_ROOTPATH "/nfsroot/rootfs"
#define CONFIG_BOOTFILE "uImage"
@@ -711,16 +695,6 @@
#endif
-#define CONFIG_BOOTARGS \
- "root=/dev/nfs rw" \
- " nfsroot=" __stringify(CONFIG_SERVERIP) ":" CONFIG_ROOTPATH \
- " ip=" __stringify(CONFIG_IPADDR) ":" \
- __stringify(CONFIG_SERVERIP) ":" \
- __stringify(CONFIG_GATEWAYIP) ":" \
- __stringify(CONFIG_NETMASK) ":" \
- CONFIG_HOSTNAME ":" CONFIG_NETDEV ":off" \
- " console=" __stringify(CONSOLE) "," __stringify(CONFIG_BAUDRATE)
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=" __stringify(CONSOLE) "\0" \
"netdev=" CONFIG_NETDEV "\0" \
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 1a65c25..badb233 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -278,7 +278,6 @@
/*
* NAND Flash on the Local Bus
*/
-#define CONFIG_CMD_NAND 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_NAND_FSL_ELBC 1
@@ -466,10 +465,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
@@ -641,8 +636,6 @@
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index d93f7a0..11bd0c3 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -479,10 +479,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 0245fc6..da127d1 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -286,7 +286,6 @@
CONFIG_SYS_NAND_BASE + 0x80000, \
CONFIG_SYS_NAND_BASE + 0xC0000}
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -547,8 +546,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-
#endif /* CONFIG_TSEC_ENET */
/*
@@ -581,15 +578,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
@@ -663,8 +651,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index ca4ccd8..e0ff8e1 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -314,10 +314,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -373,8 +369,6 @@
#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 9774541..f13926f 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -338,15 +338,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -400,8 +391,6 @@
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS1\0" \
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index b4f4c4e..e8a6fdf 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -318,8 +318,6 @@
#define TSEC3_PHYIDX 0
#define CONFIG_ETHPRIME "eTSEC1"
-
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#endif /* CONFIG_TSEC_ENET */
/*
@@ -345,15 +343,6 @@
#define CONFIG_BOOTP_HOSTNAME
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
@@ -416,8 +405,6 @@
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index b415436..20251fd 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -432,7 +432,6 @@
/* Options are: eTSEC[0-3] */
#define CONFIG_ETHPRIME "eTSEC0"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#endif /* CONFIG_TSEC_ENET */
/*
@@ -457,15 +456,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -519,8 +509,6 @@
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ecc=off\0" \
"netdev=eth0\0" \
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index d31395c..3db0caf 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -336,15 +336,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -396,8 +387,6 @@
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS1\0" \
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 2e13fb5..c03e53f 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -349,18 +349,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
-#if defined(CONFIG_ETHER_ON_FCC)
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -415,8 +403,6 @@
#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyCPM\0" \
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index c0af745..9be25a9 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -351,15 +351,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -414,8 +405,6 @@
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index a75ce0b..1e6e94e 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -181,7 +181,6 @@
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \
@@ -444,15 +443,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#ifdef CONFIG_MMC
@@ -504,8 +494,6 @@
#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 0a2bcb2..1959fa5 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -285,7 +285,6 @@
CONFIG_SYS_NAND_BASE + 0x80000,\
CONFIG_SYS_NAND_BASE + 0xC0000}
#define CONFIG_SYS_MAX_NAND_DEVICE 4
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_MAX_OOBFREE 5
@@ -520,8 +519,6 @@
#define TSEC4_PHYIDX 0
#define CONFIG_ETHPRIME "eTSEC1"
-
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#endif /* CONFIG_TSEC_ENET */
/*
@@ -544,15 +541,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
@@ -560,7 +548,6 @@
#define CONFIG_USB_EHCI_PCI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_PCI_EHCI_DEVICE 0
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -617,8 +604,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \
"netdev=eth0\0" \
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 5e82116..92db95a 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -262,8 +262,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_CMD_REGINFO
-
#define CONFIG_ULI526X
#ifdef CONFIG_ULI526X
#endif
@@ -426,10 +424,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
#define CONFIG_WATCHDOG /* watchdog enabled */
#define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */
@@ -479,8 +473,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x10000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#if defined(CONFIG_PCI1)
#define PCI_ENV \
"pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da0 15;" \
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 7b9b245..94483b5 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -582,15 +582,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -645,8 +636,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x10000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 5ee83b9..1c4eb1c 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -12,10 +12,6 @@
#define CONFIG_CPU_SH7722 1
#define CONFIG_MIGO_R 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -37,7 +33,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 23fe9f9..c19339b 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -140,8 +140,6 @@
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
-
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
@@ -388,7 +386,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#if defined(CONFIG_TARGET_P1010RDB_PA)
/* NAND Flash Timing Params */
@@ -630,8 +627,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
/* TBI PHY configuration for SGMII mode */
#define CONFIG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
@@ -714,11 +709,6 @@
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
@@ -772,8 +762,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \
"netdev=eth0\0" \
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index db70b46..8c83f2d 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -245,7 +245,6 @@
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND 1
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
#define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
@@ -525,8 +524,6 @@
#define TSEC2_PHYIDX 0
#define CONFIG_ETHPRIME "eTSEC1"
-
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -584,15 +581,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index be42dad..1e41035 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -125,7 +125,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_NAND_FSL_ELBC
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -238,15 +237,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
@@ -318,7 +308,6 @@
/* For FM */
#define CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 38fbf37..6469817 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -227,7 +227,6 @@
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
/* NAND flash config */
@@ -559,7 +558,6 @@
#define CONFIG_SYS_TBIPA_VALUE 8
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -572,10 +570,6 @@
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* USB
*/
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index cfb495f..d58af7b 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -365,7 +365,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -744,7 +743,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -770,15 +768,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 3b592eb..c94b837 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -392,7 +392,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#if defined(CONFIG_NAND)
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
@@ -756,7 +755,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -781,15 +779,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index bf2c15a..98cee8a 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -283,7 +283,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -618,7 +617,6 @@
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/* Enable VSC9953 L2 Switch driver */
@@ -649,15 +647,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 1454b9f..a54e17c 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -397,7 +397,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
@@ -754,7 +753,6 @@
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -764,15 +762,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 119c543..c1c3fa1 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -337,7 +337,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#if defined(CONFIG_NAND)
@@ -673,7 +672,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC3"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -735,15 +733,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 862e079..803d8fb 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -301,7 +301,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
#if defined(CONFIG_NAND)
@@ -623,7 +622,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC3"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -681,15 +679,6 @@
*/
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 944dab8..885dc77 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -258,7 +258,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_MAX_OOBFREE 2
@@ -486,7 +485,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index df38883..fee8b8f 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -56,8 +56,6 @@
#define CONFIG_DDR_ECC
-#define CONFIG_CMD_REGINFO
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
@@ -259,7 +257,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -272,10 +269,6 @@
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
@@ -452,7 +445,6 @@
#define CONFIG_SYS_NAND_DDR_LAW 11
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
@@ -668,7 +660,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index c216ac2..45c54a0 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -213,11 +213,6 @@
#endif /* CONFIG_TSEC_ENET */
-/*
- * General PCI
- * Addresses are mapped 1-1.
- */
-
#if defined(CONFIG_PCI)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
@@ -270,13 +265,6 @@
#define CONFIG_BOOTP_HOSTNAME
/*
- * Command line configuration.
- */
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -462,14 +450,10 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 400000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
"echo"
-#undef CONFIG_BOOTARGS
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=tqm834x\0" \
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 6fd3fa4..293496b 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -352,8 +352,6 @@
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
@@ -413,11 +411,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
@@ -437,7 +430,6 @@
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_MMC_SPI
-#define CONFIG_CMD_MMC_SPI
#endif
/* Misc Extra Settings */
@@ -479,10 +471,7 @@
#if defined(CONFIG_TSEC_ENET)
-#if defined(CONFIG_UCP1020_REV_1_2)
-#define CONFIG_PHY_MICREL_KSZ9021
-#elif defined(CONFIG_UCP1020_REV_1_3)
-#define CONFIG_PHY_MICREL_KSZ9031
+#if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
#else
#error "UCP1020 module revision is not defined !!!"
#endif
@@ -507,8 +496,6 @@
#define TSEC2_PHYIDX 0
#define TSEC3_PHYIDX 0
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-
#endif
#define CONFIG_HOSTNAME UCP1020
@@ -519,8 +506,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#if defined(CONFIG_DONGLE)
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h
index 22a4e69..6329bf6 100644
--- a/include/configs/advantech_dms-ba16.h
+++ b/include/configs/advantech_dms-ba16.h
@@ -71,7 +71,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* Serial Flash */
@@ -269,7 +268,6 @@
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
-#undef CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 1652508..35518da 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -37,7 +37,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* FLASH */
#define CONFIG_SPI
@@ -52,8 +51,6 @@
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index c7329cc..c9420b2 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -191,8 +191,6 @@
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif
#ifdef CONFIG_NAND
@@ -238,9 +236,7 @@
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
@@ -351,19 +347,12 @@
#define CONFIG_ENV_OFFSET 0x001c0000
#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
-#elif !defined(CONFIG_ENV_IS_NOWHERE)
-/* Not NAND, SPI, NOR or eMMC env, so put ENV in a file on FAT */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
#endif
/* SPI flash. */
#define CONFIG_SF_DEFAULT_SPEED 24000000
/* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
/* Enable Atheros phy driver */
#define CONFIG_PHY_ATHEROS
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 4721b42..9b14603 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -14,7 +14,6 @@
#ifndef __CONFIG_IGEP003X_H
#define __CONFIG_IGEP003X_H
-#define CONFIG_NAND
#include <configs/ti_am335x_common.h>
/* Clock defines */
@@ -111,7 +110,6 @@
#define CONFIG_CONS_INDEX 1
/* Ethernet support */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
/* NAND support */
@@ -125,7 +123,6 @@
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL),-(UBI)"
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* UBI configuration */
#define CONFIG_SPL_UBI 1
diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h
index f3b7767..62ab2d7 100644
--- a/include/configs/am335x_shc.h
+++ b/include/configs/am335x_shc.h
@@ -19,7 +19,6 @@
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_CMD_EXT4
#undef CONFIG_CMD_EXT4_WRITE
-#undef CONFIG_CMD_MMC_SPI
#undef CONFIG_CMD_SPI
#define CONFIG_CMD_CACHE
@@ -247,8 +246,6 @@
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifndef CONFIG_SPL_USBETH_SUPPORT
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
@@ -275,8 +272,6 @@
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h
index 75f9bef..62af3fa 100644
--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -78,8 +78,6 @@
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifndef CONFIG_SPL_USBETH_SUPPORT
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
@@ -100,8 +98,6 @@
#endif
/* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif /* ! __CONFIG_AM335X_SL50_H */
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 77d9ba1..0502b56 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -100,14 +100,9 @@
#endif /* CONFIG_USB_AM35X */
-/* commands to include */
-
-#define CONFIG_CMD_NAND /* NAND support */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
/*
* Board NAND Info.
@@ -262,7 +257,6 @@
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 26036c4..e957a28 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -87,14 +87,10 @@
#endif /* CONFIG_USB_MUSB_AM35X */
-/* commands to include */
-#define CONFIG_CMD_NAND
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
/* Ethernet */
#define CONFIG_DRIVER_TI_EMAC
@@ -309,6 +305,5 @@
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* __CONFIG_H */
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index a91b7df..b84f6e3 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -71,18 +71,11 @@
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/* SPL USB Support */
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
@@ -147,7 +140,6 @@
#endif
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_QSPI_SEL_GPIO 48
#define CONFIG_SF_DEFAULT_SPEED 48000000
@@ -247,11 +239,9 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_PHY_GIGE
#endif
#define CONFIG_DRIVER_TI_CPSW
-#define CONFIG_PHYLIB
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
#define CONFIG_SYS_RX_ETH_BUFFER 64
@@ -314,9 +304,7 @@
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 9216998..0c70c53 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -84,15 +84,12 @@
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
#define CONFIG_MII /* Required in net/eth.c */
-#define CONFIG_PHY_GIGE /* per-board part of CPSW */
-#define CONFIG_PHYLIB
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
#define CONFIG_SUPPORT_EMMC_BOOT
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST
@@ -126,7 +123,6 @@
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 76800000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 0a40746..5f8b6c5 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -93,8 +93,8 @@
#define CONFIG_ENV_SECT_SIZE 0x1000
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
/* memory map space for linux boot data */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index 489b32e..860f385 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -27,9 +27,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock2 " \
- "rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f650000"
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index 3e93a08..068007e 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -31,9 +31,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock2 " \
- "rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND "sf probe;" \
"mtdparts default;" \
"bootm 0x9f680000"
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index 285041d..9c234fb 100644
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -13,10 +13,6 @@
#define CONFIG_CPU_SH7723 1
#define CONFIG_AP325RXA 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,38400"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -47,7 +43,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 38400 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */
#define CONFIG_CONS_SCIF5 1
diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h
index 078c77b..0105a66 100644
--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@@ -16,10 +16,6 @@
#define CONFIG_SYS_TEXT_BASE 0x8BFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC4,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -29,8 +25,6 @@
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL 1
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
@@ -49,7 +43,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SCIF 1
#define CONFIG_CONS_SCIF4 1
diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index d6b226c..f750d5f 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -39,7 +39,6 @@
/* PCI host support */
#undef CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 4a12ac8..16af141 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -86,9 +86,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_TFTP_TSIZE
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h
index daa3be0..c814c73 100644
--- a/include/configs/apalis_t30.h
+++ b/include/configs/apalis_t30.h
@@ -35,7 +35,6 @@
#define CONFIG_USB_EHCI_TEGRA
/* PCI host support */
-#define CONFIG_CMD_PCI
/* PCI networking support */
#define CONFIG_E1000_NO_NVM
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index b122fe6..12bb085 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -27,7 +27,6 @@
* SPL
*/
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_TEXT_BASE 0xA0000000
@@ -52,13 +51,6 @@
#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
/*
- * U-Boot Commands
- */
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK
-#define CONFIG_CMD_NAND_TRIMFFS
-
-/*
* Memory configurations
*/
#define CONFIG_NR_DRAM_POPULATED 1
@@ -130,9 +122,6 @@
#define CONFIG_INITRD_TAG /* send initrd params */
#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
-#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
- __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
- " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
#define ACFG_CONSOLE_DEV ttySMX0
#define CONFIG_BOOTCOMMAND "run ubifsboot"
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index fd319b3..bb68125 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -18,10 +18,6 @@
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT
-/* U-Boot Commands */
-
-#define CONFIG_CMD_NAND
-
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 0495dbf..1c28fcf 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -32,9 +32,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_SPEED 20000000
@@ -182,8 +179,6 @@
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
/* NAND stuff */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 30abafc..9cd40a7 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -20,7 +20,6 @@
#define CONSOLE_DEV "ttymxc1"
#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_SF_DEFAULT_BUS 3
#define CONFIG_SF_DEFAULT_CS 1
diff --git a/include/configs/aristainetos2b.h b/include/configs/aristainetos2b.h
index 7a47514..a680e76 100644
--- a/include/configs/aristainetos2b.h
+++ b/include/configs/aristainetos2b.h
@@ -20,7 +20,6 @@
#define CONSOLE_DEV "ttymxc1"
#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 492062a..7ed530e 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -16,12 +16,8 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
-
#define BOARD_LATE_INIT
-#define CONFIG_BOOTARGS ""
-
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_ARCH_CPU_INIT
@@ -46,7 +42,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF1
#define SCIF0_BASE 0xe6c40000
#define SCIF1_BASE 0xe6c50000
@@ -102,7 +97,6 @@
#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
#define CONFIG_SH_ETHER_SH7734_MII (0x01)
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index f786ffa..2226b98 100644
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -65,10 +65,6 @@
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_BOOTARGS \
- "console=ttyS4,115200n8" \
- " root=/dev/ram rw"
-
#define CONFIG_BOOTCOMMAND "bootm 20080000 20300000"
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 723bc15..563732a 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -173,10 +173,6 @@
#endif
#endif
-/* default bootargs that are considered during boot */
-#define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
- " loaderversion=$loaderversion"
-
/* default RAM address for user programs */
#define CONFIG_SYS_LOAD_ADDR 0x20000
@@ -192,10 +188,8 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_SPARTAN3
-#define CONFIG_FPGA_ALTERA
#define CONFIG_FPGA_CYCLON2
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT 1000
@@ -302,7 +296,7 @@
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text*)
+ env/embedded.o(.text*)
#if ENABLE_JFFS
/* JFFS Partition offset set */
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index b413523..108842f 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -53,9 +53,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
#else
/* u-boot env in sd/mmc card */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_SIZE 0x4000
#endif
@@ -65,16 +62,8 @@
"fatload mmc 0:1 0x21000000 ${dtb_name}; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "root=/dev/mmcblk0p2 rw rootwait"
+
#else
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256K(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#ifdef CONFIG_SYS_USE_NANDFLASH
/* u-boot env in nand flash */
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 51b6fab..92add62 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -55,11 +55,6 @@
#define CONFIG_BOOTP_HOSTNAME 1
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND 1
-
-/*
* SDRAM: 1 bank, min 32, max 128 MB
* Initialized before u-boot gets started.
*/
@@ -98,25 +93,6 @@
# define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK
#endif
-#ifndef CONFIG_AT91SAM9G20EK_2MMC
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
-#define AT91_SPI_CLK 15000000
-#else
-/* Enable MMC. The MCCK is conflicted with DataFlash */
-#endif
-
-#ifdef CONFIG_AT91SAM9G20EK
-#define DATAFLASH_TCSS (0x22 << 16)
-#else
-#define DATAFLASH_TCSS (0x1a << 16)
-#endif
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
@@ -146,28 +122,23 @@
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
-#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0x4200
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif CONFIG_SYS_USE_DATAFLASH_CS1
-/* bootstrap + u-boot + env + linux in dataflash on CS1 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
-#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0x4200
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0:1; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_NANDFLASH)
@@ -176,12 +147,6 @@
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
@@ -192,12 +157,6 @@
#define CONFIG_BOOTCOMMAND \
"fatload mmc 0:1 0x22000000 uImage; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
#endif
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 4e151cd..a6d3751 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -36,15 +36,6 @@
* Hardware drivers
*/
-/* gpio */
-#define CONFIG_AT91_GPIO
-#define CONFIG_AT91_GPIO_PULLUP 1
-
-/* serial console */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
/* LCD */
#define LCD_BPP LCD_COLOR8
#define CONFIG_LCD_LOGO
@@ -56,13 +47,6 @@
#define CONFIG_ATMEL_LCD_BGR555
#endif
-/* LED */
-#define CONFIG_AT91_LED
-#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
-#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
-#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
-
-
/*
* BOOTP options
*/
@@ -71,27 +55,12 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
+ (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
@@ -139,42 +108,32 @@
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif CONFIG_SYS_USE_DATAFLASH_CS3
/* bootstrap + u-boot + env + linux in dataflash on CS3 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#else /* CONFIG_SYS_USE_NANDFLASH */
/* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_OFFSET 0xc0000
+#define CONFIG_ENV_OFFSET 0x120000
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 62099c7..24ff6b5 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -63,11 +63,6 @@
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_BOOTP_HOSTNAME 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND 1
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
@@ -76,15 +71,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NOR flash, if populated */
#ifdef CONFIG_SYS_USE_NORFLASH
#define CONFIG_SYS_FLASH_CFI 1
@@ -249,15 +235,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
-#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0x4200
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
@@ -266,12 +250,6 @@
#define CONFIG_ENV_OFFSET_REDUND 0x100000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#endif
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 8b00370..2ce58e1 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -50,12 +50,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-
-#define CONFIG_CMD_NAND
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
@@ -97,28 +91,10 @@
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#elif CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env + linux in mmc */
-#define FAT_ENV_INTERFACE "mmc"
-/*
- * We don't specify the part number, if device 0 has partition table, it means
- * the first partition; it no partition table, then take whole device as a
- * FAT file system.
- */
-#define FAT_ENV_DEVICE_AND_PART "0"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootwait"
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \
"fatload mmc 0:1 0x72000000 zImage; " \
"bootz 0x72000000 - 0x71000000"
@@ -150,7 +126,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x70080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index e4ff019..089b865 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -45,11 +45,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
@@ -76,6 +71,7 @@
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
+#endif
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
@@ -84,10 +80,6 @@
#define CONFIG_PMECC_SECTOR_SIZE 512
#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
-#define CONFIG_CMD_NAND_TRIMFFS
-
-#endif
-
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define MTDIDS_DEFAULT "nand0=atmel_nand"
@@ -156,9 +148,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
#else
/* Use file in FAT file to save environment */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_FILE "uboot.env"
-#define FAT_ENV_DEVICE_AND_PART "0"
#define CONFIG_ENV_SIZE 0x4000
#endif
@@ -200,7 +189,6 @@
#define CONFIG_SYS_MCKR_CSS 0x1302
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 6132076..2ed4ea8 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -45,12 +45,6 @@
/* Let board_init_f handle the framebuffer allocation */
#undef CONFIG_FB_ADDR
-/*
- * Command line configuration.
- */
-
-#define CONFIG_CMD_NAND 1
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
@@ -59,15 +53,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
@@ -95,15 +80,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
-#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET 0x4200
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif CONFIG_SYS_USE_NANDFLASH
@@ -114,27 +97,14 @@
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
"nand read 0x21000000 0x180000 0x80000; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256K(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_FILE "uboot.env"
-#define FAT_ENV_DEVICE_AND_PART "0"
#define CONFIG_ENV_SIZE 0x4000
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 rw rootwait"
#endif
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 7e8a9e9..eeb2976 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -46,11 +46,6 @@
#define CONFIG_BOOTP_HOSTNAME
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
-/*
* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
* NB: in this case, USB 1.1 devices won't be recognized.
*/
@@ -81,18 +76,16 @@
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#endif
+
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC 1
#define CONFIG_ATMEL_NAND_HW_PMECC 1
#define CONFIG_PMECC_CAP 2
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_CMD_NAND_TRIMFFS
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
-
/* USB */
#ifdef CONFIG_CMD_USB
#ifndef CONFIG_USB_EHCI_HCD
@@ -139,27 +132,9 @@
"bootm 0x22000000"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_FILE "uboot.env"
-#define FAT_ENV_DEVICE_AND_PART "0"
#define CONFIG_ENV_SIZE 0x4000
#endif
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
- "mtdparts=atmel_nand:" \
- "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
- "root=/dev/mmcblk0p2 " \
- "rw rootfstype=ext4 rootwait"
-#else
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
-#endif
-
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_LONGHELP
@@ -190,7 +165,6 @@
#define CONFIG_SYS_MCKR_CSS 0x1302
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h
index b583267..8f516ea 100644
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@@ -55,7 +55,6 @@
* Ethernet PHY configuration
*/
#define CONFIG_MII
-#define CONFIG_PHY_GIGE
/*
* USB 1.1 configuration
@@ -63,11 +62,6 @@
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-/*
- * Commands still not supported in Kconfig
- */
-#define CONFIG_CMD_NAND
-
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_CMDLINE_EDITING
@@ -76,16 +70,11 @@
* Environment settings
*/
#define CONFIG_ENV_SIZE SZ_16K
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
-#define CONFIG_FAT_WRITE
/*
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS3,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index 17b3a15..185c749 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -45,9 +45,7 @@
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00080000
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
@@ -243,8 +241,6 @@
/* General network SPL, both CPSW and USB gadget RNDIS */
#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"*/
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
@@ -302,8 +298,6 @@
#endif
/* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#define CONFIG_MII
@@ -311,7 +305,6 @@
/* NAND support */
#ifdef CONFIG_NAND
-#define CONFIG_CMD_NAND
#define GPMC_NAND_ECC_LP_x8_LAYOUT 1
#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h
index fafab8e..c824ebd 100644
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -344,8 +344,6 @@
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif
#ifdef CONFIG_NAND
@@ -395,9 +393,7 @@
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
@@ -521,8 +517,6 @@
#define CONFIG_SF_DEFAULT_SPEED 24000000
/* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
/*
diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h
index 3efdbd2..f9ea907 100644
--- a/include/configs/bayleybay.h
+++ b/include/configs/bayleybay.h
@@ -19,10 +19,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ff000
diff --git a/include/configs/beaver.h b/include/configs/beaver.h
index 6afa1e8..2385173 100644
--- a/include/configs/beaver.h
+++ b/include/configs/beaver.h
@@ -45,7 +45,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h
index c76053e..3b65416 100644
--- a/include/configs/bg0900.h
+++ b/include/configs/bg0900.h
@@ -9,11 +9,6 @@
/* System configurations */
#define CONFIG_MX28 /* i.MX28 SoC */
-/* U-Boot Commands */
-
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
@@ -52,7 +47,6 @@
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
#define CONFIG_BOOTCOMMAND "bootm"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index 9a18046..cdff966 100755
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -28,7 +28,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF0
#define CONFIG_SYS_MEMTEST_START (RCAR_GEN2_SDRAM_BASE)
diff --git a/include/configs/boston.h b/include/configs/boston.h
index 2646cf0..86dd043 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -20,7 +20,6 @@
/*
* PCI
*/
-#define CONFIG_CMD_PCI
/*
* Memory map
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 9688c4a..07a173f 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -66,9 +66,7 @@
/* NAND */
#ifdef CONFIG_NAND
-#define CONFIG_CMD_SPL_NAND_OFS 0x080000 /* end of u-boot */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif /* CONFIG_NAND */
#endif /* CONFIG_SPL_OS_BOOT */
@@ -236,7 +234,6 @@
#if defined(CONFIG_SPI_BOOT)
/* McSPI IP block */
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 8d0e0ea..15c481d 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -31,7 +31,6 @@
/* Network defines */
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
#define CONFIG_MII /* Required in net/eth.c */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_NATSEMI
/*
@@ -73,7 +72,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP24XX
/*
* Our platforms make use of SPL to initalize the hardware (primarily
@@ -104,6 +102,5 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
/* General parts of the framework, required. */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* ! __BUR_AM335X_COMMON_H__ */
diff --git a/include/configs/calimain.h b/include/configs/calimain.h
index b6c8035..06554c1 100644
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@@ -204,7 +204,6 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS ""
#define CONFIG_BOOTCOMMAND "run checkupdate; run checkbutton;"
#define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */
#define CONFIG_RESET_TO_RETRY
@@ -294,14 +293,6 @@
"echo Product: $product; " \
"gpio c 1; gpio c 2;"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
-#ifndef CONFIG_DRIVER_TI_EMAC
-#endif
-
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
/* initial stack pointer in internal SRAM */
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index a490d06..834bab0 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -49,7 +49,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h
index 768669f..4bb0f9e 100644
--- a/include/configs/cei-tk1-som.h
+++ b/include/configs/cei-tk1-som.h
@@ -44,7 +44,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index b36cbb9..4996a89 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -109,7 +109,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* Command definition */
diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index 82be3a1..fb3e674 100644
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -7,8 +7,6 @@
#ifndef __CONFIG_CHILIBOARD_H
#define __CONFIG_CHILIBOARD_H
-#define CONFIG_NAND
-
#include <configs/ti_am335x_common.h>
#define CONFIG_CONS_INDEX 1
@@ -129,8 +127,6 @@
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
@@ -206,7 +202,6 @@
#endif
/* Network. */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif /* ! __CONFIG_CHILIBOARD_H */
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index c1cf413..3aaa82c 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -29,8 +29,6 @@
#define CONFIG_SYS_SPD_BUS_NUM 3
/* SPI Flash support */
-#undef CONFIG_OMAP3_SPI
-
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 48000000
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
@@ -64,7 +62,6 @@
#ifndef CONFIG_SPL_BUILD
/* SATA */
-#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
@@ -74,8 +71,6 @@
CONFIG_SYS_SCSI_MAX_LUN)
/* PCA9555 GPIO expander support */
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
@@ -83,7 +78,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST
@@ -101,9 +95,7 @@
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_PHY_GIGE
#define CONFIG_PHY_ATHEROS
-#define CONFIG_PHYLIB
#define CONFIG_SYS_RX_ETH_BUFFER 64
#define PHY_ANEG_TIMEOUT 8000
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index bd80222..5061f6c 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -24,7 +24,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C */
#define CONFIG_SYS_I2C
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 481b837..4f45be1 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -176,7 +176,6 @@
/* NAND */
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -193,7 +192,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_FEC_XCV_TYPE RGMII
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC0"
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index a1b8e14..2287d5b 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -12,12 +12,10 @@
#define __CONFIG_CM_T335_H
#define CONFIG_CM_T335
-#define CONFIG_NAND
#include <configs/ti_am335x_common.h>
#undef CONFIG_SPI
-#undef CONFIG_OMAP3_SPI
#undef CONFIG_BOOTCOUNT_LIMIT
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
@@ -99,11 +97,8 @@
#define CONFIG_SYS_I2C_EEPROM_BUS 0
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* Network. */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* NAND support */
@@ -130,7 +125,6 @@
#undef CONFIG_SYS_NAND_U_BOOT_OFFS
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
-#define CONFIG_CMD_NAND
#define MTDIDS_DEFAULT "nand0=nand"
#define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \
"1m(u-boot),1m(u-boot-env)," \
@@ -140,9 +134,7 @@
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* GPIO pin + bank to pin ID mapping */
@@ -164,8 +156,6 @@
* First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
*/
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x26
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} }
#endif /* CONFIG_SPL_BUILD */
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 99d4800..a94d55f 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -90,12 +90,9 @@
"1920k(u-boot),256k(u-boot-env),"\
"4m(kernel),-(fs)"
-#define CONFIG_CMD_NAND /* NAND support */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
@@ -251,8 +248,6 @@
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
@@ -264,7 +259,6 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 3fb6676..3a9fd2a 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -98,12 +98,9 @@
"1920k(u-boot),256k(u-boot-env),"\
"4m(kernel),-(fs)"
-#define CONFIG_CMD_NAND /* NAND support */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
@@ -252,8 +249,6 @@
#define CONFIG_BMP_16BPP
#define CONFIG_SCF0403_LCD
-#define CONFIG_OMAP3_SPI
-
/* EEPROM */
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index f6e0743..bbc455a 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -25,7 +25,6 @@
#endif
/* NAND support */
-#define CONFIG_NAND
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
@@ -53,14 +52,11 @@
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_NET_MULTI
-#define CONFIG_PHY_GIGE
#define CONFIG_PHY_ATHEROS
-#define CONFIG_PHYLIB
#define CONFIG_SYS_RX_ETH_BUFFER 64
/* USB support */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
@@ -101,8 +97,6 @@
#define CONFIG_ENV_OFFSET (768 * 1024)
#define CONFIG_ENV_SPI_MAX_HZ 48000000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
"fdtaddr=0x81200000\0" \
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 69706d2..feae29d 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -17,7 +17,6 @@
#include <configs/ti_omap5_common.h>
/* EEPROM related defines */
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
@@ -56,7 +55,6 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 76 /* HSIC2 HUB #RESET */
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index a3b7b21..9adf7a3 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -102,8 +102,8 @@
#endif
#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- common/env_embedded.o (.text);
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text);
/*
* BOOTP options
@@ -155,9 +155,6 @@
#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
enter a valid image address in flash */
-#define CONFIG_BOOTARGS " " /* default bootargs that are
-considered during boot */
-
/* User network settings */
#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 5f73867..fca72f4 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -72,8 +72,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 8aca89d..30a2d12 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -32,8 +32,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
@@ -161,7 +159,6 @@
#endif
#define CONFIG_NAND_MXS
-#define CONFIG_CMD_NAND_TRIMFFS
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -169,7 +166,6 @@
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
-#define CONFIG_CMD_NAND_TORTURE
/* Dynamic MTD partition support */
#define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 4be06f1..326fece 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -39,7 +39,6 @@
"bootm 0xa0000000; " \
"fi; " \
"bootm 0xc0000;"
-#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index d9fd642..c1d4b62 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -41,7 +41,6 @@
#define CONFIG_LCD_LOGO
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 72e3ea7..cc1f919 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -43,7 +43,6 @@
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
@@ -67,8 +66,6 @@
#define IMX_FEC_BASE ENET1_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h
index b4ea184..4bf3dc5 100644
--- a/include/configs/conga-qeval20-qa3-e3845.h
+++ b/include/configs/conga-qeval20-qa3-e3845.h
@@ -19,21 +19,13 @@
"stdout=serial\0" \
"stderr=serial\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda2 ro quiet"
#define CONFIG_BOOTCOMMAND \
"load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 1ac4162..52be713 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -220,7 +220,6 @@
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_CMD_PCI
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
@@ -282,8 +281,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
/*
* USB
*/
@@ -336,9 +333,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#ifndef CONFIG_TRAILBLAZER
-
-#define CONFIG_CMD_REGINFO
-
/*
* Board initialisation callbacks
*/
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index 021150e..715e9ed 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -33,8 +33,6 @@
* Commands configuration
*/
#define CONFIG_CMD_I2C
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SCSI
#define CONFIG_CMD_SPI
/* SPI NOR flash default params, used by sf commands */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 0ea76b3..1d4524e 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -236,7 +236,6 @@
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
/* NAND flash config */
@@ -572,7 +571,6 @@
#define CONFIG_SYS_TBIPA_VALUE 8
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -582,15 +580,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index ed1a228..e47f06b 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -60,11 +60,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
@@ -89,14 +84,10 @@
/* Ethernet */
#define CONFIG_MACB
-#define CONFIG_PHYLIB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91_WANTS_COMMON_PHY
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
@@ -114,12 +105,6 @@
#define CONFIG_BOOTCOMMAND \
"nand read 0x70000000 0x200000 0x300000;" \
"bootm 0x70000000"
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h
index 5f4800b..66e8006 100644
--- a/include/configs/cougarcanyon2.h
+++ b/include/configs/cougarcanyon2.h
@@ -17,9 +17,6 @@
"stdout=serial,vga\0" \
"stderr=serial,vga\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
-
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x5ff000
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 5ec09ba..4181c06 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -21,9 +21,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
-
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index ddbaf32..5289586 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -366,8 +366,6 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#endif
#ifdef CONFIG_PCI
@@ -397,7 +395,6 @@
#define CONFIG_SYS_TBIPA_VALUE 8
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC4"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -407,15 +404,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index c610ff3..0736b39 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -259,15 +259,8 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS \
- "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
#define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=dsp:wake=yes"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
@@ -276,8 +269,6 @@
#endif
#ifdef CONFIG_USE_NAND
-#define CONFIG_CMD_NAND
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif
@@ -298,7 +289,6 @@
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_FOOTPRINT 32768
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
index 8642229..b0e988d 100644
--- a/include/configs/db-88f6820-amc.h
+++ b/include/configs/db-88f6820-amc.h
@@ -24,7 +24,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_BUS 1
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 4a9d2f7..44fd968 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -24,7 +24,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C */
#define CONFIG_SYS_I2C
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 6ad5206..4a5be61 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -22,12 +22,6 @@
#define CONFIG_SYS_TEXT_BASE 0x00800000
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-/*
- * Commands configuration
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCI
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 970e214..ce91f10 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -38,7 +38,6 @@
/* valid baudrates */
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
@@ -67,11 +66,6 @@
* Command line configuration.
*/
-#ifdef CONFIG_DBAU1550
-
-#undef CONFIG_CMD_PCMCIA
-#endif
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index dfe9935..226c1d2 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -73,7 +73,6 @@
#define CONFIG_RMII
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0x1F
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
@@ -110,8 +109,6 @@
#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
-#define CONFIG_CMD_NAND
-
/*
* USB
*/
@@ -168,7 +165,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR 0x80008000
/*
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 5476961..2bf0983 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -32,8 +32,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
-#define CONFIG_NAND
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
@@ -62,11 +60,8 @@
/* SPI */
#undef CONFIG_SPI
-#undef CONFIG_OMAP3_SPI
/* I2C */
-#undef CONFIG_SYS_I2C_OMAP24XX
-#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 */
#define CONFIG_TWL4030_LED 1
@@ -90,9 +85,6 @@
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
-/* commands to include */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
-
#undef CONFIG_SUPPORT_RAW_INITRD
/* BOOTP/DHCP options */
@@ -214,9 +206,6 @@
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
/* SPL OS boot options */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
-#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
- 0x400000)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h
index 6748b9c..f7bd4a4 100644
--- a/include/configs/dfi-bt700.h
+++ b/include/configs/dfi-bt700.h
@@ -24,10 +24,6 @@
"stdout=serial\0" \
"stderr=serial\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
@@ -40,11 +36,7 @@
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ef000
-#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sda1 ro quiet"
#define CONFIG_BOOTCOMMAND \
"load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;" \
"load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;" \
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index 3e931ed..f816685 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -28,7 +28,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_MVFS
#define CONFIG_NR_DRAM_BANKS 1
diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h
index 15e3292..2389086 100644
--- a/include/configs/dockstar.h
+++ b/include/configs/dockstar.h
@@ -21,10 +21,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/*
- * Commands configuration
- */
-#define CONFIG_CMD_NAND
-/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 8566bdc..efe63da 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -112,12 +112,9 @@
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
#define CONFIG_MII /* Required in net/eth.c */
-#define CONFIG_PHY_GIGE /* per-board part of CPSW */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_TI
/* SPI */
-#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED 76800000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
@@ -154,7 +151,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST
@@ -212,9 +208,7 @@
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
diff --git a/include/configs/draco.h b/include/configs/draco.h
index ba6a430..2d8cf93 100644
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -40,7 +40,6 @@
#define EEPROM_ADDR_CHIP 0x120
#undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
#define CONFIG_FACTORYSET
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index d9dc639..2610358 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -49,7 +49,6 @@
/* Enable that for switching of boot partitions */
/* Disabled by default as some sub-commands can brick eMMC */
/*#define CONFIG_SUPPORT_EMMC_BOOT */
-#define CONFIG_CMD_TFTP
/* Partition table support */
#define HAVE_BLOCK_DEVICE /* Needed for partition commands */
@@ -59,9 +58,6 @@
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-/* Environment - Boot*/
-#define CONFIG_BOOTARGS "console=ttyMSM0,115200n8"
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 1) \
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index a209e6f..225d198 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -48,8 +48,6 @@
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
#define CONFIG_PCI_MVEBU
#define CONFIG_PCI_SCAN_SHOW
#endif
@@ -68,7 +66,6 @@
#if 0
#undef CONFIG_DM_USB
#define CONFIG_USB_XHCI_PCI
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if !defined(CONFIG_USB_XHCI_HCD)
@@ -127,7 +124,6 @@
/* Default Environment */
#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200"
#define CONFIG_LOADADDR 0x80000
#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */
#define CONFIG_PREBOOT "usb start; sf probe"
diff --git a/include/configs/duovero.h b/include/configs/duovero.h
index 8efcc94..c4496a7 100644
--- a/include/configs/duovero.h
+++ b/include/configs/duovero.h
@@ -25,8 +25,6 @@
#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index 16f65f3..158eea6 100644
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -121,11 +121,6 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
@@ -135,8 +130,6 @@
/* NAND Setup */
#ifdef CONFIG_SYS_USE_NAND
-#define CONFIG_CMD_NAND
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
index cabbe16..86fcea1 100644
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@@ -28,10 +28,6 @@
#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -53,7 +49,6 @@
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
#define CONFIG_PHY_SMSC 1
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
@@ -81,7 +76,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SCIF 1
#define CONFIG_CONS_SCIF0 1
diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index 92842e1..9170a94 100644
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -29,7 +29,6 @@
#define CONFIG_CMDLINE_TAG 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_BOOTARGS "root=/dev/nfs console=ttyAM0,115200 ip=dhcp"
#define CONFIG_BOOTFILE "edb93xx.img"
#define CONFIG_SYS_LDSCRIPT "board/cirrus/edb93xx/u-boot.lds"
diff --git a/include/configs/edison.h b/include/configs/edison.h
new file mode 100644
index 0000000..399fbc7
--- /dev/null
+++ b/include/configs/edison.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2017 Intel Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/ibmpc.h>
+
+/* Boot */
+#define CONFIG_BOOTCOMMAND "run bootcmd"
+
+/* DISK Partition support */
+#define CONFIG_RANDOM_UUID
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_CBSIZE 2048
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 128
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_AUTO_COMPLETE
+
+/* Memory */
+#define CONFIG_SYS_LOAD_ADDR 0x100000
+#define CONFIG_PHYSMEM
+
+#define CONFIG_NR_DRAM_BANKS 3
+
+#define CONFIG_SYS_STACK_SIZE (32 * 1024)
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
+
+#define CONFIG_SYS_MEMTEST_START 0x00100000
+#define CONFIG_SYS_MEMTEST_END 0x01000000
+
+/* Environment */
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART 0
+#define CONFIG_ENV_SIZE (64 * 1024)
+#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
+#define CONFIG_ENV_OFFSET_REDUND (6 * 1024 * 1024)
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/* PCI */
+#define CONFIG_CMD_PCI
+
+/* RTC */
+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
+#define CONFIG_RTC_MC146818
+
+#endif
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 31364c2..235b746 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -24,7 +24,6 @@
#define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff
#define CONFIG_SYS_SPL_MALLOC_START 0x00040000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
-#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/orion5x/u-boot-spl.lds"
#define CONFIG_SYS_UBOOT_BASE 0xfff90000
#define CONFIG_SYS_UBOOT_START 0x00800000
#define CONFIG_SYS_TEXT_BASE 0x00800000
diff --git a/include/configs/efi-x86.h b/include/configs/efi-x86.h
index f533191..fa26363 100644
--- a/include/configs/efi-x86.h
+++ b/include/configs/efi-x86.h
@@ -9,12 +9,9 @@
#include <configs/x86-common.h>
-#undef CONFIG_CMD_SF_TEST
-
#undef CONFIG_TPM_TIS_BASE_ADDRESS
#undef CONFIG_SCSI_AHCI
-#undef CONFIG_INTEL_ICH6_GPIO
#undef CONFIG_USB_EHCI_PCI
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 61f0c95..d1dec80 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -51,7 +51,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_SF
diff --git a/include/configs/espt.h b/include/configs/espt.h
index 1b32953..778e672 100644
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@@ -14,19 +14,12 @@
#define CONFIG_ESPT 1
#define __LITTLE_ENDIAN 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
@@ -92,7 +85,6 @@
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 1662dbf..c9584ad 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -98,7 +98,6 @@
#define EEPROM_ADDR_CHIP 0x120
#undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
#define CONFIG_FACTORYSET
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 4c0647b..ecd35e9 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -53,41 +53,14 @@
# define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */
# define CONFIG_EFLASH_PROTSECTORS 1
-/* 512kB DataFlash at NPCS0 */
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_HAS_DATAFLASH
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-#define CONFIG_ENV_OFFSET 0x3DE000
-#define CONFIG_ENV_SECT_SIZE (132 << 10)
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
- + CONFIG_ENV_OFFSET)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
- + 0x042000)
-
-/* SPI */
-#define CONFIG_ATMEL_SPI
-#define AT91_SPI_CLK 15000000
-
-/* Serial port */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART3 /* USART 3 is DBGU */
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
-/* Misc. hardware drivers */
-#define CONFIG_AT91_GPIO
-
-/* Command line configuration */
-#define CONFIG_CMD_NAND
+/* bootstrap + u-boot + env + linux in dataflash on CS0 */
+#define CONFIG_ENV_OFFSET 0x3DE000
+#define CONFIG_ENV_SIZE (132 << 10)
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
#ifndef MINIMAL_LOADER
-#define CONFIG_CMD_REISER
-#define CONFIG_CMD_SAVES
#endif
/* NAND flash */
@@ -188,13 +161,9 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_BOOTCOMMAND "cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm"
-#if defined(CONFIG_CMD_NAND)
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- MTDPARTS_DEFAULT \
- " rw rootfstype=jffs2"
-#endif
+#define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
+ "sf read 0x22000000 0xc6000 0x294000; " \
+ "bootm 0x22000000"
/* Misc. u-boot settings */
#define CONFIG_SYS_CBSIZE 256
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h
index c995f35..94fd3b3 100644
--- a/include/configs/exynos4-common.h
+++ b/include/configs/exynos4-common.h
@@ -20,10 +20,7 @@
/* SD/MMC configuration */
#define CONFIG_MMC_DEFAULT_DEV 0
-#undef CONFIG_CMD_ONENAND
-
/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 378219d..c90cc32 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -17,7 +17,6 @@
#ifdef FTRACE
#define CONFIG_TRACE
-#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
@@ -49,7 +48,6 @@
#define CONFIG_SUPPORT_EMMC_BOOT
/* specific .lds file */
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
/* Boot Argument Buffer Size */
/* memtest works on */
@@ -134,9 +132,6 @@
/* Enable Time Command */
/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index bd39111..d6bb9f6 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -8,9 +8,10 @@
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
- "stdin=serial,cros-ec-keyb\0" \
+ "stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
- "stderr=serial,vidconsole\0"
+ "stderr=serial,vidconsole\0" \
+ "preboot=usb start\0"
#include <configs/rk3288_common.h>
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index a09986d..5e5d044 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -67,8 +67,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
-#define CONFIG_CMD_NAND
-
#define CONFIG_NET_RETRY_COUNT 100
@@ -79,8 +77,6 @@
*/
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_MII
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 5e04dd2..d090cdd 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -94,7 +94,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#endif
@@ -299,7 +298,6 @@
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
-#undef CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index 7fdadab..aaa336e 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -43,7 +43,6 @@
* Commands configuration
*/
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_MVFS /* Picks up Filesystem from mv-common.h */
/*
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 8a1d6d3..610ba1a 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -38,7 +38,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE 0x20000000
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* FLASH */
#define CONFIG_SPI
@@ -51,8 +50,6 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index ff2b9c6..aeacd46 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -12,12 +12,9 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
/* Falcon Mode */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - NAND support: args@17MB kernel@18MB */
-#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
@@ -69,8 +66,6 @@
#elif defined(CONFIG_SPL_NAND_SUPPORT)
/* Enable NAND support */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -118,7 +113,6 @@
/*
* PCI express
*/
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index fea4044..def9e21 100644
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -121,8 +121,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
-
#define CONFIG_USB_DEV_PULLUP_GPIO 33
/* USB VBUS GPIO 3 */
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index cc31219..75bc503 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -27,7 +27,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_HARMONY
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/hikey.h b/include/configs/hikey.h
index 8b2d012..f12f13c 100644
--- a/include/configs/hikey.h
+++ b/include/configs/hikey.h
@@ -86,9 +86,6 @@
* Defines where the kernel and FDT will be put in RAM
*/
-/* Assume we boot with root on the seventh partition of eMMC */
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 1) \
@@ -106,9 +103,6 @@
/* Preserve environment on sd card */
#define CONFIG_ENV_SIZE 0x1000
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "1:1"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* Monitor Command Prompt */
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index c5b6fdd..565a5aa 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -509,7 +509,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h
index 68900ac..3a90eea 100644
--- a/include/configs/hsdk.h
+++ b/include/configs/hsdk.h
@@ -60,16 +60,11 @@
* Environment settings
*/
#define CONFIG_ENV_SIZE SZ_16K
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
-#define CONFIG_FAT_WRITE
/*
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index 0748a4e..26dbe53 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -30,7 +30,6 @@
* Commands configuration
*/
#define CONFIG_SYS_MVFS
-#define CONFIG_CMD_NAND
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 02d5b2c..0c22ca8 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -411,7 +411,6 @@
/*
* U-Boot environment setup
*/
-#define CONFIG_CMD_NAND
#define CONFIG_CMDLINE_EDITING
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
@@ -467,7 +466,6 @@
#define CONFIG_PREBOOT "echo;" \
"echo Type \\\"run nfsboot\\\" " \
"to mount root filesystem over NFS;echo"
-#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND "run boot_cramfs"
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
@@ -524,7 +522,6 @@
"bootm ${loadaddr} - ${fdtaddr}"
/* UBI Support */
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_MTD_PARTITIONS
/* bootcount support */
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 01c5cc4..e2b6fca 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -150,12 +150,6 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LONGHELP
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_NAND
-
-
#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 95cb810..c1e9f5d 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -30,7 +30,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -145,7 +144,6 @@
#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
/* NAND stuff */
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 9537112..cdb3a37 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -24,7 +24,6 @@
* and some padding thus 'our' max size is really 0x00908000 - 0x00918000
* or 64KB
*/
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x00908000
#define CONFIG_SPL_MAX_SIZE 0x10000
#define CONFIG_SPL_STACK 0x0091FFB8
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index ae83994..ceb9096 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -31,7 +31,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAM0 console=tty"
#define CONFIG_BOOTCOMMAND ""
/* Flash settings */
@@ -43,8 +42,6 @@
* PCI definitions
*/
-#define CONFIG_CMD_PCI
-
#define CONFIG_TULIP
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 8c9ad6c..b1f98ee 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -31,7 +31,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
#define CONFIG_BOOTCOMMAND "tftpboot ; bootm"
#define CONFIG_SERVERIP 192.168.1.100
#define CONFIG_IPADDR 192.168.1.104
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 7f1f3cc..d2fc81b 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -236,11 +236,6 @@
"nand write c0000100 180000 20000\0" \
"\0"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
@@ -248,9 +243,6 @@
#ifndef CONFIG_DRIVER_TI_EMAC
#endif
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
@@ -269,7 +261,6 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-ipam390.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_SIZE 0x20000
@@ -282,11 +273,8 @@
GENERATED_GBL_DATA_SIZE)
/* add FALCON boot mode */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
#define CONFIG_SYS_SPL_ARGS_ADDR LINUX_BOOT_PARAM_ADDR
-#define CONFIG_CMD_SPL_NAND_OFS 0x00180000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400
/* GPIO support */
#define CONFIG_DA8XX_GPIO
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index acc9726..b35f358 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -40,7 +40,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index 1117e5e..6341609 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -84,13 +84,9 @@
#define CONFIG_KSNET_NETCP_V1_5
#define CONFIG_KSNET_CPSW_NUM_PORTS 2
#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
-#define CONFIG_PHY_MICREL
#define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */
#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_SF_DEFAULT_BUS 1
#define CONFIG_SF_DEFAULT_CS 0
diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index f040d0b..36c01c0 100644
--- a/include/configs/kc1.h
+++ b/include/configs/kc1.h
@@ -60,7 +60,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_I2C_MULTI_BUS
/*
@@ -89,8 +88,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
/*
* Console
*/
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 1e33328..8e827d0 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -12,8 +12,6 @@
#undef CONFIG_WATCHDOG /* disable platform specific watchdog */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h
index 0bd4279..810b23e 100644
--- a/include/configs/km/km83xx-common.h
+++ b/include/configs/km/km83xx-common.h
@@ -219,10 +219,6 @@
#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
#endif
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#endif
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 04afde7..42a6032 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -36,8 +36,6 @@
/* include common defines/options for all Keymile boards */
#include "keymile-common.h"
-#define CONFIG_CMD_NAND
-
/* SPI NOR Flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED 8100000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 373e4bc..0727106 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -152,7 +152,6 @@
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_BCH
@@ -347,9 +346,7 @@
/* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */
#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11
#define CONFIG_SYS_TBIPA_VALUE 8
-#define CONFIG_PHYLIB /* recommended PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC5"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
/*
* Environment
@@ -368,7 +365,6 @@
/*
* additionnal command line configuration.
*/
-#define CONFIG_CMD_PCI
/* we don't need flash support */
#undef CONFIG_FLASH_CFI_MTD
diff --git a/include/configs/km8360.h b/include/configs/km8360.h
index 3104a8f..9c1c158 100644
--- a/include/configs/km8360.h
+++ b/include/configs/km8360.h
@@ -21,7 +21,6 @@
#define CONFIG_HOSTNAME kmcoge5ne
#define CONFIG_KM_BOARD_NAME "kmcoge5ne"
#define CONFIG_KM_DEF_NETDEV "netdev=eth1\0"
-#define CONFIG_CMD_NAND
#define CONFIG_NAND_ECC_BCH
#define CONFIG_BCH
#define CONFIG_NAND_KMETER1
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 2166e2c..b9214d2 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -38,7 +38,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* FLASH */
#define CONFIG_SPI
@@ -51,8 +50,6 @@
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index f434991..4daeb49 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -23,8 +23,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200"
-
#undef CONFIG_SHOW_BOOT_PROGRESS
/* MEMORY */
@@ -49,7 +47,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF4
#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index d5fe7df..41b4107 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -144,8 +144,6 @@
/*
* Default environment variables
*/
-#define CONFIG_BOOTARGS "console=ttyS0,115200"
-
#define CONFIG_BOOTCOMMAND \
"dhcp && run netconsole; " \
"if run usbload || run diskload; then bootm; fi"
diff --git a/include/configs/lager.h b/include/configs/lager.h
index bf1352d..291b03c 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -38,7 +38,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* SPI */
#define CONFIG_SPI
@@ -52,8 +51,6 @@
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 4ea61af..2e6147d 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -197,11 +197,6 @@
"loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \
"bootscript=source ${bootscraddr}\0" \
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
-
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
diff --git a/include/configs/lion_rk3368.h b/include/configs/lion_rk3368.h
new file mode 100644
index 0000000..4118ffd
--- /dev/null
+++ b/include/configs/lion_rk3368.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIGS_LION_RK3368_H
+#define __CONFIGS_LION_RK3368_H
+
+#include <configs/rk3368_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define KERNEL_LOAD_ADDR 0x280000
+#define DTB_LOAD_ADDR 0x5600000
+#define INITRD_LOAD_ADDR 0x5bf0000
+#define CONFIG_ENV_SIZE 0x2000
+
+#endif
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 76ee910..2cad644 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -153,7 +153,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 74af0b9..9d85341 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -101,8 +101,6 @@
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
"$kernel_start $kernel_size && "\
"bootm $kernel_load"
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index f6f88e8..6b1ba57 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -39,7 +39,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_CMD_MEMINFO
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 9e6c7a7..7bb65ab 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -115,6 +115,8 @@
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI_FSL
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
@@ -124,7 +126,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/* MMC */
@@ -137,7 +138,6 @@
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_CMD_SCSI
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
@@ -150,7 +150,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 0705bc5..e9edcd2 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -27,7 +27,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
@@ -53,7 +52,6 @@
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_CMD_SCSI
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
@@ -66,7 +64,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 1f2eb52..6ef7d63 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -26,7 +26,6 @@
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
@@ -77,7 +76,6 @@
#define CONFIG_SYS_FSL_PBL_RCW \
board/freescale/ls1021aiot/ls102xa_rcw_sd.cfg
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
@@ -143,7 +141,6 @@
#define CONFIG_FSL_ESDHC
/* SATA */
-#define CONFIG_CMD_SCSI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
@@ -200,8 +197,6 @@
#define CONFIG_ETHPRIME "eTSEC2"
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_HAS_ETH0
@@ -217,7 +212,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMD_PING
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 251a66e..b934d10 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -52,7 +52,6 @@
board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg
#endif
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
@@ -75,7 +74,6 @@
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
@@ -220,7 +218,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#endif
@@ -413,7 +410,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
@@ -458,8 +454,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_REALTEK
#define CONFIG_HAS_ETH0
@@ -481,7 +475,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMDLINE_TAG
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index b9e5cdb..0fecd54 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -50,7 +50,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
@@ -96,7 +95,6 @@
board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg
#endif
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#ifdef CONFIG_SECURE_BOOT
/*
@@ -336,8 +334,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_HAS_ETH0
@@ -351,11 +347,9 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#define CONFIG_CMDLINE_TAG
-#define CONFIG_CMDLINE_EDITING
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
@@ -367,17 +361,127 @@
#define CONFIG_FSL_DEVICE_DISABLE
+#include <config_distro_defaults.h>
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0)
+#include <config_distro_bootcmd.h>
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
"initrd_high=0xffffffff\0" \
- "fdt_high=0xffffffff\0"
+ "fdt_high=0xffffffff\0" \
+ "fdt_addr=0x64f00000\0" \
+ "kernel_addr=0x65000000\0" \
+ "scriptaddr=0x80000000\0" \
+ "scripthdraddr=0x80080000\0" \
+ "fdtheader_addr_r=0x80100000\0" \
+ "kernelheader_addr_r=0x80200000\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "fdt_addr_r=0x90000000\0" \
+ "ramdisk_addr_r=0xa0000000\0" \
+ "load_addr=0xa0000000\0" \
+ "kernel_size=0x2800000\0" \
+ BOOTENV \
+ "boot_scripts=ls1021atwr_boot.scr\0" \
+ "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \
+ "scan_dev_for_boot_part=" \
+ "part list ${devtype} ${devnum} devplist; " \
+ "env exists devplist || setenv devplist 1; " \
+ "for distro_bootpart in ${devplist}; do " \
+ "if fstype ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "bootfstype; then " \
+ "run scan_dev_for_boot; " \
+ "fi; " \
+ "done\0" \
+ "scan_dev_for_boot=" \
+ "echo Scanning ${devtype} " \
+ "${devnum}:${distro_bootpart}...; " \
+ "for prefix in ${boot_prefixes}; do " \
+ "run scan_dev_for_scripts; " \
+ "done;" \
+ "\0" \
+ "boot_a_script=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${scriptaddr} ${prefix}${script}; " \
+ "env exists secureboot && load ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "${scripthdraddr} ${prefix}${boot_script_hdr} " \
+ "&& esbc_validate ${scripthdraddr};" \
+ "source ${scriptaddr}\0" \
+ "installer=load mmc 0:2 $load_addr " \
+ "/flex_installer_arm32.itb; " \
+ "bootm $load_addr#ls1021atwr\0" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
+ "sf probe && sf read $load_addr " \
+ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \
+ "nor_bootcmd=echo Trying load from nor..;" \
+ "cp.b $kernel_addr $load_addr " \
+ "$kernel_size && bootm $load_addr#$board\0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"initrd_high=0xffffffff\0" \
- "fdt_high=0xffffffff\0"
+ "fdt_high=0xffffffff\0" \
+ "fdt_addr=0x64f00000\0" \
+ "kernel_addr=0x65000000\0" \
+ "scriptaddr=0x80000000\0" \
+ "scripthdraddr=0x80080000\0" \
+ "fdtheader_addr_r=0x80100000\0" \
+ "kernelheader_addr_r=0x80200000\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "fdt_addr_r=0x90000000\0" \
+ "ramdisk_addr_r=0xa0000000\0" \
+ "load_addr=0xa0000000\0" \
+ "kernel_size=0x2800000\0" \
+ BOOTENV \
+ "boot_scripts=ls1021atwr_boot.scr\0" \
+ "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \
+ "scan_dev_for_boot_part=" \
+ "part list ${devtype} ${devnum} devplist; " \
+ "env exists devplist || setenv devplist 1; " \
+ "for distro_bootpart in ${devplist}; do " \
+ "if fstype ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "bootfstype; then " \
+ "run scan_dev_for_boot; " \
+ "fi; " \
+ "done\0" \
+ "scan_dev_for_boot=" \
+ "echo Scanning ${devtype} " \
+ "${devnum}:${distro_bootpart}...; " \
+ "for prefix in ${boot_prefixes}; do " \
+ "run scan_dev_for_scripts; " \
+ "done;" \
+ "\0" \
+ "boot_a_script=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${scriptaddr} ${prefix}${script}; " \
+ "env exists secureboot && load ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "${scripthdraddr} ${prefix}${boot_script_hdr} " \
+ "&& esbc_validate ${scripthdraddr};" \
+ "source ${scriptaddr}\0" \
+ "installer=load mmc 0:2 $load_addr " \
+ "/flex_installer_arm32.itb; " \
+ "bootm $load_addr#ls1021atwr\0" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
+ "sf probe && sf read $load_addr " \
+ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \
+ "nor_bootcmd=echo Trying load from nor..;" \
+ "cp.b $kernel_addr $load_addr " \
+ "$kernel_size && bootm $load_addr#$board\0"
+#endif
+
+#undef CONFIG_BOOTCOMMAND
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
+ "&& esbc_halt; run qspi_bootcmd;"
+#else
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
+ "&& esbc_halt; run nor_bootcmd;"
#endif
/*
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 32f7162..00af52d 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -66,7 +66,6 @@
/* SD boot SPL */
#ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x10000000
@@ -98,7 +97,6 @@
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PBL_PAD
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x10000000
#define CONFIG_SPL_MAX_SIZE 0x1a000
@@ -169,7 +167,6 @@
#ifdef CONFIG_PCI
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
#endif
@@ -259,28 +256,75 @@
"5m(kernel),1m(dtb),9m(file_system)"
#endif
+#include <config_distro_defaults.h>
+#ifndef CONFIG_SPL_BUILD
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0)
+#include <config_distro_bootcmd.h>
+#endif
+
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
- "loadaddr=0x80100000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x61100000\0" \
- "kernel_load=0xa0000000\0" \
+ "fdt_addr=0x64f00000\0" \
+ "kernel_addr=0x65000000\0" \
+ "scriptaddr=0x80000000\0" \
+ "scripthdraddr=0x80080000\0" \
+ "fdtheader_addr_r=0x80100000\0" \
+ "kernelheader_addr_r=0x80200000\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "fdt_addr_r=0x90000000\0" \
+ "load_addr=0xa0000000\0" \
"kernel_size=0x2800000\0" \
- "console=ttyS0,115200\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0"
+ "console=ttyS0,115200\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ BOOTENV \
+ "boot_scripts=ls1043ardb_boot.scr\0" \
+ "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
+ "scan_dev_for_boot_part=" \
+ "part list ${devtype} ${devnum} devplist; " \
+ "env exists devplist || setenv devplist 1; " \
+ "for distro_bootpart in ${devplist}; do " \
+ "if fstype ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "bootfstype; then " \
+ "run scan_dev_for_boot; " \
+ "fi; " \
+ "done\0" \
+ "scan_dev_for_boot=" \
+ "echo Scanning ${devtype} " \
+ "${devnum}:${distro_bootpart}...; " \
+ "for prefix in ${boot_prefixes}; do " \
+ "run scan_dev_for_scripts; " \
+ "done;\0" \
+ "boot_a_script=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${scriptaddr} ${prefix}${script}; " \
+ "env exists secureboot && load ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "${scripthdraddr} ${prefix}${boot_script_hdr} " \
+ "&& esbc_validate ${scripthdraddr};" \
+ "source ${scriptaddr}\0" \
+ "installer=load mmc 0:2 $load_addr " \
+ "/flex_installer_arm64.itb; " \
+ "bootm $load_addr#ls1043ardb\0" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
+ "sf probe && sf read $load_addr " \
+ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \
+ "nor_bootcmd=echo Trying load from nor..;" \
+ "cp.b $kernel_addr $load_addr " \
+ "$kernel_size && bootm $load_addr#$board\0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- MTDPARTS_DEFAULT
-
+#undef CONFIG_BOOTCOMMAND
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \
- "e0000 f00000 && bootm $kernel_load"
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
+ "&& esbc_halt; run qspi_bootcmd;"
#else
-#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \
- "$kernel_size && bootm $kernel_load"
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
+ "&& esbc_halt; run nor_bootcmd;"
#endif
#endif
@@ -292,8 +336,10 @@
#define CONFIG_SYS_LONGHELP
#ifndef SPL_NO_MISC
+#ifndef CONFIG_CMDLINE_EDITING
#define CONFIG_CMDLINE_EDITING 1
#endif
+#endif
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 415a705..af58e61 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -50,7 +50,6 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#define CONFIG_PHYLIB_10G
@@ -199,7 +198,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#endif
@@ -377,7 +375,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 59e7760..ca1d862 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -129,7 +129,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -250,8 +249,6 @@
#define AQR105_IRQ_MASK 0x40000000
#ifdef CONFIG_NET
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#endif
@@ -288,7 +285,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#endif
@@ -296,7 +292,6 @@
#ifndef SPL_NO_SATA
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
-#define CONFIG_CMD_SCSI
#ifndef CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT2
#endif
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 1b91676..b922139 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -64,7 +64,6 @@
/* SD boot SPL */
#ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
@@ -104,7 +103,6 @@
#ifdef CONFIG_NAND_BOOT
#define CONFIG_SPL_PBL_PAD
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
@@ -145,7 +143,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* Command line configuration */
@@ -201,24 +198,72 @@
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
+#include <config_distro_defaults.h>
+#ifndef CONFIG_SPL_BUILD
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0)
+#include <config_distro_bootcmd.h>
+#endif
+
#ifndef SPL_NO_MISC
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
- "loadaddr=0x80100000\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
+ "fdt_addr=0x64f00000\0" \
+ "kernel_addr=0x65000000\0" \
+ "scriptaddr=0x80000000\0" \
+ "scripthdraddr=0x80080000\0" \
+ "fdtheader_addr_r=0x80100000\0" \
+ "kernelheader_addr_r=0x80200000\0" \
+ "load_addr=0xa0000000\0" \
+ "kernel_addr_r=0x81000000\0" \
+ "fdt_addr_r=0x90000000\0" \
+ "ramdisk_addr_r=0xa0000000\0" \
"kernel_start=0x1000000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"console=ttyS0,115200\0" \
- MTDPARTS_DEFAULT "\0"
+ MTDPARTS_DEFAULT "\0" \
+ BOOTENV \
+ "boot_scripts=ls1046ardb_boot.scr\0" \
+ "boot_script_hdr=hdr_ls1046ardb_bs.out\0" \
+ "scan_dev_for_boot_part=" \
+ "part list ${devtype} ${devnum} devplist; " \
+ "env exists devplist || setenv devplist 1; " \
+ "for distro_bootpart in ${devplist}; do " \
+ "if fstype ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "bootfstype; then " \
+ "run scan_dev_for_boot; " \
+ "fi; " \
+ "done\0" \
+ "scan_dev_for_boot=" \
+ "echo Scanning ${devtype} " \
+ "${devnum}:${distro_bootpart}...; " \
+ "for prefix in ${boot_prefixes}; do " \
+ "run scan_dev_for_scripts; " \
+ "done;" \
+ "\0" \
+ "boot_a_script=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${scriptaddr} ${prefix}${script}; " \
+ "env exists secureboot && load ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "${scripthdraddr} ${prefix}${boot_script_hdr} " \
+ "&& esbc_validate ${scripthdraddr};" \
+ "source ${scriptaddr}\0" \
+ "installer=load mmc 0:2 $load_addr " \
+ "/flex_installer_arm64.itb; " \
+ "bootm $load_addr#ls1046ardb\0" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
+ "sf probe && sf read $load_addr " \
+ "$kernel_start $kernel_size && bootm $load_addr#$board\0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- MTDPARTS_DEFAULT
#endif
/* Monitor Command Prompt */
@@ -228,10 +273,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP
-#ifndef SPL_NO_MISC
-#define CONFIG_CMDLINE_EDITING 1
-#endif
-
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index ea99676..ef2f47c 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -70,7 +70,6 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#define CONFIG_PHYLIB_10G
@@ -144,8 +143,6 @@
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
@@ -254,7 +251,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
#endif
@@ -462,6 +458,7 @@
#define CONFIG_CMDLINE_TAG
+#undef CONFIG_BOOTCOMMAND
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \
"e0000 f00000 && bootm $kernel_load"
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 20a5e7f..b9f27bb 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -95,7 +95,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -181,8 +180,6 @@
#ifndef SPL_NO_FMAN
#ifdef CONFIG_NET
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#define CONFIG_PHY_REALTEK
#endif
@@ -220,8 +217,6 @@
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
#endif
@@ -241,10 +236,9 @@
#endif
#ifndef SPL_NO_MISC
-#define CONFIG_BOOTCOMMAND "sf probe 0:0;sf read $kernel_load" \
- "$kernel_start $kernel_size;" \
- "bootm $kernel_load"
-
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; env exists secureboot" \
+ "&& esbc_halt; run qspi_bootcmd;"
#define MTDPARTS_DEFAULT "mtdparts=1550000.quadspi:1m(rcw)," \
"15m(u-boot),48m(kernel.itb);" \
"7e800000.flash:16m(nand_uboot)," \
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 6ae5586..20cfc25 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -33,7 +33,7 @@
#define CONFIG_SYS_TEXT_BASE 0x20100000
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
-#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_SECT_SIZE 0x40000
#endif
#define CONFIG_SUPPORT_RAW_INITRD
@@ -203,10 +203,6 @@
"mcinitcmd=fsl_mc start mc 0x580a00000" \
" 0x580e00000 \0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0500 " \
- "ramdisk_size=0x2000000 default_hugepagesz=2m" \
- " hugepagesz=2m hugepages=256"
#ifdef CONFIG_SD_BOOT
#define CONFIG_BOOTCOMMAND "mmc read 0x80200000 0x6800 0x800;"\
" fsl_mc apply dpl 0x80200000 &&" \
@@ -233,7 +229,6 @@
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 0x16000
#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h
index 02589be..dad1090 100644
--- a/include/configs/ls2080a_simu.h
+++ b/include/configs/ls2080a_simu.h
@@ -110,7 +110,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 929ae32..dcd1b0c 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -154,7 +154,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
@@ -236,7 +235,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024)
#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_ENV_OFFSET 0x200000
+#define CONFIG_ENV_OFFSET 0x300000
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x20000
#endif
@@ -343,7 +342,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* MMC */
@@ -407,7 +405,6 @@
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
#define CONFIG_FSL_MEMAC
-#define CONFIG_PHYLIB
#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
@@ -436,7 +433,6 @@
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
@@ -446,7 +442,6 @@
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#include <asm/fsl_secure_boot.h>
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 0be4c4f..145b285 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -163,7 +163,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
#define CONFIG_FSL_QIXIS /* use common QIXIS code */
@@ -329,7 +328,6 @@
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI
#endif
/* MMC */
@@ -346,7 +344,6 @@
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#undef CONFIG_CMDLINE_EDITING
#include <config_distro_defaults.h>
@@ -358,95 +355,105 @@
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
+#ifdef CONFIG_QSPI_BOOT
+#define MC_INIT_CMD \
+ "mcinitcmd=env exists secureboot && " \
+ "esbc_validate 0x20700000 && " \
+ "esbc_validate 0x20740000;" \
+ "fsl_mc start mc 0x20a00000 0x20e00000 \0"
+#else
+#define MC_INIT_CMD \
+ "mcinitcmd=env exists secureboot && " \
+ "esbc_validate 0x580700000 && " \
+ "esbc_validate 0x580740000; " \
+ "fsl_mc start mc 0x580a00000 0x580e00000 \0"
+#endif
+
/* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS
-#ifdef CONFIG_SECURE_BOOT
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
- "scriptaddr=0x80800000\0" \
- "kernel_addr_r=0x81000000\0" \
- "pxefile_addr_r=0x81000000\0" \
- "fdt_addr_r=0x88000000\0" \
- "ramdisk_addr_r=0x89000000\0" \
- "loadaddr=0x80100000\0" \
- "kernel_addr=0x100000\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"fdt_high=0xa0000000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581000000\0" \
- "kernel_load=0xa0000000\0" \
- "kernel_size=0x2800000\0" \
- "mcmemsize=0x40000000\0" \
- "fdtfile=fsl-ls2080a-rdb.dtb\0" \
- "mcinitcmd=esbc_validate 0x580700000;" \
- "esbc_validate 0x580740000;" \
- "fsl_mc start mc 0x580a00000" \
- " 0x580e00000 \0" \
- BOOTENV
-#else
-#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "hwconfig=fsl_ddr:bank_intlv=auto\0" \
- "scriptaddr=0x80800000\0" \
+ "fdt_addr=0x64f00000\0" \
+ "kernel_addr=0x65000000\0" \
+ "kernel_start=0x1000000\0" \
+ "kernelheader_start=0x800000\0" \
+ "scriptaddr=0x80000000\0" \
+ "scripthdraddr=0x80080000\0" \
+ "fdtheader_addr_r=0x80100000\0" \
+ "kernelheader_addr_r=0x80200000\0" \
+ "kernelheader_addr=0x580800000\0" \
"kernel_addr_r=0x81000000\0" \
- "pxefile_addr_r=0x81000000\0" \
- "fdt_addr_r=0x88000000\0" \
- "ramdisk_addr_r=0x89000000\0" \
- "loadaddr=0x80100000\0" \
- "kernel_addr=0x100000\0" \
- "ramdisk_size=0x2000000\0" \
- "fdt_high=0xa0000000\0" \
- "initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x21000000\0" \
- "mcmemsize=0x40000000\0" \
- "mcinitcmd=fsl_mc start mc 0x20a00000" \
- " 0x20e00000 \0" \
- BOOTENV
-#else
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "hwconfig=fsl_ddr:bank_intlv=auto\0" \
- "scriptaddr=0x80800000\0" \
- "kernel_addr_r=0x81000000\0" \
- "pxefile_addr_r=0x81000000\0" \
- "fdt_addr_r=0x88000000\0" \
- "ramdisk_addr_r=0x89000000\0" \
- "loadaddr=0x80100000\0" \
- "kernel_addr=0x100000\0" \
- "ramdisk_addr=0x800000\0" \
- "ramdisk_size=0x2000000\0" \
- "fdt_high=0xa0000000\0" \
- "initrd_high=0xffffffffffffffff\0" \
- "kernel_start=0x581000000\0" \
- "kernel_load=0xa0000000\0" \
+ "kernelheader_size=0x40000\0" \
+ "fdt_addr_r=0x90000000\0" \
+ "load_addr=0xa0000000\0" \
"kernel_size=0x2800000\0" \
- "mcmemsize=0x40000000\0" \
- "fdtfile=fsl-ls2080a-rdb.dtb\0" \
- "mcinitcmd=fsl_mc start mc 0x580a00000" \
- " 0x580e00000 \0" \
- BOOTENV
-#endif
-#endif
-
-
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS "console=ttyS1,115200 root=/dev/ram0 " \
- "earlycon=uart8250,mmio,0x21c0600 " \
- "ramdisk_size=0x2000000 default_hugepagesz=2m" \
- " hugepagesz=2m hugepages=256"
+ "console=ttyAMA0,38400n8\0" \
+ MC_INIT_CMD \
+ BOOTENV \
+ "boot_scripts=ls2088ardb_boot.scr\0" \
+ "boot_script_hdr=hdr_ls2088ardb_bs.out\0" \
+ "scan_dev_for_boot_part=" \
+ "part list ${devtype} ${devnum} devplist; " \
+ "env exists devplist || setenv devplist 1; " \
+ "for distro_bootpart in ${devplist}; do " \
+ "if fstype ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "bootfstype; then " \
+ "run scan_dev_for_boot; " \
+ "fi; " \
+ "done\0" \
+ "scan_dev_for_boot=" \
+ "echo Scanning ${devtype} " \
+ "${devnum}:${distro_bootpart}...; " \
+ "for prefix in ${boot_prefixes}; do " \
+ "run scan_dev_for_scripts; " \
+ "done;\0" \
+ "boot_a_script=" \
+ "load ${devtype} ${devnum}:${distro_bootpart} " \
+ "${scriptaddr} ${prefix}${script}; " \
+ "env exists secureboot && load ${devtype} " \
+ "${devnum}:${distro_bootpart} " \
+ "${scripthdraddr} ${prefix}${boot_script_hdr} " \
+ "&& esbc_validate ${scripthdraddr};" \
+ "source ${scriptaddr}\0" \
+ "installer=load mmc 0:2 $load_addr " \
+ "/flex_installer_arm64.itb; " \
+ "bootm $load_addr#ls2088ardb\0" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
+ "sf probe && sf read $load_addr " \
+ "$kernel_start $kernel_size ; env exists secureboot &&" \
+ "sf read $kernelheader_addr_r $kernelheader_start " \
+ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
+ " bootm $load_addr#$board\0" \
+ "nor_bootcmd=echo Trying load from nor..;" \
+ "cp.b $kernel_addr $load_addr " \
+ "$kernel_size ; env exists secureboot && " \
+ "cp.b $kernelheader_addr $kernelheader_addr_r " \
+ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
+ "bootm $load_addr#$board\0"
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_QSPI_BOOT
/* Try to boot an on-QSPI kernel first, then do normal distro boot */
-#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x20d00000" \
- " && bootm $kernel_start" \
- " || run distro_bootcmd"
+#define CONFIG_BOOTCOMMAND \
+ "env exists mcinitcmd && env exists secureboot "\
+ "&& esbc_validate 0x20780000; " \
+ "env exists mcinitcmd && " \
+ "fsl_mc lazyapply dpl 0x20d00000; " \
+ "run distro_bootcmd;run qspi_bootcmd; " \
+ "env exists secureboot && esbc_halt; "
#else
/* Try to boot an on-NOR kernel first, then do normal distro boot */
-#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \
- " && cp.b $kernel_start $kernel_load $kernel_size" \
- " && bootm $kernel_load" \
- " || run distro_bootcmd"
+#define CONFIG_BOOTCOMMAND \
+ "env exists mcinitcmd && env exists secureboot "\
+ "&& esbc_validate 0x580780000; env exists mcinitcmd "\
+ "&& fsl_mc lazyapply dpl 0x580d00000;" \
+ "run distro_bootcmd;run nor_bootcmd; " \
+ "env exists secureboot && esbc_halt; "
#endif
/* MAC/PHY configuration */
@@ -454,7 +461,6 @@
#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_AQUANTIA
#define CONFIG_PHY_CORTINA
-#define CONFIG_PHYLIB
#define CONFIG_SYS_CORTINA_FW_IN_NOR
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_CORTINA_FW_ADDR 0x20980000
@@ -475,7 +481,6 @@
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE
#define CONFIG_PHY_AQUANTIA
#endif
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 8b94412..7cbbe87 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -71,7 +71,6 @@
*/
#define CONFIG_LOADADDR 0x00800000
#define CONFIG_BOOTCOMMAND "run bootcmd_${bootsource}"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/sda2"
#if defined(CONFIG_LSXHL)
#define CONFIG_FDTFILE "kirkwood-lsxhl.dtb"
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 14874a5..4fcf480 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -13,10 +13,6 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-/* U-Boot Commands */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
@@ -106,7 +102,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index f4fcbd3..4dc6e16 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -18,12 +18,6 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
/*
- * U-Boot Commands
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
-/*
* Memory configurations
*/
#define CONFIG_NR_DRAM_BANKS 2
@@ -122,8 +116,6 @@
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_ETHPRIME "FEC0"
#endif
@@ -198,7 +190,6 @@
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttymxc1,115200"
#define CONFIG_LOADADDR 0x70800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 2744efb..50b21c9 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -11,7 +11,6 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#include "at91-sama5_common.h"
-#undef CONFIG_BOOTARGS
#define CONFIG_SYS_USE_SERIALFLASH 1
#define CONFIG_BOARD_LATE_INIT
@@ -96,7 +95,6 @@
* USB
*/
#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* USB device */
#define CONFIG_USB_ETHER
@@ -114,7 +112,6 @@
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS3,115200"
#define CONFIG_LOADADDR 0x20800000
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -215,7 +212,6 @@
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
#define CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 8eb6d7a..b0b9664 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -100,7 +100,6 @@
/*
* Commands
*/
-#define CONFIG_CMD_PCI
#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index a4c1035..7ea9839 100644
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -108,9 +108,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 73fdfbd..7047e3f 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -74,21 +74,18 @@
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
/* commands to include */
-#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
/* RTC */
#define CONFIG_RTC_DS1337
@@ -252,7 +249,6 @@
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_NAND
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
@@ -288,7 +284,6 @@
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index e007370..2caa8ff 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -20,7 +20,6 @@
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 63d3fdc..f256dcb 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -49,14 +49,6 @@
* Hardware drivers
*/
-/* general purpose I/O */
-#define CONFIG_AT91_GPIO
-
-/* Console output */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
/*
* BOOTP options
*/
@@ -66,17 +58,6 @@
#define CONFIG_BOOTP_HOSTNAME
/*
- * Command line configuration.
- */
-
-#ifdef CONFIG_SYS_USE_NANDFLASH
-#define CONFIG_CMD_NAND
-#endif
-
-/* LED */
-#define CONFIG_AT91_LED
-
-/*
* SDRAM: 1 bank, min 32, max 128 MB
* Initialized before u-boot gets started.
*/
@@ -97,18 +78,7 @@
* that address while providing maximum stack area below.
*/
#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-/* DataFlash */
-#ifdef CONFIG_SYS_USE_DATAFLASH
-# define CONFIG_ATMEL_DATAFLASH_SPI
-# define CONFIG_HAS_DATAFLASH
-# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-# define AT91_SPI_CLK 15000000
-# define DATAFLASH_TCSS (0x1a << 16)
-# define DATAFLASH_TCHS (0x1 << 24)
-#endif
+ (ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
@@ -134,12 +104,10 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env in dataflash on CS0 */
-# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
- 0x8400)
-# define CONFIG_ENV_OFFSET 0x4200
-# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
- CONFIG_ENV_OFFSET)
-# define CONFIG_ENV_SIZE 0x4200
+#define CONFIG_ENV_OFFSET 0x4200
+#define CONFIG_ENV_SIZE 0x4200
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
#elif CONFIG_SYS_USE_NANDFLASH
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index aa007e2..e190493 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -160,25 +160,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_MFSL
-
-#if defined(FLASH)
-# if !defined(RAMENV)
-# define CONFIG_CMD_SAVES
-# endif
-
-#else
-#if defined(SPIFLASH)
-
-# if !defined(RAMENV)
-# define CONFIG_CMD_SAVES
-# endif
-#endif
-#endif
-
#if defined(CONFIG_CMD_JFFS2)
# define CONFIG_MTD_PARTITIONS
#endif
@@ -210,7 +191,6 @@
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0
-#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME XILINX_BOARD_NAME
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
@@ -238,15 +218,12 @@
#if defined(CONFIG_XILINX_AXIEMAC)
# define CONFIG_MII 1
-# define CONFIG_PHY_GIGE 1
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
# define CONFIG_PHY_ATHEROS 1
# define CONFIG_PHY_BROADCOM 1
# define CONFIG_PHY_DAVICOM 1
# define CONFIG_PHY_LXT 1
# define CONFIG_PHY_MARVELL 1
-# define CONFIG_PHY_MICREL 1
-# define CONFIG_PHY_MICREL_KSZ9021
# define CONFIG_PHY_NATSEMI 1
# define CONFIG_PHY_REALTEK 1
# define CONFIG_PHY_VITESSE 1
@@ -255,11 +232,8 @@
#endif
/* SPL part */
-#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
-
#ifdef CONFIG_SYS_FLASH_BASE
# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#endif
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index ae95485..5b1660c 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -15,16 +15,12 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
-#define CONFIG_SMSC_LPC47M
#define CONFIG_MISC_INIT_R
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \
"stdout=vidconsole,serial\0" \
- "stderr=vidconsole,serial\0"
-
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
+ "stderr=vidconsole,serial\0" \
+ "usb_pgood_delay=40\0"
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index cd5971d..755e05d 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -382,7 +382,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h
index 5b37277..edaca0e 100644
--- a/include/configs/mpr2.h
+++ b/include/configs/mpr2.h
@@ -13,7 +13,6 @@
/* Supported commands */
/* Default environment variables */
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
@@ -64,7 +63,6 @@
#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
/* UART */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#endif /* __MPR2_H */
diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h
index 850a8cc..cc3217b 100644
--- a/include/configs/ms7720se.h
+++ b/include/configs/ms7720se.h
@@ -12,10 +12,6 @@
#define CONFIG_CPU_SH7720 1
#define CONFIG_MS7720SE 1
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_PCMCIA
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000
@@ -38,7 +34,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CONFIG_SYS_MEMTEST_START MS7720SE_SDRAM_BASE
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index f456bf6..2fec968 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -12,10 +12,6 @@
#define CONFIG_CPU_SH7722 1
#define CONFIG_MS7722SE 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -37,7 +33,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h
index 8ea431e..5410cbb 100644
--- a/include/configs/ms7750se.h
+++ b/include/configs/ms7750se.h
@@ -20,10 +20,8 @@
/*
* Command line configuration.
*/
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF1 1
-#define CONFIG_BOOTARGS "console=ttySC0,38400"
#define CONFIG_ENV_OVERWRITE 1
/* SDRAM */
diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
index 778cc9e..71975ed 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -88,19 +88,11 @@
*/
#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
#define CONFIG_PHY_MARVELL
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
- CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index 53db10f..633218c 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -93,18 +93,10 @@
* Ethernet Driver configuration
*/
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
-#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
-/* USB 2.0 */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* USB 3.0 */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
-
-#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
- CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER
@@ -134,7 +126,6 @@
*/
#ifdef CONFIG_PCIE_DW_MVEBU
#define CONFIG_E1000
-#define CONFIG_CMD_PCI
#endif
#endif /* _CONFIG_MVEBU_ARMADA_8K_H */
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 66a310c..2d43f68 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -15,11 +15,6 @@
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
-/* U-Boot Commands */
-
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 7ed9012..2bb24a1 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -26,7 +26,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_TEXT_BASE 0x87dc0000
@@ -69,12 +68,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_CMD_NAND
-
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 9ae3d18..526f794 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -77,8 +77,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
-#define CONFIG_CMD_NAND
-
#define CONFIG_NET_RETRY_COUNT 100
@@ -195,7 +193,6 @@
#define CONFIG_SYS_NAND_LARGEPAGE
/* EHCI driver */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_EHCI_MXC
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index ccbac6a..1f1c45e 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -33,7 +33,6 @@
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_USE_FLASH_BBT
-#define CONFIG_CMD_NAND
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 32e898e..5930f59 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -37,7 +37,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index b3638d5..b849eea 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -28,7 +28,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_SF
diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index 900e2a9..03ab812 100644
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -34,9 +34,7 @@
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
@@ -69,10 +67,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
-/* NAND flash command */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* NAND stuff */
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 27e7672..5410881 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -24,9 +24,7 @@
/* Falcon Mode */
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
@@ -38,7 +36,6 @@
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 98797b0..cd9f0b0 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -39,7 +39,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 3468b49..e377c0f 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -118,10 +118,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
-/* NAND flash command */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* NAND stuff */
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -145,7 +141,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_USB
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 319fed4..36f0ec4 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -163,7 +163,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_USB
@@ -175,7 +174,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index c9b7e7b..47379ca 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -206,9 +206,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#endif
#define CONFIG_ETHPRIME "FEC"
-
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#endif
#define CONFIG_IMX_THERMAL
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 4345332..fec7e81 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -26,7 +26,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
#define CONFIG_PHY_BROADCOM
/* ENET1 */
#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
@@ -191,9 +190,6 @@
* to support nand, since emmc has pin conflicts with nand
*/
#ifdef CONFIG_NAND_MXS
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 041dcde..804b9e1 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -46,7 +46,6 @@
/* SPL */
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
/* Memory sizes */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index 52db421..089263f 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -41,7 +41,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_NAND
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index a1a0cda..bc17b51 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -65,9 +65,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
/* USB Configs */
#define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 9826514..a072708 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -102,17 +102,9 @@
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
-#ifdef ONENAND_SUPPORT
-
-#define CONFIG_CMD_ONENAND /* ONENAND support */
-
-#endif
-
-#define CONFIG_OMAP3_SPI
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 2bba741..7c5445d 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -17,7 +17,6 @@
#include "mx6_common.h"
/* U-Boot Commands */
-#define CONFIG_CMD_PCI
/* U-Boot general configurations */
@@ -39,7 +38,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttymxc1,115200 "
#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run net_nfs"
#define CONFIG_HOSTNAME novena
@@ -72,9 +70,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x7
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#define CONFIG_ARP_TIMEOUT 200UL
#endif
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index 2342f74..896c329 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -70,7 +70,6 @@
#define CONFIG_NET_MULTI
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 1
-#define CONFIG_PHY_GIGE
#define CONFIG_RESET_PHY_R
#endif /* CONFIG_CMD_NET */
diff --git a/include/configs/nsim.h b/include/configs/nsim.h
index 4490663..b51ac6e 100644
--- a/include/configs/nsim.h
+++ b/include/configs/nsim.h
@@ -49,7 +49,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyARC0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 9552c96..84e5d0b 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -43,7 +43,6 @@
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
@@ -184,7 +183,6 @@
/* USB */
#define CONFIG_USB_EHCI_EXYNOS
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 697f8d2..8bc7fbd 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -48,7 +48,6 @@
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_USB_FUNCTION_THOR
-#define CONFIG_CMD_THOR_DOWNLOAD
/* UMS */
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 4422d5e..33d29b5 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -58,7 +58,6 @@
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
@@ -71,8 +70,6 @@
"1920k(u-boot),128k(u-boot-env),"\
"4m(kernel),-(fs)"
-#define CONFIG_CMD_NAND /* NAND support */
-
#define CONFIG_VIDEO_OMAP3 /* DSS Support */
/*
@@ -258,8 +255,6 @@
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND
@@ -279,9 +274,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index 7e1f475..560e500 100644
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -36,8 +36,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-#define CONFIG_NAND
-
#include <configs/ti_omap3_common.h>
#define CONFIG_MISC_INIT_R
@@ -51,11 +49,6 @@
/* Probe all devices */
#define CONFIG_SYS_I2C_NOPROBES { {0x0, 0x0} }
-#define CONFIG_NAND
-
-/* commands to include */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK
-
/*
* TWL4030
*/
@@ -183,8 +176,6 @@
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-#define CONFIG_OMAP3_SPI
-
/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND
@@ -203,9 +194,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* env defaults */
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 15eb08b..9930483 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -14,356 +14,138 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-/* ----------------------------------------------------------------------------
- * Supported U-Boot commands
- * ----------------------------------------------------------------------------
- */
-
-#define CONFIG_CMD_NAND
-
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
-
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#include <configs/ti_omap3_common.h>
/*
- * High level configuration options
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
*/
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-/*
- * Clock related definitions
- */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE (128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
-
-/*
- * PISMO support
- */
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET 0x260000
-#define SMNAND_ENV_OFFSET 0x260000
-
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-
-/*
- * NAND
- */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE 0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
-
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
+#define CONFIG_SPL_FRAMEWORK
#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE 512
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD */
+#define CONFIG_SYS_NS16550_REG_SIZE (-1)
+#endif /* CONFIG_SPL_BUILD */
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-#define CONFIG_BOOTFILE "uImage"
-
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
-#define CONFIG_SYS_FLASH_BASE NAND_BASE
-
+/* NAND */
+#if defined(CONFIG_NAND)
#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#endif
+#define CONFIG_SYS_FLASH_BASE NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
+#endif /* CONFIG_NAND */
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+#define CONFIG_USB_OMAP3
-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
+
+/* SMSC911x Ethernet */
#if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-
+#define CONFIG_SMC911X_BASE 0x2C000000
#endif /* CONFIG_CMD_NET */
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
+/* Environment */
+#define CONFIG_PREBOOT "usb start"
#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"loadaddr=0x82000000\0" \
"usbtty=cdc_acm\0" \
"mmcdev=0\0" \
"console=ttyO0,115200n8\0" \
"mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
"root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
+ "rootfstype=ext4 rootwait\0" \
"nandargs=setenv bootargs console=${console} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
+ "${optargs} " \
+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+ "rootfstype=ubifs rootwait\0" \
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loaduimage=setenv bootfile uImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "loadzimage=setenv bootfile zImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
"run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0" \
+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
+ "run mmcargs; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
+ "nandboot=echo Booting uImage from nand ...; " \
"run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "nand read ${loadaddr} kernel; " \
+ "nand read ${fdtaddr} dtb; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
+ "if run loadzimage && run loaddtb; then " \
+ "run mmcbootz; fi; " \
+ "if run loaduimage && run loaddtb; then " \
+ "run mmcboot; fi; " \
+ "run nandboot; " \
"fi; " \
"else run nandboot; fi"
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 39f1e54..a029b54 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -11,7 +11,6 @@
#define __IGEP00X0_H
#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
#include <asm/mach-types.h>
@@ -52,8 +51,6 @@
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME "IGEP"
-#define CONFIG_CMD_ONENAND
-
#ifndef CONFIG_SPL_BUILD
/* Environment */
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 6e8afbf..5490fc9 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -52,12 +52,7 @@
#define CONFIG_USB_OMAP3
-/* commands to include */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
-
/* I2C */
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
/* USB */
@@ -72,7 +67,6 @@
#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
/* TWL4030 */
-#define CONFIG_TWL4030_PWM
#define CONFIG_TWL4030_USB
/* Board NAND Info. */
@@ -269,9 +263,7 @@
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 834822d..f7dda87 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -8,7 +8,6 @@
#define __CONFIG_H
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
/*
@@ -34,14 +33,12 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
/* I2C Support */
-#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 LED */
#define CONFIG_TWL4030_LED
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* commands to include */
@@ -219,9 +216,7 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index b7ab628..7f1b571 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -11,7 +11,6 @@
#define __CONFIG_H
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define CONFIG_NAND
/* override base for compatibility with MLO the device ships with */
#define CONFIG_SYS_TEXT_BASE 0x80008000
@@ -29,9 +28,6 @@
* Hardware drivers
*/
-/* I2C Support */
-#define CONFIG_SYS_I2C_OMAP34XX
-
/* TWL4030 LED */
#define CONFIG_TWL4030_LED
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index 23603c6..c6db88a 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -13,7 +13,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_NAND
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
@@ -57,16 +56,10 @@
#if defined(CONFIG_CMD_NAND)
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
-#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
#endif
-#undef CONFIG_SYS_I2C_OMAP24XX
-#define CONFIG_SYS_I2C_OMAP34XX
-
/*
* TWL4030
*/
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index a973ce6..7dfc446 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -17,8 +17,6 @@
*/
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
@@ -35,9 +33,6 @@
/* ENV related config options */
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_OVERWRITE
#endif /* __CONFIG_PANDA_H */
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index eb5e6df..7e2a011 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -46,12 +46,10 @@
/* Required support for the TCA642X GPIO we have on the uEVM */
#define CONFIG_TCA642X
-#define CONFIG_CMD_TCA642X
#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4
#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
/* USB UHH support options */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 2c17840..0085559 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -274,10 +274,6 @@
"boot_fit=0\0" \
"console=ttyS2,115200n8\0"
-/*
- * U-Boot commands
- */
-#define CONFIG_CMD_SAVES
#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif
@@ -286,8 +282,6 @@
#endif
#ifdef CONFIG_USE_NAND
-#define CONFIG_CMD_NAND
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif
@@ -313,7 +307,6 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-da850evm.lds"
#define CONFIG_SPL_STACK 0x8001ff00
#define CONFIG_SPL_TEXT_BASE 0x80000000
#define CONFIG_SPL_MAX_FOOTPRINT 32768
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index a30efde..d685411 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -26,7 +26,6 @@
* Commands configuration
*/
#define CONFIG_SYS_MVFS
-#define CONFIG_CMD_NAND
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
index 9b96cd0..d018984 100644
--- a/include/configs/opos6uldev.h
+++ b/include/configs/opos6uldev.h
@@ -85,7 +85,6 @@
#define ACFG_CONSOLE_DEV ttymxc0
#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
-#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," __stringify(CONFIG_BAUDRATE)
#define CONFIG_PREBOOT "run check_env"
#define CONFIG_BOOTCOMMAND "run emmcboot"
diff --git a/include/configs/origen.h b/include/configs/origen.h
index c363653..69f6930 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -95,7 +95,6 @@
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 373c2d5..d4fd722 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -31,8 +31,6 @@
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
/* I2C Configs */
#define CONFIG_SYS_I2C
@@ -82,7 +80,6 @@
#define CONFIG_FEC_XCV_TYPE MII100
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x5
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#ifndef CONFIG_SPL
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 6dbd990..81e7fa4 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -430,7 +430,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#if defined(CONFIG_TARGET_P1020RDB_PD)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#else
@@ -687,8 +686,6 @@
#endif
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
@@ -715,8 +712,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
@@ -802,11 +797,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
@@ -868,8 +858,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#ifdef __SW_BOOT_NOR
#define __NOR_RST_CMD \
norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index d5f5769..459086e 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -266,8 +266,6 @@
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-#define CONFIG_CMD_PCI
-
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
@@ -295,8 +293,6 @@
#define CONFIG_ETHPRIME "eTSEC1"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#undef CONFIG_HAS_ETH2
@@ -377,11 +373,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-/*
* USB
*/
#define CONFIG_HAS_FSL_DR_USB
@@ -435,8 +426,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#define CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h
index 3fb62de..afaeea8 100644
--- a/include/configs/p2371-2180.h
+++ b/include/configs/p2371-2180.h
@@ -39,7 +39,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h
index 5523029..564069a 100644
--- a/include/configs/p2771-0000.h
+++ b/include/configs/p2771-0000.h
@@ -23,7 +23,6 @@
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* PCI host support */
-#define CONFIG_CMD_PCI
#include "tegra-common-post.h"
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index 85cac5a..369e82f 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -30,7 +30,6 @@
#endif
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index ce80e7e..f678b29 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -117,8 +117,6 @@
/* CPU */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#ifdef CONFIG_SPI_BOOT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
@@ -140,8 +138,6 @@
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_USB_MUSB_GADGET */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif /* ! __CONFIG_PCM051_H */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 9e1c89b..b4b60ac 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -23,8 +23,6 @@
#define CONFIG_ENV_OVERWRITE
/* NAND support */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_CMD_NAND
@@ -63,8 +61,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
/* QSPI Configs*/
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
index 70e7f78..2c1221d 100644
--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -43,10 +43,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 3
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
/* SPI Flash */
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
@@ -61,9 +57,7 @@
#define CONFIG_SYS_I2C_SPEED 100000
#ifndef CONFIG_SPL_BUILD
-#define CONFIG_CMD_NAND
/* Enable NAND support */
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index c77c82a..242a139 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -11,7 +11,6 @@
#ifndef __CONFIG_PENGWYN_H
#define __CONFIG_PENGWYN_H
-#define CONFIG_NAND
#define CONFIG_SERIAL1
#define CONFIG_CONS_INDEX 1
@@ -114,7 +113,6 @@
/* SPL */
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
@@ -164,9 +162,7 @@
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/*
@@ -192,13 +188,10 @@
#define CONFIG_NET_MULTI
/* Network */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET 1
#define CONFIG_PHY_NATSEMI
#define CONFIG_PHY_REALTEK
/* CPSW support */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#endif /* ! __CONFIG_PENGWYN_H */
diff --git a/include/configs/pepper.h b/include/configs/pepper.h
index ff3cd74..7ef2529 100644
--- a/include/configs/pepper.h
+++ b/include/configs/pepper.h
@@ -77,14 +77,9 @@
#define CONFIG_SYS_NS16550_COM1 0x44e09000
/* Ethernet support */
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#define CONFIG_PHY_RESET_DELAY 1000
/* SPL */
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#endif /* __CONFIG_PEPPER_H */
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
index a239b11..be90ce9 100644
--- a/include/configs/pfla02.h
+++ b/include/configs/pfla02.h
@@ -34,17 +34,12 @@
#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
/* Ethernet */
-#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 3
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
/* SPI Flash */
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 2
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 7b44752..5cb507f 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -21,8 +21,6 @@
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_FEC_XCV_TYPE RMII
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index e623f48..793ba78 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -25,7 +25,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* ENET1 */
diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index 88f841d..3998eda 100644
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -97,9 +97,6 @@
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
@@ -107,18 +104,8 @@
#ifdef CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env + linux in mmc */
-#define FAT_ENV_INTERFACE "mmc"
-/*
- * We don't specify the part number, if device 0 has partition table, it means
- * the first partition; it no partition table, then take whole device as a
- * FAT file system.
- */
-#define FAT_ENV_DEVICE_AND_PART "0"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_SIZE 0x4000
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mmcblk0p2 rw rootwait"
#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
"fatload mmc 0:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
@@ -152,7 +139,6 @@
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index a1cd18e..4801cb2 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -16,13 +16,6 @@
#include "mx6_common.h"
/*
- * Console configuration
- */
-
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
-/*
* Hardware configuration
*/
@@ -47,8 +40,6 @@
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_PHYLIB
-
/* USB config */
#define CONFIG_MXC_USB_PORT 1
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
diff --git a/include/configs/platinum_titanium.h b/include/configs/platinum_titanium.h
index ccb6441..69406a4 100644
--- a/include/configs/platinum_titanium.h
+++ b/include/configs/platinum_titanium.h
@@ -20,8 +20,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#define CONFIG_PHY_RESET_DELAY 1000
#define CONFIG_HOSTNAME titanium
diff --git a/include/configs/plutux.h b/include/configs/plutux.h
index 5d692d1..cd7c55c 100644
--- a/include/configs/plutux.h
+++ b/include/configs/plutux.h
@@ -20,7 +20,6 @@
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index f100a40..38668de 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -141,10 +141,6 @@
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO 1
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
/* LCD */
#define LCD_BPP LCD_COLOR8
@@ -155,13 +151,6 @@
#define CONFIG_ATMEL_LCD 1
#define CONFIG_ATMEL_LCD_BGR555 1
-/* LED */
-#define CONFIG_AT91_LED
-#define CONFIG_RED_LED GPIO_PIN_PC(12)
-#define CONFIG_GREEN_LED GPIO_PIN_PC(13)
-#define CONFIG_YELLOW_LED GPIO_PIN_PC(15)
-
-
/*
* BOOTP options
*/
@@ -170,26 +159,11 @@
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_BOOTP_HOSTNAME 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND 1
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NAND flash */
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -240,17 +214,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE \
- (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) " \
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x210000; " \
+ "bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CONFIG_SYS_USE_NANDFLASH */
@@ -259,12 +229,6 @@
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,128k(env1)ro," \
- "128k(env2)ro,2M(linux),-(root) " \
- "rw rootfstype=jffs2"
#elif defined (CONFIG_SYS_USE_FLASH)
@@ -292,7 +256,6 @@
"nand:-(nand)"
#define CONFIG_CON_ROT "fbcon=rotate:3 "
-#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 " CONFIG_CON_ROT
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
@@ -329,7 +292,7 @@
ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
GENERATED_GBL_DATA_SIZE)
#endif
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index da0cd9d..667d68f 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -154,11 +154,6 @@
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO 1
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
/* LCD */
#define LCD_BPP LCD_COLOR8
#define CONFIG_LCD_LOGO 1
@@ -170,12 +165,6 @@
#define CONFIG_LCD_IN_PSRAM 1
-/* LED */
-#define CONFIG_AT91_LED
-#define CONFIG_RED_LED GPIO_PIN_PB(7) /* this is the power led */
-#define CONFIG_GREEN_LED GPIO_PIN_PB(8) /* this is the user1 led */
-
-
/*
* BOOTP options
*/
@@ -184,25 +173,11 @@
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_BOOTP_HOSTNAME 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND 1
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NOR flash, if populated */
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
@@ -268,15 +243,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock0 " \
- "mtdparts=atmel_nand:-(root) "\
- "rw rootfstype=jffs2"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CFG_USE_NANDFLASH */
@@ -285,16 +258,6 @@
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock5 " \
- "mtdparts=atmel_nand:" \
- "128k(bootstrap)ro," \
- "256k(uboot)ro," \
- "128k(env1)ro," \
- "128k(env2)ro," \
- "2M(linux)," \
- "-(root) " \
- "rw rootfstype=jffs2"
#elif defined(CONFIG_SYS_USE_FLASH) /* CFG_USE_FLASH */
@@ -314,8 +277,6 @@
#define CONFIG_ROOTPATH "/ronetix/rootfs"
#define CONFIG_CON_ROT "fbcon=rotate:3 "
-#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 "\
- CONFIG_CON_ROT
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=nand"
#define MTDPARTS_DEFAULT \
@@ -361,7 +322,7 @@
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
GENERATED_GBL_DATA_SIZE)
#endif
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index dc4ebea..4f7bb0d 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -64,11 +64,6 @@
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_BOOTP_HOSTNAME 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND 1
-
#define CONFIG_JFFS2_CMDLINE 1
#define CONFIG_JFFS2_NAND 1
#define CONFIG_JFFS2_DEV "nand0" /* NAND dev jffs2 lives on */
@@ -123,13 +118,6 @@
#define CONFIG_ENV_OFFSET_REDUND 0x80000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
-#define CONFIG_BOOTARGS "fbcon=rotate:3 console=tty0 " \
- "console=ttyS0,115200 " \
- "root=/dev/mtdblock4 " \
- "mtdparts=atmel_nand:128k(bootstrap)ro," \
- "256k(uboot)ro,1664k(env)," \
- "2M(linux)ro,-(root) rw " \
- "rootfstype=jffs2"
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h
index 31d7156..809005e 100644
--- a/include/configs/pogo_e02.h
+++ b/include/configs/pogo_e02.h
@@ -29,7 +29,6 @@
* Commands configuration
*/
#define CONFIG_SYS_MVFS
-#define CONFIG_CMD_NAND
/*
* mv-common.h should be defined after CMD configs since it used them
diff --git a/include/configs/poplar.h b/include/configs/poplar.h
index d59f32a..d2ecd0d 100644
--- a/include/configs/poplar.h
+++ b/include/configs/poplar.h
@@ -30,7 +30,6 @@
#define CONFIG_PL01X_SERIAL
/* USB configuration */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/porter.h b/include/configs/porter.h
index ac21411..451d9dd 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -38,7 +38,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* FLASH */
#define CONFIG_SPI
@@ -53,8 +52,6 @@
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index 89d1ad9..1151da5 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -17,7 +17,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index a78112d..97fd24e 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -17,7 +17,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#undef CONFIG_BOOTARGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"addmisc=setenv bootargs ${bootargs} " \
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 703d158..e0cc873 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -10,8 +10,6 @@
#ifndef __QEMU_PPCE500_H
#define __QEMU_PPCE500_H
-#define CONFIG_CMD_REGINFO
-
#undef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
@@ -126,10 +124,6 @@
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 64cbc80..01072f8 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -23,11 +23,7 @@
* ATA/SATA support for QEMU x86 targets
* - Only legacy IDE controller is supported for QEMU '-M pc' target
* - AHCI controller is supported for QEMU '-M q35' target
- *
- * Default configuraion is to support the QEMU default x86 target
- * Undefine CONFIG_IDE to support q35 target
*/
-#ifdef CONFIG_IDE
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 4
#define CONFIG_SYS_ATA_BASE_ADDR 0
@@ -38,15 +34,6 @@
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
#define CONFIG_ATAPI
-#undef CONFIG_SCSI_AHCI
-#else
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
-#endif
-
-/* GPIO is not supported */
-#undef CONFIG_INTEL_ICH6_GPIO
-
/* SPI is not supported */
#define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h
index 5f74b2a..e39fee0 100644
--- a/include/configs/r0p7734.h
+++ b/include/configs/r0p7734.h
@@ -16,10 +16,6 @@
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC3,115200"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -27,7 +23,6 @@
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC 1
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
@@ -54,7 +49,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SCIF 1
#define CONFIG_CONS_SCIF3 1
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 64fd4b9..19eb733 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -8,17 +8,9 @@
#define CONFIG_DISPLAY_BOARDINFO
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SH_ZIMAGEBOOT
-
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF1 1
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
/* SDRAM */
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index c5f577a..4f40df9 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -17,16 +17,8 @@
#define CONFIG_DISPLAY_BOARDINFO
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_PCI
-
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h
index 0820f6f..721f94c 100644
--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -44,7 +44,6 @@
#define EEPROM_ADDR_CHIP 0x120
#undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
#define CONFIG_FACTORYSET
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 16f45f2..89ddd00 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -11,8 +11,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
-
/* Support File sytems */
#define CONFIG_SUPPORT_VFAT
#define CONFIG_FS_EXT4
@@ -23,8 +21,6 @@
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_BOOTARGS ""
-
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_ARCH_CPU_INIT
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 8da3e7a..44d3e9c 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -12,7 +12,6 @@
#include <asm/arch/rmobile.h>
-#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
@@ -39,12 +38,12 @@
#define CONFIG_SH_GPIO_PFC
/* console */
-
+#define CONFIG_SYS_CBSIZE 2048
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_PBSIZE 256
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_BARGSIZE 512
+#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 }
/* MEMORY */
@@ -92,10 +91,6 @@
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS \
- "console=ttySC0,115200 rw root=/dev/nfs " \
- "nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-
#define CONFIG_BOOTCOMMAND \
"tftp 0x48080000 Image; " \
"tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 3ee9abd..8a01936 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -26,7 +26,7 @@
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x60000000
#else
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 488d679..ade6caf 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -24,7 +24,7 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 7f9f0c5..906c821 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -63,6 +63,4 @@
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-/* xhci host */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index b0c858c..a89c69a 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -21,12 +21,20 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define COUNTER_FREQUENCY 24000000
+
+#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_TEXT_BASE 0x00200000
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SYS_LOAD_ADDR 0x00280000
+#define CONFIG_SPL_TEXT_BASE 0x00000000
+#define CONFIG_SPL_MAX_SIZE 0x40000
+#define CONFIG_SPL_BSS_START_ADDR 0x400000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
+
#define CONFIG_BOUNCE_BUFFER
#ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 54ea97b..3317887 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -16,8 +16,6 @@
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
#if defined(CONFIG_SPL_SPI_SUPPORT)
#define CONFIG_SPL_SPI_LOAD
#endif
@@ -82,7 +80,4 @@
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_ETHER_RTL8152
-/* rockchip xhci host driver */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#endif
diff --git a/include/configs/rock.h b/include/configs/rock.h
index e998ec5..8d845d9 100644
--- a/include/configs/rock.h
+++ b/include/configs/rock.h
@@ -12,7 +12,7 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 0573571..b3986c2 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -28,6 +28,12 @@
#endif
#define CONFIG_RANDOM_UUID
+
+#ifdef CONFIG_ARM64
+#define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
+#else
+#define ROOT_UUID "69DAD710-2CE4-4E3C-B16C-21A1D49ABED3;\0"
+#endif
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
"name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
@@ -36,11 +42,11 @@
"name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
"name=atf,size=4M,uuid=${uuid_gpt_atf};" \
"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
- "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
+ "name=rootfs,size=-,uuid="ROOT_UUID
#endif
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index c545f99..8ae4019 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -92,9 +92,6 @@
/* Environment */
#define CONFIG_ENV_SIZE SZ_16K
-#define FAT_ENV_INTERFACE "mmc"
-#define FAT_ENV_DEVICE_AND_PART "0:1"
-#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_SYS_LOAD_ADDR 0x1000000
#define CONFIG_PREBOOT "usb start"
diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h
index 8f30aef..a478cc8 100644
--- a/include/configs/rsk7203.h
+++ b/include/configs/rsk7203.h
@@ -13,9 +13,6 @@
#define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */
#define CONFIG_DISPLAY_BOARDINFO
@@ -37,7 +34,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
#define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE
diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h
index 14e55c5..5feaedc 100644
--- a/include/configs/rsk7264.h
+++ b/include/configs/rsk7264.h
@@ -16,7 +16,6 @@
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOOTARGS "console=ttySC3,115200"
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
@@ -25,7 +24,6 @@
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Serial */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF3 1
/* Memory */
diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h
index 60844ab..76e33c5 100644
--- a/include/configs/rsk7269.h
+++ b/include/configs/rsk7269.h
@@ -15,7 +15,6 @@
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOOTARGS "console=ttySC7,115200"
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -24,7 +23,6 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Serial */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF7
/* Memory */
diff --git a/include/configs/rut.h b/include/configs/rut.h
index e676a5a..9f9bc71 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -120,7 +120,6 @@
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
#define CONFIG_FORMIKE
diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h
index c561252..4cfcd5a 100644
--- a/include/configs/s32v234evb.h
+++ b/include/configs/s32v234evb.h
@@ -93,8 +93,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#endif
#if 0 /* Disable until the FLASH will be implemented */
@@ -103,7 +101,6 @@
#ifdef CONFIG_SYS_USE_NAND
/* Nand Flash Configs */
-#define CONFIG_CMD_NAND
#define CONFIG_JFFS2_NAND
#define MTD_NAND_FSL_NFC_SWECC 1
#define CONFIG_NAND_FSL_NFC
@@ -115,7 +112,6 @@
#endif
#define CONFIG_LOADADDR 0xC307FFC0
-#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
#define CONFIG_EXTRA_ENV_SETTINGS \
"boot_scripts=boot.scr.uimg boot.scr\0" \
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 9c00138..11d2443 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -51,14 +51,11 @@
/* PWM */
#define CONFIG_PWM 1
-#define CONFIG_CMD_ONENAND
-
/* USB Composite download gadget - g_dnl */
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
/* USB Samsung's IDs */
@@ -114,9 +111,6 @@
#define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
-#define CONFIG_BOOTARGS "root=/dev/mtdblock8 rootfstype=ext4 " \
- CONFIG_COMMON_BOOT
-
#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \
" onenand write 0x32008000 0x0 0x100000\0"
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index b0bc69d..9859f30 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -29,7 +29,6 @@
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run mmcboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 7f81063..5bf5731 100644
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -17,7 +17,6 @@
#include "rcar-gen3-common.h"
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF2
#define CONFIG_CONS_INDEX 2
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
@@ -27,7 +26,6 @@
/* Ethernet RAVB */
#define CONFIG_NET_MULTI
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index b25be97..53a3da1 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -45,8 +45,6 @@
#endif
/* NAND flash */
-#define CONFIG_CMD_NAND
-
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -59,16 +57,11 @@
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_CMD_NAND_TRIMFFS
#endif
/* USB */
#define CONFIG_CMD_USB
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#endif
-
/* USB device */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
@@ -95,12 +88,6 @@
"bootz 0x22000000 - 0x21000000"
#endif
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS \
- "console=ttyS0,57600 earlyprintk " \
- "mtdparts=atmel_nand:6M(bootstrap)ro, 6M(kernel)ro,-(rootfs) " \
- "rootfstype=ubifs ubi.mtd=2 root=ubi0:rootfs"
-
/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x200000
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 42fb1e1..9ceb919 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -35,9 +35,6 @@
#define CONFIG_SF_DEFAULT_SPEED 30000000
#endif
-/* NAND flash */
-#undef CONFIG_CMD_NAND
-
/* I2C */
#define AT24MAC_ADDR 0x5c
#define AT24MAC_REG 0x9a
@@ -57,16 +54,11 @@
#ifdef CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env in sd card */
-#undef FAT_ENV_DEVICE_AND_PART
#undef CONFIG_BOOTCOMMAND
-#define FAT_ENV_DEVICE_AND_PART "1"
#define CONFIG_BOOTCOMMAND "fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; " \
"fatload mmc 1:1 0x22000000 zImage; " \
"bootz 0x22000000 - 0x21000000"
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
#endif
@@ -82,7 +74,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 76533e3..05600c8 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -36,8 +36,6 @@
#endif
/* NAND flash */
-#define CONFIG_CMD_NAND
-
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -47,16 +45,15 @@
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#endif
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP 4
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_CMD_NAND_TRIMFFS
-
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
-#endif
/* USB */
@@ -90,7 +87,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index a5a0f7c..29b7e8b 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -69,8 +69,6 @@
#endif
/* NAND flash */
-#define CONFIG_CMD_NAND
-
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -80,15 +78,12 @@
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
#define CONFIG_SYS_NAND_ONFI_DETECTION
+#endif
/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP 4
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_CMD_NAND_TRIMFFS
-#endif
-
-#define CONFIG_PHY_MICREL_KSZ9021
/* USB */
@@ -123,7 +118,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index f1cf65f..c8462b0 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -31,8 +31,6 @@
#endif
/* NAND flash */
-#define CONFIG_CMD_NAND
-
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -78,7 +76,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index 09a9757..fc16ed0 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -31,8 +31,6 @@
#endif
/* NAND flash */
-#define CONFIG_CMD_NAND
-
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -76,7 +74,6 @@
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/armv7/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index edb153f..f790803 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -8,7 +8,6 @@
#ifdef FTRACE
#define CONFIG_TRACE
-#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
@@ -27,8 +26,6 @@
#define CONFIG_LMB
#define CONFIG_ANDROID_BOOT_IMAGE
-#define CONFIG_CMD_PCI
-
#define CONFIG_FS_EXT4
#define CONFIG_EXT4_WRITE
#define CONFIG_HOST_MAX_DEVICES 4
@@ -54,7 +51,6 @@
#define CONFIG_ENV_SIZE 8192
/* SPI - enable all SPI flash types for testing purposes */
-#define CONFIG_CMD_SF_TEST
#define CONFIG_I2C_EDID
@@ -96,10 +92,6 @@
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_IP_DEFRAG
-#define CONFIG_CMD_SANDBOX
-
-#define CONFIG_BOOTARGS ""
-
#ifndef SANDBOX_NO_SDL
#define CONFIG_SANDBOX_SDL
#endif
diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h
index e55addb..250917b 100644
--- a/include/configs/sansa_fuze_plus.h
+++ b/include/configs/sansa_fuze_plus.h
@@ -23,7 +23,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index c0faac3..6de9d20 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -398,10 +398,6 @@
* Command line configuration.
*/
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -632,8 +628,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 800000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=sbc8349\0" \
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index cf9809d..cbd2f75 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -479,7 +479,6 @@
/* Options are: eTSEC[0-3] */
#define CONFIG_ETHPRIME "eTSEC0"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#endif /* CONFIG_TSEC_ENET */
/*
@@ -507,15 +506,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -566,8 +556,6 @@
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index c5f9fcb..8f12de7 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -450,12 +450,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -515,8 +509,6 @@
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 1000000
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index f7aeb64..e929a07 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -33,7 +33,6 @@
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif
@@ -45,7 +44,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
#define CONFIG_BOOTCOMMAND "bootm"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 2482ba1..ce4bb32 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -47,7 +47,6 @@
#define CONFIG_KEYBOARD
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
/* Max number of NAND devices */
diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
index c90626f..c3a4961 100644
--- a/include/configs/secomx6quq7.h
+++ b/include/configs/secomx6quq7.h
@@ -33,8 +33,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 46d0f2a..8db1ac4 100644
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -14,10 +14,6 @@
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
@@ -35,7 +31,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF2 1
#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
@@ -61,7 +56,6 @@
#define CONFIG_SH_ETHER_PHY_ADDR 18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
#define CONFIG_SH_ETHER_USE_GETHER 1
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index aa8d05c..4eb8ffb 100644
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -14,10 +14,6 @@
#define CONFIG_SYS_TEXT_BASE 0x5ff80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
@@ -35,7 +31,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF2 1
#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
@@ -61,7 +56,6 @@
#define CONFIG_SH_ETHER_PHY_ADDR 18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
#define CONFIG_SH_ETHER_USE_GETHER 1
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 1759a6f..fe65fbd 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -15,10 +15,6 @@
#define CONFIG_SYS_TEXT_BASE 0x8ef80000
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -36,7 +32,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF2 1
#define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE)
@@ -61,7 +56,6 @@
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 1
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index 50a0e3e..acb9f3c 100644
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -14,19 +14,12 @@
#define CONFIG_SH7763RDP 1
#define __LITTLE_ENDIAN 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF2 1
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
@@ -92,7 +85,6 @@
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index 59fcad0..7c8707c 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -12,12 +12,6 @@
#define CONFIG_CPU_SH7785 1
#define CONFIG_SH7785LCR 1
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SH_ZIMAGEBOOT
-
-#define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevice=0:1\0" \
"usbload=usb reset;usbboot;usb stop;bootm\0"
@@ -53,7 +47,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF1 1
#define CONFIG_SCIF_EXT_CLOCK 1
diff --git a/include/configs/shmin.h b/include/configs/shmin.h
index c9718f9..3755eba 100644
--- a/include/configs/shmin.h
+++ b/include/configs/shmin.h
@@ -15,10 +15,6 @@
/* T-SH7706LSR*/
/* #define CONFIG_T_SH7706LSR 1 */
-#define CONFIG_CMD_SDRAM
-
-#define CONFIG_BOOTARGS "console=ttySC0,115200"
-
/*
* This board has original boot loader. If you write u-boot to 0x0,
* you should set undef.
@@ -41,7 +37,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 }
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_CONS_SCIF0 1
/* memory */
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 22f070d..5ed4658 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -72,7 +72,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
#define CONFIG_MTD_DEVICE
#define CONFIG_SF_DEFAULT_SPEED (75000000)
@@ -104,7 +103,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP24XX
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
@@ -121,8 +119,6 @@
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SPL_NAND_AM33XX_BCH
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
@@ -222,8 +218,6 @@
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
@@ -232,11 +226,8 @@
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_NAND
/* NAND support */
#ifdef CONFIG_NAND
-#define CONFIG_CMD_NAND
-
/* UBI Support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_MTD_PARTITIONS
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 84108fd..0384325 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -38,7 +38,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
/* FLASH */
#define CONFIG_SPI
@@ -53,8 +52,6 @@
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index bccb432..fe24b3a 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -117,7 +117,6 @@
*
*/
#define CONFIG_MACB
-#define CONFIG_PHYLIB
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
@@ -196,21 +195,10 @@
\
"mtdparts="MTDPARTS_DEFAULT"\0"
-/* Command line & features configuration */
-
-#define CONFIG_CMD_NAND
-
-#ifdef CONFIG_MACB
-#else
-#endif /* CONFIG_MACB */
-
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_INIT_SP_ADDR 0x301000
#define CONFIG_SPL_STACK_R
#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
-/* we have only 4k sram in SPL, so cut SYS_MALLOC_F_LEN */
-#undef CONFIG_SYS_MALLOC_F_LEN
-#define CONFIG_SYS_MALLOC_F_LEN 0x400
#else
/*
* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
@@ -231,7 +219,6 @@
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
#define CONFIG_SYS_USE_NANDFLASH 1
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 14b49c4..0a9c638 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -56,13 +56,6 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-/***********************************************************
- * Command definition
- ***********************************************************/
-#undef CONFIG_CMD_NAND
-
-#define CONFIG_CMD_ONENAND
-
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
@@ -85,9 +78,6 @@
" mem=128M " \
" " MTDPARTS_DEFAULT
-#define CONFIG_BOOTARGS "root=/dev/mtdblock5 ubi.mtd=4" \
- " rootfstype=cramfs " CONFIG_COMMON_BOOT
-
#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x40000;" \
" onenand write 0x32008000 0x0 0x40000\0"
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index 9986a3b..978fb24 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -15,7 +15,6 @@
#undef CONFIG_USB_GADGET_DWC2_OTG
#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
#undef CONFIG_REVISION_TAG
-#undef CONFIG_CMD_THOR_DOWNLOAD
/* High Level Configuration Options */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
@@ -79,7 +78,6 @@
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
-#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 63bc769..153f68e 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -122,7 +122,6 @@
#define CONFIG_ENV_OFFSET (512 << 10)
#define CONFIG_ENV_SIZE (256 << 10)
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any"
/* Console settings */
#define CONFIG_SYS_CBSIZE 256
@@ -136,9 +135,4 @@
/* U-Boot memory settings */
#define CONFIG_SYS_MALLOC_LEN (1 << 20)
-/* Command line configuration */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-
#endif /* __CONFIG_H */
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index 2c5f264..91a681a 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -52,7 +52,6 @@
/* Ethernet */
#define CONFIG_MACB
-#define CONFIG_PHYLIB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_RESET_PHY_R
@@ -60,9 +59,6 @@
#define CONFIG_TFTP_PORT
#define CONFIG_TFTP_TSIZE
-/* USB */
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
-
/* MMC */
#define CONFIG_GENERIC_ATMEL_MCI
@@ -131,7 +127,6 @@
#define CONFIG_CMD_USB
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE
#endif /* __CONFIG_H */
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index 669ce85..2306e7c 100644
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -62,7 +62,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_I2C_MULTI_BUS
/*
@@ -86,8 +85,6 @@
#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h
index 55850bd..83718dd 100644
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -25,23 +25,12 @@
#define PHYS_SDRAM_1_SIZE 0x40000000
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
/*
* U-Boot environment configurations
*/
/*
- * arguments passed to the bootz command. The value of
- * CONFIG_BOOTARGS goes into the environment value "bootargs".
- * Do note the value will overide also the chosen node in FDT blob.
- */
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
-
-/*
* Serial / UART configurations
*/
#define CONFIG_SYS_NS16550_MEM32
diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index 9f83858..6b6d54b 100644
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 7e63b55..175b01e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -97,20 +97,15 @@
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_MII
#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ)
-#define CONFIG_PHY_GIGE
#endif
/*
* FPGA Driver
*/
-#ifdef CONFIG_TARGET_SOCFPGA_GEN5
#ifdef CONFIG_CMD_FPGA
-#define CONFIG_FPGA
-#define CONFIG_FPGA_ALTERA
-#define CONFIG_FPGA_SOCFPGA
#define CONFIG_FPGA_COUNT 1
#endif
-#endif
+
/*
* L4 OSC1 Timer 0
*/
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index 86b4a9d..018a0c3 100644
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index 6516c45..275ed7f 100644
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h
index 04be2b1..bb50fcf 100644
--- a/include/configs/socfpga_de10_nano.h
+++ b/include/configs/socfpga_de10_nano.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h
index 9405083b..05975c9 100644
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h
index febb8f7..46f5f13 100644
--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@@ -16,7 +16,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "zImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -25,8 +24,6 @@
#define CONFIG_ARP_TIMEOUT 500UL
/* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#endif
/* The rest of the configuration is shared */
diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index e9c7c71..404f064 100644
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -15,7 +15,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "fitImage"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_PREBOOT "run try_bootscript"
#define CONFIG_BOOTCOMMAND "run mmc_mmc"
#define CONFIG_LOADADDR 0x01000000
diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 57de60e..b4f31c4 100644
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
index 6b6cb6a..ebb9ac5 100644
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -18,10 +18,6 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index a86043f..4977881 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -15,7 +15,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
-#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
#define CONFIG_BOOTCOMMAND "run selboot"
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
@@ -41,8 +40,6 @@
#if defined(CONFIG_CMD_NET)
#define CONFIG_BOOTP_SEND_HOSTNAME
/* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
#endif
/* Extra Environment */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 3864dfb..94287c1 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -152,7 +152,6 @@
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
/* LIME GDC */
#define CONFIG_SYS_LIME_BASE 0xc8000000
@@ -248,7 +247,6 @@
/* Options are: TSEC[0,1] */
#define CONFIG_ETHPRIME "TSEC0"
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
@@ -275,16 +273,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -321,8 +309,6 @@
"echo Welcome on the ABB Socrates Board;" \
"echo"
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consdev=ttyS0\0" \
diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h
index af51c2a..509f23a 100644
--- a/include/configs/som-6896.h
+++ b/include/configs/som-6896.h
@@ -16,9 +16,6 @@
#define CONFIG_MISC_INIT_R
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
-
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h
index 17adf7e..927e1b6 100644
--- a/include/configs/som-db5800-som-6867.h
+++ b/include/configs/som-db5800-som-6867.h
@@ -19,10 +19,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 86e14ff..0603db5 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -17,7 +17,6 @@
/* Ethernet driver configuration */
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
/* USBD driver configuration */
#if defined(CONFIG_SPEAR_USBTTY)
@@ -94,12 +93,6 @@
#define CONFIG_SYS_NAND_ONFI_DETECTION
/*
- * Command support defines
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_SAVES
-
-/*
* Default Environment Varible definitions
*/
#define CONFIG_ENV_OVERWRITE
@@ -146,11 +139,6 @@
"bootm 0x1600000"
#endif
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \
- "mem=128M " \
- "root="CONFIG_FSMTDBLK \
- "rootfstype=jffs2"
-
#define CONFIG_NFSBOOTCOMMAND \
"bootp; " \
"setenv bootargs root=/dev/nfs rw " \
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index eaa93a5..c71413c 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -20,9 +20,6 @@
#define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
-
/* Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"board= B2260" \
diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index c47be51..eab79b3 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -65,8 +65,6 @@
#define CONFIG_SYS_MALLOC_LEN (2 << 20)
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
@@ -82,6 +80,4 @@
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
-#define CONFIG_CMD_MEM
-
#endif /* __CONFIG_H */
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 46955b1..470722d 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -31,7 +31,6 @@
#define CONFIG_ENV_SIZE (8 << 10)
#define CONFIG_STM32_FLASH
-#define CONFIG_STM32X7_SERIAL
#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
#define CONFIG_DW_ALTDESCRIPTOR
@@ -54,8 +53,6 @@
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
#define CONFIG_BOOTCOMMAND \
"run bootcmd_romfs"
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 16f3ce8..9422c04 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -40,7 +40,6 @@
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
/* SCIF */
-#define CONFIG_SCIF_CONSOLE
#define CONFIG_SCIF_A
/* SPI */
@@ -56,8 +55,6 @@
#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
#define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
diff --git a/include/configs/strider.h b/include/configs/strider.h
index a702ec7..c6cb51c 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -301,8 +301,6 @@
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
#define CONFIG_PCA953X /* NXP PCA9554 */
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x24, 16}, {0x25, 16}, {0x26, 16}, \
{0x3c, 8}, {0x3d, 8}, {0x3e, 8} }
@@ -545,7 +543,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index 0ac262e..3b5831d 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -49,7 +49,6 @@
#define CONFIG_MII
#define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_PHY_MICREL
/* Command support defines */
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index fefd58f..212862a 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -202,10 +202,6 @@
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#ifndef CONFIG_ARM64
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
-#endif
-
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
@@ -296,11 +292,9 @@
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
-#define CONFIG_PHYLIB
#endif
#ifdef CONFIG_SUNXI_GMAC
-#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_REALTEK
@@ -310,7 +304,6 @@
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif
#ifdef CONFIG_USB_MUSB_SUNXI
diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h
index af8730a..7b3b050 100644
--- a/include/configs/suvd3.h
+++ b/include/configs/suvd3.h
@@ -57,7 +57,6 @@
#define CONFIG_ENV_ADDR 0xF0100000
#define CONFIG_ENV_OFFSET 0x100000
-#define CONFIG_CMD_NAND
#define CONFIG_NAND_ECC_BCH
#define CONFIG_BCH
#define CONFIG_NAND_KMETER1
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 6d8c78f..bd98cc6 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -10,8 +10,6 @@
#ifndef __T4QDS_H
#define __T4QDS_H
-#define CONFIG_CMD_REGINFO
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
@@ -228,7 +226,6 @@
#ifdef CONFIG_FMAN_ENET
#define CONFIG_MII /* MII PHY management */
#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
/*
@@ -241,10 +238,6 @@
* Command line configuration.
*/
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#endif
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index a9991fc..4336251 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -67,15 +67,10 @@
115200}
/* EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-
-/* commands to include */
-#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
@@ -135,7 +130,6 @@
*/
/* **** PISMO SUPPORT *** */
-#define CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
@@ -176,7 +170,6 @@
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
@@ -341,7 +334,7 @@
else \
strcpy(ethname, "ethaddr"); \
printf("Setting %s from EEPROM with %s\n", ethname, buf);\
- setenv(ethname, buf); \
+ env_set(ethname, buf); \
} \
} while (0)
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 38f5bd0..d47dc8b 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -68,10 +68,7 @@
"1920k(u-boot),128k(u-boot-env),"\
"4m(kernel),-(fs)"
-#define CONFIG_CMD_NAND /* NAND support */
-
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
@@ -216,8 +213,6 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_OMAP3_SPI
-
/*
* USB
*
@@ -228,7 +223,6 @@
/* USB EHCI */
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
@@ -246,7 +240,6 @@
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/* NAND boot config */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index cdea9eb..55f47f8 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -58,11 +58,6 @@
/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
-/*
* SDRAM: 1 bank, min 32, max 128 MB
* Initialized before u-boot gets started.
*/
@@ -92,7 +87,6 @@
/* Ethernet */
#define CONFIG_MACB
-#define CONFIG_PHYLIB
#define CONFIG_RMII
#define CONFIG_AT91_WANTS_COMMON_PHY
@@ -149,75 +143,6 @@
#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#if defined(CONFIG_BOARD_TAURUS)
-#define CONFIG_BOOTARGS_TAURUS \
- "console=ttyS0,115200 earlyprintk " \
- "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
- "256k(env),256k(env_redundant),256k(spare)," \
- "512k(dtb),6M(kernel)ro,-(rootfs) " \
- "root=/dev/mtdblock7 rw rootfstype=jffs2"
-#endif
-
-#if defined(CONFIG_BOARD_AXM)
-#define CONFIG_BOOTARGS_AXM \
- "\0" \
- "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
- "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
- "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
- "baudrate=115200\0" \
- "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
- "boot_retries=0\0" \
- "bootcmd=run flash_self\0" \
- "bootdelay=3\0" \
- "ethact=macb0\0" \
- "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
- "bootm ${kernel_ram};reset\0" \
- "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
- "bootm ${kernel_ram};reset\0" \
- "flash_self_test=run nand_kernel;run setbootargs addtest; " \
- "upgrade_available;bootm ${kernel_ram};reset\0" \
- "hostname=systemone\0" \
- "kernel_Off=0x00200000\0" \
- "kernel_Off_fallback=0x03800000\0" \
- "kernel_ram=0x21500000\0" \
- "kernel_size=0x00400000\0" \
- "kernel_size_fallback=0x00400000\0" \
- "loads_echo=1\0" \
- "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
- "${kernel_size}\0" \
- "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
- "run nfsargs;run addip;upgrade_available;bootm " \
- "${kernel_ram};reset\0" \
- "netdev=eth0\0" \
- "nfsargs=run root_path;setenv bootargs ${bootargs} " \
- "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "at91sam9_wdt.wdt_timeout=16\0" \
- "partitionset_active=A\0" \
- "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
- "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
- "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
- "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
- "project_dir=systemone\0" \
- "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
- "rootfs=/dev/mtdblock5\0" \
- "rootfs_fallback=/dev/mtdblock7\0" \
- "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
- "root=${rootfs} rootfstype=jffs2 panic=7 " \
- "at91sam9_wdt.wdt_timeout=16\0" \
- "stderr=serial\0" \
- "stdin=serial\0" \
- "stdout=serial\0" \
- "upgrade_available=0\0"
-#endif
-
-#if defined(CONFIG_BOARD_TAURUS)
-#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
-#endif
-
-#if defined(CONFIG_BOARD_AXM)
-#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
-#endif
-
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index 67b5774..09d5718 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -32,11 +32,6 @@
#define CONFIG_SYS_NS16550_CLK 166666666
/*
- * Ethernet PHY configuration
- */
-#define CONFIG_PHY_GIGE
-
-/*
* Even though the board houses Realtek RTL8211E PHY
* corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
* In particular "parse_status" reports link is down.
@@ -72,7 +67,6 @@
* Environment configuration
*/
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS0,115200n8"
#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
/*
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index 4baccdc..c3fc8a3 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -59,7 +59,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
@@ -72,7 +71,6 @@
#endif
/* PCI */
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 5f84f24..96e3739 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -20,7 +20,6 @@
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
-#define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 107a0f8..75d2065 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -63,6 +63,5 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 8cf9bac..0d61753 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -65,7 +65,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index db1cc24..342ffbe 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -82,7 +82,6 @@
*/
#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
#define CONFIG_EHCI_IS_TDI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_SYS_NAND_ONFI_DETECTION
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 874fe34d..4c05576 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -68,7 +68,6 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
/* GPU needs setup */
#define CONFIG_TEGRA_GPU
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 6083847..c2096fb 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -64,6 +64,5 @@
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif /* _TEGRA30_COMMON_H_ */
diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h
new file mode 100644
index 0000000..37b78c1
--- /dev/null
+++ b/include/configs/theadorable-x86-common.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * Common options, macros and default environment for all
+ * theadorable x86 based boards
+ */
+
+#ifndef __THEADORABLE_X86_COMMON_H
+#define __THEADORABLE_X86_COMMON_H
+
+#define CONFIG_SYS_MONITOR_LEN (1 << 20)
+
+#define CONFIG_PREBOOT
+
+#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0"
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+#define CONFIG_USB_ETHER_MCS7830
+#define CONFIG_USB_ETHER_RTL8152
+
+#define VIDEO_IO_OFFSET 0
+#define CONFIG_X86EMU_RAW_IO
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+
+/* Environment settings */
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_OFFSET 0x006ec000
+#define CONFIG_ENV_OFFSET_REDUND \
+ (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+
+#undef CONFIG_BOOTCOMMAND
+#undef CONFIG_EXTRA_ENV_SETTINGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "tftpdir=" DEF_ENV_TFTPDIR "\0" \
+ "eth_init=" DEF_ENV_ETH_INIT "\0" \
+ "ubuntu_part=" __stringify(DEF_ENV_UBUNTU_PART) "\0" \
+ "yocto_part=" __stringify(DEF_ENV_YOCTO_PART) "\0" \
+ "ubuntu_tty=" __stringify(DEF_ENV_UBUNTU_TTY) "\0" \
+ "yocto_tty=" __stringify(DEF_ENV_YOCTO_TTY) "\0" \
+ "start_eth=if test -n \"${eth_init}\";" \
+ "then run eth_init;else sleep 0;fi\0" \
+ "kernel-ver=4.8.0-54\0" \
+ "boot=zboot 03000000 0 04000000 ${filesize}\0" \
+ "mtdparts=mtdparts=intel-spi:4k(descriptor),7084k(me)," \
+ "8k(env1),8k(env2),64k(mrc),640k(u-boot)," \
+ "64k(vga),-(fsp)\0" \
+ "addtty_ubuntu=setenv bootargs ${bootargs} " \
+ "console=ttyS${ubuntu_tty},${baudrate}\0" \
+ "addtty_yocto=setenv bootargs ${bootargs} " \
+ "console=ttyS${yocto_tty},${baudrate}\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addmisc=setenv bootargs ${bootargs} " \
+ "intel-spi.writeable=1 vmalloc=300M " \
+ "pci=realloc=on,hpmemsize=0x12000000\0" \
+ "bootcmd=if env exists recovery_status;" \
+ "then run swupdate;" \
+ "else run yocto_boot;run swupdate;" \
+ "fi\0" \
+ "ubuntu_args=setenv bootargs " \
+ "root=/dev/sda${ubuntu_part} ro\0" \
+ "ubuntu_args_quiet=setenv bootargs " \
+ "root=/dev/sda${ubuntu_part} ro quiet\0" \
+ "ubuntu_load=load scsi 0:${ubuntu_part} 03000000 " \
+ "/boot/vmlinuz-${kernel-ver}-generic;" \
+ "load scsi 0:${ubuntu_part} 04000000 " \
+ "/boot/initrd.img-${kernel-ver}-generic\0" \
+ "ubuntu_boot=run ubuntu_args_quiet addmtd addmisc " \
+ "ubuntu_load boot\0" \
+ "ubuntu_boot_console=run ubuntu_args addtty_ubuntu " \
+ "addmtd addmisc ubuntu_load boot\0" \
+ "net_args=setenv bootargs root=/dev/sda${ubuntu_part} ro\0" \
+ "net_boot=run start_eth net_args addtty_yocto addmtd addmisc;" \
+ "tftp 03000000 ${tftpdir}/bzImage;" \
+ "load scsi 0:${ubuntu_part} 04000000 " \
+ "/boot/initrd.img-${kernel-ver}-generic;" \
+ "run boot\0" \
+ "yocto_args=setenv bootargs root=/dev/sda${yocto_part} " \
+ "ip=dhcp panic=1\0" \
+ "yocto_args_fast=setenv bootargs root=/dev/sda${yocto_part} " \
+ "quiet panic=1\0" \
+ "yocto_boot=run yocto_args addmtd addmisc addtty_yocto;" \
+ "if run yocto_load;then zboot 03000000;fi\0" \
+ "yocto_boot_fast=run yocto_args_fast addmtd addmisc " \
+ "addtty_yocto yocto_load;zboot 03000000\0" \
+ "yocto_boot_tftp=run yocto_args addmtd addmisc addtty_yocto " \
+ "start_eth yocto_load_tftp;zboot 03000000\0" \
+ "yocto_kernel=bzImage\0" \
+ "yocto_load=load scsi 0:${yocto_part} 03000000 " \
+ "/boot/${yocto_kernel}\0" \
+ "yocto_load_tftp=tftp 03000000 dfi/bzImage\0" \
+ "swupdate=if env exists swupdate_factory;" \
+ "then run swupdate_usb;run swupdate_run;" \
+ "else setenv swupdate_part 2;run swupdate_mmc;" \
+ "run swupdate_run;setenv swupdate_part 1;" \
+ "run swupdate_mmc;run swupdate_usb;" \
+ "run swupdate_run;" \
+ "fi\0" \
+ "swupdate-initrd=/boot/swupdate-image-theadorable.ext4.gz\0" \
+ "swupdate-kernel=/boot/bzImage\0" \
+ "swupdate_args=setenv bootargs root=/dev/ram rw ip=dhcp panic=1\0" \
+ "swupdate_dev=0\0" \
+ "swupdate_factory=0\0" \
+ "swupdate_interface=usb\0" \
+ "swupdate_kernel=vmlinuz-4.4.0-28-generic\0" \
+ "swupdate_load=load ${swupdate_interface} ${swupdate_dev}:" \
+ "${swupdate_part} 03000000 ${swupdate-kernel}" \
+ " && load ${swupdate_interface} ${swupdate_dev}:" \
+ "${swupdate_part} 04000000 ${swupdate-initrd}\0" \
+ "swupdate_mmc=setenv swupdate_interface mmc;" \
+ "setenv swupdate_dev ${swupdate_mmcdev};" \
+ "setenv swupdate_part 1;" \
+ "mmc dev ${swupdate_dev};mmc rescan\0" \
+ "swupdate_mmcdev=0\0" \
+ "swupdate_part=1\0" \
+ "swupdate_run=run swupdate_args addtty_yocto addmtd addmisc;" \
+ "if run swupdate_load;then run boot;" \
+ "else echo SWUpdate cannot be started from " \
+ "${swupdate_interface};" \
+ "fi\0" \
+ "swupdate_usb=setenv swupdate_interface usb;" \
+ "setenv swupdate_dev 0;setenv swupdate_part 1;" \
+ "usb start\0" \
+ "logo_tftp=tftp ${loadaddr} ${tftpdir}/logo.bmp;" \
+ "bmp display ${loadaddr}\0" \
+ "preboot=scsi scan;load scsi 0:${ubuntu_part} ${loadaddr} " \
+ "/boot/logo/logo.bmp;bmp display ${loadaddr}\0" \
+ "rootpath=/tftpboot/theadorable-x86-conga/work/" \
+ "rootfs-yocto-swupdate-2017-03-29\0" \
+ "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
+ "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \
+ "set_bootargs_nfs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath},tcp,nfsvers=3\0" \
+ "net_nfs=run start_eth set_bootargs_nfs addtty_yocto addip " \
+ "addmtd addmisc;tftp 03000000 ${tftpdir}/bzImage;" \
+ "zboot 03000000\0" \
+ "load_uboot=tftp ${loadaddr} ${tftpdir}/u-boot.rom\0" \
+ "update_uboot=sf probe;" \
+ "sf update ${loadaddr} 0 800000;saveenv\0" \
+ "upd_uboot=run start_eth load_uboot update_uboot\0"
+
+#endif /* __THEADORABLE_X86_COMMON_H */
diff --git a/include/configs/theadorable-x86-conga-qa3-e3845.h b/include/configs/theadorable-x86-conga-qa3-e3845.h
new file mode 100644
index 0000000..bc0e078
--- /dev/null
+++ b/include/configs/theadorable-x86-conga-qa3-e3845.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+/* Set the board specific parameters */
+#define DEF_ENV_TFTPDIR "theadorable-x86-conga"
+#define DEF_ENV_ETH_INIT ""
+#define DEF_ENV_UBUNTU_PART 2
+#define DEF_ENV_UBUNTU_TTY 0 /* Use ttyS0 */
+#define DEF_ENV_YOCTO_PART 3
+#define DEF_ENV_YOCTO_TTY 0 /* Use ttyS0 */
+
+/*
+ * Include the theadorable-x86 common options, macros and default
+ * environment
+ */
+#include <configs/theadorable-x86-common.h>
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/theadorable-x86-dfi-bt700.h b/include/configs/theadorable-x86-dfi-bt700.h
new file mode 100644
index 0000000..2e15d74
--- /dev/null
+++ b/include/configs/theadorable-x86-dfi-bt700.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+/* Use BayTrail internal HS UART which is memory-mapped */
+#undef CONFIG_SYS_NS16550_PORT_MAPPED
+
+/* Set the board specific parameters */
+#define DEF_ENV_TFTPDIR "theadorable-x86-dfi"
+#define DEF_ENV_ETH_INIT "usb reset"
+#define DEF_ENV_UBUNTU_PART 1
+#define DEF_ENV_UBUNTU_TTY 4 /* Use ttyS4 */
+#define DEF_ENV_YOCTO_PART 2
+#define DEF_ENV_YOCTO_TTY 1 /* Use ttyS1 */
+
+/*
+ * Include the theadorable-x86 common options, macros and default
+ * environment
+ */
+#include <configs/theadorable-x86-common.h>
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 3f9b69a..a7001e7 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -29,9 +29,6 @@
* This version should also enable all other non-production
* interfaces / features.
*/
-#ifdef CONFIG_USB
-#define CONFIG_CMD_PCI
-#endif
/* I2C */
#define CONFIG_SYS_I2C
@@ -86,8 +83,6 @@
#define CONFIG_SYS_MEM_TOP_HIDE 0x80000
/* FPGA programming support */
-#define CONFIG_FPGA
-#define CONFIG_FPGA_ALTERA
#define CONFIG_FPGA_STRATIX_V
/*
diff --git a/include/configs/thuban.h b/include/configs/thuban.h
index cea84ac..23f4dbf 100644
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -37,7 +37,6 @@
#define EEPROM_ADDR_CHIP 0x120
#undef CONFIG_MII
-#undef CONFIG_PHY_GIGE
#define CONFIG_PHY_SMSC
#define CONFIG_FACTORYSET
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 514590a..f2d0d22 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -69,12 +69,6 @@
"fdt_addr=0x94C00000\0" \
"fdt_high=0x9fffffff\0"
-#define CONFIG_BOOTARGS \
- "console=ttyAMA0,115200n8 " \
- "earlycon=pl011,0x87e024000000 " \
- "debug maxcpus=48 rootwait rw "\
- "root=/dev/sda2 coherent_pool=16M"
-
/* Do not preserve environment */
#define CONFIG_ENV_SIZE 0x1000
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index b5f8177..129ae4c 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -149,7 +149,6 @@
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
@@ -178,8 +177,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT 10
-#define CONFIG_PHY_GIGE
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ET1011C
#define CONFIG_PHY_ET1011C_TX_CLK_FIX
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index bba10ec..77ed37c 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -26,8 +26,6 @@
"fatload mmc 0 ${loadaddr} uImage;" \
"bootm ${loadaddr}" \
-#define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk"
-
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
@@ -118,8 +116,6 @@
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
#define CONFIG_SYS_TEXT_BASE 0x80800000
#define CONFIG_DRIVER_TI_EMAC
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index ccd7cd7..ac3eb5d 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -201,10 +201,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
-
-
-/* spl export command */
-#define CONFIG_CMD_SPL
#endif
/* General parts of the framework, required. */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index c6122a0..9358154 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -97,7 +97,6 @@
#endif
/* Network Configuration */
-#define CONFIG_PHYLIB
#define CONFIG_PHY_MARVELL
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
@@ -193,15 +192,11 @@
/* USB Configuration */
#define CONFIG_USB_XHCI_KEYSTONE
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
-/* U-Boot command configuration */
-#define CONFIG_CMD_SAVES
-
/* U-Boot general configuration */
#define CONFIG_MISC_INIT_R
#define CONFIG_MX_CYCLIC
@@ -322,8 +317,6 @@
#endif
#endif
-#define CONFIG_BOOTARGS \
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h
index b4565da..306f503 100644
--- a/include/configs/ti_armv7_omap.h
+++ b/include/configs/ti_armv7_omap.h
@@ -15,10 +15,6 @@
/* I2C IP block */
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP24XX
-
-/* SPI IP Block */
-#define CONFIG_OMAP3_SPI
/*
* GPMC NAND block. We support 1 device and the physical address to
@@ -30,7 +26,6 @@
#define CONFIG_SYS_NAND_BASE 0x8000000
#endif
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND
#endif
/* Now for the remaining common defines */
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 393d867..938136c 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -60,7 +60,6 @@
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(64 << 20))
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 1a6551e..018e4c2 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -139,7 +139,6 @@
* So moving TEXT_BASE down to non-HS limit.
*/
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
@@ -150,7 +149,6 @@
#ifdef CONFIG_SPL_BUILD
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
#undef CONFIG_SYS_I2C
-#undef CONFIG_SYS_I2C_OMAP24XX
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index 4c3a276..73c1d8f 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -100,7 +100,6 @@
#define CONFIG_SPL_TEXT_BASE 0x40300000
#endif
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index 6d9c343..3fb63f3 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -45,9 +45,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 4
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
/* USB Configs */
#define CONFIG_MXC_USB_PORT 1
@@ -150,9 +147,6 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Enable NAND support */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
-
#ifdef CONFIG_CMD_NAND
/* NAND stuff */
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index a03ad67..ba76dcd 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -32,8 +32,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{9600, 19200, 38400, 57600, 115200}
-#define CONFIG_BOOTARGS \
- "console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
#define CONFIG_BOOTCOMMAND \
"dhcp 192.168.1.1:wdr4300.fit && bootm $loadaddr"
@@ -65,6 +63,5 @@
#define CONFIG_CMD_MEMTEST
#define CONFIG_CMD_MII
-#define CONFIG_PHY_GIGE
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index b5b7157..8cc0018 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -81,7 +81,6 @@
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_PHYLIB
#define CONFIG_MII
#define CONFIG_ARP_TIMEOUT 200UL
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
index 69e9079..9c7e5a4 100644
--- a/include/configs/tqma6_mba6.h
+++ b/include/configs/tqma6_mba6.h
@@ -14,8 +14,6 @@
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONSOLE_DEV "ttymxc1"
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 3059d89..5d0a324 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -41,7 +41,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
@@ -166,7 +165,6 @@
"fdtaddr=40800000\0" \
/* Falcon mode definitions */
-#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
/* GPT */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 1f3ce9d..7f6a61a 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -38,7 +38,6 @@
/* Console configuration */
-#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run autoboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index a0fd583..77f8cbd 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -62,7 +62,6 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
/* EEPROM */
@@ -97,10 +96,6 @@
#define CONFIG_SYS_NAND_MAX_OOBFREE 2
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
-/* commands to include */
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
-
/* needed for ubi */
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
@@ -264,7 +259,6 @@
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index fd36634..301065a 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -42,7 +42,6 @@
#define CONFIG_USB_ETHER_ASIX
/* PCI host support */
-#define CONFIG_CMD_PCI
/* General networking support */
diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index 959db5f..0219376 100644
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -61,7 +61,6 @@
* Eth Configs
*/
#define CONFIG_MII
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_FEC_MXC
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 1020355..d2c3e57 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -26,7 +26,6 @@
/*
* Commands configuration
*/
-#define CONFIG_CMD_PCI
/* I2C support */
#define CONFIG_DM_I2C
diff --git a/include/configs/twister.h b/include/configs/twister.h
index 94dde90..bec402e 100644
--- a/include/configs/twister.h
+++ b/include/configs/twister.h
@@ -36,11 +36,7 @@
"bootcmd=run nandboot\0"
/* SPL OS boot options */
-#define CONFIG_CMD_SPL
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
-#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
- 0x600000)
#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index d3fa5d7..26a1a6f 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -41,9 +41,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 60b76ed..9b0a20d 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -112,7 +112,4 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC0"
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-
#endif /* __CONFIG_H */
diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
new file mode 100644
index 0000000..cce2456
--- /dev/null
+++ b/include/configs/ulcb.h
@@ -0,0 +1,108 @@
+/*
+ * include/configs/ulcb.h
+ * This file is ULCB board configuration.
+ *
+ * Copyright (C) 2017 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ULCB_H
+#define __ULCB_H
+
+#undef DEBUG
+
+#define CONFIG_RCAR_BOARD_STRING "ULCB"
+
+#include "rcar-gen3-common.h"
+
+/* M3 ULCB has 2 banks, each with 1 GiB of RAM */
+#if defined(CONFIG_R8A7796)
+#undef PHYS_SDRAM_1_SIZE
+#undef PHYS_SDRAM_2_SIZE
+#define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE)
+#define PHYS_SDRAM_2_SIZE 0x40000000u
+#endif
+
+/* SCIF */
+#define CONFIG_CONS_SCIF2
+#define CONFIG_CONS_INDEX 2
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
+
+/* [A] Hyper Flash */
+/* use to RPC(SPI Multi I/O Bus Controller) */
+
+/* Ethernet RAVB */
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_MICREL
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+
+/* Board Clock */
+/* XTAL_CLK : 33.33MHz */
+#define RCAR_XTAL_CLK 33333333u
+#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
+/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
+/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
+#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
+#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
+#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
+#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
+
+/* Generic Timer Definitions (use in assembler source) */
+#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
+
+/* Generic Interrupt Controller Definitions */
+#define CONFIG_GICV2
+#define GICD_BASE 0xF1010000
+#define GICC_BASE 0xF1020000
+
+/* CPLD SPI */
+#define CONFIG_CMD_SPI
+#define CONFIG_SOFT_SPI
+#define SPI_DELAY udelay(0)
+#define SPI_SDA(val) ulcb_softspi_sda(val)
+#define SPI_SCL(val) ulcb_softspi_scl(val)
+#define SPI_READ ulcb_softspi_read()
+#ifndef __ASSEMBLY__
+void ulcb_softspi_sda(int);
+void ulcb_softspi_scl(int);
+unsigned char ulcb_softspi_read(void);
+#endif
+
+/* i2c */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
+#define CONFIG_SYS_I2C_SLAVE 0x60
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
+#define CONFIG_SYS_I2C_SH_SPEED0 400000
+#define CONFIG_SH_I2C_DATA_HIGH 4
+#define CONFIG_SH_I2C_DATA_LOW 5
+#define CONFIG_SH_I2C_CLOCK 10000000
+
+#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
+
+/* USB */
+#ifdef CONFIG_R8A7795
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
+#else
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#endif
+
+/* SDHI */
+#define CONFIG_SH_SDHI_FREQ 200000000
+
+/* Environment in eMMC, at the end of 2nd "boot sector" */
+#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
+#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_SYS_MMC_ENV_PART 2
+
+/* Module stop status bits */
+/* MFIS, SCIF1 */
+#define CONFIG_SMSTP2_ENA 0x00002040
+/* SCIF2 */
+#define CONFIG_SMSTP3_ENA 0x00000400
+/* INTC-AP, IRQC */
+#define CONFIG_SMSTP4_ENA 0x00000180
+
+#endif /* __ULCB_H */
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index cc65f07..6f53139 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -101,9 +101,6 @@
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-/* USB */
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
-
/* SD/MMC */
#define CONFIG_SUPPORT_EMMC_BOOT
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index 335ce4e..753d821 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -36,14 +36,6 @@
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO
-
-/* serial console */
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
-
/*
* BOOTP options
*/
@@ -52,27 +44,13 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_NAND
-
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
-#define AT91_SPI_CLK 8000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
+ (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
@@ -111,17 +89,12 @@
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END 0x23e00000
-/* bootstrap + u-boot + env in dataflash on CS0 */
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x4000)
+/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_OFFSET 0x2000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
- CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock1 " \
- "mtdparts=" MTDPARTS_DEFAULT " " \
- "rw rootfstype=jffs2"
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 5bacc9d..95e2324 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -87,7 +87,6 @@
BOOTENV
#ifndef CONFIG_CMDLINE
-#define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
#define USBARMORY_FIT_ADDR "0x70800000"
#endif
diff --git a/include/configs/vct.h b/include/configs/vct.h
index f3c6c27..e7c3d4b 100644
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -105,14 +105,6 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
#endif /* CONFIG_CMD_USB */
-#if defined(CONFIG_VCT_NAND)
-#define CONFIG_CMD_NAND
-#endif
-
-#if defined(CONFIG_VCT_ONENAND)
-#define CONFIG_CMD_ONENAND
-#endif
-
/*
* BOOTP options
*/
@@ -247,9 +239,6 @@
* (NOR/OneNAND) usage and Linux kernel booting.
*/
#if defined(CONFIG_VCT_SMALL_IMAGE)
-#undef CONFIG_CMD_STRINGS
-#undef CONFIG_CMD_TERMINAL
-
#undef CONFIG_SMC911X
#undef CONFIG_SYS_I2C_SOFT
#undef CONFIG_SOURCE
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 32ed2f9..38c67cd 100644
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -180,7 +180,6 @@
*/
#define CONFIG_SYS_NAND_BASE 0x61000000
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_CMD_NAND 1
#define CONFIG_NAND_FSL_ELBC 1
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
@@ -313,7 +312,6 @@
/*
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 3b1233f..c06f19d 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -173,15 +173,6 @@
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
-/* Assume we boot with root on the first partition of a USB stick */
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
- "root=/dev/sda2 rw " \
- "rootwait "\
- "earlyprintk=pl011,0x7ff80000 debug "\
- "user_debug=31 "\
- "androidboot.hardware=juno "\
- "loglevel=9"
-
/* Copy the kernel and FDT to DRAM memory and boot */
#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
"if test $? -eq 1; then "\
@@ -215,10 +206,6 @@
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
- "0x1c090000 debug user_debug=31 "\
- "loglevel=9"
-
#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
"smhload ${fdtfile} ${fdt_addr}; " \
"smhload ${initrd_name} ${initrd_addr} "\
@@ -236,13 +223,6 @@
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
-#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
- "0x1c090000 debug user_debug=31 "\
- "androidboot.hardware=fvpbase "\
- "root=/dev/vda2 rw "\
- "rootwait "\
- "loglevel=9"
-
#define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
diff --git a/include/configs/veyron.h b/include/configs/veyron.h
index 3f236aa..3a5fc06 100644
--- a/include/configs/veyron.h
+++ b/include/configs/veyron.h
@@ -17,8 +17,6 @@
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPI_FLASH_GIGADEVICE
-#define CONFIG_CMD_SF_TEST
-
#define CONFIG_KEYBOARD
#endif
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index ae5f627..6aaa4d1 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -31,8 +31,6 @@
#define CONFIG_ENV_OVERWRITE
/* NAND support */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_CMD_NAND
@@ -61,8 +59,6 @@
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
/* QSPI Configs*/
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index dc35b28..e4020d0 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -63,12 +63,6 @@
#endif
-/* USB */
-
-#ifdef CONFIG_CMD_USB
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-#endif
-
/* USB device */
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
@@ -103,9 +97,6 @@
"mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};" \
"bootz ${loadaddr} - ${oftaddr}"
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_start=0x20000\0" \
"kernel_size=0x800000\0" \
diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h
index 0fed7f3..d34292b 100644
--- a/include/configs/vining_2000.h
+++ b/include/configs/vining_2000.h
@@ -72,7 +72,6 @@
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#ifdef CONFIG_CMD_USB
@@ -84,7 +83,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 13ebafe..23dc884 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -343,11 +343,6 @@
#define CONFIG_SYS_RTC_BUS_NUM 0x01
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
#define CONFIG_RTC_RX8025
-#define CONFIG_CMD_TSI148
-
-#if defined(CONFIG_PCI)
- #define CONFIG_CMD_PCI
-#endif
/* Pass Ethernet MAC to VxWorks */
#define CONFIG_SYS_VXWORKS_MAC_PTR 0x000043f0
@@ -530,8 +525,6 @@
#define CONFIG_LOADADDR 800000 /* def location for tftp and bootm */
-#undef CONFIG_BOOTARGS /* boot command will set bootargs */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=vme8349\0" \
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 4c6b318..d9237d7 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -60,7 +60,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 1
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
/* Framebuffer */
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index 515f360..f3eba9c 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -76,8 +76,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
-#define CONFIG_CMD_NAND
-
#define CONFIG_MXC_GPIO
#define CONFIG_NET_RETRY_COUNT 100
@@ -90,8 +88,6 @@
*/
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
#define CONFIG_FEC_MXC_PHYADDR 0x1
#define CONFIG_MII
diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h
index bab7fdf..fb73856 100644
--- a/include/configs/woodburn_sd.h
+++ b/include/configs/woodburn_sd.h
@@ -21,7 +21,6 @@
* SPL
*/
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x10002300
#define CONFIG_SPL_MAX_SIZE (64 * 1024) /* 8 KB for stack */
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index 807cb99..628797d 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -57,7 +57,6 @@
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR 0
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
@@ -119,8 +118,6 @@
#define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
#define CONFIG_NAND_LPC32XX_MLC
-#define CONFIG_CMD_NAND
-
/*
* GPIO
*/
@@ -133,7 +130,6 @@
#define CONFIG_LPC32XX_SSP
#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
-#define CONFIG_CMD_MAX6957
/*
* Environment
*/
@@ -151,7 +147,6 @@
#define CONFIG_INITRD_TAG
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyS2,115200n8"
#define CONFIG_LOADADDR 0x80008000
/*
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 0076707..1255edd 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -74,9 +74,6 @@
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9031
#define CONFIG_SPEAR_GPIO
@@ -100,12 +97,6 @@
#define CONFIG_USB_EHCI_SPEAR
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-/*
- * Command support defines
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_SAVES
-
/* Filesystem support (for USB key) */
#define CONFIG_SUPPORT_VFAT
@@ -246,7 +237,6 @@
#define CONFIG_SPL_TEXT_BASE 0xd2800b00
#define CONFIG_SPL_MAX_SIZE (CONFIG_SRAM_SIZE - 0xb00)
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
#define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index 4d02cd4..27ba9ee 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -15,14 +15,6 @@
#define CONFIG_X86_REFCODE_ADDR 0xffea0000
#define CONFIG_X86_REFCODE_RUN_ADDR 0
-#define CONFIG_SCSI_DEV_LIST \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
- {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
-
#define CONFIG_PCI_MEM_BUS 0xe0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x10000000
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 1be6974..687f8df 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -63,18 +63,10 @@
#define CONFIG_SUPPORT_VFAT
-/* x86 GPIOs are accessed through a PCI device */
-#define CONFIG_INTEL_ICH6_GPIO
-
/*-----------------------------------------------------------------------
* Command line configuration.
*/
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_ZBOOT
-
-#define CONFIG_BOOTARGS \
- "root=/dev/sdb3 init=/sbin/init rootwait ro"
#define CONFIG_BOOTCOMMAND \
"ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
@@ -111,7 +103,6 @@
/*-----------------------------------------------------------------------
* FLASH configuration
*/
-#define CONFIG_CMD_SF_TEST
#define CONFIG_SPI
/*-----------------------------------------------------------------------
@@ -128,7 +119,6 @@
* USB configuration
*/
#define CONFIG_USB_EHCI_PCI
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_USB_HOST_ETHER
diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
index bd829a9..73f4316 100644
--- a/include/configs/xfi3.h
+++ b/include/configs/xfi3.h
@@ -23,7 +23,6 @@
/* Booting Linux */
#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index c30e37c..6dcc8e5 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -73,13 +73,9 @@
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif
-# define FAT_ENV_DEVICE_AND_PART "0:auto"
-# define FAT_ENV_FILE "uboot.env"
-# define FAT_ENV_INTERFACE "mmc"
#endif
#ifdef CONFIG_NAND_ARASAN
-# define CONFIG_CMD_NAND_LOCK_UNLOCK
# define CONFIG_SYS_MAX_NAND_DEVICE 1
# define CONFIG_SYS_NAND_SELF_INIT
# define CONFIG_SYS_NAND_ONFI_DETECTION
@@ -90,12 +86,9 @@
#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
-#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
-
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CONFIG_USB_CABLE_CHECK
-#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_USB_FUNCTION_THOR
#define CONFIG_THOR_RESET_OFF
#define DFU_ALT_INFO_RAM \
@@ -157,7 +150,6 @@
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_NATSEMI
# define CONFIG_PHY_TI
-# define CONFIG_PHY_GIGE
# define CONFIG_PHY_VITESSE
# define CONFIG_PHY_REALTEK
# define PHY_ANEG_TIMEOUT 20000
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
index 4194b66..85f78ba 100644
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ b/include/configs/xilinx_zynqmp_zcu102.h
@@ -38,8 +38,6 @@
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 9b6a5f8..c4cd749 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -304,7 +304,6 @@
* Networking options
*/
#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_ETHPRIME "eTSEC1"
@@ -482,16 +481,6 @@
#define CONFIG_SYS_IBAT7U CONFIG_SYS_DBAT7U
/*
- * Command configuration.
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 715acc4..8fb05416 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -245,7 +245,6 @@
* Networking options
*/
#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_ETHPRIME "eTSEC1"
@@ -285,16 +284,6 @@
#define CONFIG_BOOTP_GATEWAY
/*
- * Command configuration.
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 7d05a5a..85faaf0 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -304,7 +304,6 @@
* Networking options
*/
#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_TSEC_TBI
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
@@ -335,16 +334,6 @@
#define CONFIG_HAS_ETH1
/*
- * Command configuration.
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 68795d8..033537c 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -290,7 +290,6 @@
* Networking options
*/
#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#define CONFIG_TSEC_TBI
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
@@ -334,16 +333,6 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
/*
- * Command configuration.
- */
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PCA953X
-#define CONFIG_CMD_PCA953X_INFO
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_REGINFO
-
-/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index 629e3df..fdb504d 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -75,7 +75,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_IMX_THERMAL
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 206ec34..df983d9 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -123,12 +123,6 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/*=================*/
-/* U-Boot commands */
-/*=================*/
-
-#define CONFIG_CMD_SAVES
-
/*==============================*/
/* U-Boot autoboot configuration */
/*==============================*/
diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h
index a7988e0..b1afde9 100644
--- a/include/configs/zc5202.h
+++ b/include/configs/zc5202.h
@@ -26,7 +26,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_MV88E6352_SWITCH
-#define CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h
index 61c6a60..f71cdfb 100644
--- a/include/configs/zc5601.h
+++ b/include/configs/zc5601.h
@@ -25,7 +25,6 @@
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x10
-#define CONFIG_PHYLIB
#define CONFIG_FEC_FIXED_SPEED 1000 /* No autoneg, fix Gb */
#endif /*__EL6Q_CONFIG_H */
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index e730824..5279f54 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -35,8 +35,6 @@
"else " \
"bootm 0x50000; " \
"fi; "
-#define CONFIG_BOOTARGS \
- "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 83a2a02..6359587 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -75,7 +75,6 @@
#endif
#ifdef CONFIG_NAND_ZYNQ
-#define CONFIG_CMD_NAND_LOCK_UNLOCK
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_MTD_DEVICE
@@ -92,7 +91,6 @@
# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
# define DFU_DEFAULT_POLL_TIMEOUT 300
# define CONFIG_USB_CABLE_CHECK
-# define CONFIG_CMD_THOR_DOWNLOAD
# define CONFIG_THOR_RESET_OFF
# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
@@ -172,6 +170,50 @@
/* enable preboot to be loaded before CONFIG_BOOTDELAY */
#define CONFIG_PREBOOT
+/* Boot configuration */
+#define CONFIG_BOOTCOMMAND "run $modeboot || run distro_bootcmd"
+#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
+
+/* Distro boot enablement */
+
+#ifdef CONFIG_SPL_BUILD
+#define BOOTENV
+#else
+#include <config_distro_defaults.h>
+
+#ifdef CONFIG_CMD_MMC
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
+#else
+#define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#ifdef CONFIG_CMD_USB
+#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
+#else
+#define BOOT_TARGET_DEVICES_USB(func)
+#endif
+
+#if defined(CONFIG_CMD_PXE)
+#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
+#else
+#define BOOT_TARGET_DEVICES_PXE(func)
+#endif
+
+#if defined(CONFIG_CMD_DHCP)
+#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
+#else
+#define BOOT_TARGET_DEVICES_DHCP(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICES_MMC(func) \
+ BOOT_TARGET_DEVICES_USB(func) \
+ BOOT_TARGET_DEVICES_PXE(func) \
+ BOOT_TARGET_DEVICES_DHCP(func)
+
+#include <config_distro_bootcmd.h>
+#endif /* CONFIG_SPL_BUILD */
+
/* Default environment */
#ifndef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -183,6 +225,11 @@
"fdt_high=0x20000000\0" \
"initrd_high=0x20000000\0" \
"loadbootenv_addr=0x2000000\0" \
+ "fdt_addr_r=0x1f00000\0" \
+ "pxefile_addr_r=0x2000000\0" \
+ "kernel_addr_r=0x2000000\0" \
+ "scriptaddr=0x3000000\0" \
+ "ramdisk_addr_r=0x3100000\0" \
"bootenv=uEnv.txt\0" \
"bootenv_dev=mmc\0" \
"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
@@ -218,12 +265,10 @@
"echo Copying FIT from USB to RAM... && " \
"load usb 0 ${load_addr} ${fit_image} && " \
"bootm ${load_addr}; fi\0" \
- DFU_ALT_INFO
+ DFU_ALT_INFO \
+ BOOTENV
#endif
-#define CONFIG_BOOTCOMMAND "run $modeboot"
-#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
-
/* Miscellaneous configurable options */
#define CONFIG_CMDLINE_EDITING
@@ -272,11 +317,8 @@
/* Commands */
/* SPL part */
-#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
-
/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
diff --git a/include/dataflash.h b/include/dataflash.h
index 84a56c3..c9f2220 100644
--- a/include/dataflash.h
+++ b/include/dataflash.h
@@ -197,7 +197,7 @@
extern void dataflash_print_info (void);
extern void dataflash_perror (int err);
-extern void AT91F_DataflashSetEnv (void);
+extern void AT91F_Dataflashenv_set(void);
extern struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS];
extern dataflash_protect_t area_list[NB_DATAFLASH_AREA];
diff --git a/include/dfu.h b/include/dfu.h
index f39d3f1..7e322d9 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -110,7 +110,7 @@
struct sf_internal_data sf;
} data;
- long (*get_medium_size)(struct dfu_entity *dfu);
+ int (*get_medium_size)(struct dfu_entity *dfu, u64 *size);
int (*read_medium)(struct dfu_entity *dfu,
u64 offset, void *buf, long *len);
@@ -132,7 +132,7 @@
u8 *i_buf;
u8 *i_buf_start;
u8 *i_buf_end;
- long r_left;
+ u64 r_left;
long b_left;
u32 bad_skip; /* for nand use */
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index c5ea391..c49d287 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -353,6 +353,24 @@
int index, struct of_phandle_args *out_args);
/**
+ * of_count_phandle_with_args() - Count the number of phandle in a list
+ *
+ * @np: pointer to a device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @return number of phandle found, -ENOENT if
+ * @list_name does not exist, -EINVAL if a phandle was not found,
+ * @cells_name could not be found, the arguments were truncated or there
+ * were too many arguments.
+ *
+ * Returns number of phandle found on success, on error returns appropriate
+ * errno value.
+ *
+ */
+int of_count_phandle_with_args(const struct device_node *np,
+ const char *list_name, const char *cells_name);
+
+/**
* of_alias_scan() - Scan all properties of the 'aliases' node
*
* The function scans all the properties of the 'aliases' node and populates
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 15ad519..210ddb2 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -15,6 +15,8 @@
/* Enable checks to protect against invalid calls */
#undef OF_CHECKS
+struct resource;
+
/**
* ofnode - reference to a device tree node
*
@@ -433,6 +435,23 @@
struct ofnode_phandle_args *out_args);
/**
+ * ofnode_count_phandle_with_args() - Count number of phandle in a list
+ *
+ * This function is useful to count phandles into a list.
+ * Returns number of phandle on success, on error returns appropriate
+ * errno value.
+ *
+ * @node: device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @return number of phandle on success, -ENOENT if @list_name does not
+ * exist, -EINVAL if a phandle was not found, @cells_name could not
+ * be found.
+ */
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+ const char *cells_name);
+
+/**
* ofnode_path() - find a node by full path
*
* @path: Full path to node, e.g. "/bus/spi@1"
@@ -605,4 +624,6 @@
*/
bool ofnode_pre_reloc(ofnode node);
+int ofnode_read_resource(ofnode node, uint index, struct resource *res);
+
#endif
diff --git a/include/dm/read.h b/include/dm/read.h
index b86a2f5..c3a4a56 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -44,16 +44,6 @@
return ofnode_valid(dev_ofnode(dev));
}
-/**
- * dev_read_resource() - obtain an indexed resource from a device.
- *
- * @dev: devuce to examine
- * @index index of the resource to retrieve (0 = first)
- * @res returns the resource
- * @return 0 if ok, negative on error
- */
-int dev_read_resource(struct udevice *dev, uint index, struct resource *res);
-
#ifndef CONFIG_DM_DEV_READ_INLINE
/**
* dev_read_u32_default() - read a 32-bit integer from a device's DT property
@@ -209,6 +199,24 @@
struct ofnode_phandle_args *out_args);
/**
+ * dev_count_phandle_with_args() - Return phandle number in a list
+ *
+ * This function is usefull to get phandle number contained in a property list.
+ * For example, this allows to allocate the right amount of memory to keep
+ * clock's reference contained into the "clocks" property.
+ *
+ *
+ * @dev: device whose node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name: property name that specifies phandles' arguments count
+ * @Returns number of phandle found on success, on error returns appropriate
+ * errno value.
+ */
+
+int dev_count_phandle_with_args(struct udevice *dev, const char *list_name,
+ const char *cells_name);
+
+/**
* dev_read_addr_cells() - Get the number of address cells for a device's node
*
* This walks back up the tree to find the closest #address-cells property
@@ -266,7 +274,7 @@
* @lenp: place to put length on success
* @return pointer to property, or NULL if not found
*/
-const u32 *dev_read_prop(struct udevice *dev, const char *propname, int *lenp);
+const void *dev_read_prop(struct udevice *dev, const char *propname, int *lenp);
/**
* dev_read_alias_seq() - Get the alias sequence number of a node
@@ -348,6 +356,16 @@
*/
int dev_read_enabled(struct udevice *dev);
+/**
+ * dev_read_resource() - obtain an indexed resource from a device.
+ *
+ * @dev: devuce to examine
+ * @index index of the resource to retrieve (0 = first)
+ * @res returns the resource
+ * @return 0 if ok, negative on error
+ */
+int dev_read_resource(struct udevice *dev, uint index, struct resource *res);
+
#else /* CONFIG_DM_DEV_READ_INLINE is enabled */
static inline int dev_read_u32_default(struct udevice *dev,
@@ -416,6 +434,13 @@
out_args);
}
+static inline int dev_count_phandle_with_args(struct udevice *dev,
+ const char *list_name, const char *cells_name)
+{
+ return ofnode_count_phandle_with_args(dev_ofnode(dev), list_name,
+ cells_name);
+}
+
static inline int dev_read_addr_cells(struct udevice *dev)
{
/* NOTE: this call should walk up the parent stack */
@@ -443,8 +468,8 @@
return fdt_get_phandle(gd->fdt_blob, dev_of_offset(dev));
}
-static inline const u32 *dev_read_prop(struct udevice *dev,
- const char *propname, int *lenp)
+static inline const void *dev_read_prop(struct udevice *dev,
+ const char *propname, int *lenp)
{
return ofnode_get_property(dev_ofnode(dev), propname, lenp);
}
@@ -482,6 +507,12 @@
return fdtdec_get_is_enabled(gd->fdt_blob, dev_of_offset(dev));
}
+static inline int dev_read_resource(struct udevice *dev, uint index,
+ struct resource *res)
+{
+ return ofnode_read_resource(dev_ofnode(dev), index, res);
+}
+
#endif /* CONFIG_DM_DEV_READ_INLINE */
/**
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 2e6498b..1a50199 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -52,6 +52,7 @@
UCLASS_MOD_EXP, /* RSA Mod Exp device */
UCLASS_MTD, /* Memory Technology Device (MTD) device */
UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
+ UCLASS_NVME, /* NVM Express device */
UCLASS_PANEL, /* Display panel, such as an LCD */
UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
UCLASS_PCH, /* x86 platform controller hub */
diff --git a/include/dt-bindings/clock/r8a7795-cpg-mssr.h b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
new file mode 100644
index 0000000..f047eaf
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a7795 CPG Core Clocks */
+#define R8A7795_CLK_Z 0
+#define R8A7795_CLK_Z2 1
+#define R8A7795_CLK_ZR 2
+#define R8A7795_CLK_ZG 3
+#define R8A7795_CLK_ZTR 4
+#define R8A7795_CLK_ZTRD2 5
+#define R8A7795_CLK_ZT 6
+#define R8A7795_CLK_ZX 7
+#define R8A7795_CLK_S0D1 8
+#define R8A7795_CLK_S0D4 9
+#define R8A7795_CLK_S1D1 10
+#define R8A7795_CLK_S1D2 11
+#define R8A7795_CLK_S1D4 12
+#define R8A7795_CLK_S2D1 13
+#define R8A7795_CLK_S2D2 14
+#define R8A7795_CLK_S2D4 15
+#define R8A7795_CLK_S3D1 16
+#define R8A7795_CLK_S3D2 17
+#define R8A7795_CLK_S3D4 18
+#define R8A7795_CLK_LB 19
+#define R8A7795_CLK_CL 20
+#define R8A7795_CLK_ZB3 21
+#define R8A7795_CLK_ZB3D2 22
+#define R8A7795_CLK_CR 23
+#define R8A7795_CLK_CRD2 24
+#define R8A7795_CLK_SD0H 25
+#define R8A7795_CLK_SD0 26
+#define R8A7795_CLK_SD1H 27
+#define R8A7795_CLK_SD1 28
+#define R8A7795_CLK_SD2H 29
+#define R8A7795_CLK_SD2 30
+#define R8A7795_CLK_SD3H 31
+#define R8A7795_CLK_SD3 32
+#define R8A7795_CLK_SSP2 33
+#define R8A7795_CLK_SSP1 34
+#define R8A7795_CLK_SSPRS 35
+#define R8A7795_CLK_RPC 36
+#define R8A7795_CLK_RPCD2 37
+#define R8A7795_CLK_MSO 38
+#define R8A7795_CLK_CANFD 39
+#define R8A7795_CLK_HDMI 40
+#define R8A7795_CLK_CSI0 41
+#define R8A7795_CLK_CSIREF 42
+#define R8A7795_CLK_CP 43
+#define R8A7795_CLK_CPEX 44
+#define R8A7795_CLK_R 45
+#define R8A7795_CLK_OSC 46
+
+/* r8a7795 ES2.0 CPG Core Clocks */
+#define R8A7795_CLK_S0D2 47
+#define R8A7795_CLK_S0D3 48
+#define R8A7795_CLK_S0D6 49
+#define R8A7795_CLK_S0D8 50
+#define R8A7795_CLK_S0D12 51
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/clock/r8a7796-cpg-mssr.h b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
new file mode 100644
index 0000000..1e59426
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7796-cpg-mssr.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a7796 CPG Core Clocks */
+#define R8A7796_CLK_Z 0
+#define R8A7796_CLK_Z2 1
+#define R8A7796_CLK_ZR 2
+#define R8A7796_CLK_ZG 3
+#define R8A7796_CLK_ZTR 4
+#define R8A7796_CLK_ZTRD2 5
+#define R8A7796_CLK_ZT 6
+#define R8A7796_CLK_ZX 7
+#define R8A7796_CLK_S0D1 8
+#define R8A7796_CLK_S0D2 9
+#define R8A7796_CLK_S0D3 10
+#define R8A7796_CLK_S0D4 11
+#define R8A7796_CLK_S0D6 12
+#define R8A7796_CLK_S0D8 13
+#define R8A7796_CLK_S0D12 14
+#define R8A7796_CLK_S1D1 15
+#define R8A7796_CLK_S1D2 16
+#define R8A7796_CLK_S1D4 17
+#define R8A7796_CLK_S2D1 18
+#define R8A7796_CLK_S2D2 19
+#define R8A7796_CLK_S2D4 20
+#define R8A7796_CLK_S3D1 21
+#define R8A7796_CLK_S3D2 22
+#define R8A7796_CLK_S3D4 23
+#define R8A7796_CLK_LB 24
+#define R8A7796_CLK_CL 25
+#define R8A7796_CLK_ZB3 26
+#define R8A7796_CLK_ZB3D2 27
+#define R8A7796_CLK_ZB3D4 28
+#define R8A7796_CLK_CR 29
+#define R8A7796_CLK_CRD2 30
+#define R8A7796_CLK_SD0H 31
+#define R8A7796_CLK_SD0 32
+#define R8A7796_CLK_SD1H 33
+#define R8A7796_CLK_SD1 34
+#define R8A7796_CLK_SD2H 35
+#define R8A7796_CLK_SD2 36
+#define R8A7796_CLK_SD3H 37
+#define R8A7796_CLK_SD3 38
+#define R8A7796_CLK_SSP2 39
+#define R8A7796_CLK_SSP1 40
+#define R8A7796_CLK_SSPRS 41
+#define R8A7796_CLK_RPC 42
+#define R8A7796_CLK_RPCD2 43
+#define R8A7796_CLK_MSO 44
+#define R8A7796_CLK_CANFD 45
+#define R8A7796_CLK_HDMI 46
+#define R8A7796_CLK_CSI0 47
+#define R8A7796_CLK_CSIREF 48
+#define R8A7796_CLK_CP 49
+#define R8A7796_CLK_CPEX 50
+#define R8A7796_CLK_R 51
+#define R8A7796_CLK_OSC 52
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/clock/renesas-cpg-mssr.h b/include/dt-bindings/clock/renesas-cpg-mssr.h
new file mode 100644
index 0000000..569a3cc
--- /dev/null
+++ b/include/dt-bindings/clock/renesas-cpg-mssr.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__
+
+#define CPG_CORE 0 /* Core Clock */
+#define CPG_MOD 1 /* Module Clock */
+
+#endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/memory/rk3368-dmc.h b/include/dt-bindings/memory/rk3368-dmc.h
new file mode 100644
index 0000000..b06ffde
--- /dev/null
+++ b/include/dt-bindings/memory/rk3368-dmc.h
@@ -0,0 +1,30 @@
+#ifndef DT_BINDINGS_RK3368_DMC_H
+#define DT_BINDINGS_RK3368_DMC_H
+
+#define DMC_MSCH_CBDR 0x0
+#define DMC_MSCH_CBRD 0x1
+#define DMC_MSCH_CRBD 0x2
+
+#define DDR3_800D 0
+#define DDR3_800E 1
+#define DDR3_1066E 2
+#define DDR3_1066F 3
+#define DDR3_1066G 4
+#define DDR3_1333F 5
+#define DDR3_1333G 6
+#define DDR3_1333H 7
+#define DDR3_1333J 8
+#define DDR3_1600G 9
+#define DDR3_1600H 10
+#define DDR3_1600J 11
+#define DDR3_1600K 12
+#define DDR3_1866J 13
+#define DDR3_1866K 14
+#define DDR3_1866L 15
+#define DDR3_1866M 16
+#define DDR3_2133K 17
+#define DDR3_2133L 18
+#define DDR3_2133M 19
+#define DDR3_2133N 20
+
+#endif
diff --git a/include/dt-bindings/power/r8a7795-sysc.h b/include/dt-bindings/power/r8a7795-sysc.h
new file mode 100644
index 0000000..ad679ee
--- /dev/null
+++ b/include/dt-bindings/power/r8a7795-sysc.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7795_PD_CA57_CPU0 0
+#define R8A7795_PD_CA57_CPU1 1
+#define R8A7795_PD_CA57_CPU2 2
+#define R8A7795_PD_CA57_CPU3 3
+#define R8A7795_PD_CA53_CPU0 5
+#define R8A7795_PD_CA53_CPU1 6
+#define R8A7795_PD_CA53_CPU2 7
+#define R8A7795_PD_CA53_CPU3 8
+#define R8A7795_PD_A3VP 9
+#define R8A7795_PD_CA57_SCU 12
+#define R8A7795_PD_CR7 13
+#define R8A7795_PD_A3VC 14
+#define R8A7795_PD_3DG_A 17
+#define R8A7795_PD_3DG_B 18
+#define R8A7795_PD_3DG_C 19
+#define R8A7795_PD_3DG_D 20
+#define R8A7795_PD_CA53_SCU 21
+#define R8A7795_PD_3DG_E 22
+#define R8A7795_PD_A3IR 24
+#define R8A7795_PD_A2VC0 25 /* ES1.x only */
+#define R8A7795_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A7795_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
diff --git a/include/dt-bindings/power/r8a7796-sysc.h b/include/dt-bindings/power/r8a7796-sysc.h
new file mode 100644
index 0000000..5b4daab
--- /dev/null
+++ b/include/dt-bindings/power/r8a7796-sysc.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2016 Glider bvba
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7796_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7796_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7796_PD_CA57_CPU0 0
+#define R8A7796_PD_CA57_CPU1 1
+#define R8A7796_PD_CA53_CPU0 5
+#define R8A7796_PD_CA53_CPU1 6
+#define R8A7796_PD_CA53_CPU2 7
+#define R8A7796_PD_CA53_CPU3 8
+#define R8A7796_PD_CA57_SCU 12
+#define R8A7796_PD_CR7 13
+#define R8A7796_PD_A3VC 14
+#define R8A7796_PD_3DG_A 17
+#define R8A7796_PD_3DG_B 18
+#define R8A7796_PD_CA53_SCU 21
+#define R8A7796_PD_A3IR 24
+#define R8A7796_PD_A2VC0 25
+#define R8A7796_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A7796_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A7796_SYSC_H__ */
diff --git a/include/dt-structs.h b/include/dt-structs.h
index e13afa6..0732c44 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __DT_STTUCTS
-#define __DT_STTUCTS
+#ifndef __DT_STRUCTS
+#define __DT_STRUCTS
/* These structures may only be used in SPL */
#if CONFIG_IS_ENABLED(OF_PLATDATA)
diff --git a/include/efi.h b/include/efi.h
index 3d58780..02b78b3 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -39,19 +39,43 @@
#define EFI_BITS_PER_LONG 64
#endif
-#define EFI_SUCCESS 0
-#define EFI_LOAD_ERROR (1 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_INVALID_PARAMETER (2 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_UNSUPPORTED (3 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_BAD_BUFFER_SIZE (4 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_BUFFER_TOO_SMALL (5 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_NOT_READY (6 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_DEVICE_ERROR (7 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_WRITE_PROTECTED (8 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_OUT_OF_RESOURCES (9 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_NOT_FOUND (14 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_ACCESS_DENIED (15 | (1UL << (EFI_BITS_PER_LONG - 1)))
-#define EFI_SECURITY_VIOLATION (26 | (1UL << (EFI_BITS_PER_LONG - 1)))
+/* Bit mask for EFI status code with error */
+#define EFI_ERROR_MASK (1UL << (EFI_BITS_PER_LONG - 1))
+/* Status codes returned by EFI protocols */
+#define EFI_SUCCESS 0
+#define EFI_LOAD_ERROR (EFI_ERROR_MASK | 1)
+#define EFI_INVALID_PARAMETER (EFI_ERROR_MASK | 2)
+#define EFI_UNSUPPORTED (EFI_ERROR_MASK | 3)
+#define EFI_BAD_BUFFER_SIZE (EFI_ERROR_MASK | 4)
+#define EFI_BUFFER_TOO_SMALL (EFI_ERROR_MASK | 5)
+#define EFI_NOT_READY (EFI_ERROR_MASK | 6)
+#define EFI_DEVICE_ERROR (EFI_ERROR_MASK | 7)
+#define EFI_WRITE_PROTECTED (EFI_ERROR_MASK | 8)
+#define EFI_OUT_OF_RESOURCES (EFI_ERROR_MASK | 9)
+#define EFI_VOLUME_CORRUPTED (EFI_ERROR_MASK | 10)
+#define EFI_VOLUME_FULL (EFI_ERROR_MASK | 11)
+#define EFI_NO_MEDIA (EFI_ERROR_MASK | 12)
+#define EFI_MEDIA_CHANGED (EFI_ERROR_MASK | 13)
+#define EFI_NOT_FOUND (EFI_ERROR_MASK | 14)
+#define EFI_ACCESS_DENIED (EFI_ERROR_MASK | 15)
+#define EFI_NO_RESPONSE (EFI_ERROR_MASK | 16)
+#define EFI_NO_MAPPING (EFI_ERROR_MASK | 17)
+#define EFI_TIMEOUT (EFI_ERROR_MASK | 18)
+#define EFI_NOT_STARTED (EFI_ERROR_MASK | 19)
+#define EFI_ALREADY_STARTED (EFI_ERROR_MASK | 20)
+#define EFI_ABORTED (EFI_ERROR_MASK | 21)
+#define EFI_ICMP_ERROR (EFI_ERROR_MASK | 22)
+#define EFI_TFTP_ERROR (EFI_ERROR_MASK | 23)
+#define EFI_PROTOCOL_ERROR (EFI_ERROR_MASK | 24)
+#define EFI_INCOMPATIBLE_VERSION (EFI_ERROR_MASK | 25)
+#define EFI_SECURITY_VIOLATION (EFI_ERROR_MASK | 26)
+#define EFI_CRC_ERROR (EFI_ERROR_MASK | 27)
+#define EFI_END_OF_MEDIA (EFI_ERROR_MASK | 28)
+#define EFI_END_OF_FILE (EFI_ERROR_MASK | 31)
+#define EFI_INVALID_LANGUAGE (EFI_ERROR_MASK | 32)
+#define EFI_COMPROMISED_DATA (EFI_ERROR_MASK | 33)
+#define EFI_IP_ADDRESS_CONFLICT (EFI_ERROR_MASK | 34)
+#define EFI_HTTP_ERROR (EFI_ERROR_MASK | 35)
typedef unsigned long efi_status_t;
typedef u64 efi_physical_addr_t;
diff --git a/include/efi_api.h b/include/efi_api.h
index f071b36..ec1b321 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -22,20 +22,33 @@
#endif
/* Types and defines for EFI CreateEvent */
-enum efi_event_type {
+enum efi_timer_delay {
EFI_TIMER_STOP = 0,
EFI_TIMER_PERIODIC = 1,
EFI_TIMER_RELATIVE = 2
};
-#define EVT_NOTIFY_WAIT 0x00000100
-#define EVT_NOTIFY_SIGNAL 0x00000200
+#define UINTN size_t
+
+#define EVT_TIMER 0x80000000
+#define EVT_RUNTIME 0x40000000
+#define EVT_NOTIFY_WAIT 0x00000100
+#define EVT_NOTIFY_SIGNAL 0x00000200
+#define EVT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201
+#define EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE 0x60000202
+
+#define TPL_APPLICATION 0x04
+#define TPL_CALLBACK 0x08
+#define TPL_NOTIFY 0x10
+#define TPL_HIGH_LEVEL 0x1F
+
+struct efi_event;
/* EFI Boot Services table */
struct efi_boot_services {
struct efi_table_hdr hdr;
- efi_status_t (EFIAPI *raise_tpl)(unsigned long new_tpl);
- void (EFIAPI *restore_tpl)(unsigned long old_tpl);
+ efi_status_t (EFIAPI *raise_tpl)(UINTN new_tpl);
+ void (EFIAPI *restore_tpl)(UINTN old_tpl);
efi_status_t (EFIAPI *allocate_pages)(int, int, unsigned long,
efi_physical_addr_t *);
@@ -46,19 +59,21 @@
efi_status_t (EFIAPI *allocate_pool)(int, unsigned long, void **);
efi_status_t (EFIAPI *free_pool)(void *);
- efi_status_t (EFIAPI *create_event)(enum efi_event_type type,
- unsigned long notify_tpl,
- void (EFIAPI *notify_function) (void *event,
- void *context),
- void *notify_context, void **event);
- efi_status_t (EFIAPI *set_timer)(void *event, int type,
- uint64_t trigger_time);
+ efi_status_t (EFIAPI *create_event)(uint32_t type,
+ UINTN notify_tpl,
+ void (EFIAPI *notify_function) (
+ struct efi_event *event,
+ void *context),
+ void *notify_context, struct efi_event **event);
+ efi_status_t (EFIAPI *set_timer)(struct efi_event *event,
+ enum efi_timer_delay type,
+ uint64_t trigger_time);
efi_status_t (EFIAPI *wait_for_event)(unsigned long number_of_events,
- void *event, unsigned long *index);
- efi_status_t (EFIAPI *signal_event)(void *event);
- efi_status_t (EFIAPI *close_event)(void *event);
- efi_status_t (EFIAPI *check_event)(void *event);
-
+ struct efi_event **event, unsigned long *index);
+ efi_status_t (EFIAPI *signal_event)(struct efi_event *event);
+ efi_status_t (EFIAPI *close_event)(struct efi_event *event);
+ efi_status_t (EFIAPI *check_event)(struct efi_event *event);
+#define EFI_NATIVE_INTERFACE 0x00000000
efi_status_t (EFIAPI *install_protocol_interface)(
void **handle, efi_guid_t *protocol,
int protocol_interface_type, void *protocol_interface);
@@ -71,7 +86,7 @@
void **);
void *reserved;
efi_status_t (EFIAPI *register_protocol_notify)(
- efi_guid_t *protocol, void *event,
+ efi_guid_t *protocol, struct efi_event *event,
void **registration);
efi_status_t (EFIAPI *locate_handle)(
enum efi_locate_search_type search_type,
@@ -334,6 +349,11 @@
bool cursor_visible;
};
+
+#define EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID \
+ EFI_GUID(0x387477c2, 0x69c7, 0x11d2, \
+ 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b)
+
struct efi_simple_text_output_protocol {
void *reset;
efi_status_t (EFIAPI *output_string)(
@@ -368,13 +388,17 @@
s16 unicode_char;
};
+#define EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID \
+ EFI_GUID(0x387477c1, 0x69c7, 0x11d2, \
+ 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b)
+
struct efi_simple_input_interface {
efi_status_t(EFIAPI *reset)(struct efi_simple_input_interface *this,
bool ExtendedVerification);
efi_status_t(EFIAPI *read_key_stroke)(
struct efi_simple_input_interface *this,
struct efi_input_key *key);
- void *wait_for_key;
+ struct efi_event *wait_for_key;
};
#define CONSOLE_CONTROL_GUID \
@@ -395,6 +419,30 @@
uint16_t *password);
};
+#define EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID \
+ EFI_GUID(0x8b843e20, 0x8132, 0x4852, \
+ 0x90, 0xcc, 0x55, 0x1a, 0x4e, 0x4a, 0x7f, 0x1c)
+
+struct efi_device_path_protocol
+{
+ uint8_t type;
+ uint8_t sub_type;
+ uint16_t length;
+ uint8_t data[];
+};
+
+struct efi_device_path_to_text_protocol
+{
+ uint16_t *(EFIAPI *convert_device_node_to_text)(
+ struct efi_device_path_protocol *device_node,
+ bool display_only,
+ bool allow_shortcuts);
+ uint16_t *(EFIAPI *convert_device_path_to_text)(
+ struct efi_device_path_protocol *device_path,
+ bool display_only,
+ bool allow_shortcuts);
+};
+
#define EFI_GOP_GUID \
EFI_GUID(0x9042a9de, 0x23dc, 0x4a38, \
0x96, 0xfb, 0x7a, 0xde, 0xd0, 0x80, 0x51, 0x6a)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 99619f5..037cc7c 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -15,49 +15,65 @@
#include <linux/list.h>
+int __efi_entry_check(void);
+int __efi_exit_check(void);
+const char *__efi_nesting_inc(void);
+const char *__efi_nesting_dec(void);
+
+/*
+ * Enter the u-boot world from UEFI:
+ */
#define EFI_ENTRY(format, ...) do { \
- efi_restore_gd(); \
- debug("EFI: Entry %s(" format ")\n", __func__, ##__VA_ARGS__); \
+ assert(__efi_entry_check()); \
+ debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
+ __func__, ##__VA_ARGS__); \
} while(0)
-#define EFI_EXIT(ret) efi_exit_func(ret);
+/*
+ * Exit the u-boot world back to UEFI:
+ */
+#define EFI_EXIT(ret) ({ \
+ efi_status_t _r = ret; \
+ debug("%sEFI: Exit: %s: %u\n", __efi_nesting_dec(), \
+ __func__, (u32)(_r & ~EFI_ERROR_MASK)); \
+ assert(__efi_exit_check()); \
+ _r; \
+ })
+
+/*
+ * Callback into UEFI world from u-boot:
+ */
+#define EFI_CALL(exp) do { \
+ debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \
+ assert(__efi_exit_check()); \
+ exp; \
+ assert(__efi_entry_check()); \
+ debug("%sEFI: Return From: %s\n", __efi_nesting_dec(), #exp); \
+ } while(0)
extern struct efi_runtime_services efi_runtime_services;
extern struct efi_system_table systab;
extern const struct efi_simple_text_output_protocol efi_con_out;
-extern const struct efi_simple_input_interface efi_con_in;
+extern struct efi_simple_input_interface efi_con_in;
extern const struct efi_console_control_protocol efi_console_control;
+extern const struct efi_device_path_to_text_protocol efi_device_path_to_text;
extern const efi_guid_t efi_guid_console_control;
extern const efi_guid_t efi_guid_device_path;
extern const efi_guid_t efi_guid_loaded_image;
+extern const efi_guid_t efi_guid_device_path_to_text_protocol;
extern unsigned int __efi_runtime_start, __efi_runtime_stop;
extern unsigned int __efi_runtime_rel_start, __efi_runtime_rel_stop;
/*
- * While UEFI objects can have callbacks, you can also call functions on
- * protocols (classes) themselves. This struct maps a protocol GUID to its
- * interface (usually a struct with callback functions).
- */
-struct efi_class_map {
- const efi_guid_t *guid;
- const void *interface;
-};
-
-/*
* When the UEFI payload wants to open a protocol on an object to get its
* interface (usually a struct with callback functions), this struct maps the
- * protocol GUID to the respective protocol handler open function for that
- * object protocol combination.
- */
+ * protocol GUID to the respective protocol interface */
struct efi_handler {
const efi_guid_t *guid;
- efi_status_t (EFIAPI *open)(void *handle,
- efi_guid_t *protocol, void **protocol_interface,
- void *agent_handle, void *controller_handle,
- uint32_t attributes);
+ void *protocol_interface;
};
/*
@@ -70,15 +86,49 @@
struct efi_object {
/* Every UEFI object is part of a global object list */
struct list_head link;
- /* We support up to 4 "protocols" an object can be accessed through */
- struct efi_handler protocols[4];
+ /* We support up to 8 "protocols" an object can be accessed through */
+ struct efi_handler protocols[8];
/* The object spawner can either use this for data or as identifier */
void *handle;
};
+#define EFI_PROTOCOL_OBJECT(_guid, _protocol) (struct efi_object){ \
+ .protocols = {{ \
+ .guid = &(_guid), \
+ .protocol_interface = (void *)(_protocol), \
+ }}, \
+ .handle = (void *)(_protocol), \
+}
+
+/**
+ * struct efi_event
+ *
+ * @type: Type of event, see efi_create_event
+ * @notify_tpl: Task priority level of notifications
+ * @trigger_time: Period of the timer
+ * @trigger_next: Next time to trigger the timer
+ * @nofify_function: Function to call when the event is triggered
+ * @notify_context: Data to be passed to the notify function
+ * @trigger_type: Type of timer, see efi_set_timer
+ * @signaled: The notify function was already called
+ */
+struct efi_event {
+ uint32_t type;
+ UINTN notify_tpl;
+ void (EFIAPI *notify_function)(struct efi_event *event, void *context);
+ void *notify_context;
+ u64 trigger_next;
+ u64 trigger_time;
+ enum efi_timer_delay trigger_type;
+ int signaled;
+};
+
+
/* This list contains all UEFI objects we know of */
extern struct list_head efi_obj_list;
+/* Called by bootefi to make console interface available */
+int efi_console_register(void);
/* Called by bootefi to make all disk storage accessible as EFI objects */
int efi_disk_register(void);
/* Called by bootefi to make GOP (graphical) interface available */
@@ -91,28 +141,30 @@
/* Called by networking code to memorize the dhcp ack package */
void efi_net_set_dhcp_ack(void *pkt, int len);
-/*
- * Stub implementation for a protocol opener that just returns the handle as
- * interface
- */
-efi_status_t EFIAPI efi_return_handle(void *handle,
- efi_guid_t *protocol, void **protocol_interface,
- void *agent_handle, void *controller_handle,
- uint32_t attributes);
/* Called from places to check whether a timer expired */
void efi_timer_check(void);
/* PE loader implementation */
void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info);
/* Called once to store the pristine gd pointer */
void efi_save_gd(void);
-/* Called from EFI_ENTRY on callback entry to put gd into the gd register */
+/* Special case handler for error/abort that just tries to dtrt to get
+ * back to u-boot world */
void efi_restore_gd(void);
-/* Called from EFI_EXIT on callback exit to restore the gd register */
-efi_status_t efi_exit_func(efi_status_t ret);
/* Call this to relocate the runtime section to an address space */
void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map);
/* Call this to set the current device name */
void efi_set_bootdev(const char *dev, const char *devnr, const char *path);
+/* Call this to create an event */
+efi_status_t efi_create_event(uint32_t type, UINTN notify_tpl,
+ void (EFIAPI *notify_function) (
+ struct efi_event *event,
+ void *context),
+ void *notify_context, struct efi_event **event);
+/* Call this to set a timer */
+efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type,
+ uint64_t trigger_time);
+/* Call this to signal an event */
+void efi_signal_event(struct efi_event *event);
/* Generic EFI memory allocator, call this to get memory */
void *efi_alloc(uint64_t len, int memory_type);
@@ -152,6 +204,11 @@
*(unicode++) = *(ascii++);
}
+static inline int guidcmp(const efi_guid_t *g1, const efi_guid_t *g2)
+{
+ return memcmp(g1, g2, sizeof(efi_guid_t));
+}
+
/*
* Use these to indicate that your code / data should go into the EFI runtime
* section and thus still be available when the OS is running
diff --git a/include/env_default.h b/include/env_default.h
index ea6704a..b574345 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -11,7 +11,7 @@
#include <env_callback.h>
#ifdef DEFAULT_ENV_INSTANCE_EMBEDDED
-env_t environment __PPCENV__ = {
+env_t environment __UBOOT_ENV_SECTION__ = {
ENV_CRC, /* CRC Sum */
#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT
1, /* Flags: valid */
@@ -28,7 +28,7 @@
#ifdef CONFIG_ENV_FLAGS_LIST_DEFAULT
ENV_FLAGS_VAR "=" CONFIG_ENV_FLAGS_LIST_DEFAULT "\0"
#endif
-#ifdef CONFIG_BOOTARGS
+#ifdef CONFIG_USE_BOOTARGS
"bootargs=" CONFIG_BOOTARGS "\0"
#endif
#ifdef CONFIG_BOOTCOMMAND
diff --git a/include/environment.h b/include/environment.h
index d86230a..03b41e0 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -143,10 +143,6 @@
# define ENV_HEADER_SIZE (sizeof(uint32_t))
#endif
-#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
-extern char *env_name_spec;
-#endif
-
#ifdef CONFIG_ENV_AES
/* Make sure the payload is multiple of AES block size */
#define ENV_SIZE ((CONFIG_ENV_SIZE - ENV_HEADER_SIZE) & ~(16 - 1))
@@ -174,9 +170,6 @@
extern const unsigned char default_environment[];
extern env_t *env_ptr;
-extern void env_relocate_spec(void);
-extern unsigned char env_get_char_spec(int);
-
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
extern void env_reloc(void);
#endif
@@ -197,20 +190,101 @@
#include <env_flags.h>
#include <search.h>
+/* Value for environment validity */
+enum env_valid {
+ ENV_INVALID, /* No valid environment */
+ ENV_VALID, /* First or only environment is valid */
+ ENV_REDUND, /* Redundant environment is valid */
+};
+
+enum env_location {
+ ENVL_DATAFLASH,
+ ENVL_EEPROM,
+ ENVL_EXT4,
+ ENVL_FAT,
+ ENVL_FLASH,
+ ENVL_MMC,
+ ENVL_NAND,
+ ENVL_NVRAM,
+ ENVL_ONENAND,
+ ENVL_REMOTE,
+ ENVL_SPI_FLASH,
+ ENVL_UBI,
+ ENVL_NOWHERE,
+
+ ENVL_COUNT,
+ ENVL_UNKNOWN,
+};
+
+struct env_driver {
+ const char *name;
+ enum env_location location;
+
+ /**
+ * get_char() - Read a character from the environment
+ *
+ * This method is optional. If not provided, a default implementation
+ * will read from gd->env_addr.
+ *
+ * @index: Index of character to read (0=first)
+ * @return character read, or -ve on error
+ */
+ int (*get_char)(int index);
+
+ /**
+ * load() - Load the environment from storage
+ *
+ * This method is optional. If not provided, no environment will be
+ * loaded.
+ *
+ * @return 0 if OK, -ve on error
+ */
+ int (*load)(void);
+
+ /**
+ * save() - Save the environment to storage
+ *
+ * This method is required for 'saveenv' to work.
+ *
+ * @return 0 if OK, -ve on error
+ */
+ int (*save)(void);
+
+ /**
+ * init() - Set up the initial pre-relocation environment
+ *
+ * This method is optional.
+ *
+ * @return 0 if OK, -ENOENT if no initial environment could be found,
+ * other -ve on error
+ */
+ int (*init)(void);
+};
+
+/* Declare a new environment location driver */
+#define U_BOOT_ENV_LOCATION(__name) \
+ ll_entry_declare(struct env_driver, __name, env_driver)
+
+/* Declare the name of a location */
+#ifdef CONFIG_CMD_SAVEENV
+#define ENV_NAME(_name) .name = _name,
+#else
+#define ENV_NAME(_name)
+#endif
+
+#ifdef CONFIG_CMD_SAVEENV
+#define env_save_ptr(x) x
+#else
+#define env_save_ptr(x) NULL
+#endif
+
extern struct hsearch_data env_htab;
-/* Function that returns a character from the environment */
-unsigned char env_get_char(int);
-
-/* Function that returns a pointer to a value from the environment */
-const unsigned char *env_get_addr(int);
-unsigned char env_get_char_memory(int index);
-
/* Function that updates CRC of the enironment */
void env_crc_update(void);
/* Look up the variable from the default environment */
-char *getenv_default(const char *name);
+char *env_get_default(const char *name);
/* [re]set to the default environment */
void set_default_env(const char *s);
@@ -229,6 +303,37 @@
int env_import_redund(const char *buf1, const char *buf2);
#endif
+/**
+ * env_driver_lookup_default() - Look up the default environment driver
+ *
+ * @return pointer to driver, or NULL if none (which should not happen)
+ */
+struct env_driver *env_driver_lookup_default(void);
+
+/**
+ * env_get_char() - Get a character from the early environment
+ *
+ * This reads from the pre-relocation environemnt
+ *
+ * @index: Index of character to read (0 = first)
+ * @return character read, or -ve on error
+ */
+int env_get_char(int index);
+
+/**
+ * env_load() - Load the environment from storage
+ *
+ * @return 0 if OK, -ve on error
+ */
+int env_load(void);
+
+/**
+ * env_save() - Save the environment to storage
+ *
+ * @return 0 if OK, -ve on error
+ */
+int env_save(void);
+
#endif /* DO_DEPS_ONLY */
#endif /* _ENVIRONMENT_H_ */
diff --git a/include/exports.h b/include/exports.h
index 1d81bc4..ebe81d9 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -27,8 +27,8 @@
int vprintf(const char *, va_list);
unsigned long simple_strtoul(const char *cp, char **endp, unsigned int base);
int strict_strtoul(const char *cp, unsigned int base, unsigned long *res);
-char *getenv (const char *name);
-int setenv (const char *varname, const char *varvalue);
+char *env_get(const char *name);
+int env_set(const char *varname, const char *value);
long simple_strtol(const char *cp, char **endp, unsigned int base);
int strcmp(const char *cs, const char *ct);
unsigned long ustrtoul(const char *cp, char **endp, unsigned int base);
diff --git a/include/fdtdec.h b/include/fdtdec.h
index eda2ffa..4a0947c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -119,12 +119,6 @@
COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */
COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
- COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */
- COMPAT_NVIDIA_TEGRA186_SDMMC, /* Tegra186 SDMMC controller */
- COMPAT_NVIDIA_TEGRA210_SDMMC, /* Tegra210 SDMMC controller */
- COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */
- COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */
- COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */
COMPAT_NVIDIA_TEGRA124_XUSB_PADCTL,
/* Tegra124 XUSB pad controller */
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
diff --git a/include/flash.h b/include/flash.h
index 2a5e13a..55c5bdd 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -67,8 +67,6 @@
#define FLASH_CFI_BY16 0x02
#define FLASH_CFI_BY32 0x04
#define FLASH_CFI_BY64 0x08
-/* convert between bit value and numeric value */
-#define CFI_FLASH_SHIFT_WIDTH 3
/*
* Values for the flash device interface
*/
@@ -469,7 +467,6 @@
#define FLASH_S29GL128N 0x00F1 /* Spansion S29GL128N */
#define FLASH_STM32 0x00F2 /* STM32 Embedded Flash */
-#define FLASH_STM32F1 0x00F3 /* STM32F1 Embedded Flash */
#define FLASH_UNKNOWN 0xFFFF /* unknown flash type */
diff --git a/include/fsl_csu.h b/include/fsl_csu.h
index 8582ac0..027a811 100644
--- a/include/fsl_csu.h
+++ b/include/fsl_csu.h
@@ -30,7 +30,7 @@
};
void enable_layerscape_ns_access(void);
-void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
+void set_devices_ns_access(unsigned long, u16 val);
void set_pcie_ns_access(int pcie, u16 val);
#endif
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 762704c..eac5adc 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -122,6 +122,7 @@
int (*power_off)(struct phy *phy);
};
+#ifdef CONFIG_PHY
/**
* generic_phy_init() - initialize the PHY port
@@ -220,4 +221,56 @@
int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
struct phy *phy);
+#else /* CONFIG_PHY */
+
+static inline int generic_phy_init(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_exit(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_reset(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_power_on(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_power_off(struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_get_by_index(struct udevice *user, int index,
+ struct phy *phy)
+{
+ return 0;
+}
+
+static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
+ struct phy *phy)
+{
+ return 0;
+}
+
+#endif /* CONFIG_PHY */
+
+/**
+ * generic_phy_valid() - check if PHY port is valid
+ *
+ * @phy: the PHY port to check
+ * @return TRUE if valid, or FALSE
+ */
+static inline bool generic_phy_valid(struct phy *phy)
+{
+ return phy->dev != NULL;
+}
+
#endif /*__GENERIC_PHY_H */
diff --git a/include/image.h b/include/image.h
index c6f1513..1f4bfda 100644
--- a/include/image.h
+++ b/include/image.h
@@ -373,7 +373,7 @@
bd_t *kbd;
#endif
- int verify; /* getenv("verify")[0] != 'n' */
+ int verify; /* env_get("verify")[0] != 'n' */
#define BOOTM_STATE_START (0x00000001)
#define BOOTM_STATE_FINDOS (0x00000002)
@@ -769,9 +769,9 @@
int image_check_hcrc(const image_header_t *hdr);
int image_check_dcrc(const image_header_t *hdr);
#ifndef USE_HOSTCC
-ulong getenv_bootm_low(void);
-phys_size_t getenv_bootm_size(void);
-phys_size_t getenv_bootm_mapsize(void);
+ulong env_get_bootm_low(void);
+phys_size_t env_get_bootm_size(void);
+phys_size_t env_get_bootm_mapsize(void);
#endif
void memmove_wd(void *to, void *from, size_t len, ulong chunksz);
diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h
index 486fb94..fbfc718 100644
--- a/include/linux/kconfig.h
+++ b/include/linux/kconfig.h
@@ -51,12 +51,25 @@
#define _IS_SPL 1
#endif
+#ifdef CONFIG_TPL_BUILD
+#define _IS_TPL 1
+#endif
+
+#if defined(CONFIG_TPL_BUILD)
+#define config_val(cfg) _config_val(_IS_TPL, cfg)
+#define _config_val(x, cfg) __config_val(x, cfg)
+#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
+#define ___config_val(arg1_or_junk, cfg) \
+ ____config_val(arg1_or_junk CONFIG_TPL_##cfg, CONFIG_##cfg)
+#define ____config_val(__ignored, val, ...) val
+#else
#define config_val(cfg) _config_val(_IS_SPL, cfg)
#define _config_val(x, cfg) __config_val(x, cfg)
#define __config_val(x, cfg) ___config_val(__ARG_PLACEHOLDER_##x, cfg)
#define ___config_val(arg1_or_junk, cfg) \
____config_val(arg1_or_junk CONFIG_SPL_##cfg, CONFIG_##cfg)
#define ____config_val(__ignored, val, ...) val
+#endif
/*
* CONFIG_VAL(FOO) evaluates to the value of
diff --git a/include/linux/mii.h b/include/linux/mii.h
index 66b83d8..19afb74 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -190,4 +190,27 @@
return 0;
}
+/**
+ * mii_resolve_flowctrl_fdx
+ * @lcladv: value of MII ADVERTISE register
+ * @rmtadv: value of MII LPA register
+ *
+ * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
+ */
+static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
+{
+ u8 cap = 0;
+
+ if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
+ cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
+ } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
+ if (lcladv & ADVERTISE_PAUSE_CAP)
+ cap = FLOW_CTRL_RX;
+ else if (rmtadv & ADVERTISE_PAUSE_CAP)
+ cap = FLOW_CTRL_TX;
+ }
+
+ return cap;
+}
+
#endif /* __LINUX_MII_H__ */
diff --git a/include/mmc.h b/include/mmc.h
index 00576fa..cb8bf6a 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -321,7 +321,7 @@
/* forward decl. */
struct mmc;
-#ifdef CONFIG_DM_MMC_OPS
+#if CONFIG_IS_ENABLED(DM_MMC_OPS)
struct dm_mmc_ops {
/**
* send_cmd() - Send a command to the MMC device
@@ -385,7 +385,7 @@
struct mmc_config {
const char *name;
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
const struct mmc_ops *ops;
#endif
uint host_caps;
@@ -409,7 +409,7 @@
* TODO struct mmc should be in mmc_private but it's hard to fix right now
*/
struct mmc {
-#ifndef CONFIG_BLK
+#if !CONFIG_IS_ENABLED(BLK)
struct list_head link;
#endif
const struct mmc_config *cfg; /* provided configuration */
@@ -444,14 +444,14 @@
u64 capacity_gp[4];
u64 enh_user_start;
u64 enh_user_size;
-#ifndef CONFIG_BLK
+#if !CONFIG_IS_ENABLED(BLK)
struct blk_desc block_dev;
#endif
char op_cond_pending; /* 1 if we are waiting on an op_cond command */
char init_in_progress; /* 1 if we have done mmc_start_init() */
char preinit; /* start init as early as possible */
int ddr_mode;
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
struct udevice *dev; /* Device for this MMC controller */
#endif
};
@@ -519,7 +519,7 @@
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf,
enum mmc_hwpart_conf_mode mode);
-#ifndef CONFIG_DM_MMC_OPS
+#if !CONFIG_IS_ENABLED(DM_MMC_OPS)
int mmc_getcd(struct mmc *mmc);
int board_mmc_getcd(struct mmc *mmc);
int mmc_getwp(struct mmc *mmc);
@@ -585,18 +585,6 @@
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr);
int mmc_get_env_dev(void);
-struct pci_device_id;
-
-/**
- * pci_mmc_init() - set up PCI MMC devices
- *
- * This finds all the matching PCI IDs and sets them up as MMC devices.
- *
- * @name: Name to use for devices
- * @mmc_supported: PCI IDs to search for, terminated by {0, 0}
- */
-int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
-
/* Set block count limit because of 16 bit register limit on some hardware*/
#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
diff --git a/include/net.h b/include/net.h
index 2eaa882..455b48f 100644
--- a/include/net.h
+++ b/include/net.h
@@ -239,11 +239,11 @@
int eth_get_dev_index(void); /* get the device index */
void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
-int eth_getenv_enetaddr(const char *name, uchar *enetaddr);
-int eth_setenv_enetaddr(const char *name, const uchar *enetaddr);
+int eth_env_get_enetaddr(const char *name, uchar *enetaddr);
+int eth_env_set_enetaddr(const char *name, const uchar *enetaddr);
/**
- * eth_setenv_enetaddr_by_index() - set the MAC address environment variable
+ * eth_env_set_enetaddr_by_index() - set the MAC address environment variable
*
* This sets up an environment variable with the given MAC address (@enetaddr).
* The environment variable to be set is defined by <@base_name><@index>addr.
@@ -255,7 +255,7 @@
* @enetaddr: Pointer to MAC address to put into the variable
* @return 0 if OK, other value on error
*/
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
@@ -275,7 +275,7 @@
* Returns:
* Return true if the address is valid.
*/
-int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_get_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
int eth_init(void); /* Initialize the device */
@@ -308,7 +308,7 @@
u8 et_dest[ARP_HLEN]; /* Destination node */
u8 et_src[ARP_HLEN]; /* Source node */
u16 et_protlen; /* Protocol or length */
-};
+} __attribute__((packed));
/* Ethernet header size */
#define ETHER_HDR_SIZE (sizeof(struct ethernet_hdr))
@@ -326,7 +326,7 @@
u8 et_snap2;
u8 et_snap3;
u16 et_prot; /* 802 protocol */
-};
+} __attribute__((packed));
/* 802 + SNAP + ethernet header size */
#define E802_HDR_SIZE (sizeof(struct e802_hdr))
@@ -340,7 +340,7 @@
u16 vet_vlan_type; /* PROT_VLAN */
u16 vet_tag; /* TAG of VLAN */
u16 vet_type; /* protocol type */
-};
+} __attribute__((packed));
/* VLAN Ethernet header size */
#define VLAN_ETHER_HDR_SIZE (sizeof(struct vlan_ethernet_hdr))
@@ -369,7 +369,7 @@
u16 ip_sum; /* checksum */
struct in_addr ip_src; /* Source IP address */
struct in_addr ip_dst; /* Destination IP address */
-};
+} __attribute__((packed));
#define IP_OFFS 0x1fff /* ip offset *= 8 */
#define IP_FLAGS 0xe000 /* first 3 bits */
@@ -397,7 +397,7 @@
u16 udp_dst; /* UDP destination port */
u16 udp_len; /* Length of UDP packet */
u16 udp_xsum; /* Checksum */
-};
+} __attribute__((packed));
#define IP_UDP_HDR_SIZE (sizeof(struct ip_udp_hdr))
#define UDP_HDR_SIZE (IP_UDP_HDR_SIZE - IP_HDR_SIZE)
@@ -435,7 +435,7 @@
u8 ar_tha[]; /* Target hardware address */
u8 ar_tpa[]; /* Target protocol address */
#endif /* 0 */
-};
+} __attribute__((packed));
#define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */
@@ -470,7 +470,7 @@
} frag;
u8 data[0];
} un;
-};
+} __attribute__((packed));
#define ICMP_HDR_SIZE (sizeof(struct icmp_hdr))
#define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE)
@@ -834,7 +834,7 @@
ushort string_to_vlan(const char *s);
/* read a VLAN id from an environment variable */
-ushort getenv_vlan(char *);
+ushort env_get_vlan(char *);
/* copy a filename (allow for "..." notation, limit length) */
void copy_filename(char *dst, const char *src, int size);
diff --git a/include/nvme.h b/include/nvme.h
new file mode 100644
index 0000000..8375d61
--- /dev/null
+++ b/include/nvme.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2017 NXP Semiconductors
+ * Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __NVME_H__
+#define __NVME_H__
+
+struct nvme_dev;
+
+/**
+ * nvme_identify - identify controller or namespace capabilities and status
+ *
+ * This issues an identify command to the NVMe controller to return a data
+ * buffer that describes the controller or namespace capabilities and status.
+ *
+ * @dev: NVMe controller device
+ * @nsid: 0 for controller, namespace id for namespace to identify
+ * @cns: 1 for controller, 0 for namespace
+ * @dma_addr: dma buffer address to store the identify result
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_identify(struct nvme_dev *dev, unsigned nsid,
+ unsigned cns, dma_addr_t dma_addr);
+
+/**
+ * nvme_get_features - retrieve the attributes of the feature specified
+ *
+ * This retrieves the attributes of the feature specified.
+ *
+ * @dev: NVMe controller device
+ * @fid: feature id to provide data
+ * @nsid: namespace id the command applies to
+ * @dma_addr: data structure used as part of the specified feature
+ * @result: command-specific result in the completion queue entry
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
+ dma_addr_t dma_addr, u32 *result);
+
+/**
+ * nvme_set_features - specify the attributes of the feature indicated
+ *
+ * This specifies the attributes of the feature indicated.
+ *
+ * @dev: NVMe controller device
+ * @fid: feature id to provide data
+ * @dword11: command-specific input parameter
+ * @dma_addr: data structure used as part of the specified feature
+ * @result: command-specific result in the completion queue entry
+ * @return: 0 on success, -ETIMEDOUT on command execution timeout,
+ * -EIO on command execution fails
+ */
+int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
+ dma_addr_t dma_addr, u32 *result);
+
+/**
+ * nvme_scan_namespace - scan all namespaces attached to NVMe controllers
+ *
+ * This probes all registered NVMe uclass device drivers in the system,
+ * and tries to find all namespaces attached to the NVMe controllers.
+ *
+ * @return: 0 on success, -ve on error
+ */
+int nvme_scan_namespace(void);
+
+/**
+ * nvme_print_info - print detailed NVMe controller and namespace information
+ *
+ * This prints out detailed human readable NVMe controller and namespace
+ * information which is very useful for debugging.
+ *
+ * @udev: NVMe controller device
+ * @return: 0 on success, -EIO if NVMe identify command fails
+ */
+int nvme_print_info(struct udevice *udev);
+
+#endif /* __NVME_H__ */
diff --git a/include/os.h b/include/os.h
index 049b248..2bf4bdb 100644
--- a/include/os.h
+++ b/include/os.h
@@ -241,26 +241,6 @@
int os_get_filesize(const char *fname, loff_t *size);
/**
- * Write a character to the controlling OS terminal
- *
- * This bypasses the U-Boot console support and writes directly to the OS
- * stdout file descriptor.
- *
- * @param ch Character to write
- */
-void os_putc(int ch);
-
-/**
- * Write a string to the controlling OS terminal
- *
- * This bypasses the U-Boot console support and writes directly to the OS
- * stdout file descriptor.
- *
- * @param str String to write (note that \n is not appended)
- */
-void os_puts(const char *str);
-
-/**
* Write the sandbox RAM buffer to a existing file
*
* @param fname Filename to write memory to (simple binary format)
diff --git a/include/part.h b/include/part.h
index 83bce05..0cd803a 100644
--- a/include/part.h
+++ b/include/part.h
@@ -9,6 +9,8 @@
#include <blk.h>
#include <ide.h>
+#include <uuid.h>
+#include <linux/list.h>
struct block_drvr {
char *name;
@@ -46,24 +48,34 @@
#define DEV_TYPE_CDROM 0x05 /* CD-ROM */
#define DEV_TYPE_OPDISK 0x07 /* optical disk */
+#define PART_NAME_LEN 32
+#define PART_TYPE_LEN 32
+#define MAX_SEARCH_PARTITIONS 64
+
typedef struct disk_partition {
lbaint_t start; /* # of first block in partition */
lbaint_t size; /* number of blocks in partition */
ulong blksz; /* block size in bytes */
- uchar name[32]; /* partition name */
- uchar type[32]; /* string type description */
+ uchar name[PART_NAME_LEN]; /* partition name */
+ uchar type[PART_TYPE_LEN]; /* string type description */
int bootable; /* Active/Bootable flag is set */
#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
- char uuid[37]; /* filesystem UUID as string, if exists */
+ char uuid[UUID_STR_LEN + 1]; /* filesystem UUID as string, if exists */
#endif
#ifdef CONFIG_PARTITION_TYPE_GUID
- char type_guid[37]; /* type GUID as string, if exists */
+ char type_guid[UUID_STR_LEN + 1]; /* type GUID as string, if exists */
#endif
#ifdef CONFIG_DOS_PARTITION
uchar sys_ind; /* partition type */
#endif
} disk_partition_t;
+struct disk_part {
+ int partnum;
+ disk_partition_t gpt_part_info;
+ struct list_head list;
+};
+
/* Misc _get_dev functions */
#ifdef CONFIG_PARTITIONS
/**
@@ -367,6 +379,21 @@
int gpt_verify_partitions(struct blk_desc *dev_desc,
disk_partition_t *partitions, int parts,
gpt_header *gpt_head, gpt_entry **gpt_pte);
+
+
+/**
+ * get_disk_guid() - Function to read the GUID string from a device's GPT
+ *
+ * This function reads the GUID string from a block device whose descriptor
+ * is provided.
+ *
+ * @param dev_desc - block device descriptor
+ * @param guid - pre-allocated string in which to return the GUID
+ *
+ * @return - '0' on success, otherwise error
+ */
+int get_disk_guid(struct blk_desc *dev_desc, char *guid);
+
#endif
#if CONFIG_IS_ENABLED(DOS_PARTITION)
diff --git a/include/pci_ids.h b/include/pci_ids.h
index ab6aa58..fdda679 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -21,6 +21,7 @@
#define PCI_CLASS_STORAGE_SATA 0x0106
#define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
#define PCI_CLASS_STORAGE_SAS 0x0107
+#define PCI_CLASS_STORAGE_EXPRESS 0x010802
#define PCI_CLASS_STORAGE_OTHER 0x0180
#define PCI_BASE_CLASS_NETWORK 0x02
diff --git a/include/phy.h b/include/phy.h
index 4f2094b..a0b1f12 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -266,7 +266,8 @@
int phy_et1011c_init(void);
int phy_lxt_init(void);
int phy_marvell_init(void);
-int phy_micrel_init(void);
+int phy_micrel_ksz8xxx_init(void);
+int phy_micrel_ksz90x1_init(void);
int phy_natsemi_init(void);
int phy_realtek_init(void);
int phy_smsc_init(void);
diff --git a/include/power/as3722.h b/include/power/as3722.h
index 0f22482..cb4b188 100644
--- a/include/power/as3722.h
+++ b/include/power/as3722.h
@@ -7,24 +7,23 @@
#ifndef __POWER_AS3722_H__
#define __POWER_AS3722_H__
-#include <asm/types.h>
-
#define AS3722_GPIO_OUTPUT_VDDH (1 << 0)
#define AS3722_GPIO_INVERT (1 << 1)
-struct udevice;
+#define AS3722_DEVICE_ID 0x0c
+#define AS3722_SD_VOLTAGE(n) (0x00 + (n))
+#define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
+#define AS3722_SD_CONTROL 0x4d
+#define AS3722_LDO_CONTROL 0x4e
+#define AS3722_ASIC_ID1 0x90
+#define AS3722_ASIC_ID2 0x91
-int as3722_init(struct udevice **devp);
-int as3722_sd_enable(struct udevice *pmic, unsigned int sd);
-int as3722_sd_set_voltage(struct udevice *pmic, unsigned int sd, u8 value);
-int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo);
-int as3722_ldo_set_voltage(struct udevice *pmic, unsigned int ldo, u8 value);
-int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
- unsigned long flags);
-int as3722_gpio_direction_output(struct udevice *pmic, unsigned int gpio,
- unsigned int level);
-int as3722_read(struct udevice *pmic, u8 reg, u8 *value);
-int as3722_write(struct udevice *pmic, u8 reg, u8 value);
-int as3722_get(struct udevice **devp);
+#define AS3722_GPIO_CONTROL(n) (0x08 + (n))
+#define AS3722_GPIO_SIGNAL_OUT 0x20
+#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH (1 << 0)
+#define AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL (7 << 0)
+#define AS3722_GPIO_CONTROL_INVERT (1 << 7)
+
+int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value);
#endif /* __POWER_AS3722_H__ */
diff --git a/include/power/palmas.h b/include/power/palmas.h
index bad5a35..df5f15c 100644
--- a/include/power/palmas.h
+++ b/include/power/palmas.h
@@ -23,3 +23,4 @@
#define PALMAS_LDO_VOLT_MAX 3300000
#define PALMAS_LDO_MODE_MASK 0x1
#define PALMAS_LDO_STATUS_MASK 0x10
+#define PALMAS_LDO_BYPASS_EN 0x40
diff --git a/include/reset.h b/include/reset.h
index f45fcf8..7185ade 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -100,6 +100,15 @@
struct reset_ctl *reset_ctl);
/**
+ * reset_request - Request a reset signal.
+ *
+ * @reset_ctl: A reset control struct.
+ *
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_request(struct reset_ctl *reset_ctl);
+
+/**
* reset_free - Free a previously requested reset signal.
*
* @reset_ctl: A reset control struct that was previously successfully
@@ -135,6 +144,18 @@
*/
int reset_deassert(struct reset_ctl *reset_ctl);
+/**
+ * reset_release_all - Assert/Free an array of previously requested resets.
+ *
+ * For each reset contained in the reset array, this function will check if
+ * reset has been previously requested and then will assert and free it.
+ *
+ * @reset_ctl: A reset struct array that was previously successfully
+ * requested by reset_get_by_*().
+ * @count Number of reset contained in the array
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_release_all(struct reset_ctl *reset_ctl, int count);
#else
static inline int reset_get_by_index(struct udevice *dev, int index,
struct reset_ctl *reset_ctl)
@@ -162,6 +183,12 @@
{
return 0;
}
+
+static inline int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+ return 0;
+}
+
#endif
#endif
diff --git a/include/search.h b/include/search.h
index 402dfd8..df5d61c 100644
--- a/include/search.h
+++ b/include/search.h
@@ -118,7 +118,7 @@
#define H_MATCH_SUBSTR (1 << 7) /* search for substring matches */
#define H_MATCH_REGEX (1 << 8) /* search for regular expression matches */
#define H_MATCH_METHOD (H_MATCH_IDENT | H_MATCH_SUBSTR | H_MATCH_REGEX)
-#define H_PROGRAMMATIC (1 << 9) /* indicate that an import is from setenv() */
+#define H_PROGRAMMATIC (1 << 9) /* indicate that an import is from env_set() */
#define H_ORIGIN_FLAGS (H_INTERACTIVE | H_PROGRAMMATIC)
#endif /* _SEARCH_H_ */
diff --git a/include/sed156x.h b/include/sed156x.h
deleted file mode 100644
index 4e24e01..0000000
--- a/include/sed156x.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2004
- *
- * Pantelis Antoniou <panto@intracom.gr>
- * Intracom S.A.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/* Video support for Epson SED156x chipset(s) */
-
-#ifndef SED156X_H
-#define SED156X_H
-
-void sed156x_init(void);
-void sed156x_clear(void);
-void sed156x_output_at(int x, int y, const char *str, int size);
-void sed156x_reverse_at(int x, int y, int size);
-void sed156x_sync(void);
-void sed156x_scroll(int dx, int dy);
-
-/* export display */
-extern const int sed156x_text_width;
-extern const int sed156x_text_height;
-
-#endif /* SED156X_H */
diff --git a/include/sm501.h b/include/sm501.h
deleted file mode 100644
index 34ce350..0000000
--- a/include/sm501.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * (C) Copyright 2002
- * Stäubli Faverges - <www.staubli.com>
- * Pierre AUBERT p.aubert@staubli.com
- *
- * (C) Copyright 2005
- * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Basic video support for SMI SM501 "Voyager" graphic controller
- */
-
-#ifndef _SM501_H_
-#define _SM501_H_
-
-#define PCI_VENDOR_SM 0x126f
-#define PCI_DEVICE_SM501 0x0501
-
-typedef struct {
- unsigned int Index;
- unsigned int Value;
-} SMI_REGS;
-
-/* Board specific functions */
-unsigned int board_video_init (void);
-void board_validate_screen (unsigned int base);
-const SMI_REGS *board_get_regs (void);
-int board_get_width (void);
-int board_get_height (void);
-unsigned int board_video_get_fb (void);
-
-#endif /* _SM501_H_ */
diff --git a/include/spl.h b/include/spl.h
index ffadce9..ce4cf0a 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -268,4 +268,14 @@
struct spl_boot_device *bootdev);
void bl31_entry(void);
+
+/**
+ * board_return_to_bootrom - allow for boards to continue with the boot ROM
+ *
+ * If a board (e.g. the Rockchip RK3368 boards) provide some
+ * supporting functionality for SPL in their boot ROM and the SPL
+ * stage wants to return to the ROM code to continue booting, boards
+ * can implement 'board_return_to_bootrom'.
+ */
+void board_return_to_bootrom(void);
#endif
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index e4fc8b1..3164fa2 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -16,6 +16,7 @@
#define DEV_FLAGS_INPUT 0x00000001 /* Device can be used as input console */
#define DEV_FLAGS_OUTPUT 0x00000002 /* Device can be used as output console */
+#define DEV_FLAGS_DM 0x00000004 /* Device priv is a struct udevice * */
/* Device information */
struct stdio_dev {
diff --git a/include/sx151x.h b/include/sx151x.h
deleted file mode 100644
index be42b06..0000000
--- a/include/sx151x.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * (C) Copyright 2013
- * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __SX151X_H_
-#define __SX151X_H_
-
-int sx151x_get_value(int chip, int gpio);
-int sx151x_set_value(int chip, int gpio, int val);
-int sx151x_direction_input(int chip, int gpio);
-int sx151x_direction_output(int chip, int gpio);
-int sx151x_reset(int chip);
-
-#endif /* __SX151X_H_ */
diff --git a/include/usb.h b/include/usb.h
index 62f051f..fad0401 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -537,6 +537,21 @@
unsigned short wHubChange;
} __attribute__ ((packed));
+/*
+ * Hub Device descriptor
+ * USB Hub class device protocols
+ */
+#define USB_HUB_PR_FS 0 /* Full speed hub */
+#define USB_HUB_PR_HS_NO_TT 0 /* Hi-speed hub without TT */
+#define USB_HUB_PR_HS_SINGLE_TT 1 /* Hi-speed hub with single TT */
+#define USB_HUB_PR_HS_MULTI_TT 2 /* Hi-speed hub with multiple TT */
+#define USB_HUB_PR_SS 3 /* Super speed hub */
+
+/* Transaction Translator Think Times, in bits */
+#define HUB_TTTT_8_BITS 0x00
+#define HUB_TTTT_16_BITS 0x20
+#define HUB_TTTT_24_BITS 0x40
+#define HUB_TTTT_32_BITS 0x60
/* Hub descriptor */
struct usb_hub_descriptor {
@@ -546,10 +561,20 @@
unsigned short wHubCharacteristics;
unsigned char bPwrOn2PwrGood;
unsigned char bHubContrCurrent;
- unsigned char DeviceRemovable[(USB_MAXCHILDREN+1+7)/8];
- unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
- /* DeviceRemovable and PortPwrCtrlMask want to be variable-length
- bitmaps that hold max 255 entries. (bit0 is ignored) */
+ /* 2.0 and 3.0 hubs differ here */
+ union {
+ struct {
+ /* add 1 bit for hub status change; round to bytes */
+ __u8 DeviceRemovable[(USB_MAXCHILDREN + 1 + 7) / 8];
+ __u8 PortPowerCtrlMask[(USB_MAXCHILDREN + 1 + 7) / 8];
+ } __attribute__ ((packed)) hs;
+
+ struct {
+ __u8 bHubHdrDecLat;
+ __le16 wHubDelay;
+ __le16 DeviceRemovable;
+ } __attribute__ ((packed)) ss;
+ } u;
} __attribute__ ((packed));
@@ -560,6 +585,8 @@
ulong connect_timeout; /* Device connection timeout in ms */
ulong query_delay; /* Device query delay in ms */
int overcurrent_count[USB_MAXCHILDREN]; /* Over-current counter */
+ int hub_depth; /* USB 3.0 hub depth */
+ struct usb_tt tt; /* Transaction Translator */
};
#ifdef CONFIG_DM_USB
@@ -731,6 +758,14 @@
* reset_root_port() - Reset usb root port
*/
int (*reset_root_port)(struct udevice *bus, struct usb_device *udev);
+
+ /**
+ * update_hub_device() - Update HCD's internal representation of hub
+ *
+ * After a hub descriptor is fetched, notify HCD so that its internal
+ * representation of this hub can be updated (xHCI)
+ */
+ int (*update_hub_device)(struct udevice *bus, struct usb_device *udev);
};
#define usb_get_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops)
@@ -766,6 +801,14 @@
struct usb_device *parent);
/**
+ * usb_hub_is_root_hub() - Test whether a hub device is root hub or not
+ *
+ * @hub: USB hub device to test
+ * @return: true if the hub device is root hub, false otherwise.
+ */
+bool usb_hub_is_root_hub(struct udevice *hub);
+
+/**
* usb_hub_scan() - Scan a hub and find its devices
*
* @hub: Hub device to scan
@@ -861,24 +904,6 @@
int usb_hub_probe(struct usb_device *dev, int ifnum);
void usb_hub_reset(void);
-/**
- * legacy_hub_port_reset() - reset a port given its usb_device pointer
- *
- * Reset a hub port and see if a device is present on that port, providing
- * sufficient time for it to show itself. The port status is returned.
- *
- * With driver model this moves to hub_port_reset() and is passed a struct
- * udevice.
- *
- * @dev: USB device to reset
- * @port: Port number to reset (note ports are numbered from 0 here)
- * @portstat: Returns port status
- */
-int legacy_hub_port_reset(struct usb_device *dev, int port,
- unsigned short *portstat);
-
-int hub_port_reset(struct udevice *dev, int port, unsigned short *portstat);
-
/*
* usb_find_usb2_hub_address_port() - Get hub address and port for TT setting
*
@@ -914,6 +939,17 @@
int usb_alloc_device(struct usb_device *dev);
/**
+ * update_hub_device() - Update HCD's internal representation of hub
+ *
+ * After a hub descriptor is fetched, notify HCD so that its internal
+ * representation of this hub can be updated.
+ *
+ * @dev: Hub device
+ * @return 0 if OK, -ve on error
+ */
+int usb_update_hub_device(struct usb_device *dev);
+
+/**
* usb_emul_setup_device() - Set up a new USB device emulation
*
* This is normally called when a new emulation device is bound. It tells
@@ -926,7 +962,7 @@
* @desc_list: List of points or USB descriptors, terminated by NULL.
* The first entry must be struct usb_device_descriptor,
* and others follow on after that.
- * @return 0 if OK, -ve on error
+ * @return 0 if OK, -ENOSYS if not implemented, other -ve on error
*/
int usb_emul_setup_device(struct udevice *dev, int maxpacketsize,
struct usb_string *strings, void **desc_list);
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 847b698..cd3eb47 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -156,7 +156,7 @@
#elif defined(CONFIG_MPC85xx)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
-#elif defined(CONFIG_ARCH_LS1021A)
+#elif defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A)
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 8214ba9..b7f2ead 100644
--- a/include/usb_defs.h
+++ b/include/usb_defs.h
@@ -93,6 +93,7 @@
#define USB_DT_REPORT (USB_TYPE_CLASS | 0x02)
#define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03)
#define USB_DT_HUB (USB_TYPE_CLASS | 0x09)
+#define USB_DT_SS_HUB (USB_TYPE_CLASS | 0x0a)
/* Descriptor sizes per descriptor type */
#define USB_DT_DEVICE_SIZE 18
@@ -261,12 +262,17 @@
/*
* Changes to wPortStatus bit field in USB 3.0
- * See USB 3.0 spec Table 10-11
+ * See USB 3.0 spec Table 10-10
*/
#define USB_SS_PORT_STAT_LINK_STATE 0x01e0
#define USB_SS_PORT_STAT_POWER 0x0200
#define USB_SS_PORT_STAT_SPEED 0x1c00
#define USB_SS_PORT_STAT_SPEED_5GBPS 0x0000
+/* Bits that are the same from USB 2.0 */
+#define USB_SS_PORT_STAT_MASK (USB_PORT_STAT_CONNECTION | \
+ USB_PORT_STAT_ENABLE | \
+ USB_PORT_STAT_OVERCURRENT | \
+ USB_PORT_STAT_RESET)
/* wPortChange bits */
#define USB_PORT_STAT_C_CONNECTION 0x0001
@@ -287,6 +293,7 @@
#define HUB_CHAR_LPSM 0x0003
#define HUB_CHAR_COMPOUND 0x0004
#define HUB_CHAR_OCPM 0x0018
+#define HUB_CHAR_TTTT 0x0060 /* TT Think Time mask */
/*
* Hub Status & Hub Change bit masks
@@ -300,6 +307,20 @@
/* Mask for wIndex in get/set port feature */
#define USB_HUB_PORT_MASK 0xf
+/* Hub class request codes */
+#define USB_REQ_SET_HUB_DEPTH 0x0c
+
+/*
+ * As of USB 2.0, full/low speed devices are segregated into trees.
+ * One type grows from USB 1.1 host controllers (OHCI, UHCI etc).
+ * The other type grows from high speed hubs when they connect to
+ * full/low speed devices using "Transaction Translators" (TTs).
+ */
+struct usb_tt {
+ bool multi; /* true means one TT per port */
+ unsigned think_time; /* think time in ns */
+};
+
/*
* CBI style
*/
diff --git a/include/wdt.h b/include/wdt.h
index 0b5f058..9b90fbe 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -21,12 +21,12 @@
* Start the timer
*
* @dev: WDT Device
- * @timeout: Number of ticks before timer expires
+ * @timeout_ms: Number of ticks (milliseconds) before timer expires
* @flags: Driver specific flags. This might be used to specify
* which action needs to be executed when the timer expires
* @return: 0 if OK, -ve on error
*/
-int wdt_start(struct udevice *dev, u64 timeout, ulong flags);
+int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags);
/*
* Stop the timer, thus disabling the Watchdog. Use wdt_start to start it again.
@@ -67,12 +67,12 @@
* Start the timer
*
* @dev: WDT Device
- * @timeout: Number of ticks before the timer expires
+ * @timeout_ms: Number of ticks (milliseconds) before the timer expires
* @flags: Driver specific flags. This might be used to specify
* which action needs to be executed when the timer expires
* @return: 0 if OK, -ve on error
*/
- int (*start)(struct udevice *dev, u64 timeout, ulong flags);
+ int (*start)(struct udevice *dev, u64 timeout_ms, ulong flags);
/*
* Stop the timer
*
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index fb5200e..4c8c2f8 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -20,7 +20,7 @@
#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \
ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
#define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12
-#define ZYNQMP_CSU_IDCODE_SVD_MASK (0xe << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
+#define ZYNQMP_CSU_IDCODE_SVD_MASK (0x7 << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
extern struct xilinx_fpga_op zynqmp_op;
diff --git a/lib/Kconfig b/lib/Kconfig
index 2f5a210..8163617 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -61,6 +61,15 @@
size-constrained envrionments even this may be too big. Enable this
option to reduce code size slightly at the cost of some speed.
+config TPL_TINY_MEMSET
+ bool "Use a very small memset() in TPL"
+ help
+ The faster memset() is the arch-specific one (if available) enabled
+ by CONFIG_USE_ARCH_MEMSET. If that is not enabled, we can still get
+ better performance by writing a word at a time. But in very
+ size-constrained envrionments even this may be too big. Enable this
+ option to reduce code size slightly at the cost of some speed.
+
config RBTREE
bool
diff --git a/lib/Makefile b/lib/Makefile
index eacc7d6..2eef1eb 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,11 +49,11 @@
obj-$(CONFIG_SHA1) += sha1.o
obj-$(CONFIG_SHA256) += sha256.o
-obj-$(CONFIG_SPL_SAVEENV) += qsort.o
-obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
-ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_SPL_OF_PLATDATA),yy)
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
+obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
+ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
+obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec_common.o
+obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += fdtdec.o
endif
ifdef CONFIG_SPL_BUILD
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 221ebbf..b04f7c6 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -28,7 +28,7 @@
DEFINE(GD_SIZE, sizeof(struct global_data));
DEFINE(GD_BD, offsetof(struct global_data, bd));
-#ifdef CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
DEFINE(GD_MALLOC_BASE, offsetof(struct global_data, malloc_base));
#endif
diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c
index 452ab5d..f1afd9c 100644
--- a/lib/efi/efi_app.c
+++ b/lib/efi/efi_app.c
@@ -48,7 +48,7 @@
return ret;
memset(gd, '\0', sizeof(*gd));
- gd->malloc_base = (ulong)efi_malloc(priv, CONFIG_SYS_MALLOC_F_LEN,
+ gd->malloc_base = (ulong)efi_malloc(priv, CONFIG_VAL(SYS_MALLOC_F_LEN),
&ret);
if (!gd->malloc_base)
return ret;
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index fa8b91a..30bf343 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -15,8 +15,9 @@
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
obj-y += efi_image_loader.o efi_boottime.o efi_runtime.o efi_console.o
-obj-y += efi_memory.o
+obj-y += efi_memory.o efi_device_path_to_text.o
obj-$(CONFIG_LCD) += efi_gop.o
+obj-$(CONFIG_DM_VIDEO) += efi_gop.o
obj-$(CONFIG_PARTITIONS) += efi_disk.o
obj-$(CONFIG_NET) += efi_net.o
obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 27e51a2..59479ed 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -49,6 +49,31 @@
static volatile void *efi_gd, *app_gd;
#endif
+static int entry_count;
+static int nesting_level;
+
+/* Called on every callback entry */
+int __efi_entry_check(void)
+{
+ int ret = entry_count++ == 0;
+#ifdef CONFIG_ARM
+ assert(efi_gd);
+ app_gd = gd;
+ gd = efi_gd;
+#endif
+ return ret;
+}
+
+/* Called on every callback exit */
+int __efi_exit_check(void)
+{
+ int ret = --entry_count == 0;
+#ifdef CONFIG_ARM
+ gd = app_gd;
+#endif
+ return ret;
+}
+
/* Called from do_bootefi_exec() */
void efi_save_gd(void)
{
@@ -57,51 +82,102 @@
#endif
}
-/* Called on every callback entry */
+/*
+ * Special case handler for error/abort that just forces things back
+ * to u-boot world so we can dump out an abort msg, without any care
+ * about returning back to UEFI world.
+ */
void efi_restore_gd(void)
{
#ifdef CONFIG_ARM
/* Only restore if we're already in EFI context */
if (!efi_gd)
return;
-
- if (gd != efi_gd)
- app_gd = gd;
gd = efi_gd;
#endif
}
-/* Called on every callback exit */
-efi_status_t efi_exit_func(efi_status_t ret)
+/*
+ * Two spaces per indent level, maxing out at 10.. which ought to be
+ * enough for anyone ;-)
+ */
+static const char *indent_string(int level)
{
-#ifdef CONFIG_ARM
- gd = app_gd;
-#endif
+ const char *indent = " ";
+ const int max = strlen(indent);
+ level = min(max, level * 2);
+ return &indent[max - level];
+}
+const char *__efi_nesting_inc(void)
+{
+ return indent_string(nesting_level++);
+}
+
+const char *__efi_nesting_dec(void)
+{
+ return indent_string(--nesting_level);
+}
+
+/* Low 32 bit */
+#define EFI_LOW32(a) (a & 0xFFFFFFFFULL)
+/* High 32 bit */
+#define EFI_HIGH32(a) (a >> 32)
+
+/*
+ * 64bit division by 10 implemented as multiplication by 1 / 10
+ *
+ * Decimals of one tenth: 0x1 / 0xA = 0x0.19999...
+ */
+#define EFI_TENTH 0x199999999999999A
+static u64 efi_div10(u64 a)
+{
+ u64 prod;
+ u64 rem;
+ u64 ret;
+
+ ret = EFI_HIGH32(a) * EFI_HIGH32(EFI_TENTH);
+ prod = EFI_HIGH32(a) * EFI_LOW32(EFI_TENTH);
+ rem = EFI_LOW32(prod);
+ ret += EFI_HIGH32(prod);
+ prod = EFI_LOW32(a) * EFI_HIGH32(EFI_TENTH);
+ rem += EFI_LOW32(prod);
+ ret += EFI_HIGH32(prod);
+ prod = EFI_LOW32(a) * EFI_LOW32(EFI_TENTH);
+ rem += EFI_HIGH32(prod);
+ ret += EFI_HIGH32(rem);
+ /* Round to nearest integer */
+ if (rem >= (1 << 31))
+ ++ret;
return ret;
}
+void efi_signal_event(struct efi_event *event)
+{
+ if (event->signaled)
+ return;
+ event->signaled = 1;
+ if (event->type & EVT_NOTIFY_SIGNAL) {
+ EFI_CALL(event->notify_function(event, event->notify_context));
+ }
+}
+
static efi_status_t efi_unsupported(const char *funcname)
{
debug("EFI: App called into unimplemented function %s\n", funcname);
return EFI_EXIT(EFI_UNSUPPORTED);
}
-static int guidcmp(const efi_guid_t *g1, const efi_guid_t *g2)
+static unsigned long EFIAPI efi_raise_tpl(UINTN new_tpl)
{
- return memcmp(g1, g2, sizeof(efi_guid_t));
-}
-
-static unsigned long EFIAPI efi_raise_tpl(unsigned long new_tpl)
-{
- EFI_ENTRY("0x%lx", new_tpl);
+ EFI_ENTRY("0x%zx", new_tpl);
return EFI_EXIT(0);
}
-static void EFIAPI efi_restore_tpl(unsigned long old_tpl)
+static void EFIAPI efi_restore_tpl(UINTN old_tpl)
{
- EFI_ENTRY("0x%lx", old_tpl);
- EFI_EXIT(efi_unsupported(__func__));
+ EFI_ENTRY("0x%zx", old_tpl);
+ efi_unsupported(__func__);
}
static efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type,
@@ -162,151 +238,289 @@
}
/*
- * Our event capabilities are very limited. Only support a single
- * event to exist, so we don't need to maintain lists.
+ * Our event capabilities are very limited. Only a small limited
+ * number of events is allowed to coexist.
*/
-static struct {
- enum efi_event_type type;
- u32 trigger_type;
- u32 trigger_time;
- u64 trigger_next;
- unsigned long notify_tpl;
- void (EFIAPI *notify_function) (void *event, void *context);
- void *notify_context;
-} efi_event = {
- /* Disable timers on bootup */
- .trigger_next = -1ULL,
-};
+static struct efi_event efi_events[16];
-static efi_status_t EFIAPI efi_create_event(
- enum efi_event_type type, ulong notify_tpl,
- void (EFIAPI *notify_function) (void *event,
- void *context),
- void *notify_context, void **event)
+efi_status_t efi_create_event(uint32_t type, UINTN notify_tpl,
+ void (EFIAPI *notify_function) (
+ struct efi_event *event,
+ void *context),
+ void *notify_context, struct efi_event **event)
{
- EFI_ENTRY("%d, 0x%lx, %p, %p", type, notify_tpl, notify_function,
- notify_context);
- if (efi_event.notify_function) {
- /* We only support one event at a time */
- return EFI_EXIT(EFI_OUT_OF_RESOURCES);
- }
+ int i;
if (event == NULL)
- return EFI_EXIT(EFI_INVALID_PARAMETER);
+ return EFI_INVALID_PARAMETER;
if ((type & EVT_NOTIFY_SIGNAL) && (type & EVT_NOTIFY_WAIT))
- return EFI_EXIT(EFI_INVALID_PARAMETER);
+ return EFI_INVALID_PARAMETER;
if ((type & (EVT_NOTIFY_SIGNAL|EVT_NOTIFY_WAIT)) &&
notify_function == NULL)
- return EFI_EXIT(EFI_INVALID_PARAMETER);
+ return EFI_INVALID_PARAMETER;
- efi_event.type = type;
- efi_event.notify_tpl = notify_tpl;
- efi_event.notify_function = notify_function;
- efi_event.notify_context = notify_context;
- *event = &efi_event;
-
- return EFI_EXIT(EFI_SUCCESS);
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (efi_events[i].type)
+ continue;
+ efi_events[i].type = type;
+ efi_events[i].notify_tpl = notify_tpl;
+ efi_events[i].notify_function = notify_function;
+ efi_events[i].notify_context = notify_context;
+ /* Disable timers on bootup */
+ efi_events[i].trigger_next = -1ULL;
+ efi_events[i].signaled = 0;
+ *event = &efi_events[i];
+ return EFI_SUCCESS;
+ }
+ return EFI_OUT_OF_RESOURCES;
}
+static efi_status_t EFIAPI efi_create_event_ext(
+ uint32_t type, UINTN notify_tpl,
+ void (EFIAPI *notify_function) (
+ struct efi_event *event,
+ void *context),
+ void *notify_context, struct efi_event **event)
+{
+ EFI_ENTRY("%d, 0x%zx, %p, %p", type, notify_tpl, notify_function,
+ notify_context);
+ return EFI_EXIT(efi_create_event(type, notify_tpl, notify_function,
+ notify_context, event));
+}
+
+
/*
* Our timers have to work without interrupts, so we check whenever keyboard
* input or disk accesses happen if enough time elapsed for it to fire.
*/
void efi_timer_check(void)
{
+ int i;
u64 now = timer_get_us();
- if (now >= efi_event.trigger_next) {
- /* Triggering! */
- if (efi_event.trigger_type == EFI_TIMER_PERIODIC)
- efi_event.trigger_next += efi_event.trigger_time / 10;
- if (efi_event.type & (EVT_NOTIFY_WAIT | EVT_NOTIFY_SIGNAL))
- efi_event.notify_function(&efi_event,
- efi_event.notify_context);
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (!efi_events[i].type ||
+ !(efi_events[i].type & EVT_TIMER) ||
+ efi_events[i].trigger_type == EFI_TIMER_STOP ||
+ now < efi_events[i].trigger_next)
+ continue;
+ if (efi_events[i].trigger_type == EFI_TIMER_PERIODIC) {
+ efi_events[i].trigger_next +=
+ efi_events[i].trigger_time;
+ efi_events[i].signaled = 0;
+ }
+ efi_signal_event(&efi_events[i]);
}
-
WATCHDOG_RESET();
}
-static efi_status_t EFIAPI efi_set_timer(void *event, int type,
- uint64_t trigger_time)
+efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type,
+ uint64_t trigger_time)
{
- /* We don't have 64bit division available everywhere, so limit timer
- * distances to 32bit bits. */
- u32 trigger32 = trigger_time;
+ int i;
+ /*
+ * The parameter defines a multiple of 100ns.
+ * We use multiples of 1000ns. So divide by 10.
+ */
+ trigger_time = efi_div10(trigger_time);
+
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (event != &efi_events[i])
+ continue;
+
+ if (!(event->type & EVT_TIMER))
+ break;
+ switch (type) {
+ case EFI_TIMER_STOP:
+ event->trigger_next = -1ULL;
+ break;
+ case EFI_TIMER_PERIODIC:
+ case EFI_TIMER_RELATIVE:
+ event->trigger_next =
+ timer_get_us() + trigger_time;
+ break;
+ default:
+ return EFI_INVALID_PARAMETER;
+ }
+ event->trigger_type = type;
+ event->trigger_time = trigger_time;
+ return EFI_SUCCESS;
+ }
+ return EFI_INVALID_PARAMETER;
+}
+
+static efi_status_t EFIAPI efi_set_timer_ext(struct efi_event *event,
+ enum efi_timer_delay type,
+ uint64_t trigger_time)
+{
EFI_ENTRY("%p, %d, %"PRIx64, event, type, trigger_time);
-
- if (trigger32 < trigger_time) {
- printf("WARNING: Truncating timer from %"PRIx64" to %x\n",
- trigger_time, trigger32);
- }
-
- if (event != &efi_event) {
- /* We only support one event at a time */
- return EFI_EXIT(EFI_INVALID_PARAMETER);
- }
-
- switch (type) {
- case EFI_TIMER_STOP:
- efi_event.trigger_next = -1ULL;
- break;
- case EFI_TIMER_PERIODIC:
- case EFI_TIMER_RELATIVE:
- efi_event.trigger_next = timer_get_us() + (trigger32 / 10);
- break;
- default:
- return EFI_EXIT(EFI_INVALID_PARAMETER);
- }
- efi_event.trigger_type = type;
- efi_event.trigger_time = trigger_time;
-
- return EFI_EXIT(EFI_SUCCESS);
+ return EFI_EXIT(efi_set_timer(event, type, trigger_time));
}
static efi_status_t EFIAPI efi_wait_for_event(unsigned long num_events,
- void *event, unsigned long *index)
+ struct efi_event **event,
+ unsigned long *index)
{
- u64 now;
+ int i, j;
EFI_ENTRY("%ld, %p, %p", num_events, event, index);
- now = timer_get_us();
- while (now < efi_event.trigger_next) { }
+ /* Check parameters */
+ if (!num_events || !event)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+ for (i = 0; i < num_events; ++i) {
+ for (j = 0; j < ARRAY_SIZE(efi_events); ++j) {
+ if (event[i] == &efi_events[j])
+ goto known_event;
+ }
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+known_event:
+ if (!event[i]->type || event[i]->type & EVT_NOTIFY_SIGNAL)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+ }
+
+ /* Wait for signal */
+ for (;;) {
+ for (i = 0; i < num_events; ++i) {
+ if (event[i]->signaled)
+ goto out;
+ }
+ /* Allow events to occur. */
+ efi_timer_check();
+ }
+
+out:
+ /*
+ * Reset the signal which is passed to the caller to allow periodic
+ * events to occur.
+ */
+ event[i]->signaled = 0;
+ if (index)
+ *index = i;
+
+ return EFI_EXIT(EFI_SUCCESS);
+}
+
+static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event)
+{
+ int i;
+
+ EFI_ENTRY("%p", event);
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (event != &efi_events[i])
+ continue;
+ efi_signal_event(event);
+ break;
+ }
+ return EFI_EXIT(EFI_SUCCESS);
+}
+
+static efi_status_t EFIAPI efi_close_event(struct efi_event *event)
+{
+ int i;
+
+ EFI_ENTRY("%p", event);
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (event == &efi_events[i]) {
+ event->type = 0;
+ event->trigger_next = -1ULL;
+ event->signaled = 0;
+ return EFI_EXIT(EFI_SUCCESS);
+ }
+ }
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+}
+
+static efi_status_t EFIAPI efi_check_event(struct efi_event *event)
+{
+ int i;
+
+ EFI_ENTRY("%p", event);
efi_timer_check();
-
- return EFI_EXIT(EFI_SUCCESS);
-}
-
-static efi_status_t EFIAPI efi_signal_event(void *event)
-{
- EFI_ENTRY("%p", event);
- return EFI_EXIT(EFI_SUCCESS);
-}
-
-static efi_status_t EFIAPI efi_close_event(void *event)
-{
- EFI_ENTRY("%p", event);
- efi_event.trigger_next = -1ULL;
- return EFI_EXIT(EFI_SUCCESS);
-}
-
-static efi_status_t EFIAPI efi_check_event(void *event)
-{
- EFI_ENTRY("%p", event);
- return EFI_EXIT(EFI_NOT_READY);
+ for (i = 0; i < ARRAY_SIZE(efi_events); ++i) {
+ if (event != &efi_events[i])
+ continue;
+ if (!event->type || event->type & EVT_NOTIFY_SIGNAL)
+ break;
+ if (event->signaled)
+ return EFI_EXIT(EFI_SUCCESS);
+ return EFI_EXIT(EFI_NOT_READY);
+ }
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
}
static efi_status_t EFIAPI efi_install_protocol_interface(void **handle,
efi_guid_t *protocol, int protocol_interface_type,
void *protocol_interface)
{
+ struct list_head *lhandle;
+ int i;
+ efi_status_t r;
+
+ if (!handle || !protocol ||
+ protocol_interface_type != EFI_NATIVE_INTERFACE) {
+ r = EFI_INVALID_PARAMETER;
+ goto out;
+ }
+
+ /* Create new handle if requested. */
+ if (!*handle) {
+ r = EFI_OUT_OF_RESOURCES;
+ goto out;
+ }
+ /* Find object. */
+ list_for_each(lhandle, &efi_obj_list) {
+ struct efi_object *efiobj;
+ efiobj = list_entry(lhandle, struct efi_object, link);
+
+ if (efiobj->handle != *handle)
+ continue;
+ /* Check if protocol is already installed on the handle. */
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+ struct efi_handler *handler = &efiobj->protocols[i];
+
+ if (!handler->guid)
+ continue;
+ if (!guidcmp(handler->guid, protocol)) {
+ r = EFI_INVALID_PARAMETER;
+ goto out;
+ }
+ }
+ /* Install protocol in first empty slot. */
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+ struct efi_handler *handler = &efiobj->protocols[i];
+
+ if (handler->guid)
+ continue;
+
+ handler->guid = protocol;
+ handler->protocol_interface = protocol_interface;
+ r = EFI_SUCCESS;
+ goto out;
+ }
+ r = EFI_OUT_OF_RESOURCES;
+ goto out;
+ }
+ r = EFI_INVALID_PARAMETER;
+out:
+ return r;
+}
+
+static efi_status_t EFIAPI efi_install_protocol_interface_ext(void **handle,
+ efi_guid_t *protocol, int protocol_interface_type,
+ void *protocol_interface)
+{
EFI_ENTRY("%p, %p, %d, %p", handle, protocol, protocol_interface_type,
protocol_interface);
- return EFI_EXIT(EFI_OUT_OF_RESOURCES);
+
+ return EFI_EXIT(efi_install_protocol_interface(handle, protocol,
+ protocol_interface_type,
+ protocol_interface));
}
+
static efi_status_t EFIAPI efi_reinstall_protocol_interface(void *handle,
efi_guid_t *protocol, void *old_interface,
void *new_interface)
@@ -319,12 +533,55 @@
static efi_status_t EFIAPI efi_uninstall_protocol_interface(void *handle,
efi_guid_t *protocol, void *protocol_interface)
{
+ struct list_head *lhandle;
+ int i;
+ efi_status_t r = EFI_NOT_FOUND;
+
+ if (!handle || !protocol) {
+ r = EFI_INVALID_PARAMETER;
+ goto out;
+ }
+
+ list_for_each(lhandle, &efi_obj_list) {
+ struct efi_object *efiobj;
+ efiobj = list_entry(lhandle, struct efi_object, link);
+
+ if (efiobj->handle != handle)
+ continue;
+
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+ struct efi_handler *handler = &efiobj->protocols[i];
+ const efi_guid_t *hprotocol = handler->guid;
+
+ if (!hprotocol)
+ continue;
+ if (!guidcmp(hprotocol, protocol)) {
+ if (handler->protocol_interface) {
+ r = EFI_ACCESS_DENIED;
+ } else {
+ handler->guid = 0;
+ r = EFI_SUCCESS;
+ }
+ goto out;
+ }
+ }
+ }
+
+out:
+ return r;
+}
+
+static efi_status_t EFIAPI efi_uninstall_protocol_interface_ext(void *handle,
+ efi_guid_t *protocol, void *protocol_interface)
+{
EFI_ENTRY("%p, %p, %p", handle, protocol, protocol_interface);
- return EFI_EXIT(EFI_NOT_FOUND);
+
+ return EFI_EXIT(efi_uninstall_protocol_interface(handle, protocol,
+ protocol_interface));
}
static efi_status_t EFIAPI efi_register_protocol_notify(efi_guid_t *protocol,
- void *event,
+ struct efi_event *event,
void **registration)
{
EFI_ENTRY("%p, %p, %p", protocol, event, registration);
@@ -362,9 +619,6 @@
struct list_head *lhandle;
unsigned long size = 0;
- EFI_ENTRY("%d, %p, %p, %p, %p", search_type, protocol, search_key,
- buffer_size, buffer);
-
/* Count how much space we need */
list_for_each(lhandle, &efi_obj_list) {
struct efi_object *efiobj;
@@ -376,7 +630,7 @@
if (*buffer_size < size) {
*buffer_size = size;
- return EFI_EXIT(EFI_BUFFER_TOO_SMALL);
+ return EFI_BUFFER_TOO_SMALL;
}
/* Then fill the array */
@@ -389,7 +643,19 @@
}
*buffer_size = size;
- return EFI_EXIT(EFI_SUCCESS);
+ return EFI_SUCCESS;
+}
+
+static efi_status_t EFIAPI efi_locate_handle_ext(
+ enum efi_locate_search_type search_type,
+ efi_guid_t *protocol, void *search_key,
+ unsigned long *buffer_size, efi_handle_t *buffer)
+{
+ EFI_ENTRY("%d, %p, %p, %p, %p", search_type, protocol, search_key,
+ buffer_size, buffer);
+
+ return EFI_EXIT(efi_locate_handle(search_type, protocol, search_key,
+ buffer_size, buffer));
}
static efi_status_t EFIAPI efi_locate_device_path(efi_guid_t *protocol,
@@ -400,6 +666,17 @@
return EFI_EXIT(EFI_NOT_FOUND);
}
+/* Collapses configuration table entries, removing index i */
+static void efi_remove_configuration_table(int i)
+{
+ struct efi_configuration_table *this = &efi_conf_table[i];
+ struct efi_configuration_table *next = &efi_conf_table[i+1];
+ struct efi_configuration_table *end = &efi_conf_table[systab.nr_tables];
+
+ memmove(this, next, (ulong)end - (ulong)next);
+ systab.nr_tables--;
+}
+
efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table)
{
int i;
@@ -407,11 +684,17 @@
/* Check for guid override */
for (i = 0; i < systab.nr_tables; i++) {
if (!guidcmp(guid, &efi_conf_table[i].guid)) {
- efi_conf_table[i].table = table;
+ if (table)
+ efi_conf_table[i].table = table;
+ else
+ efi_remove_configuration_table(i);
return EFI_SUCCESS;
}
}
+ if (!table)
+ return EFI_NOT_FOUND;
+
/* No override, check for overflow */
if (i >= ARRAY_SIZE(efi_conf_table))
return EFI_OUT_OF_RESOURCES;
@@ -442,7 +725,6 @@
.protocols = {
{
.guid = &efi_guid_loaded_image,
- .open = &efi_return_handle,
},
},
};
@@ -452,6 +734,7 @@
EFI_ENTRY("%d, %p, %p, %p, %ld, %p", boot_policy, parent_image,
file_path, source_buffer, source_size, image_handle);
info = malloc(sizeof(*info));
+ loaded_image_info_obj.protocols[0].protocol_interface = info;
obj = malloc(sizeof(loaded_image_info_obj));
memset(info, 0, sizeof(*info));
memcpy(obj, &loaded_image_info_obj, sizeof(loaded_image_info_obj));
@@ -488,7 +771,11 @@
return EFI_EXIT(info->exit_status);
}
+ __efi_nesting_dec();
+ __efi_exit_check();
entry(image_handle, &systab);
+ __efi_entry_check();
+ __efi_nesting_inc();
/* Should usually never get here */
return EFI_EXIT(EFI_SUCCESS);
@@ -588,7 +875,7 @@
{
EFI_ENTRY("%ld, 0x%"PRIx64", %ld, %p", timeout, watchdog_code,
data_size, watchdog_data);
- return EFI_EXIT(efi_unsupported(__func__));
+ return efi_unsupported(__func__);
}
static efi_status_t EFIAPI efi_connect_controller(
@@ -635,9 +922,53 @@
efi_guid_t ***protocol_buffer,
unsigned long *protocol_buffer_count)
{
+ unsigned long buffer_size;
+ struct efi_object *efiobj;
+ unsigned long i, j;
+ struct list_head *lhandle;
+ efi_status_t r;
+
EFI_ENTRY("%p, %p, %p", handle, protocol_buffer,
protocol_buffer_count);
- return EFI_EXIT(EFI_OUT_OF_RESOURCES);
+
+ if (!handle || !protocol_buffer || !protocol_buffer_count)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+
+ *protocol_buffer = NULL;
+ *protocol_buffer_count = 0;
+ list_for_each(lhandle, &efi_obj_list) {
+ efiobj = list_entry(lhandle, struct efi_object, link);
+
+ if (efiobj->handle != handle)
+ continue;
+
+ /* Count protocols */
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+ if (efiobj->protocols[i].guid)
+ ++*protocol_buffer_count;
+ }
+ /* Copy guids */
+ if (*protocol_buffer_count) {
+ buffer_size = sizeof(efi_guid_t *) *
+ *protocol_buffer_count;
+ r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES,
+ buffer_size,
+ (void **)protocol_buffer);
+ if (r != EFI_SUCCESS)
+ return EFI_EXIT(r);
+ j = 0;
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); ++i) {
+ if (efiobj->protocols[i].guid) {
+ (*protocol_buffer)[j] = (void *)
+ efiobj->protocols[i].guid;
+ ++j;
+ }
+ }
+ }
+ break;
+ }
+
+ return EFI_EXIT(EFI_SUCCESS);
}
static efi_status_t EFIAPI efi_locate_handle_buffer(
@@ -645,32 +976,63 @@
efi_guid_t *protocol, void *search_key,
unsigned long *no_handles, efi_handle_t **buffer)
{
+ efi_status_t r;
+ unsigned long buffer_size = 0;
+
EFI_ENTRY("%d, %p, %p, %p, %p", search_type, protocol, search_key,
no_handles, buffer);
- return EFI_EXIT(EFI_NOT_FOUND);
-}
-static struct efi_class_map efi_class_maps[] = {
- {
- .guid = &efi_guid_console_control,
- .interface = &efi_console_control
- },
-};
+ if (!no_handles || !buffer) {
+ r = EFI_INVALID_PARAMETER;
+ goto out;
+ }
+ *no_handles = 0;
+ *buffer = NULL;
+ r = efi_locate_handle(search_type, protocol, search_key, &buffer_size,
+ *buffer);
+ if (r != EFI_BUFFER_TOO_SMALL)
+ goto out;
+ r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size,
+ (void **)buffer);
+ if (r != EFI_SUCCESS)
+ goto out;
+ r = efi_locate_handle(search_type, protocol, search_key, &buffer_size,
+ *buffer);
+ if (r == EFI_SUCCESS)
+ *no_handles = buffer_size / sizeof(void *);
+out:
+ return EFI_EXIT(r);
+}
static efi_status_t EFIAPI efi_locate_protocol(efi_guid_t *protocol,
void *registration,
void **protocol_interface)
{
+ struct list_head *lhandle;
int i;
EFI_ENTRY("%p, %p, %p", protocol, registration, protocol_interface);
- for (i = 0; i < ARRAY_SIZE(efi_class_maps); i++) {
- struct efi_class_map *curmap = &efi_class_maps[i];
- if (!guidcmp(protocol, curmap->guid)) {
- *protocol_interface = (void*)curmap->interface;
- return EFI_EXIT(EFI_SUCCESS);
+
+ if (!protocol || !protocol_interface)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+
+ list_for_each(lhandle, &efi_obj_list) {
+ struct efi_object *efiobj;
+
+ efiobj = list_entry(lhandle, struct efi_object, link);
+ for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) {
+ struct efi_handler *handler = &efiobj->protocols[i];
+
+ if (!handler->guid)
+ continue;
+ if (!guidcmp(handler->guid, protocol)) {
+ *protocol_interface =
+ handler->protocol_interface;
+ return EFI_EXIT(EFI_SUCCESS);
+ }
}
}
+ *protocol_interface = NULL;
return EFI_EXIT(EFI_NOT_FOUND);
}
@@ -679,7 +1041,44 @@
void **handle, ...)
{
EFI_ENTRY("%p", handle);
- return EFI_EXIT(EFI_OUT_OF_RESOURCES);
+
+ va_list argptr;
+ efi_guid_t *protocol;
+ void *protocol_interface;
+ efi_status_t r = EFI_SUCCESS;
+ int i = 0;
+
+ if (!handle)
+ return EFI_EXIT(EFI_INVALID_PARAMETER);
+
+ va_start(argptr, handle);
+ for (;;) {
+ protocol = va_arg(argptr, efi_guid_t*);
+ if (!protocol)
+ break;
+ protocol_interface = va_arg(argptr, void*);
+ r = efi_install_protocol_interface(handle, protocol,
+ EFI_NATIVE_INTERFACE,
+ protocol_interface);
+ if (r != EFI_SUCCESS)
+ break;
+ i++;
+ }
+ va_end(argptr);
+ if (r == EFI_SUCCESS)
+ return EFI_EXIT(r);
+
+ /* If an error occured undo all changes. */
+ va_start(argptr, handle);
+ for (; i; --i) {
+ protocol = va_arg(argptr, efi_guid_t*);
+ protocol_interface = va_arg(argptr, void*);
+ efi_uninstall_protocol_interface(handle, protocol,
+ protocol_interface);
+ }
+ va_end(argptr);
+
+ return EFI_EXIT(r);
}
static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces(
@@ -718,11 +1117,38 @@
{
struct list_head *lhandle;
int i;
- efi_status_t r = EFI_UNSUPPORTED;
+ efi_status_t r = EFI_INVALID_PARAMETER;
EFI_ENTRY("%p, %p, %p, %p, %p, 0x%x", handle, protocol,
protocol_interface, agent_handle, controller_handle,
attributes);
+
+ if (!handle || !protocol ||
+ (!protocol_interface && attributes !=
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL)) {
+ goto out;
+ }
+
+ switch (attributes) {
+ case EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL:
+ case EFI_OPEN_PROTOCOL_GET_PROTOCOL:
+ case EFI_OPEN_PROTOCOL_TEST_PROTOCOL:
+ break;
+ case EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER:
+ if (controller_handle == handle)
+ goto out;
+ case EFI_OPEN_PROTOCOL_BY_DRIVER:
+ case EFI_OPEN_PROTOCOL_BY_DRIVER | EFI_OPEN_PROTOCOL_EXCLUSIVE:
+ if (controller_handle == NULL)
+ goto out;
+ case EFI_OPEN_PROTOCOL_EXCLUSIVE:
+ if (agent_handle == NULL)
+ goto out;
+ break;
+ default:
+ goto out;
+ }
+
list_for_each(lhandle, &efi_obj_list) {
struct efi_object *efiobj;
efiobj = list_entry(lhandle, struct efi_object, link);
@@ -734,16 +1160,22 @@
struct efi_handler *handler = &efiobj->protocols[i];
const efi_guid_t *hprotocol = handler->guid;
if (!hprotocol)
- break;
+ continue;
if (!guidcmp(hprotocol, protocol)) {
- r = handler->open(handle, protocol,
- protocol_interface, agent_handle,
- controller_handle, attributes);
+ if (attributes !=
+ EFI_OPEN_PROTOCOL_TEST_PROTOCOL) {
+ *protocol_interface =
+ handler->protocol_interface;
+ }
+ r = EFI_SUCCESS;
goto out;
}
}
+ goto unsupported;
}
+unsupported:
+ r = EFI_UNSUPPORTED;
out:
return EFI_EXIT(r);
}
@@ -767,19 +1199,19 @@
.get_memory_map = efi_get_memory_map_ext,
.allocate_pool = efi_allocate_pool_ext,
.free_pool = efi_free_pool_ext,
- .create_event = efi_create_event,
- .set_timer = efi_set_timer,
+ .create_event = efi_create_event_ext,
+ .set_timer = efi_set_timer_ext,
.wait_for_event = efi_wait_for_event,
- .signal_event = efi_signal_event,
+ .signal_event = efi_signal_event_ext,
.close_event = efi_close_event,
.check_event = efi_check_event,
- .install_protocol_interface = efi_install_protocol_interface,
+ .install_protocol_interface = efi_install_protocol_interface_ext,
.reinstall_protocol_interface = efi_reinstall_protocol_interface,
- .uninstall_protocol_interface = efi_uninstall_protocol_interface,
+ .uninstall_protocol_interface = efi_uninstall_protocol_interface_ext,
.handle_protocol = efi_handle_protocol,
.reserved = NULL,
.register_protocol_notify = efi_register_protocol_notify,
- .locate_handle = efi_locate_handle,
+ .locate_handle = efi_locate_handle_ext,
.locate_device_path = efi_locate_device_path,
.install_configuration_table = efi_install_configuration_table_ext,
.load_image = efi_load_image,
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 8ef7326..5ebce4b 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -421,8 +421,61 @@
return EFI_EXIT(EFI_SUCCESS);
}
-const struct efi_simple_input_interface efi_con_in = {
+struct efi_simple_input_interface efi_con_in = {
.reset = efi_cin_reset,
.read_key_stroke = efi_cin_read_key_stroke,
.wait_for_key = NULL,
};
+
+static struct efi_event *console_timer_event;
+
+static void EFIAPI efi_key_notify(struct efi_event *event, void *context)
+{
+}
+
+static void EFIAPI efi_console_timer_notify(struct efi_event *event,
+ void *context)
+{
+ EFI_ENTRY("%p, %p", event, context);
+ if (tstc())
+ efi_signal_event(efi_con_in.wait_for_key);
+ EFI_EXIT(EFI_SUCCESS);
+}
+
+
+static struct efi_object efi_console_control_obj =
+ EFI_PROTOCOL_OBJECT(efi_guid_console_control, &efi_console_control);
+static struct efi_object efi_console_output_obj =
+ EFI_PROTOCOL_OBJECT(EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID, &efi_con_out);
+static struct efi_object efi_console_input_obj =
+ EFI_PROTOCOL_OBJECT(EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID, &efi_con_in);
+
+/* This gets called from do_bootefi_exec(). */
+int efi_console_register(void)
+{
+ efi_status_t r;
+
+ /* Hook up to the device list */
+ list_add_tail(&efi_console_control_obj.link, &efi_obj_list);
+ list_add_tail(&efi_console_output_obj.link, &efi_obj_list);
+ list_add_tail(&efi_console_input_obj.link, &efi_obj_list);
+
+ r = efi_create_event(EVT_NOTIFY_WAIT, TPL_CALLBACK,
+ efi_key_notify, NULL, &efi_con_in.wait_for_key);
+ if (r != EFI_SUCCESS) {
+ printf("ERROR: Failed to register WaitForKey event\n");
+ return r;
+ }
+ r = efi_create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+ efi_console_timer_notify, NULL,
+ &console_timer_event);
+ if (r != EFI_SUCCESS) {
+ printf("ERROR: Failed to register console event\n");
+ return r;
+ }
+ /* 5000 ns cycle is sufficient for 2 MBaud */
+ r = efi_set_timer(console_timer_event, EFI_TIMER_PERIODIC, 50);
+ if (r != EFI_SUCCESS)
+ printf("ERROR: Failed to set console timer\n");
+ return r;
+}
diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c
new file mode 100644
index 0000000..4b2f43f
--- /dev/null
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -0,0 +1,130 @@
+/*
+ * EFI device path interface
+ *
+ * Copyright (c) 2017 Heinrich Schuchardt
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <efi_loader.h>
+
+#define MAC_OUTPUT_LEN 22
+#define UNKNOWN_OUTPUT_LEN 23
+
+const efi_guid_t efi_guid_device_path_to_text_protocol =
+ EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID;
+
+static uint16_t *efi_convert_device_node_to_text(
+ struct efi_device_path_protocol *device_node,
+ bool display_only,
+ bool allow_shortcuts)
+{
+ unsigned long buffer_size;
+ efi_status_t r;
+ uint16_t *buffer = NULL;
+ int i;
+
+ switch (device_node->type) {
+ case DEVICE_PATH_TYPE_END:
+ return NULL;
+ case DEVICE_PATH_TYPE_MESSAGING_DEVICE:
+ switch (device_node->sub_type) {
+ case DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR: {
+ struct efi_device_path_mac_addr *dp =
+ (struct efi_device_path_mac_addr *)device_node;
+
+ if (dp->if_type != 0 && dp->if_type != 1)
+ break;
+ r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES,
+ 2 * MAC_OUTPUT_LEN,
+ (void **)&buffer);
+ if (r != EFI_SUCCESS)
+ return NULL;
+ sprintf((char *)buffer,
+ "MAC(%02x%02x%02x%02x%02x%02x,0x%1x)",
+ dp->mac.addr[0], dp->mac.addr[1],
+ dp->mac.addr[2], dp->mac.addr[3],
+ dp->mac.addr[4], dp->mac.addr[5],
+ dp->if_type);
+ for (i = MAC_OUTPUT_LEN - 1; i >= 0; --i)
+ buffer[i] = ((uint8_t *)buffer)[i];
+ break;
+ }
+ }
+ break;
+ case DEVICE_PATH_TYPE_MEDIA_DEVICE:
+ switch (device_node->sub_type) {
+ case DEVICE_PATH_SUB_TYPE_FILE_PATH:
+ buffer_size = device_node->length - 4;
+ r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES,
+ buffer_size, (void **) &buffer);
+ if (r != EFI_SUCCESS)
+ return NULL;
+ memcpy(buffer, device_node->data, buffer_size);
+ break;
+ }
+ break;
+ }
+
+ /*
+ * For all node types that we do not yet support return
+ * 'UNKNOWN(type,subtype)'.
+ */
+ if (!buffer) {
+ r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES,
+ 2 * UNKNOWN_OUTPUT_LEN,
+ (void **)&buffer);
+ if (r != EFI_SUCCESS)
+ return NULL;
+ sprintf((char *)buffer,
+ "UNKNOWN(%04x,%04x)",
+ device_node->type,
+ device_node->sub_type);
+ for (i = UNKNOWN_OUTPUT_LEN - 1; i >= 0; --i)
+ buffer[i] = ((uint8_t *)buffer)[i];
+ }
+
+ return buffer;
+}
+
+static uint16_t EFIAPI *efi_convert_device_node_to_text_ext(
+ struct efi_device_path_protocol *device_node,
+ bool display_only,
+ bool allow_shortcuts)
+{
+ uint16_t *buffer;
+
+ EFI_ENTRY("%p, %d, %d", device_node, display_only, allow_shortcuts);
+
+ buffer = efi_convert_device_node_to_text(device_node, display_only,
+ allow_shortcuts);
+
+ EFI_EXIT(EFI_SUCCESS);
+ return buffer;
+}
+
+static uint16_t EFIAPI *efi_convert_device_path_to_text(
+ struct efi_device_path_protocol *device_path,
+ bool display_only,
+ bool allow_shortcuts)
+{
+ uint16_t *buffer;
+
+ EFI_ENTRY("%p, %d, %d", device_path, display_only, allow_shortcuts);
+
+ /*
+ * Our device paths are all of depth one. So its is sufficient to
+ * to convert the first node.
+ */
+ buffer = efi_convert_device_node_to_text(device_path, display_only,
+ allow_shortcuts);
+
+ EFI_EXIT(EFI_SUCCESS);
+ return buffer;
+}
+
+const struct efi_device_path_to_text_protocol efi_device_path_to_text = {
+ .convert_device_node_to_text = efi_convert_device_node_to_text_ext,
+ .convert_device_path_to_text = efi_convert_device_path_to_text,
+};
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 39e602a..ed06485 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -35,29 +35,6 @@
const struct blk_desc *desc;
};
-static efi_status_t EFIAPI efi_disk_open_block(void *handle,
- efi_guid_t *protocol, void **protocol_interface,
- void *agent_handle, void *controller_handle,
- uint32_t attributes)
-{
- struct efi_disk_obj *diskobj = handle;
-
- *protocol_interface = &diskobj->ops;
-
- return EFI_SUCCESS;
-}
-
-static efi_status_t EFIAPI efi_disk_open_dp(void *handle, efi_guid_t *protocol,
- void **protocol_interface, void *agent_handle,
- void *controller_handle, uint32_t attributes)
-{
- struct efi_disk_obj *diskobj = handle;
-
- *protocol_interface = diskobj->dp;
-
- return EFI_SUCCESS;
-}
-
static efi_status_t EFIAPI efi_disk_reset(struct efi_block_io *this,
char extended_verification)
{
@@ -91,7 +68,7 @@
/* We only support full block access */
if (buffer_size & (blksz - 1))
- return EFI_EXIT(EFI_DEVICE_ERROR);
+ return EFI_DEVICE_ERROR;
if (direction == EFI_DISK_READ)
n = blk_dread(desc, lba, blocks, buffer);
@@ -104,9 +81,9 @@
debug("EFI: %s:%d n=%lx blocks=%x\n", __func__, __LINE__, n, blocks);
if (n != blocks)
- return EFI_EXIT(EFI_DEVICE_ERROR);
+ return EFI_DEVICE_ERROR;
- return EFI_EXIT(EFI_SUCCESS);
+ return EFI_SUCCESS;
}
static efi_status_t EFIAPI efi_disk_read_blocks(struct efi_block_io *this,
@@ -210,10 +187,11 @@
diskobj = calloc(1, objlen);
/* Fill in object data */
+ dp = (void *)&diskobj[1];
diskobj->parent.protocols[0].guid = &efi_block_io_guid;
- diskobj->parent.protocols[0].open = efi_disk_open_block;
+ diskobj->parent.protocols[0].protocol_interface = &diskobj->ops;
diskobj->parent.protocols[1].guid = &efi_guid_device_path;
- diskobj->parent.protocols[1].open = efi_disk_open_dp;
+ diskobj->parent.protocols[1].protocol_interface = dp;
diskobj->parent.handle = diskobj;
diskobj->ops = block_io_disk_template;
diskobj->ifname = if_typename;
@@ -230,7 +208,6 @@
diskobj->ops.media = &diskobj->media;
/* Fill in device path */
- dp = (void*)&diskobj[1];
diskobj->dp = dp;
dp[0].dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE;
dp[0].dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH;
@@ -289,9 +266,9 @@
#ifdef CONFIG_BLK
struct udevice *dev;
- for (uclass_first_device(UCLASS_BLK, &dev);
+ for (uclass_first_device_check(UCLASS_BLK, &dev);
dev;
- uclass_next_device(&dev)) {
+ uclass_next_device_check(&dev)) {
struct blk_desc *desc = dev_get_uclass_platdata(dev);
const char *if_typename = dev->driver->name;
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 286ad83..e063e0c 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -28,6 +28,7 @@
struct efi_gop_mode mode;
/* Fields we only have acces to during init */
u32 bpix;
+ void *fb;
};
static efi_status_t EFIAPI gop_query_mode(struct efi_gop *this, u32 mode_number,
@@ -71,7 +72,7 @@
if (operation != EFI_BLT_BUFFER_TO_VIDEO)
return EFI_EXIT(EFI_INVALID_PARAMETER);
- fb = (void*)gd->fb_base;
+ fb = gopobj->fb;
line_len16 = gopobj->info.width * sizeof(u16);
line_len32 = gopobj->info.width * sizeof(u32);
@@ -130,6 +131,7 @@
struct efi_gop_obj *gopobj;
u32 bpix, col, row;
u64 fb_base, fb_size;
+ void *fb;
#ifdef CONFIG_DM_VIDEO
struct udevice *vdev;
@@ -144,6 +146,7 @@
row = video_get_ysize(vdev);
fb_base = (uintptr_t)priv->fb;
fb_size = priv->fb_size;
+ fb = priv->fb;
#else
int line_len;
@@ -152,6 +155,7 @@
row = panel_info.vl_row;
fb_base = gd->fb_base;
fb_size = lcd_get_size(&line_len);
+ fb = (void*)gd->fb_base;
#endif
switch (bpix) {
@@ -172,7 +176,7 @@
/* Fill in object data */
gopobj->parent.protocols[0].guid = &efi_gop_guid;
- gopobj->parent.protocols[0].open = efi_return_handle;
+ gopobj->parent.protocols[0].protocol_interface = &gopobj->ops;
gopobj->parent.handle = &gopobj->ops;
gopobj->ops.query_mode = gop_query_mode;
gopobj->ops.set_mode = gop_set_mode;
@@ -200,6 +204,7 @@
gopobj->info.pixels_per_scanline = col;
gopobj->bpix = bpix;
+ gopobj->fb = fb;
/* Hook up to the device list */
list_add_tail(&gopobj->parent.link, &efi_obj_list);
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index d4c62e6..f961407 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -18,14 +18,6 @@
const efi_guid_t efi_guid_device_path = DEVICE_PATH_GUID;
const efi_guid_t efi_guid_loaded_image = LOADED_IMAGE_GUID;
-efi_status_t EFIAPI efi_return_handle(void *handle, efi_guid_t *protocol,
- void **protocol_interface, void *agent_handle,
- void *controller_handle, uint32_t attributes)
-{
- *protocol_interface = handle;
- return EFI_SUCCESS;
-}
-
static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel,
unsigned long rel_size, void *efi_reloc)
{
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index db2ae19..9e079f1 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -379,6 +379,9 @@
efi_status_t r;
struct efi_pool_allocation *alloc;
+ if (buffer == NULL)
+ return EFI_INVALID_PARAMETER;
+
alloc = container_of(buffer, struct efi_pool_allocation, data);
/* Sanity check, was the supplied address returned by allocate_pool */
assert(((uintptr_t)alloc & EFI_PAGE_MASK) == 0);
@@ -406,15 +409,15 @@
*memory_map_size = map_size;
+ if (provided_map_size < map_size)
+ return EFI_BUFFER_TOO_SMALL;
+
if (descriptor_size)
*descriptor_size = sizeof(struct efi_mem_desc);
if (descriptor_version)
*descriptor_version = EFI_MEMORY_DESCRIPTOR_VERSION;
- if (provided_map_size < map_size)
- return EFI_BUFFER_TOO_SMALL;
-
/* Copy list into array */
if (memory_map) {
/* Return the list in ascending order */
@@ -428,6 +431,8 @@
}
}
+ *map_key = 0;
+
return EFI_SUCCESS;
}
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 604ac6e..0b949d8 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -199,30 +199,6 @@
return EFI_EXIT(EFI_SUCCESS);
}
-static efi_status_t EFIAPI efi_net_open_dp(void *handle, efi_guid_t *protocol,
- void **protocol_interface, void *agent_handle,
- void *controller_handle, uint32_t attributes)
-{
- struct efi_simple_network *net = handle;
- struct efi_net_obj *netobj = container_of(net, struct efi_net_obj, net);
-
- *protocol_interface = &netobj->dp_mac;
-
- return EFI_SUCCESS;
-}
-
-static efi_status_t EFIAPI efi_net_open_pxe(void *handle, efi_guid_t *protocol,
- void **protocol_interface, void *agent_handle,
- void *controller_handle, uint32_t attributes)
-{
- struct efi_simple_network *net = handle;
- struct efi_net_obj *netobj = container_of(net, struct efi_net_obj, net);
-
- *protocol_interface = &netobj->pxe;
-
- return EFI_SUCCESS;
-}
-
void efi_net_set_dhcp_ack(void *pkt, int len)
{
int maxsize = sizeof(*dhcp_ack);
@@ -258,11 +234,11 @@
/* Fill in object data */
netobj->parent.protocols[0].guid = &efi_net_guid;
- netobj->parent.protocols[0].open = efi_return_handle;
+ netobj->parent.protocols[0].protocol_interface = &netobj->net;
netobj->parent.protocols[1].guid = &efi_guid_device_path;
- netobj->parent.protocols[1].open = efi_net_open_dp;
+ netobj->parent.protocols[1].protocol_interface = &netobj->dp_mac;
netobj->parent.protocols[2].guid = &efi_pxe_guid;
- netobj->parent.protocols[2].open = efi_net_open_pxe;
+ netobj->parent.protocols[2].protocol_interface = &netobj->pxe;
netobj->parent.handle = &netobj->net;
netobj->net.start = efi_net_start;
netobj->net.stop = efi_net_stop;
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index fbb48bf..107a892 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -34,12 +34,6 @@
COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
- COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
- COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
- COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
- COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
- COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
- COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
COMPAT(SMSC_LAN9215, "smsc,lan9215"),
@@ -1246,7 +1240,7 @@
# endif
# ifndef CONFIG_SPL_BUILD
/* Allow the early environment to override the fdt address */
- gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
+ gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
(uintptr_t)gd->fdt_blob);
# endif
#endif
diff --git a/lib/smbios.c b/lib/smbios.c
index 22ca247..8f19ad8 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -112,7 +112,7 @@
{
struct smbios_type1 *t = (struct smbios_type1 *)*current;
int len = sizeof(struct smbios_type1);
- char *serial_str = getenv("serial#");
+ char *serial_str = env_get("serial#");
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
diff --git a/lib/tpm.c b/lib/tpm.c
index fb520e3..d1cf5a8 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -95,8 +95,10 @@
return -1;
}
- if (offset + length > size)
+ if (offset + length > size) {
+ va_end(args);
return -1;
+ }
switch (*format) {
case 'b':
@@ -163,6 +165,7 @@
length = va_arg(args, uint32_t);
break;
default:
+ va_end(args);
debug("Couldn't recognize format string\n");
return -1;
}
diff --git a/lib/uuid.c b/lib/uuid.c
index c8584ed..1536c02 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -291,7 +291,7 @@
if (argc == 1)
printf("%s\n", uuid);
else
- setenv(argv[1], uuid);
+ env_set(argv[1], uuid);
return CMD_RET_SUCCESS;
}
diff --git a/net/arp.c b/net/arp.c
index f3ceff9..4c79e09 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -194,7 +194,7 @@
if (net_server_ip.s_addr == net_arp_wait_packet_ip.s_addr) {
char buf[20];
sprintf(buf, "%pM", &arp->ar_sha);
- setenv("serveraddr", buf);
+ env_set("serveraddr", buf);
}
#endif
diff --git a/net/bootp.c b/net/bootp.c
index be8f710..73370a1 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -170,7 +170,7 @@
* not contain a new value
*/
if (*net_boot_file_name)
- setenv("bootfile", net_boot_file_name);
+ env_set("bootfile", net_boot_file_name);
#endif
net_copy_ip(&net_ip, &bp->bp_yiaddr);
}
@@ -414,7 +414,7 @@
static u8 *add_vci(u8 *e)
{
char *vci = NULL;
- char *env_vci = getenv("bootp_vci");
+ char *env_vci = env_get("bootp_vci");
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NET_VCI_STRING)
vci = CONFIG_SPL_NET_VCI_STRING;
@@ -488,7 +488,7 @@
*e++ = tmp & 0xff;
}
#if defined(CONFIG_BOOTP_SEND_HOSTNAME)
- hostname = getenv("hostname");
+ hostname = env_get("hostname");
if (hostname) {
int hostnamelen = strlen(hostname);
@@ -503,8 +503,8 @@
clientarch = CONFIG_BOOTP_PXE_CLIENTARCH;
#endif
- if (getenv("bootp_arch"))
- clientarch = getenv_ulong("bootp_arch", 16, clientarch);
+ if (env_get("bootp_arch"))
+ clientarch = env_get_ulong("bootp_arch", 16, clientarch);
if (clientarch > 0) {
*e++ = 93; /* Client System Architecture */
@@ -520,7 +520,7 @@
*e++ = 0; /* minor revision */
#ifdef CONFIG_LIB_UUID
- uuid = getenv("pxeuuid");
+ uuid = env_get("pxeuuid");
if (uuid) {
if (uuid_str_valid(uuid)) {
@@ -713,7 +713,7 @@
dhcp_state = INIT;
#endif
- ep = getenv("bootpretryperiod");
+ ep = env_get("bootpretryperiod");
if (ep != NULL)
time_taken_max = simple_strtoul(ep, NULL, 10);
else
diff --git a/net/bootp.h b/net/bootp.h
index fcb0a64..567340e 100644
--- a/net/bootp.h
+++ b/net/bootp.h
@@ -49,7 +49,7 @@
char bp_sname[64]; /* Server host name */
char bp_file[128]; /* Boot file name */
char bp_vend[OPT_FIELD_SIZE]; /* Vendor information */
-};
+} __attribute__((packed));
#define BOOTP_HDR_SIZE sizeof(struct bootp_hdr)
diff --git a/net/dns.c b/net/dns.c
index 7017bac..eee8a02 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -184,7 +184,7 @@
ip_to_string(ip_addr, ip_str);
printf("%s\n", ip_str);
if (net_dns_env_var)
- setenv(net_dns_env_var, ip_str);
+ env_set(net_dns_env_var, ip_str);
} else {
puts("server responded with invalid IP number\n");
}
diff --git a/net/dns.h b/net/dns.h
index c4e96af..c55a5c1 100644
--- a/net/dns.h
+++ b/net/dns.h
@@ -29,7 +29,7 @@
uint16_t nauth; /* Authority PRs */
uint16_t nother; /* Other PRs */
unsigned char data[1]; /* Data, variable length */
-};
+} __attribute__((packed));
void dns_start(void); /* Begin DNS */
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index b659961..d30b04b 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -241,8 +241,8 @@
int eth_init(void)
{
- char *ethact = getenv("ethact");
- char *ethrotate = getenv("ethrotate");
+ char *ethact = env_get("ethact");
+ char *ethrotate = env_get("ethrotate");
struct udevice *current = NULL;
struct udevice *old_current;
int ret = -ENODEV;
@@ -401,7 +401,7 @@
printf("No ethernet found.\n");
bootstage_error(BOOTSTAGE_ID_NET_ETH_START);
} else {
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
struct udevice *prime_dev = NULL;
if (ethprime)
@@ -495,7 +495,7 @@
if (eth_get_ops(dev)->read_rom_hwaddr)
eth_get_ops(dev)->read_rom_hwaddr(dev);
- eth_getenv_enetaddr_by_index("eth", dev->seq, env_enetaddr);
+ eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr);
if (!is_zero_ethaddr(env_enetaddr)) {
if (!is_zero_ethaddr(pdata->enetaddr) &&
memcmp(pdata->enetaddr, env_enetaddr, ARP_HLEN)) {
@@ -510,7 +510,7 @@
/* Override the ROM MAC address */
memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(pdata->enetaddr)) {
- eth_setenv_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
+ eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
printf("\nWarning: %s using MAC address from ROM\n",
dev->name);
} else if (is_zero_ethaddr(pdata->enetaddr) ||
diff --git a/net/eth_common.c b/net/eth_common.c
index 58fa295..66d0d22 100644
--- a/net/eth_common.c
+++ b/net/eth_common.c
@@ -24,38 +24,38 @@
}
}
-int eth_getenv_enetaddr(const char *name, uchar *enetaddr)
+int eth_env_get_enetaddr(const char *name, uchar *enetaddr)
{
- eth_parse_enetaddr(getenv(name), enetaddr);
+ eth_parse_enetaddr(env_get(name), enetaddr);
return is_valid_ethaddr(enetaddr);
}
-int eth_setenv_enetaddr(const char *name, const uchar *enetaddr)
+int eth_env_set_enetaddr(const char *name, const uchar *enetaddr)
{
char buf[ARP_HLEN_ASCII + 1];
- if (eth_getenv_enetaddr(name, (uchar *)buf))
+ if (eth_env_get_enetaddr(name, (uchar *)buf))
return -EEXIST;
sprintf(buf, "%pM", enetaddr);
- return setenv(name, buf);
+ return env_set(name, buf);
}
-int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_get_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr)
{
char enetvar[32];
sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
- return eth_getenv_enetaddr(enetvar, enetaddr);
+ return eth_env_get_enetaddr(enetvar, enetaddr);
}
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr)
{
char enetvar[32];
sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index);
- return eth_setenv_enetaddr(enetvar, enetaddr);
+ return eth_env_set_enetaddr(enetvar, enetaddr);
}
void eth_common_init(void)
@@ -76,13 +76,13 @@
char *skip_state;
sprintf(enetvar, index ? "eth%dmacskip" : "ethmacskip", index);
- skip_state = getenv(enetvar);
+ skip_state = env_get(enetvar);
return skip_state != NULL;
}
void eth_current_changed(void)
{
- char *act = getenv("ethact");
+ char *act = env_get("ethact");
char *ethrotate;
/*
@@ -90,21 +90,21 @@
* ethernet device if uc_priv->current == NULL. This is not what
* we want when 'ethrotate' variable is 'no'.
*/
- ethrotate = getenv("ethrotate");
+ ethrotate = env_get("ethrotate");
if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0))
return;
/* update current ethernet name */
if (eth_get_dev()) {
if (act == NULL || strcmp(act, eth_get_name()) != 0)
- setenv("ethact", eth_get_name());
+ env_set("ethact", eth_get_name());
}
/*
* remove the variable completely if there is no active
* interface
*/
else if (act != NULL)
- setenv("ethact", NULL);
+ env_set("ethact", NULL);
}
void eth_try_another(int first_restart)
@@ -116,7 +116,7 @@
* Do not rotate between network interfaces when
* 'ethrotate' variable is set to 'no'.
*/
- ethrotate = getenv("ethrotate");
+ ethrotate = env_get("ethrotate");
if ((ethrotate != NULL) && (strcmp(ethrotate, "no") == 0))
return;
@@ -142,12 +142,12 @@
env_id = get_env_id();
if ((act == NULL) || (env_changed_id != env_id)) {
- act = getenv("ethact");
+ act = env_get("ethact");
env_changed_id = env_id;
}
if (act == NULL) {
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
void *dev = NULL;
if (ethprime)
diff --git a/net/eth_internal.h b/net/eth_internal.h
index a14b208..4b0e716 100644
--- a/net/eth_internal.h
+++ b/net/eth_internal.h
@@ -13,7 +13,7 @@
void eth_common_init(void);
/**
- * eth_setenv_enetaddr_by_index() - set the MAC address environment variable
+ * eth_env_set_enetaddr_by_index() - set the MAC address environment variable
*
* This sets up an environment variable with the given MAC address (@enetaddr).
* The environment variable to be set is defined by <@base_name><@index>addr.
@@ -25,7 +25,7 @@
* @enetaddr: Pointer to MAC address to put into the variable
* @return 0 if OK, other value on error
*/
-int eth_setenv_enetaddr_by_index(const char *base_name, int index,
+int eth_env_set_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
int eth_mac_skip(int index);
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index e4bd0f4..be0cf64 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -137,7 +137,7 @@
unsigned char env_enetaddr[ARP_HLEN];
int ret = 0;
- eth_getenv_enetaddr_by_index(base_name, eth_number, env_enetaddr);
+ eth_env_get_enetaddr_by_index(base_name, eth_number, env_enetaddr);
if (!is_zero_ethaddr(env_enetaddr)) {
if (!is_zero_ethaddr(dev->enetaddr) &&
@@ -152,8 +152,8 @@
memcpy(dev->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(dev->enetaddr)) {
- eth_setenv_enetaddr_by_index(base_name, eth_number,
- dev->enetaddr);
+ eth_env_set_enetaddr_by_index(base_name, eth_number,
+ dev->enetaddr);
} else if (is_zero_ethaddr(dev->enetaddr)) {
#ifdef CONFIG_NET_RANDOM_ETHADDR
net_random_ethaddr(dev->enetaddr);
@@ -261,7 +261,7 @@
bootstage_error(BOOTSTAGE_ID_NET_ETH_START);
} else {
struct eth_device *dev = eth_devices;
- char *ethprime = getenv("ethprime");
+ char *ethprime = env_get("ethprime");
bootstage_mark(BOOTSTAGE_ID_NET_ETH_INIT);
do {
diff --git a/net/link_local.c b/net/link_local.c
index dfd240d..31cdef4 100644
--- a/net/link_local.c
+++ b/net/link_local.c
@@ -104,7 +104,7 @@
void link_local_start(void)
{
- ip = getenv_ip("llipaddr");
+ ip = env_get_ip("llipaddr");
if (ip.s_addr != 0 &&
(ntohl(ip.s_addr) & IN_CLASSB_NET) != LINKLOCAL_ADDR) {
puts("invalid link address");
diff --git a/net/net.c b/net/net.c
index 6e67877..4259c9e 100644
--- a/net/net.c
+++ b/net/net.c
@@ -319,7 +319,7 @@
void net_auto_load(void)
{
#if defined(CONFIG_CMD_NFS)
- const char *s = getenv("autoload");
+ const char *s = env_get("autoload");
if (s != NULL && strcmp(s, "NFS") == 0) {
/*
@@ -329,7 +329,7 @@
return;
}
#endif
- if (getenv_yesno("autoload") == 0) {
+ if (env_get_yesno("autoload") == 0) {
/*
* Just use BOOTP/RARP to configure system;
* Do not use TFTP to load the bootfile.
@@ -489,7 +489,7 @@
cdp_start();
break;
#endif
-#if defined(CONFIG_NETCONSOLE) && !(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_SPL_BUILD)
case NETCONS:
nc_start();
break;
@@ -616,8 +616,8 @@
if (net_boot_file_size > 0) {
printf("Bytes transferred = %d (%x hex)\n",
net_boot_file_size, net_boot_file_size);
- setenv_hex("filesize", net_boot_file_size);
- setenv_hex("fileaddr", load_addr);
+ env_set_hex("filesize", net_boot_file_size);
+ env_set_hex("fileaddr", load_addr);
}
if (protocol != NETCONS)
eth_halt();
@@ -668,7 +668,7 @@
unsigned long retrycnt = 0;
int ret;
- nretry = getenv("netretry");
+ nretry = env_get("netretry");
if (nretry) {
if (!strcmp(nretry, "yes"))
retry_forever = 1;
@@ -1258,7 +1258,7 @@
}
#endif
-#if defined(CONFIG_NETCONSOLE) && !(CONFIG_SPL_BUILD)
+#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_SPL_BUILD)
nc_input_packet((uchar *)ip + IP_UDP_HDR_SIZE,
src_ip,
ntohs(ip->udp_dst),
@@ -1536,7 +1536,7 @@
return htons(id);
}
-ushort getenv_vlan(char *var)
+ushort env_get_vlan(char *var)
{
- return string_to_vlan(getenv(var));
+ return string_to_vlan(env_get(var));
}
diff --git a/net/net_rand.h b/net/net_rand.h
index ba9d064..4bf9bd8 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -16,11 +16,11 @@
*/
static inline unsigned int seed_mac(void)
{
- unsigned char enetaddr[6];
+ unsigned char enetaddr[ARP_HLEN];
unsigned int seed;
/* get our mac */
- eth_getenv_enetaddr("ethaddr", enetaddr);
+ memcpy(enetaddr, eth_get_ethaddr(), ARP_HLEN);
seed = enetaddr[5];
seed ^= enetaddr[4] << 8;
diff --git a/net/nfs.h b/net/nfs.h
index 45da246..70a1a6d 100644
--- a/net/nfs.h
+++ b/net/nfs.h
@@ -79,7 +79,7 @@
uint32_t data[NFS_READ_SIZE];
} reply;
} u;
-};
+} __attribute__((packed));
void nfs_start(void); /* Begin NFS */
diff --git a/net/sntp.h b/net/sntp.h
index 6a9c6bb..c38bcee 100644
--- a/net/sntp.h
+++ b/net/sntp.h
@@ -51,7 +51,7 @@
unsigned long long originate_timestamp;
unsigned long long receive_timestamp;
unsigned long long transmit_timestamp;
-};
+} __attribute__((packed));
void sntp_start(void); /* Begin SNTP */
diff --git a/net/tftp.c b/net/tftp.c
index ced45ec..a5ed8c5 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -706,11 +706,11 @@
* TFTP protocol has a minimal timeout of 1 second.
*/
- ep = getenv("tftpblocksize");
+ ep = env_get("tftpblocksize");
if (ep != NULL)
tftp_block_size_option = simple_strtol(ep, NULL, 10);
- ep = getenv("tftptimeout");
+ ep = env_get("tftptimeout");
if (ep != NULL)
timeout_ms = simple_strtol(ep, NULL, 10);
@@ -720,7 +720,7 @@
timeout_ms = 1000;
}
- ep = getenv("tftptimeoutcountmax");
+ ep = env_get("tftptimeoutcountmax");
if (ep != NULL)
tftp_timeout_count_max = simple_strtol(ep, NULL, 10);
@@ -742,8 +742,8 @@
(net_ip.s_addr >> 16) & 0xFF,
(net_ip.s_addr >> 24) & 0xFF);
- strncpy(tftp_filename, default_filename, MAX_LEN);
- tftp_filename[MAX_LEN - 1] = 0;
+ strncpy(tftp_filename, default_filename, DEFAULT_NAME_LEN);
+ tftp_filename[DEFAULT_NAME_LEN - 1] = 0;
printf("*** Warning: no boot file name; using '%s'\n",
tftp_filename);
@@ -822,10 +822,10 @@
tftp_our_port = 1024 + (get_timer(0) % 3072);
#ifdef CONFIG_TFTP_PORT
- ep = getenv("tftpdstp");
+ ep = env_get("tftpdstp");
if (ep != NULL)
tftp_remote_port = simple_strtol(ep, NULL, 10);
- ep = getenv("tftpsrcp");
+ ep = env_get("tftpsrcp");
if (ep != NULL)
tftp_our_port = simple_strtol(ep, NULL, 10);
#endif
diff --git a/post/post.c b/post/post.c
index 8c2c822..8fef0c3 100644
--- a/post/post.c
+++ b/post/post.c
@@ -180,7 +180,7 @@
int i, j;
for (i = 0; i < varnum; i++) {
- if (getenv_f(var[i], list, sizeof(list)) <= 0)
+ if (env_get_f(var[i], list, sizeof(list)) <= 0)
continue;
for (j = 0; j < post_list_size; j++)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 80ddb08..9ce47b4 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -386,7 +386,7 @@
quiet_cmd_acpi_c_asl= ASL $<
cmd_acpi_c_asl= \
$(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -P $(UBOOTINCLUDE) -o $<.tmp $<; \
- iasl -p $< -tc $<.tmp $(if $(KBUILD_VERBOSE:1=), >/dev/null); \
+ iasl -p $< -tc $<.tmp $(if $(KBUILD_VERBOSE:1=), >/dev/null) && \
mv $(patsubst %.asl,%.hex,$<) $@
$(obj)/dsdt.c: $(src)/dsdt.asl
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ac3c2c7..3ba0007 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -69,10 +69,10 @@
# Special handling for a few options which support SPL/TPL
ifeq ($(CONFIG_TPL_BUILD),y)
-libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
libs-$(CONFIG_TPL_LIBGENERIC_SUPPORT) += lib/
else
-libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/
+libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
endif
@@ -98,15 +98,22 @@
u-boot-spl-init := $(head-y)
u-boot-spl-main := $(libs-y)
-ifdef CONFIG_SPL_OF_PLATDATA
+ifdef CONFIG_$(SPL_TPL_)OF_PLATDATA
u-boot-spl-platdata := $(obj)/dts/dt-platdata.o
endif
# Linker Script
-ifdef CONFIG_SPL_LDSCRIPT
+# First test whether there's a linker-script for the specific stage defined...
+ifneq ($(CONFIG_$(SPL_TPL_)LDSCRIPT),)
+# need to strip off double quotes
+LDSCRIPT := $(addprefix $(srctree)/,$(CONFIG_$(SPL_TPL_)LDSCRIPT:"%"=%))
+else
+# ...then fall back to the generic SPL linker-script
+ifneq ($(CONFIG_SPL_LDSCRIPT),)
# need to strip off double quotes
LDSCRIPT := $(addprefix $(srctree)/,$(CONFIG_SPL_LDSCRIPT:"%"=%))
endif
+endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot-spl.lds
@@ -202,7 +209,7 @@
quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
-ifeq ($(CONFIG_SPL_OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),yy)
+ifeq ($(CONFIG_$(SPL_TPL_)OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
$(if $(CONFIG_SPL_SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \
$(obj)/$(SPL_BIN).dtb FORCE
@@ -293,9 +300,15 @@
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_$(SPL_BIN) += $(call ld-option, --no-dynamic-linker)
+# First try the best-match (i.e. SPL_TEXT_BASE for SPL, TPL_TEXT_BASE for TPL)
+ifneq ($(CONFIG_$(SPL_TPL_)TEXT_BASE),)
+LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_$(SPL_TPL_)TEXT_BASE)
+else
+# And then fall back to just testing for SPL_TEXT_BASE, even if in TPL mode
ifneq ($(CONFIG_SPL_TEXT_BASE),)
LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
endif
+endif
MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
$(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 93f0bf4..db28457 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -133,7 +133,6 @@
CONFIG_ATI
CONFIG_ATI_RADEON_FB
CONFIG_ATM
-CONFIG_ATMEL_DATAFLASH_SPI
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
@@ -157,9 +156,6 @@
CONFIG_BCH_CONST_T
CONFIG_BCM2835_GPIO
CONFIG_BCM283X_MU_SERIAL
-CONFIG_BCM_SF2_ETH
-CONFIG_BCM_SF2_ETH_DEFAULT_PORT
-CONFIG_BCM_SF2_ETH_GMAC
CONFIG_BIOSEMU
CONFIG_BITBANGMII_MULTI
CONFIG_BL1_OFFSET
@@ -188,9 +184,6 @@
CONFIG_BOARD_TYPES
CONFIG_BOOGER
CONFIG_BOOM
-CONFIG_BOOTARGS
-CONFIG_BOOTARGS_AXM
-CONFIG_BOOTARGS_TAURUS
CONFIG_BOOTBLOCK
CONFIG_BOOTCOMMAND
CONFIG_BOOTCOUNT_ALEN
@@ -296,42 +289,6 @@
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_MAX6957
-CONFIG_CMD_MEM
-CONFIG_CMD_MFSL
-CONFIG_CMD_MMC_SPI
-CONFIG_CMD_MTDPARTS_SPREAD
-CONFIG_CMD_ONENAND
-CONFIG_CMD_PCA953X
-CONFIG_CMD_PCA953X_INFO
-CONFIG_CMD_PCI
-CONFIG_CMD_PCI_ENUM
-CONFIG_CMD_PCMCIA
-CONFIG_CMD_PORTIO
-CONFIG_CMD_READ
-CONFIG_CMD_REGINFO
-CONFIG_CMD_REISER
-CONFIG_CMD_SANDBOX
-CONFIG_CMD_SAVES
-CONFIG_CMD_SCSI
-CONFIG_CMD_SDRAM
-CONFIG_CMD_SF_TEST
-CONFIG_CMD_SH_ZIMAGEBOOT
-CONFIG_CMD_SPL
-CONFIG_CMD_SPL_NAND_OFS
-CONFIG_CMD_SPL_WRITE_SIZE
-CONFIG_CMD_STRINGS
-CONFIG_CMD_SX151X
-CONFIG_CMD_TCA642X
-CONFIG_CMD_TERMINAL
-CONFIG_CMD_TFTP
-CONFIG_CMD_THOR_DOWNLOAD
-CONFIG_CMD_TRACE
-CONFIG_CMD_TSI148
-CONFIG_CMD_UNIVERSE
-CONFIG_CMD_UUID
-CONFIG_CMD_ZBOOT
-CONFIG_CMD_ZFS
CONFIG_CM_INIT
CONFIG_CM_MULTIPLE_SSRAM
CONFIG_CM_REMAP
@@ -662,7 +619,6 @@
CONFIG_ENV_VARS_UBOOT_CONFIG
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
CONFIG_ENV_VERSION
-CONFIG_ENV_xxx
CONFIG_EP9301
CONFIG_EP9302
CONFIG_EP9307
@@ -783,7 +739,6 @@
CONFIG_FORMIKE
CONFIG_FPGA_COUNT
CONFIG_FPGA_DELAY
-CONFIG_FPGA_SOCFPGA
CONFIG_FPGA_SPARTAN3
CONFIG_FPGA_STRATIX_V
CONFIG_FPGA_ZYNQPL
@@ -1156,7 +1111,6 @@
CONFIG_INI_MAX_NAME
CONFIG_INI_MAX_SECTION
CONFIG_INTEGRITY
-CONFIG_INTEL_ICH6_GPIO
CONFIG_INTERRUPTS
CONFIG_IO
CONFIG_IO64
@@ -1602,7 +1556,6 @@
CONFIG_MXS_SPI
CONFIG_MX_CYCLIC
CONFIG_MY_OPTION
-CONFIG_NAND
CONFIG_NANDFLASH_SIZE
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
CONFIG_NAND_ACTL
@@ -1765,7 +1718,6 @@
CONFIG_PHY_ID
CONFIG_PHY_INTERFACE_MODE
CONFIG_PHY_IRAM_BASE
-CONFIG_PHY_KSZ9031
CONFIG_PHY_M88E1111
CONFIG_PHY_MAX_ADDR
CONFIG_PHY_MODE_NEED_CHANGE
@@ -2026,12 +1978,10 @@
CONFIG_SCF0403_LCD
CONFIG_SCIF
CONFIG_SCIF_A
-CONFIG_SCIF_CONSOLE
CONFIG_SCIF_EXT_CLOCK
CONFIG_SCIF_USE_EXT_CLK
CONFIG_SCSI_AHCI
CONFIG_SCSI_AHCI_PLAT
-CONFIG_SCSI_DEV_ID
CONFIG_SCSI_DEV_LIST
CONFIG_SC_TIMER_CLK
CONFIG_SDCARD
@@ -2252,7 +2202,6 @@
CONFIG_SPL_INIT_MINIMAL
CONFIG_SPL_JR0_LIODN_NS
CONFIG_SPL_JR0_LIODN_S
-CONFIG_SPL_LDSCRIPT
CONFIG_SPL_LOAD_FIT_ADDRESS
CONFIG_SPL_MAX_FOOTPRINT
CONFIG_SPL_MAX_PEB_SIZE
@@ -2340,7 +2289,6 @@
CONFIG_STATIC_RELA
CONFIG_STD_DEVICES_SETTINGS
CONFIG_STM32F4DISCOVERY
-CONFIG_STM32X7_SERIAL
CONFIG_STM32_FLASH
CONFIG_STM32_GPIO
CONFIG_STM32_HSE_HZ
@@ -2369,8 +2317,6 @@
CONFIG_SUPPORT_RAW_INITRD
CONFIG_SUPPORT_VFAT
CONFIG_SUVD3
-CONFIG_SX151X_GPIO_COUNT_8
-CONFIG_SX151X_SPI_BUS
CONFIG_SXNI855T
CONFIG_SYSCOUNTER_TIMER
CONFIG_SYSFLAGS_ADDR
@@ -2481,16 +2427,8 @@
CONFIG_SYS_BOOT_RAMDISK_HIGH
CONFIG_SYS_BR0_64M
CONFIG_SYS_BR0_8M
-CONFIG_SYS_BR0_PRELIM
-CONFIG_SYS_BR1_PRELIM
-CONFIG_SYS_BR2_PRELIM
-CONFIG_SYS_BR3_PRELIM
-CONFIG_SYS_BR4_PRELIM
-CONFIG_SYS_BR5_PRELIM
CONFIG_SYS_BR6_64M
CONFIG_SYS_BR6_8M
-CONFIG_SYS_BR6_PRELIM
-CONFIG_SYS_BR7_PRELIM
CONFIG_SYS_BUSCLK
CONFIG_SYS_CACHELINE_SHIFT
CONFIG_SYS_CACHE_ACR0
@@ -2691,7 +2629,6 @@
CONFIG_SYS_DA850_PLL1_PLLM
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
@@ -2962,7 +2899,6 @@
CONFIG_SYS_ETHOC_BUFFER_ADDR
CONFIG_SYS_ETVPE_CLK
CONFIG_SYS_EXCEPTION_VECTORS_HIGH
-CONFIG_SYS_EXTBDINFO
CONFIG_SYS_EXTRA_ENV_RELOC
CONFIG_SYS_FAST_CLK
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
@@ -3548,8 +3484,6 @@
CONFIG_SYS_I2C_NCT72_ADDR
CONFIG_SYS_I2C_NOPROBES
CONFIG_SYS_I2C_OFFSET
-CONFIG_SYS_I2C_OMAP24XX
-CONFIG_SYS_I2C_OMAP34XX
CONFIG_SYS_I2C_PCA953X_ADDR
CONFIG_SYS_I2C_PCA953X_ADDR0
CONFIG_SYS_I2C_PCA953X_ADDR1
@@ -3649,7 +3583,6 @@
CONFIG_SYS_ID_EEPROM
CONFIG_SYS_IFC_ADDR
CONFIG_SYS_IFC_CCR
-CONFIG_SYS_IMMR
CONFIG_SYS_INIT_DBCR
CONFIG_SYS_INIT_L2CSR0
CONFIG_SYS_INIT_L2_ADDR
@@ -4167,18 +4100,10 @@
CONFIG_SYS_ONENAND_PAGE_SIZE
CONFIG_SYS_OR0_64M
CONFIG_SYS_OR0_8M
-CONFIG_SYS_OR0_PRELIM
CONFIG_SYS_OR0_REMAP
-CONFIG_SYS_OR1_PRELIM
CONFIG_SYS_OR1_REMAP
-CONFIG_SYS_OR2_PRELIM
-CONFIG_SYS_OR3_PRELIM
-CONFIG_SYS_OR4_PRELIM
-CONFIG_SYS_OR5_PRELIM
CONFIG_SYS_OR6_64M
CONFIG_SYS_OR6_8M
-CONFIG_SYS_OR6_PRELIM
-CONFIG_SYS_OR7_PRELIM
CONFIG_SYS_OR_TIMING_FLASH
CONFIG_SYS_OR_TIMING_MRAM
CONFIG_SYS_OSCIN_FREQ
@@ -4417,11 +4342,7 @@
CONFIG_SYS_PCI_TBATR5
CONFIG_SYS_PCI_VIRT
CONFIG_SYS_PCMCIA_ATTR_BASE
-CONFIG_SYS_PCMCIA_CIS_WIN
-CONFIG_SYS_PCMCIA_CIS_WIN_SIZE
CONFIG_SYS_PCMCIA_IO_BASE
-CONFIG_SYS_PCMCIA_IO_WIN
-CONFIG_SYS_PCMCIA_IO_WIN_SIZE
CONFIG_SYS_PCMCIA_MEM_ADDR
CONFIG_SYS_PCMCIA_MEM_SIZE
CONFIG_SYS_PCMCIA_PBR0
@@ -4612,7 +4533,6 @@
CONFIG_SYS_SCSI_MAX_DEVICE
CONFIG_SYS_SCSI_MAX_LUN
CONFIG_SYS_SCSI_MAX_SCSI_ID
-CONFIG_SYS_SCSI_SPIN_UP_TIME
CONFIG_SYS_SDHC_CLK
CONFIG_SYS_SDHC_CLK_2_PLL
CONFIG_SYS_SDIO0
@@ -4868,7 +4788,6 @@
CONFIG_SYS_USBCTRL
CONFIG_SYS_USBD_BASE
CONFIG_SYS_USB_EHCI_CPU_INIT
-CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_EHCI_REGS_BASE
CONFIG_SYS_USB_FAT_BOOT_PARTITION
CONFIG_SYS_USB_HOST
@@ -4877,7 +4796,6 @@
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_REGS_BASE
CONFIG_SYS_USB_OHCI_SLOT_NAME
-CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
CONFIG_SYS_USER_SWITCHES_BASE
CONFIG_SYS_USE_BOOT_NORFLASH
CONFIG_SYS_USE_DATAFLASH
@@ -4895,7 +4813,6 @@
CONFIG_SYS_USE_NORFLASH
CONFIG_SYS_USE_SERIALFLASH
CONFIG_SYS_USE_SPIFLASH
-CONFIG_SYS_USE_UBI
CONFIG_SYS_USR_EXCEP
CONFIG_SYS_U_BOOT_OFFS
CONFIG_SYS_VA_BITS
@@ -4981,7 +4898,6 @@
CONFIG_TI_KSNAV
CONFIG_TI_SPI_MMAP
CONFIG_TMU_TIMER
-CONFIG_TPL_DRIVERS_MISC_SUPPORT
CONFIG_TPL_PAD_TO
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_TPS6586X_POWER
@@ -5017,7 +4933,6 @@
CONFIG_TWL4030_INPUT
CONFIG_TWL4030_KEYPAD
CONFIG_TWL4030_LED
-CONFIG_TWL4030_PWM
CONFIG_TWL4030_USB
CONFIG_TWL6030_INPUT
CONFIG_TWL6030_POWER
@@ -5063,7 +4978,6 @@
CONFIG_UPDATE_TFTP_CNT_MAX
CONFIG_UPDATE_TFTP_MSEC_MAX
CONFIG_USART1
-CONFIG_USART3
CONFIG_USART_BASE
CONFIG_USART_ID
CONFIG_USBBOOTCOMMAND
@@ -5173,7 +5087,6 @@
CONFIG_USB_MUSB_TIMEOUT
CONFIG_USB_MUSB_TUSB6010
CONFIG_USB_MUSB_UDC
-CONFIG_USB_MUSB_UDD
CONFIG_USB_OHCI
CONFIG_USB_OHCI_EP93XX
CONFIG_USB_OHCI_LPC32XX
@@ -5196,7 +5109,6 @@
CONFIG_USB_XHCI_FSL
CONFIG_USB_XHCI_KEYSTONE
CONFIG_USB_XHCI_OMAP
-CONFIG_USB_XHCI_PCI
CONFIG_USER_LOWLEVEL_INIT
CONFIG_USE_FDT
CONFIG_USE_INTERRUPT
@@ -5233,8 +5145,6 @@
CONFIG_VIDEO_MXS
CONFIG_VIDEO_MXS_MODE_SYSTEM
CONFIG_VIDEO_OMAP3
-CONFIG_VIDEO_ONBOARD
-CONFIG_VIDEO_SM501_PCI
CONFIG_VIDEO_STD_TIMINGS
CONFIG_VIDEO_SUNXI
CONFIG_VIDEO_VCXK
diff --git a/scripts/setlocalversion b/scripts/setlocalversion
index 63d91e2..8564bed 100755
--- a/scripts/setlocalversion
+++ b/scripts/setlocalversion
@@ -141,7 +141,11 @@
fi
if test -e include/config/auto.conf; then
- . include/config/auto.conf
+ # We are interested only in CONFIG_LOCALVERSION and
+ # CONFIG_LOCALVERSION_AUTO, so extract these in a safe
+ # way (i.e. w/o sourcing auto.conf)
+ CONFIG_LOCALVERSION=`cat include/config/auto.conf | awk -F '=' '/^CONFIG_LOCALVERSION=/ {print $2}'`
+ CONFIG_LOCALVERSION_AUTO=`cat include/config/auto.conf | awk -F '=' '/^CONFIG_LOCALVERSION_AUTO=/ {print $2}'`
else
echo "Error: kernelrelease not valid - run 'make prepare' to update it"
exit 1
diff --git a/test/command_ut.c b/test/command_ut.c
index 21283eb..f76d525 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -19,16 +19,16 @@
/* commands separated by \n */
run_command_list("setenv list 1\n setenv list ${list}1", -1, 0);
- assert(!strcmp("11", getenv("list")));
+ assert(!strcmp("11", env_get("list")));
/* command followed by \n and nothing else */
run_command_list("setenv list 1${list}\n", -1, 0);
- assert(!strcmp("111", getenv("list")));
+ assert(!strcmp("111", env_get("list")));
/* a command string with \0 in it. Stuff after \0 should be ignored */
run_command("setenv list", 0);
run_command_list(test_cmd, sizeof(test_cmd), 0);
- assert(!strcmp("123", getenv("list")));
+ assert(!strcmp("123", env_get("list")));
/*
* a command list where we limit execution to only the first command
@@ -36,7 +36,7 @@
*/
run_command_list("setenv list 1\n setenv list ${list}2; "
"setenv list ${list}3", strlen("setenv list 1"), 0);
- assert(!strcmp("1", getenv("list")));
+ assert(!strcmp("1", env_get("list")));
assert(run_command("false", 0) == 1);
assert(run_command("echo", 0) == 0);
@@ -46,10 +46,10 @@
#ifdef CONFIG_HUSH_PARSER
run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0);
run_command("run foo", 0);
- assert(getenv("black") != NULL);
- assert(!strcmp("1", getenv("black")));
- assert(getenv("adder") != NULL);
- assert(!strcmp("2", getenv("adder")));
+ assert(env_get("black") != NULL);
+ assert(!strcmp("1", env_get("black")));
+ assert(env_get("adder") != NULL);
+ assert(!strcmp("2", env_get("adder")));
#endif
assert(run_command("", 0) == 0);
diff --git a/test/dm/eth.c b/test/dm/eth.c
index 564ad36..122fab9 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -26,17 +26,17 @@
{
net_ping_ip = string_to_ip("1.1.2.2");
- setenv("ethact", "eth@10002000");
+ env_set("ethact", "eth@10002000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth@10003000");
+ env_set("ethact", "eth@10003000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
@@ -45,22 +45,22 @@
static int dm_test_eth_alias(struct unit_test_state *uts)
{
net_ping_ip = string_to_ip("1.1.2.2");
- setenv("ethact", "eth0");
+ env_set("ethact", "eth0");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth1");
+ env_set("ethact", "eth1");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
/* Expected to fail since eth2 is not defined in the device tree */
- setenv("ethact", "eth2");
+ env_set("ethact", "eth2");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
- setenv("ethact", "eth5");
+ env_set("ethact", "eth5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
return 0;
}
@@ -71,16 +71,16 @@
net_ping_ip = string_to_ip("1.1.2.2");
/* Expected to be "eth@10003000" because of ethprime variable */
- setenv("ethact", NULL);
- setenv("ethprime", "eth5");
+ env_set("ethact", NULL);
+ env_set("ethprime", "eth5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10003000", getenv("ethact"));
+ ut_asserteq_str("eth@10003000", env_get("ethact"));
/* Expected to be "eth@10002000" because it is first */
- setenv("ethact", NULL);
- setenv("ethprime", NULL);
+ env_set("ethact", NULL);
+ env_set("ethprime", NULL);
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
return 0;
}
@@ -119,28 +119,28 @@
ut_assertok(device_remove(dev[i], DM_REMOVE_NORMAL));
/* Invalidate MAC address */
- strcpy(ethaddr[i], getenv(addrname[i]));
+ strcpy(ethaddr[i], env_get(addrname[i]));
/* Must disable access protection for ethaddr before clearing */
- setenv(".flags", addrname[i]);
- setenv(addrname[i], NULL);
+ env_set(".flags", addrname[i]);
+ env_set(addrname[i], NULL);
}
/* Set ethact to "eth@10002000" */
- setenv("ethact", ethname[0]);
+ env_set("ethact", ethname[0]);
/* Segment fault might happen if something is wrong */
ut_asserteq(-ENODEV, net_loop(PING));
for (i = 0; i < DM_TEST_ETH_NUM; i++) {
/* Restore the env */
- setenv(".flags", addrname[i]);
- setenv(addrname[i], ethaddr[i]);
+ env_set(".flags", addrname[i]);
+ env_set(addrname[i], ethaddr[i]);
/* Probe the device again */
ut_assertok(device_probe(dev[i]));
}
- setenv(".flags", NULL);
- setenv("ethact", NULL);
+ env_set(".flags", NULL);
+ env_set("ethact", NULL);
return 0;
}
@@ -150,15 +150,15 @@
static int _dm_test_eth_rotate1(struct unit_test_state *uts)
{
/* Make sure that the default is to rotate to the next interface */
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
/* If ethrotate is no, then we should fail on a bad MAC */
- setenv("ethact", "eth@10004000");
- setenv("ethrotate", "no");
+ env_set("ethact", "eth@10004000");
+ env_set("ethrotate", "no");
ut_asserteq(-EINVAL, net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
@@ -166,14 +166,14 @@
static int _dm_test_eth_rotate2(struct unit_test_state *uts)
{
/* Make sure we can skip invalid devices */
- setenv("ethact", "eth@10004000");
+ env_set("ethact", "eth@10004000");
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
/* Make sure we can handle device name which is not eth# */
- setenv("ethact", "sbe5");
+ env_set("ethact", "sbe5");
ut_assertok(net_loop(PING));
- ut_asserteq_str("sbe5", getenv("ethact"));
+ ut_asserteq_str("sbe5", env_get("ethact"));
return 0;
}
@@ -187,31 +187,31 @@
net_ping_ip = string_to_ip("1.1.2.2");
/* Invalidate eth1's MAC address */
- strcpy(ethaddr, getenv("eth1addr"));
+ strcpy(ethaddr, env_get("eth1addr"));
/* Must disable access protection for eth1addr before clearing */
- setenv(".flags", "eth1addr");
- setenv("eth1addr", NULL);
+ env_set(".flags", "eth1addr");
+ env_set("eth1addr", NULL);
retval = _dm_test_eth_rotate1(uts);
/* Restore the env */
- setenv("eth1addr", ethaddr);
- setenv("ethrotate", NULL);
+ env_set("eth1addr", ethaddr);
+ env_set("ethrotate", NULL);
if (!retval) {
/* Invalidate eth0's MAC address */
- strcpy(ethaddr, getenv("ethaddr"));
+ strcpy(ethaddr, env_get("ethaddr"));
/* Must disable access protection for ethaddr before clearing */
- setenv(".flags", "ethaddr");
- setenv("ethaddr", NULL);
+ env_set(".flags", "ethaddr");
+ env_set("ethaddr", NULL);
retval = _dm_test_eth_rotate2(uts);
/* Restore the env */
- setenv("ethaddr", ethaddr);
+ env_set("ethaddr", ethaddr);
}
/* Restore the env */
- setenv(".flags", NULL);
+ env_set(".flags", NULL);
return retval;
}
@@ -225,21 +225,21 @@
* the active device should be eth0
*/
sandbox_eth_disable_response(1, true);
- setenv("ethact", "eth@10004000");
- setenv("netretry", "yes");
+ env_set("ethact", "eth@10004000");
+ env_set("netretry", "yes");
sandbox_eth_skip_timeout();
ut_assertok(net_loop(PING));
- ut_asserteq_str("eth@10002000", getenv("ethact"));
+ ut_asserteq_str("eth@10002000", env_get("ethact"));
/*
* eth1 is disabled and netretry is no, so the ping should fail and the
* active device should be eth1
*/
- setenv("ethact", "eth@10004000");
- setenv("netretry", "no");
+ env_set("ethact", "eth@10004000");
+ env_set("netretry", "no");
sandbox_eth_skip_timeout();
ut_asserteq(-ETIMEDOUT, net_loop(PING));
- ut_asserteq_str("eth@10004000", getenv("ethact"));
+ ut_asserteq_str("eth@10004000", env_get("ethact"));
return 0;
}
@@ -253,7 +253,7 @@
retval = _dm_test_net_retry(uts);
/* Restore the env */
- setenv("netretry", NULL);
+ env_set("netretry", NULL);
sandbox_eth_disable_response(1, false);
return retval;
diff --git a/test/image/test-fit.py b/test/image/test-fit.py
deleted file mode 100755
index b0d0538..0000000
--- a/test/image/test-fit.py
+++ /dev/null
@@ -1,481 +0,0 @@
-#!/usr/bin/python
-#
-# Copyright (c) 2013, Google Inc.
-#
-# Sanity check of the FIT handling in U-Boot
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-# To run this:
-#
-# make O=sandbox sandbox_config
-# make O=sandbox
-# ./test/image/test-fit.py -u sandbox/u-boot
-#
-# Note: The above testing requires the Python development package, typically
-# called python-devel or something similar.
-
-import doctest
-from optparse import OptionParser
-import os
-import shutil
-import struct
-import sys
-import tempfile
-
-# Enable printing of all U-Boot output
-DEBUG = True
-
-# The 'command' library in patman is convenient for running commands
-base_path = os.path.dirname(sys.argv[0])
-patman = os.path.join(base_path, '../../tools/patman')
-sys.path.append(patman)
-
-import command
-
-# Define a base ITS which we can adjust using % and a dictionary
-base_its = '''
-/dts-v1/;
-
-/ {
- description = "Chrome OS kernel image with one or more FDT blobs";
- #address-cells = <1>;
-
- images {
- kernel@1 {
- data = /incbin/("%(kernel)s");
- type = "kernel";
- arch = "sandbox";
- os = "linux";
- compression = "none";
- load = <0x40000>;
- entry = <0x8>;
- };
- kernel@2 {
- data = /incbin/("%(loadables1)s");
- type = "kernel";
- arch = "sandbox";
- os = "linux";
- compression = "none";
- %(loadables1_load)s
- entry = <0x0>;
- };
- fdt@1 {
- description = "snow";
- data = /incbin/("u-boot.dtb");
- type = "flat_dt";
- arch = "sandbox";
- %(fdt_load)s
- compression = "none";
- signature@1 {
- algo = "sha1,rsa2048";
- key-name-hint = "dev";
- };
- };
- ramdisk@1 {
- description = "snow";
- data = /incbin/("%(ramdisk)s");
- type = "ramdisk";
- arch = "sandbox";
- os = "linux";
- %(ramdisk_load)s
- compression = "none";
- };
- ramdisk@2 {
- description = "snow";
- data = /incbin/("%(loadables2)s");
- type = "ramdisk";
- arch = "sandbox";
- os = "linux";
- %(loadables2_load)s
- compression = "none";
- };
- };
- configurations {
- default = "conf@1";
- conf@1 {
- kernel = "kernel@1";
- fdt = "fdt@1";
- %(ramdisk_config)s
- %(loadables_config)s
- };
- };
-};
-'''
-
-# Define a base FDT - currently we don't use anything in this
-base_fdt = '''
-/dts-v1/;
-
-/ {
- model = "Sandbox Verified Boot Test";
- compatible = "sandbox";
-
- reset@0 {
- compatible = "sandbox,reset";
- };
-
-};
-'''
-
-# This is the U-Boot script that is run for each test. First load the FIT,
-# then run the 'bootm' command, then save out memory from the places where
-# we expect 'bootm' to write things. Then quit.
-base_script = '''
-sb load hostfs 0 %(fit_addr)x %(fit)s
-fdt addr %(fit_addr)x
-bootm start %(fit_addr)x
-bootm loados
-sb save hostfs 0 %(kernel_addr)x %(kernel_out)s %(kernel_size)x
-sb save hostfs 0 %(fdt_addr)x %(fdt_out)s %(fdt_size)x
-sb save hostfs 0 %(ramdisk_addr)x %(ramdisk_out)s %(ramdisk_size)x
-sb save hostfs 0 %(loadables1_addr)x %(loadables1_out)s %(loadables1_size)x
-sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x
-reset
-'''
-
-def debug_stdout(stdout):
- if DEBUG:
- print stdout
-
-def make_fname(leaf):
- """Make a temporary filename
-
- Args:
- leaf: Leaf name of file to create (within temporary directory)
- Return:
- Temporary filename
- """
- global base_dir
-
- return os.path.join(base_dir, leaf)
-
-def filesize(fname):
- """Get the size of a file
-
- Args:
- fname: Filename to check
- Return:
- Size of file in bytes
- """
- return os.stat(fname).st_size
-
-def read_file(fname):
- """Read the contents of a file
-
- Args:
- fname: Filename to read
- Returns:
- Contents of file as a string
- """
- with open(fname, 'r') as fd:
- return fd.read()
-
-def make_dtb():
- """Make a sample .dts file and compile it to a .dtb
-
- Returns:
- Filename of .dtb file created
- """
- src = make_fname('u-boot.dts')
- dtb = make_fname('u-boot.dtb')
- with open(src, 'w') as fd:
- print >>fd, base_fdt
- command.Output('dtc', src, '-O', 'dtb', '-o', dtb)
- return dtb
-
-def make_its(params):
- """Make a sample .its file with parameters embedded
-
- Args:
- params: Dictionary containing parameters to embed in the %() strings
- Returns:
- Filename of .its file created
- """
- its = make_fname('test.its')
- with open(its, 'w') as fd:
- print >>fd, base_its % params
- return its
-
-def make_fit(mkimage, params):
- """Make a sample .fit file ready for loading
-
- This creates a .its script with the selected parameters and uses mkimage to
- turn this into a .fit image.
-
- Args:
- mkimage: Filename of 'mkimage' utility
- params: Dictionary containing parameters to embed in the %() strings
- Return:
- Filename of .fit file created
- """
- fit = make_fname('test.fit')
- its = make_its(params)
- command.Output(mkimage, '-f', its, fit)
- with open(make_fname('u-boot.dts'), 'w') as fd:
- print >>fd, base_fdt
- return fit
-
-def make_kernel(filename, text):
- """Make a sample kernel with test data
-
- Args:
- filename: the name of the file you want to create
- Returns:
- Full path and filename of the kernel it created
- """
- fname = make_fname(filename)
- data = ''
- for i in range(100):
- data += 'this %s %d is unlikely to boot\n' % (text, i)
- with open(fname, 'w') as fd:
- print >>fd, data
- return fname
-
-def make_ramdisk(filename, text):
- """Make a sample ramdisk with test data
-
- Returns:
- Filename of ramdisk created
- """
- fname = make_fname(filename)
- data = ''
- for i in range(100):
- data += '%s %d was seldom used in the middle ages\n' % (text, i)
- with open(fname, 'w') as fd:
- print >>fd, data
- return fname
-
-def find_matching(text, match):
- """Find a match in a line of text, and return the unmatched line portion
-
- This is used to extract a part of a line from some text. The match string
- is used to locate the line - we use the first line that contains that
- match text.
-
- Once we find a match, we discard the match string itself from the line,
- and return what remains.
-
- TODO: If this function becomes more generally useful, we could change it
- to use regex and return groups.
-
- Args:
- text: Text to check (each line separated by \n)
- match: String to search for
- Return:
- String containing unmatched portion of line
- Exceptions:
- ValueError: If match is not found
-
- >>> find_matching('first line:10\\nsecond_line:20', 'first line:')
- '10'
- >>> find_matching('first line:10\\nsecond_line:20', 'second line')
- Traceback (most recent call last):
- ...
- ValueError: Test aborted
- >>> find_matching('first line:10\\nsecond_line:20', 'second_line:')
- '20'
- """
- for line in text.splitlines():
- pos = line.find(match)
- if pos != -1:
- return line[:pos] + line[pos + len(match):]
-
- print "Expected '%s' but not found in output:"
- print text
- raise ValueError('Test aborted')
-
-def set_test(name):
- """Set the name of the current test and print a message
-
- Args:
- name: Name of test
- """
- global test_name
-
- test_name = name
- print name
-
-def fail(msg, stdout):
- """Raise an error with a helpful failure message
-
- Args:
- msg: Message to display
- """
- print stdout
- raise ValueError("Test '%s' failed: %s" % (test_name, msg))
-
-def run_fit_test(mkimage, u_boot):
- """Basic sanity check of FIT loading in U-Boot
-
- TODO: Almost everything:
- - hash algorithms - invalid hash/contents should be detected
- - signature algorithms - invalid sig/contents should be detected
- - compression
- - checking that errors are detected like:
- - image overwriting
- - missing images
- - invalid configurations
- - incorrect os/arch/type fields
- - empty data
- - images too large/small
- - invalid FDT (e.g. putting a random binary in instead)
- - default configuration selection
- - bootm command line parameters should have desired effect
- - run code coverage to make sure we are testing all the code
- """
- global test_name
-
- # Set up invariant files
- control_dtb = make_dtb()
- kernel = make_kernel('test-kernel.bin', 'kernel')
- ramdisk = make_ramdisk('test-ramdisk.bin', 'ramdisk')
- loadables1 = make_kernel('test-loadables1.bin', 'lenrek')
- loadables2 = make_ramdisk('test-loadables2.bin', 'ksidmar')
- kernel_out = make_fname('kernel-out.bin')
- fdt_out = make_fname('fdt-out.dtb')
- ramdisk_out = make_fname('ramdisk-out.bin')
- loadables1_out = make_fname('loadables1-out.bin')
- loadables2_out = make_fname('loadables2-out.bin')
-
- # Set up basic parameters with default values
- params = {
- 'fit_addr' : 0x1000,
-
- 'kernel' : kernel,
- 'kernel_out' : kernel_out,
- 'kernel_addr' : 0x40000,
- 'kernel_size' : filesize(kernel),
-
- 'fdt_out' : fdt_out,
- 'fdt_addr' : 0x80000,
- 'fdt_size' : filesize(control_dtb),
- 'fdt_load' : '',
-
- 'ramdisk' : ramdisk,
- 'ramdisk_out' : ramdisk_out,
- 'ramdisk_addr' : 0xc0000,
- 'ramdisk_size' : filesize(ramdisk),
- 'ramdisk_load' : '',
- 'ramdisk_config' : '',
-
- 'loadables1' : loadables1,
- 'loadables1_out' : loadables1_out,
- 'loadables1_addr' : 0x100000,
- 'loadables1_size' : filesize(loadables1),
- 'loadables1_load' : '',
-
- 'loadables2' : loadables2,
- 'loadables2_out' : loadables2_out,
- 'loadables2_addr' : 0x140000,
- 'loadables2_size' : filesize(loadables2),
- 'loadables2_load' : '',
-
- 'loadables_config' : '',
- }
-
- # Make a basic FIT and a script to load it
- fit = make_fit(mkimage, params)
- params['fit'] = fit
- cmd = base_script % params
-
- # First check that we can load a kernel
- # We could perhaps reduce duplication with some loss of readability
- set_test('Kernel load')
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(kernel) != read_file(kernel_out):
- fail('Kernel not loaded', stdout)
- if read_file(control_dtb) == read_file(fdt_out):
- fail('FDT loaded but should be ignored', stdout)
- if read_file(ramdisk) == read_file(ramdisk_out):
- fail('Ramdisk loaded but should not be', stdout)
-
- # Find out the offset in the FIT where U-Boot has found the FDT
- line = find_matching(stdout, 'Booting using the FDT blob at ')
- fit_offset = int(line, 16) - params['fit_addr']
- fdt_magic = struct.pack('>L', 0xd00dfeed)
- data = read_file(fit)
-
- # Now find where it actually is in the FIT (skip the first word)
- real_fit_offset = data.find(fdt_magic, 4)
- if fit_offset != real_fit_offset:
- fail('U-Boot loaded FDT from offset %#x, FDT is actually at %#x' %
- (fit_offset, real_fit_offset), stdout)
-
- # Now a kernel and an FDT
- set_test('Kernel + FDT load')
- params['fdt_load'] = 'load = <%#x>;' % params['fdt_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(kernel) != read_file(kernel_out):
- fail('Kernel not loaded', stdout)
- if read_file(control_dtb) != read_file(fdt_out):
- fail('FDT not loaded', stdout)
- if read_file(ramdisk) == read_file(ramdisk_out):
- fail('Ramdisk loaded but should not be', stdout)
-
- # Try a ramdisk
- set_test('Kernel + FDT + Ramdisk load')
- params['ramdisk_config'] = 'ramdisk = "ramdisk@1";'
- params['ramdisk_load'] = 'load = <%#x>;' % params['ramdisk_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(ramdisk) != read_file(ramdisk_out):
- fail('Ramdisk not loaded', stdout)
-
- # Configuration with some Loadables
- set_test('Kernel + FDT + Ramdisk load + Loadables')
- params['loadables_config'] = 'loadables = "kernel@2", "ramdisk@2";'
- params['loadables1_load'] = 'load = <%#x>;' % params['loadables1_addr']
- params['loadables2_load'] = 'load = <%#x>;' % params['loadables2_addr']
- fit = make_fit(mkimage, params)
- stdout = command.Output(u_boot, '-d', control_dtb, '-c', cmd)
- debug_stdout(stdout)
- if read_file(loadables1) != read_file(loadables1_out):
- fail('Loadables1 (kernel) not loaded', stdout)
- if read_file(loadables2) != read_file(loadables2_out):
- fail('Loadables2 (ramdisk) not loaded', stdout)
-
-def run_tests():
- """Parse options, run the FIT tests and print the result"""
- global base_path, base_dir
-
- # Work in a temporary directory
- base_dir = tempfile.mkdtemp()
- parser = OptionParser()
- parser.add_option('-u', '--u-boot',
- default=os.path.join(base_path, 'u-boot'),
- help='Select U-Boot sandbox binary')
- parser.add_option('-k', '--keep', action='store_true',
- help="Don't delete temporary directory even when tests pass")
- parser.add_option('-t', '--selftest', action='store_true',
- help='Run internal self tests')
- (options, args) = parser.parse_args()
-
- # Find the path to U-Boot, and assume mkimage is in its tools/mkimage dir
- base_path = os.path.dirname(options.u_boot)
- mkimage = os.path.join(base_path, 'tools/mkimage')
-
- # There are a few doctests - handle these here
- if options.selftest:
- doctest.testmod()
- return
-
- title = 'FIT Tests'
- print title, '\n', '=' * len(title)
-
- run_fit_test(mkimage, options.u_boot)
-
- print '\nTests passed'
- print 'Caveat: this is only a sanity check - test coverage is poor'
-
- # Remove the temporary directory unless we are asked to keep it
- if options.keep:
- print "Output files are in '%s'" % base_dir
- else:
- shutil.rmtree(base_dir)
-
-run_tests()
diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
new file mode 100755
index 0000000..7e6b96d
--- /dev/null
+++ b/test/py/tests/test_fit.py
@@ -0,0 +1,428 @@
+# Copyright (c) 2013, Google Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Sanity check of the FIT handling in U-Boot
+
+import os
+import pytest
+import struct
+import u_boot_utils as util
+
+# Define a base ITS which we can adjust using % and a dictionary
+base_its = '''
+/dts-v1/;
+
+/ {
+ description = "Chrome OS kernel image with one or more FDT blobs";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ data = /incbin/("%(kernel)s");
+ type = "kernel";
+ arch = "sandbox";
+ os = "linux";
+ compression = "none";
+ load = <0x40000>;
+ entry = <0x8>;
+ };
+ kernel@2 {
+ data = /incbin/("%(loadables1)s");
+ type = "kernel";
+ arch = "sandbox";
+ os = "linux";
+ compression = "none";
+ %(loadables1_load)s
+ entry = <0x0>;
+ };
+ fdt@1 {
+ description = "snow";
+ data = /incbin/("u-boot.dtb");
+ type = "flat_dt";
+ arch = "sandbox";
+ %(fdt_load)s
+ compression = "none";
+ signature@1 {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+ ramdisk@1 {
+ description = "snow";
+ data = /incbin/("%(ramdisk)s");
+ type = "ramdisk";
+ arch = "sandbox";
+ os = "linux";
+ %(ramdisk_load)s
+ compression = "none";
+ };
+ ramdisk@2 {
+ description = "snow";
+ data = /incbin/("%(loadables2)s");
+ type = "ramdisk";
+ arch = "sandbox";
+ os = "linux";
+ %(loadables2_load)s
+ compression = "none";
+ };
+ };
+ configurations {
+ default = "conf@1";
+ conf@1 {
+ kernel = "kernel@1";
+ fdt = "fdt@1";
+ %(ramdisk_config)s
+ %(loadables_config)s
+ };
+ };
+};
+'''
+
+# Define a base FDT - currently we don't use anything in this
+base_fdt = '''
+/dts-v1/;
+
+/ {
+ model = "Sandbox Verified Boot Test";
+ compatible = "sandbox";
+
+ reset@0 {
+ compatible = "sandbox,reset";
+ };
+
+};
+'''
+
+# This is the U-Boot script that is run for each test. First load the FIT,
+# then run the 'bootm' command, then save out memory from the places where
+# we expect 'bootm' to write things. Then quit.
+base_script = '''
+sb load hostfs 0 %(fit_addr)x %(fit)s
+fdt addr %(fit_addr)x
+bootm start %(fit_addr)x
+bootm loados
+sb save hostfs 0 %(kernel_addr)x %(kernel_out)s %(kernel_size)x
+sb save hostfs 0 %(fdt_addr)x %(fdt_out)s %(fdt_size)x
+sb save hostfs 0 %(ramdisk_addr)x %(ramdisk_out)s %(ramdisk_size)x
+sb save hostfs 0 %(loadables1_addr)x %(loadables1_out)s %(loadables1_size)x
+sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x
+'''
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('fit_signature')
+def test_fit(u_boot_console):
+ def make_fname(leaf):
+ """Make a temporary filename
+
+ Args:
+ leaf: Leaf name of file to create (within temporary directory)
+ Return:
+ Temporary filename
+ """
+
+ return os.path.join(cons.config.build_dir, leaf)
+
+ def filesize(fname):
+ """Get the size of a file
+
+ Args:
+ fname: Filename to check
+ Return:
+ Size of file in bytes
+ """
+ return os.stat(fname).st_size
+
+ def read_file(fname):
+ """Read the contents of a file
+
+ Args:
+ fname: Filename to read
+ Returns:
+ Contents of file as a string
+ """
+ with open(fname, 'r') as fd:
+ return fd.read()
+
+ def make_dtb():
+ """Make a sample .dts file and compile it to a .dtb
+
+ Returns:
+ Filename of .dtb file created
+ """
+ src = make_fname('u-boot.dts')
+ dtb = make_fname('u-boot.dtb')
+ with open(src, 'w') as fd:
+ print >> fd, base_fdt
+ util.run_and_log(cons, ['dtc', src, '-O', 'dtb', '-o', dtb])
+ return dtb
+
+ def make_its(params):
+ """Make a sample .its file with parameters embedded
+
+ Args:
+ params: Dictionary containing parameters to embed in the %() strings
+ Returns:
+ Filename of .its file created
+ """
+ its = make_fname('test.its')
+ with open(its, 'w') as fd:
+ print >> fd, base_its % params
+ return its
+
+ def make_fit(mkimage, params):
+ """Make a sample .fit file ready for loading
+
+ This creates a .its script with the selected parameters and uses mkimage to
+ turn this into a .fit image.
+
+ Args:
+ mkimage: Filename of 'mkimage' utility
+ params: Dictionary containing parameters to embed in the %() strings
+ Return:
+ Filename of .fit file created
+ """
+ fit = make_fname('test.fit')
+ its = make_its(params)
+ util.run_and_log(cons, [mkimage, '-f', its, fit])
+ with open(make_fname('u-boot.dts'), 'w') as fd:
+ print >> fd, base_fdt
+ return fit
+
+ def make_kernel(filename, text):
+ """Make a sample kernel with test data
+
+ Args:
+ filename: the name of the file you want to create
+ Returns:
+ Full path and filename of the kernel it created
+ """
+ fname = make_fname(filename)
+ data = ''
+ for i in range(100):
+ data += 'this %s %d is unlikely to boot\n' % (text, i)
+ with open(fname, 'w') as fd:
+ print >> fd, data
+ return fname
+
+ def make_ramdisk(filename, text):
+ """Make a sample ramdisk with test data
+
+ Returns:
+ Filename of ramdisk created
+ """
+ fname = make_fname(filename)
+ data = ''
+ for i in range(100):
+ data += '%s %d was seldom used in the middle ages\n' % (text, i)
+ with open(fname, 'w') as fd:
+ print >> fd, data
+ return fname
+
+ def find_matching(text, match):
+ """Find a match in a line of text, and return the unmatched line portion
+
+ This is used to extract a part of a line from some text. The match string
+ is used to locate the line - we use the first line that contains that
+ match text.
+
+ Once we find a match, we discard the match string itself from the line,
+ and return what remains.
+
+ TODO: If this function becomes more generally useful, we could change it
+ to use regex and return groups.
+
+ Args:
+ text: Text to check (list of strings, one for each command issued)
+ match: String to search for
+ Return:
+ String containing unmatched portion of line
+ Exceptions:
+ ValueError: If match is not found
+
+ >>> find_matching(['first line:10', 'second_line:20'], 'first line:')
+ '10'
+ >>> find_matching(['first line:10', 'second_line:20'], 'second line')
+ Traceback (most recent call last):
+ ...
+ ValueError: Test aborted
+ >>> find_matching('first line:10\', 'second_line:20'], 'second_line:')
+ '20'
+ >>> find_matching('first line:10\', 'second_line:20\nthird_line:30'],
+ 'third_line:')
+ '30'
+ """
+ __tracebackhide__ = True
+ for line in '\n'.join(text).splitlines():
+ pos = line.find(match)
+ if pos != -1:
+ return line[:pos] + line[pos + len(match):]
+
+ pytest.fail("Expected '%s' but not found in output")
+
+ def check_equal(expected_fname, actual_fname, failure_msg):
+ """Check that a file matches its expected contents
+
+ Args:
+ expected_fname: Filename containing expected contents
+ actual_fname: Filename containing actual contents
+ failure_msg: Message to print on failure
+ """
+ expected_data = read_file(expected_fname)
+ actual_data = read_file(actual_fname)
+ assert expected_data == actual_data, failure_msg
+
+ def check_not_equal(expected_fname, actual_fname, failure_msg):
+ """Check that a file does not match its expected contents
+
+ Args:
+ expected_fname: Filename containing expected contents
+ actual_fname: Filename containing actual contents
+ failure_msg: Message to print on failure
+ """
+ expected_data = read_file(expected_fname)
+ actual_data = read_file(actual_fname)
+ assert expected_data != actual_data, failure_msg
+
+ def run_fit_test(mkimage):
+ """Basic sanity check of FIT loading in U-Boot
+
+ TODO: Almost everything:
+ - hash algorithms - invalid hash/contents should be detected
+ - signature algorithms - invalid sig/contents should be detected
+ - compression
+ - checking that errors are detected like:
+ - image overwriting
+ - missing images
+ - invalid configurations
+ - incorrect os/arch/type fields
+ - empty data
+ - images too large/small
+ - invalid FDT (e.g. putting a random binary in instead)
+ - default configuration selection
+ - bootm command line parameters should have desired effect
+ - run code coverage to make sure we are testing all the code
+ """
+ # Set up invariant files
+ control_dtb = make_dtb()
+ kernel = make_kernel('test-kernel.bin', 'kernel')
+ ramdisk = make_ramdisk('test-ramdisk.bin', 'ramdisk')
+ loadables1 = make_kernel('test-loadables1.bin', 'lenrek')
+ loadables2 = make_ramdisk('test-loadables2.bin', 'ksidmar')
+ kernel_out = make_fname('kernel-out.bin')
+ fdt_out = make_fname('fdt-out.dtb')
+ ramdisk_out = make_fname('ramdisk-out.bin')
+ loadables1_out = make_fname('loadables1-out.bin')
+ loadables2_out = make_fname('loadables2-out.bin')
+
+ # Set up basic parameters with default values
+ params = {
+ 'fit_addr' : 0x1000,
+
+ 'kernel' : kernel,
+ 'kernel_out' : kernel_out,
+ 'kernel_addr' : 0x40000,
+ 'kernel_size' : filesize(kernel),
+
+ 'fdt_out' : fdt_out,
+ 'fdt_addr' : 0x80000,
+ 'fdt_size' : filesize(control_dtb),
+ 'fdt_load' : '',
+
+ 'ramdisk' : ramdisk,
+ 'ramdisk_out' : ramdisk_out,
+ 'ramdisk_addr' : 0xc0000,
+ 'ramdisk_size' : filesize(ramdisk),
+ 'ramdisk_load' : '',
+ 'ramdisk_config' : '',
+
+ 'loadables1' : loadables1,
+ 'loadables1_out' : loadables1_out,
+ 'loadables1_addr' : 0x100000,
+ 'loadables1_size' : filesize(loadables1),
+ 'loadables1_load' : '',
+
+ 'loadables2' : loadables2,
+ 'loadables2_out' : loadables2_out,
+ 'loadables2_addr' : 0x140000,
+ 'loadables2_size' : filesize(loadables2),
+ 'loadables2_load' : '',
+
+ 'loadables_config' : '',
+ }
+
+ # Make a basic FIT and a script to load it
+ fit = make_fit(mkimage, params)
+ params['fit'] = fit
+ cmd = base_script % params
+
+ # First check that we can load a kernel
+ # We could perhaps reduce duplication with some loss of readability
+ cons.config.dtb = control_dtb
+ cons.restart_uboot()
+ with cons.log.section('Kernel load'):
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(kernel, kernel_out, 'Kernel not loaded')
+ check_not_equal(control_dtb, fdt_out,
+ 'FDT loaded but should be ignored')
+ check_not_equal(ramdisk, ramdisk_out,
+ 'Ramdisk loaded but should not be')
+
+ # Find out the offset in the FIT where U-Boot has found the FDT
+ line = find_matching(output, 'Booting using the fdt blob at ')
+ fit_offset = int(line, 16) - params['fit_addr']
+ fdt_magic = struct.pack('>L', 0xd00dfeed)
+ data = read_file(fit)
+
+ # Now find where it actually is in the FIT (skip the first word)
+ real_fit_offset = data.find(fdt_magic, 4)
+ assert fit_offset == real_fit_offset, (
+ 'U-Boot loaded FDT from offset %#x, FDT is actually at %#x' %
+ (fit_offset, real_fit_offset))
+
+ # Now a kernel and an FDT
+ with cons.log.section('Kernel + FDT load'):
+ params['fdt_load'] = 'load = <%#x>;' % params['fdt_addr']
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(kernel, kernel_out, 'Kernel not loaded')
+ check_equal(control_dtb, fdt_out, 'FDT not loaded')
+ check_not_equal(ramdisk, ramdisk_out,
+ 'Ramdisk loaded but should not be')
+
+ # Try a ramdisk
+ with cons.log.section('Kernel + FDT + Ramdisk load'):
+ params['ramdisk_config'] = 'ramdisk = "ramdisk@1";'
+ params['ramdisk_load'] = 'load = <%#x>;' % params['ramdisk_addr']
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(ramdisk, ramdisk_out, 'Ramdisk not loaded')
+
+ # Configuration with some Loadables
+ with cons.log.section('Kernel + FDT + Ramdisk load + Loadables'):
+ params['loadables_config'] = 'loadables = "kernel@2", "ramdisk@2";'
+ params['loadables1_load'] = ('load = <%#x>;' %
+ params['loadables1_addr'])
+ params['loadables2_load'] = ('load = <%#x>;' %
+ params['loadables2_addr'])
+ fit = make_fit(mkimage, params)
+ cons.restart_uboot()
+ output = cons.run_command_list(cmd.splitlines())
+ check_equal(loadables1, loadables1_out,
+ 'Loadables1 (kernel) not loaded')
+ check_equal(loadables2, loadables2_out,
+ 'Loadables2 (ramdisk) not loaded')
+
+ cons = u_boot_console
+ try:
+ # We need to use our own device tree file. Remember to restore it
+ # afterwards.
+ old_dtb = cons.config.dtb
+ mkimage = cons.config.build_dir + '/tools/mkimage'
+ run_fit_test(mkimage)
+ finally:
+ # Go back to the original U-Boot with the correct dtb.
+ cons.config.dtb = old_dtb
+ cons.restart_uboot()
diff --git a/tools/Makefile b/tools/Makefile
index 0743677..a1790eb 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -37,7 +37,7 @@
HOSTCFLAGS_bmp_logo.o := -pedantic
hostprogs-$(CONFIG_BUILD_ENVCRC) += envcrc
-envcrc-objs := envcrc.o lib/crc32.o common/env_embedded.o lib/sha1.o
+envcrc-objs := envcrc.o lib/crc32.o env/embedded.o lib/sha1.o
hostprogs-$(CONFIG_CMD_NET) += gen_eth_addr
HOSTCFLAGS_gen_eth_addr.o := -pedantic
@@ -225,7 +225,7 @@
quiet_cmd_wrap = WRAP $@
cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@
-$(obj)/lib/%.c $(obj)/common/%.c:
+$(obj)/lib/%.c $(obj)/common/%.c $(obj)/env/%.c:
$(call cmd,wrap)
clean-dirs := lib common
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index c9c79e0..e50c075 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -468,7 +468,7 @@
* modified or deleted
*
*/
-int fw_setenv(int argc, char *argv[], struct env_opts *opts)
+int fw_env_set(int argc, char *argv[], struct env_opts *opts)
{
int i;
size_t len;
diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h
index 04bb646..2d37eb5 100644
--- a/tools/env/fw_env.h
+++ b/tools/env/fw_env.h
@@ -44,7 +44,7 @@
int fw_printenv(int argc, char *argv[], int value_only, struct env_opts *opts);
/**
- * fw_setenv() - adds or removes one variable to the environment
+ * fw_env_set() - adds or removes one variable to the environment
*
* @argc: number of strings in argv, argv[0] is variable name,
* argc==1 means erase variable, argc > 1 means add a variable
@@ -61,7 +61,7 @@
* ERRORS:
* EROFS - some variables ("ethaddr", "serial#") cannot be modified
*/
-int fw_setenv(int argc, char *argv[], struct env_opts *opts);
+int fw_env_set(int argc, char *argv[], struct env_opts *opts);
/**
* fw_parse_script() - adds or removes multiple variables with a batch script
diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c
index b8bff26..6e278ca 100644
--- a/tools/env/fw_env_main.c
+++ b/tools/env/fw_env_main.c
@@ -78,7 +78,7 @@
"\n");
}
-void usage_setenv(void)
+void usage_env_set(void)
{
fprintf(stderr,
"Usage: fw_setenv [OPTIONS]... [VARIABLE]...\n"
@@ -142,7 +142,7 @@
env_opts.lockname = optarg;
break;
case 'h':
- do_printenv ? usage_printenv() : usage_setenv();
+ do_printenv ? usage_printenv() : usage_env_set();
exit(EXIT_SUCCESS);
break;
default:
@@ -202,7 +202,7 @@
/* ignore common options */
break;
default: /* '?' */
- usage_setenv();
+ usage_env_set();
exit(EXIT_FAILURE);
break;
}
@@ -273,7 +273,7 @@
retval = EXIT_FAILURE;
} else {
if (!script_file) {
- if (fw_setenv(argc, argv, &env_opts) != 0)
+ if (fw_env_set(argc, argv, &env_opts) != 0)
retval = EXIT_FAILURE;
} else {
if (fw_parse_script(script_file, &env_opts) != 0)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 25b0340..04e8272 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -77,6 +77,7 @@
{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
{ "rk3288", "RK32", 0x8000, false, false },
{ "rk3328", "RK32", 0x8000 - 0x1000, false, false },
+ { "rk3368", "RK33", 0x8000 - 0x1000, false, true },
{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
{ "rv1108", "RK11", 0x1800, false, false},
};