commit 487b3277d4f70bcb2e4a1930beb6438565f25910
author Paul Kocialkowski <contact@paulk.fr> Sun Mar 22 18:12:22 2015 +0100
committer Hans de Goede <hdegoede@redhat.com> Wed Apr 15 16:17:17 2015 +0200
tree cc74dd0cd05c1be8af48cd1ca95c4b6f949b8712
parent 81f11872f3315a767940820e46d1a15b42d9b60c

sunxi: GPIO pin mux hardware-feature-specific function index defines

Each hardware feature exposed through the GPIO pin mux is usually using the same
function index (for a given port), so there is no need to define one value per
pin: one value per hardware feature per port is sufficient, avoids duplication
and makes everything easier to understand.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

board/sunxi/gmac.c

diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 8849132..63a7360 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -39,45 +39,45 @@
 		if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
 			continue;
 #endif
-		sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN7I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 3);
 	}
 #elif defined CONFIG_RGMII
 	/* Configure sun6i RGMII mode pin mux settings */
 	for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) {
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 3);
 	}
 	for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 3);
 	}
 	for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) {
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 3);
 	}
 	for (pin = SUNXI_GPA(25); pin <= SUNXI_GPA(27); pin++) {
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 3);
 	}
 #elif defined CONFIG_GMII
 	/* Configure sun6i GMII mode pin mux settings */
 	for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) {
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 		sunxi_gpio_set_drv(pin, 2);
 	}
 #else
 	/* Configure sun6i MII mode pin mux settings */
 	for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++)
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 	for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++)
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 	for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++)
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 	for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++)
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 	for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
-		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+		sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 #endif
 
 #ifdef CONFIG_RGMII