* Patch by Scott McNutt, 04 Oct 2003:
- add support for Altera Nios-32 CPU
- add support for Nios Cyclone Development Kit (DK-1C20)
* Patch by Steven Scholz, 29 Sep 2003:
- A second parameter for bootm overwrites the load address for
"Standalone Application" images.
- bootm sets environment variable "filesize" to the resulting
(uncompressed) data length for "Standalone Application" images
when autostart is set to "no". Now you can do something like
if bootm $fpgadata $some_free_ram ; then
fpga load 0 $some_free_ram $filesize
fi
* Patch by Denis Peter, 25 Sept 2003:
add support for the MIP405 Rev. C board
diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c
index 99f97d7..98cfb0d 100644
--- a/board/mpl/common/flash.c
+++ b/board/mpl/common/flash.c
@@ -155,7 +155,7 @@
unsigned long flash_init (void)
{
- unsigned long size_b0, size_b1,flashcr;
+ unsigned long size_b0, size_b1,flashcr, size_reg;
int mode, i;
extern char version_string;
char *p=&version_string;
@@ -196,6 +196,21 @@
size_b1 = 0 ;
flash_info[0].size = size_b0;
/* set up flash cs according to the size */
+ size_reg=(flash_info[0].size >>20);
+ switch (size_reg) {
+ case 0:
+ case 1: i=0; break; /* <= 1MB */
+ case 2: i=1; break; /* = 2MB */
+ case 4: i=2; break; /* = 4MB */
+ case 8: i=3; break; /* = 8MB */
+ case 16: i=4; break; /* = 16MB */
+ case 32: i=5; break; /* = 32MB */
+ case 64: i=6; break; /* = 64MB */
+ case 128: i=7; break; /*= 128MB */
+ default:
+ printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
+ while(1);
+ }
if(mode & BOOT_MPS) {
/* flash is on CS1 */
mtdcr(ebccfga, pb1cr);
@@ -203,7 +218,7 @@
/* we map the flash high in every case */
flashcr&=0x0001FFFF; /* mask out address bits */
flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
- flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
+ flashcr|= (i << 17); /* size addr */
mtdcr(ebccfga, pb1cr);
mtdcr(ebccfgd, flashcr);
}
@@ -214,7 +229,7 @@
/* we map the flash high in every case */
flashcr&=0x0001FFFF; /* mask out address bits */
flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
- flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
+ flashcr|= (i << 17); /* size addr */
mtdcr(ebccfga, pb0cr);
mtdcr(ebccfgd, flashcr);
}
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index 70eb5f4..c147175 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -167,6 +167,15 @@
3, /* Address Mode = 3 */
5, /* size value */
1}, /* ECC enabled */
+ { 0x2f, /* Rev C, 128MByte -3 Board */
+ 3, /* Case Latenty = 3 */
+ 3, /* trp 20ns / 7.5 ns datain[27] */
+ 3, /* trcd 20ns /7.5 ns (datain[29]) */
+ 6, /* tras 44ns /7.5 ns (datain[30]) */
+ 4, /* tcpt 44 - 20ns = 24ns */
+ 3, /* Address Mode = 3 */
+ 5, /* size value */
+ 1}, /* ECC enabled */
{ 0xff, /* terminator */
0xff,
0xff,
@@ -550,7 +559,8 @@
tmp >>= 1;
}
rc++;
- if((((bc>>4) & 0xf)==0x1) /* Rev B PCB with */
+ if(( (((bc>>4) & 0xf)==0x2) /* Rev C PCB or */
+ || (((bc>>4) & 0xf)==0x1)) /* Rev B PCB with */
&& (rc==0x1)) /* Population Option 1 is a -3 */
rc=3;
*pcbrev=(bc >> 4) & 0xf;