mmc: tmio: sdhi: Implement get_b_max function
Implement get_b_max() for the Renesas R-Car SDHI controller driver, limit
the b_max per hardware capabilities such that select Gen2 controllers have
16bit block transfer limit, the rest has 32bit block transfer limit and on
Gen3, the block transfer limit on addresses above the 32bit boundary is set
to 1/4 of the malloc area.
Originally, on Gen3, the block transfers above the 32bit area were limited
to PIO only, which resulted in (R8A7795 Salvator-X , HS200 eMMC):
=> time mmc read 0x0000000700000000 0 0x10000
time: 0.151 seconds
=> time mmc read 0x0000000700000000 0 0x100000
time: 11.090 seconds
with bounce buffer in place and b_max adjustment in place:
=> time mmc read 0x0000000700000000 0 0x10000
time: 0.156 seconds
=> time mmc read 0x0000000700000000 0 0x100000
time: 2.349 seconds
Note that the bounce buffer does mallocate and free the bounce buffer
for every transfer. Experiment which removes this results in further
increase of read speed, from 2.349s to 2.156s per 512 MiB of data,
which is not such a significant improvement anymore. It might however
be interesting to have bounce buffer directly in the MMC core or even
block core.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h
index 0474588..2f671df 100644
--- a/drivers/mmc/tmio-common.h
+++ b/drivers/mmc/tmio-common.h
@@ -147,6 +147,7 @@
u8 adjust_hs400_calibrate;
u8 hs400_bad_tap;
const u8 *adjust_hs400_calib_table;
+ u32 quirks;
#endif
ulong (*clk_get_rate)(struct tmio_sd_priv *);
};