Merge git://git.denx.de/u-boot-mmc
diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h
index 3d70148..42ce8dc 100644
--- a/arch/arm/include/asm/omap_mmc.h
+++ b/arch/arm/include/asm/omap_mmc.h
@@ -67,7 +67,7 @@
 struct omap_hsmmc_plat {
 	struct mmc_config cfg;
 	struct hsmmc *base_addr;
-	struct mmc mmc;
+	struct mmc *mmc;
 	bool cd_inverted;
 	u32 controller_flags;
 	const char *hw_rev;
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index f2d8256..88a1359 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -239,6 +239,15 @@
 
 	  If unsure, say N.
 
+config MMC_OMAP_HS_ADMA
+	bool "ADMA support for OMAP HS MMC"
+	depends on MMC_OMAP_HS && !OMAP34XX
+	default y if !AM33XX
+	help
+	  This enables support for the ADMA2 controller (SDA3.00 Part A2 DMA
+	  controller). If supported by the hardware, selecting this option will
+	  increase performances.
+
 config MMC_OMAP36XX_PINS
 	bool "Enable MMC1 on OMAP36xx/37xx"
 	depends on OMAP34XX && MMC_OMAP_HS
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index fb303dc..c930893 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -181,23 +181,18 @@
 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 {
 	static const int freqs[] = {
+	      [MMC_LEGACY]	= 25000000,
 	      [SD_LEGACY]	= 25000000,
 	      [MMC_HS]		= 26000000,
 	      [SD_HS]		= 50000000,
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
+	      [MMC_HS_52]	= 52000000,
+	      [MMC_DDR_52]	= 52000000,
 	      [UHS_SDR12]	= 25000000,
 	      [UHS_SDR25]	= 50000000,
 	      [UHS_SDR50]	= 100000000,
 	      [UHS_DDR50]	= 50000000,
-#ifdef MMC_SUPPORTS_TUNING
 	      [UHS_SDR104]	= 208000000,
-#endif
-#endif
-	      [MMC_HS_52]	= 52000000,
-	      [MMC_DDR_52]	= 52000000,
-#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 	      [MMC_HS_200]	= 200000000,
-#endif
 	};
 
 	if (mode == MMC_LEGACY)
@@ -1974,7 +1969,7 @@
 		return -ENOMEM;
 	memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
 
-	if (ext_csd[EXT_CSD_REV] > ARRAY_SIZE(mmc_versions))
+	if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
 		return -EINVAL;
 
 	mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
@@ -2658,12 +2653,7 @@
 	mmc->preinit = preinit;
 }
 
-#if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
-static int mmc_probe(bd_t *bis)
-{
-	return 0;
-}
-#elif CONFIG_IS_ENABLED(DM_MMC)
+#if CONFIG_IS_ENABLED(DM_MMC)
 static int mmc_probe(bd_t *bis)
 {
 	int ret, i;
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 02970f2..caaa914 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -93,7 +93,7 @@
 	enum bus_mode mode;
 #endif
 	u8 controller_flags;
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 	struct omap_hsmmc_adma_desc *adma_desc_table;
 	uint desc_slot;
 #endif
@@ -117,7 +117,7 @@
 	u8 controller_flags;
 };
 
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 struct omap_hsmmc_adma_desc {
 	u8 attr;
 	u8 reserved;
@@ -741,7 +741,7 @@
 			return -ETIMEDOUT;
 		}
 	}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 	reg_val = readl(&mmc_base->hl_hwinfo);
 	if (reg_val & MADMA_EN)
 		priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
@@ -834,7 +834,7 @@
 	}
 }
 
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end)
 {
 	struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
@@ -1037,7 +1037,7 @@
 		else
 			flags |= (DP_DATA | DDIR_WRITE);
 
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 		if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) &&
 		    !mmc_is_tuning_cmd(cmd->cmdidx)) {
 			omap_hsmmc_prepare_data(mmc, data);
@@ -1082,7 +1082,7 @@
 		}
 	}
 
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
 	if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data &&
 	    !mmc_is_tuning_cmd(cmd->cmdidx)) {
 		u32 sz_mb, timeout;
@@ -1181,8 +1181,9 @@
 	return 0;
 }
 
+#if CONFIG_IS_ENABLED(MMC_WRITE)
 static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
-				unsigned int size)
+			  unsigned int size)
 {
 	unsigned int *input_buf = (unsigned int *)buf;
 	unsigned int mmc_stat;
@@ -1235,7 +1236,13 @@
 	}
 	return 0;
 }
-
+#else
+static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
+			  unsigned int size)
+{
+	return -ENOTSUPP;
+}
+#endif
 static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base)
 {
 	writel(readl(&mmc_base->sysctl) & ~CEN_ENABLE, &mmc_base->sysctl);
@@ -1825,6 +1832,8 @@
 	if (ret < 0)
 		return ret;
 
+	if (!cfg->f_max)
+		cfg->f_max = 52000000;
 	cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 	cfg->f_min = 400000;
 	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
@@ -1858,8 +1867,8 @@
 static int omap_hsmmc_bind(struct udevice *dev)
 {
 	struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
-
-	return mmc_bind(dev, &plat->mmc, &plat->cfg);
+	plat->mmc = calloc(1, sizeof(struct mmc));
+	return mmc_bind(dev, plat->mmc, &plat->cfg);
 }
 #endif
 static int omap_hsmmc_probe(struct udevice *dev)
@@ -1882,7 +1891,7 @@
 #endif
 
 #ifdef CONFIG_BLK
-	mmc = &plat->mmc;
+	mmc = plat->mmc;
 #else
 	mmc = mmc_create(cfg, priv);
 	if (mmc == NULL)