Fix ethernet timeouts on dbau1550 and other au1x00 systems
Patch by Leif Lindholm, 29 Dec 2004
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index b8219bf..35c07b1 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -172,8 +172,8 @@
(volatile mac_fifo_t*)(MAC0_RX_DMA_ADDR+MAC_RX_BUFF0_STATUS);
int i;
- next_tx = 0;
- next_rx = 0;
+ next_tx = TX_GET_DMA_BUFFER(fifo_tx[0].addr);
+ next_rx = RX_GET_DMA_BUFFER(fifo_rx[0].addr);
/* We have to enable clocks before releasing reset */
*macen = MAC_EN_CLOCK_ENABLE;