* Patch by Tolunay Orkun, 5 Mar 2004:
  Fix early board initialization for Cogent CSB272 board

* Patch by Ed Okerson, 3 Mar 2004:
  fix CFI flash writes for little endian systems

* Patch by Reinhard Meyer, 01 Mar 2004:
  generalize USB and IDE support for MPC5200 with according
  changes to IceCube.h and TOP5200.h
  add Am29LV256 256 MBit FLASH support for TOP5200 boards
  add info about USB and IDE to README
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index 0604189..120cde7 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -21,9 +21,8 @@
  * MA 02111-1307 USA
  */
 
-#include <asm/u-boot.h>
-#include <asm/processor.h>
 #include <common.h>
+#include <asm/processor.h>
 #include <i2c.h>
 #include <miiphy.h>
 #include <405gp_enet.h>
@@ -57,10 +56,10 @@
 }
 
 /*
- * board_pre_init: do any preliminary board initialization
+ * board_early_init_f: do early board initialization
  *
  */
-int board_pre_init(void)
+int board_early_init_f(void)
 {
 	/* initialize PLL so UART, LCD, Ethernet clocked at correctly */
 	(void) get_clocks();
@@ -172,3 +171,4 @@
 
 	return 0; /* success */
 }
+
diff --git a/board/emk/common/flash.c b/board/emk/common/flash.c
index adfa9a0..966bb5c 100644
--- a/board/emk/common/flash.c
+++ b/board/emk/common/flash.c
@@ -40,9 +40,11 @@
   #define FLASH_CYCLE2	0x02aa
   #define FLASH_ID1		0
   #define FLASH_ID2		1
+  #define FLASH_ID3		0x0e
+  #define FLASH_ID4		0x0F
 #endif
 
-#if defined (CONFIG_TOP5200)
+#if defined (CONFIG_TOP5200) && !defined (CONFIG_LITE5200)
   typedef unsigned char FLASH_PORT_WIDTH;
   typedef volatile unsigned char FLASH_PORT_WIDTHV;
   #define	FLASH_ID_MASK	0xFF
@@ -54,6 +56,24 @@
   #define FLASH_CYCLE2	0x0555
   #define FLASH_ID1		0
   #define FLASH_ID2		2
+  #define FLASH_ID3		0x1c
+  #define FLASH_ID4		0x1E
+#endif
+
+#if defined (CONFIG_TOP5200) && defined (CONFIG_LITE5200)
+  typedef unsigned char FLASH_PORT_WIDTH;
+  typedef volatile unsigned char FLASH_PORT_WIDTHV;
+  #define	FLASH_ID_MASK	0xFF
+
+  #define FPW	FLASH_PORT_WIDTH
+  #define FPWV	FLASH_PORT_WIDTHV
+
+  #define FLASH_CYCLE1	0x0555
+  #define FLASH_CYCLE2	0x02aa
+  #define FLASH_ID1		0
+  #define FLASH_ID2		1
+  #define FLASH_ID3		0x0E
+  #define FLASH_ID4		0x0F
 #endif
 
 /*-----------------------------------------------------------------------
@@ -183,6 +203,15 @@
 	case FLASH_AM160B:
 		fmt = "29LV160%s (16 Mbit, %s)\n";
 		break;
+	case FLASH_AMLV640U:
+		fmt = "29LV640M (64 Mbit)\n";
+		break;
+	case FLASH_AMDLV065D:
+		fmt = "29LV065D (64 Mbit)\n";
+		break;
+	case FLASH_AMLV256U:
+		fmt = "29LV256M (256 Mbit)\n";
+		break;
 	default:
 		fmt = "Unknown Chip Type\n";
 		break;
@@ -239,7 +268,6 @@
 ulong flash_get_size (FPWV *addr, flash_info_t *info)
 {
 	int		i;
-	ulong	offset;
 
 	/* Write auto select command: read Manufacturer ID */
 	/* Write auto select command sequence and test FLASH answer */
@@ -278,27 +306,64 @@
 		info->flash_id += FLASH_AM160B;
 		info->sector_count = 35;
 		info->size = 0x00200000;
-#ifdef CFG_LOWBOOT
-		offset = 0;
-#else
-		offset = 0x00e00000;
-#endif
-		info->start[0] = (ulong)addr + offset;
-		info->start[1] = (ulong)addr + offset + 0x4000;
-		info->start[2] = (ulong)addr + offset + 0x6000;
-		info->start[3] = (ulong)addr + offset + 0x8000;
+		info->start[0] = (ulong)addr;
+		info->start[1] = (ulong)addr + 0x4000;
+		info->start[2] = (ulong)addr + 0x6000;
+		info->start[3] = (ulong)addr + 0x8000;
 		for (i = 4; i < info->sector_count; i++)
 		{
-			info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
+			info->start[i] = (ulong)addr + 0x10000 * (i-3);
 		}
 		break;
 
+	case (FPW)AMD_ID_LV065D:
+		info->flash_id += FLASH_AMDLV065D;
+		info->sector_count = 128;
+		info->size = 0x00800000;
+		for (i = 0; i < info->sector_count; i++)
+		{
+			info->start[i] = (ulong)addr + 0x10000 * i;
+		}
+		break;
+
+	case (FPW)AMD_ID_MIRROR:
+		/* MIRROR BIT FLASH, read more ID bytes */
+		if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV640U_2 &&
+			(FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV640U_3)
+		{
+			info->flash_id += FLASH_AMLV640U;
+			info->sector_count = 128;
+			info->size = 0x00800000;
+			for (i = 0; i < info->sector_count; i++)
+			{
+				info->start[i] = (ulong)addr + 0x10000 * i;
+			}
+			break;
+		}
+		if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV256U_2 &&
+			(FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV256U_3)
+		{
+			/* attention: only the first 16 MB will be used in u-boot */
+			info->flash_id += FLASH_AMLV256U;
+			info->sector_count = 256;
+			info->size = 0x01000000;
+			for (i = 0; i < info->sector_count; i++)
+			{
+				info->start[i] = (ulong)addr + 0x10000 * i;
+			}
+			break;
+		}
+		
+		/* fall thru to here ! */
 	default:
-		printf ("unknown AMD device=%x ", (FPW)addr[FLASH_ID2]);
+		printf ("unknown AMD device=%x %x %x",
+			(FPW)addr[FLASH_ID2],
+			(FPW)addr[FLASH_ID3],
+			(FPW)addr[FLASH_ID4]);
 		info->flash_id = FLASH_UNKNOWN;
 		info->sector_count = 0;
-		info->size = 0;
-		return (0);			/* => no or unknown flash */
+		info->size = 0x800000;
+		break;
 	}
 
 	/* Put FLASH back in read mode */
@@ -329,6 +394,7 @@
 
 	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_AM160B:
+	case FLASH_AMLV640U:
 		break;
 	case FLASH_UNKNOWN:
 	default:
diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c
index b65d2d0..94ba2b4 100644
--- a/board/emk/top5200/top5200.c
+++ b/board/emk/top5200/top5200.c
@@ -113,12 +113,16 @@
 #if defined (CONFIG_EVAL5200)
 	puts ("Board: EMK TOP5200 on EVAL5200\n");
 #else
+#if defined (CONFIG_LITE5200)
+	puts ("Board: LITE5200\n");
+#else
 #if defined (CONFIG_MINI5200)
 	puts ("Board: EMK TOP5200 on MINI5200\n");
 #else
 	puts ("Board: EMK TOP5200\n");
 #endif
 #endif
+#endif
 	return 0;
 }
 
@@ -155,10 +159,11 @@
  *****************************************************************************/
 int misc_init_r (void)
 {
+#if !defined (CONFIG_LITE5200)
 	/* read 'factory' part of EEPROM */
 	extern void read_factory_r (void);
 	read_factory_r ();
-
+#endif
 	return (0);
 }
 
@@ -175,3 +180,23 @@
 	pci_mpc5xxx_init(&hose);
 }
 #endif
+
+/*****************************************************************************
+ * provide the PCI Reset Function
+ *****************************************************************************/
+#ifdef CFG_CMD_IDE
+#define GPIO_PSC1_4	0x01000000ul
+void ide_set_reset (int idereset)
+{
+	if (idereset) {
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
+	} else {
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
+	}
+
+	/* Configure PSC1_4 as GPIO output for ATA reset */
+	/* (it does not matter we do this every time) */
+	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
+	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
+}
+#endif
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 0a4bed4..d2fda90 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -210,25 +210,25 @@
 
 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
 
-#define GPIO_PSC1_4	0x01000000ul
+#define GPIO_PSC1_4	0x01000000UL
 
 void init_ide_reset (void)
 {
-    printf ("init_ide_reset\n");
+	debug ("init_ide_reset\n");
     
     	/* Configure PSC1_4 as GPIO output for ATA reset */
-	*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
 	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
-	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
+	*(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
 }
 
 void ide_set_reset (int idereset)
 {
-    printf ("ide_reset(%d)\n", idereset);
+	debug ("ide_reset(%d)\n", idereset);
+
 	if (idereset) {
 		*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
 	} else {
-		*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA |=  GPIO_PSC1_4;
 	}
 }
 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */