Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- add DM based reset driver for SiFive SoC's.
diff --git a/arch/arm/include/asm/arch-mediatek/reset.h b/arch/arm/include/asm/arch-mediatek/reset.h
index 9704666..4ba0bad 100644
--- a/arch/arm/include/asm/arch-mediatek/reset.h
+++ b/arch/arm/include/asm/arch-mediatek/reset.h
@@ -6,7 +6,7 @@
 #ifndef __MEDIATEK_RESET_H
 #define __MEDIATEK_RESET_H
 
-#include <dm.h>
+struct udevice;
 
 int mediatek_reset_bind(struct udevice *pdev, u32 regofs, u32 num_regs);
 
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 694c26d..fe8d594 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -8,6 +8,7 @@
 
 #include <bootm.h>
 #include <common.h>
+#include <dm.h>
 #include <init.h>
 #include <log.h>
 #include <net.h>
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index 513be09..96be069 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <image.h>
 #include <log.h>
 #include <spl.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
index 70940f0..8aad4be 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <console.h>
+#include <dm.h>
 #include <dfu.h>
 #include <malloc.h>
 #include <serial.h>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 997e145..e0f6b6c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -112,9 +112,11 @@
 	select DISPLAY_CPUINFO
 	select DMA_ADDR_T_64BIT
 	select DM
-	select DM_SERIAL
-	select DM_GPIO
 	select DM_ETH
+	select DM_GPIO
+	select DM_I2C
+	select DM_SERIAL
+	select DM_SPI
 	select MIPS_L2_CACHE
 	select MIPS_MACH_EARLY_INIT
 	select MIPS_TUNE_OCTEON3
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
index a7bd55f..f5ad4a6 100644
--- a/arch/mips/dts/mrvl,cn73xx.dtsi
+++ b/arch/mips/dts/mrvl,cn73xx.dtsi
@@ -5,6 +5,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/clock/octeon-clock.h>
+
 / {
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -38,6 +40,38 @@
 			#size-cells = <1>;
 		};
 
+		clk: clock {
+			compatible = "mrvl,octeon-clk";
+			#clock-cells = <1>;
+			u-boot,dm-pre-reloc;
+		};
+
+		gpio: gpio-controller@1070000000800 {
+			#gpio-cells = <2>;
+			compatible = "cavium,octeon-7890-gpio";
+			reg = <0x10700 0x00000800 0x0 0x100>;
+			gpio-controller;
+			nr-gpios = <32>;
+			/* Interrupts are specified by two parts:
+			 * 1) GPIO pin number (0..15)
+			 * 2) Triggering (1 - edge rising
+			 *		  2 - edge falling
+			 *		  4 - level active high
+			 *		  8 - level active low)
+			 */
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			/* The GPIO pins connect to 16 consecutive CUI bits */
+			interrupts = <0x03000 4>, <0x03001 4>,
+				     <0x03002 4>, <0x03003 4>,
+				     <0x03004 4>, <0x03005 4>,
+				     <0x03006 4>, <0x03007 4>,
+				     <0x03008 4>, <0x03009 4>,
+				     <0x0300a 4>, <0x0300b 4>,
+				     <0x0300c 4>, <0x0300d 4>,
+				     <0x0300e 4>, <0x0300f 4>;
+		};
+
 		reset: reset@1180006001600 {
 			compatible = "mrvl,cn7xxx-rst";
 			reg = <0x11800 0x06001600 0x0 0x200>;
@@ -60,5 +94,37 @@
 			reg-shift = <3>;
 			interrupts = <0x08040 4>;
 		};
+
+		i2c0: i2c@1180000001000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-7890-twsi";
+			reg = <0x11800 0x00001000 0x0 0x200>;
+			/* INT_ST, INT_TS, INT_CORE */
+			interrupts = <0x0b000 1>, <0x0b001 1>, <0x0b002 1>;
+			clock-frequency = <100000>;
+			clocks = <&clk OCTEON_CLK_IO>;
+		};
+
+		i2c1: i2c@1180000001200 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-7890-twsi";
+			reg = <0x11800 0x00001200 0x0 0x200>;
+			/* INT_ST, INT_TS, INT_CORE */
+			interrupts = <0x0b100 1>, <0x0b101 1>, <0x0b102 1>;
+			clock-frequency = <100000>;
+			clocks = <&clk OCTEON_CLK_IO>;
+		};
+
+		spi: spi@1070000001000 {
+			compatible = "cavium,octeon-3010-spi";
+			reg = <0x10700 0x00001000 0x0 0x100>;
+			interrupts = <0x05001 1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spi-max-frequency = <25000000>;
+			clocks = <&clk OCTEON_CLK_IO>;
+		};
 	};
 };
diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts
index 4e9c2de..6b2e5e8 100644
--- a/arch/mips/dts/mrvl,octeon-ebb7304.dts
+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts
@@ -5,7 +5,7 @@
 
 /dts-v1/;
 
-/include/ "mrvl,cn73xx.dtsi"
+#include "mrvl,cn73xx.dtsi"
 
 / {
 	model = "cavium,ebb7304";
@@ -13,6 +13,7 @@
 
 	aliases {
 		serial0 = &uart0;
+		spi0 = &spi;
 	};
 
 	chosen {
@@ -94,3 +95,21 @@
 &uart0 {
 	clock-frequency = <1200000000>;
 };
+
+&i2c0 {
+	u-boot,dm-pre-reloc;	/* Needed early for DDR SPD EEPROM */
+	clock-frequency = <100000>;
+};
+
+&i2c1 {
+	u-boot,dm-pre-reloc;	/* Needed early for DDR SPD EEPROM */
+	clock-frequency = <100000>;
+};
+
+&spi {
+	flash@0 {
+		compatible = "micron,n25q128a11", "jedec,spi-nor";
+		spi-max-frequency = <2000000>;
+		reg = <0>;
+	};
+};
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2.h b/arch/mips/mach-mscc/include/mach/jr2/jr2.h
index 67244f6..3a779e7 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2.h
@@ -8,9 +8,6 @@
 #ifndef _MSCC_JR2_H_
 #define _MSCC_JR2_H_
 
-#include <linux/bitops.h>
-#include <dm.h>
-
 /*
  * Target offset base(s)
  */
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton.h b/arch/mips/mach-mscc/include/mach/luton/luton.h
index 19f02ed..dda665f 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton.h
@@ -8,9 +8,6 @@
 #ifndef _MSCC_OCELOT_H_
 #define _MSCC_OCELOT_H_
 
-#include <linux/bitops.h>
-#include <dm.h>
-
 /*
  * Target offset base(s)
  */
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
index 2cb2135..72b07c3 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
@@ -8,9 +8,6 @@
 #ifndef _MSCC_OCELOT_H_
 #define _MSCC_OCELOT_H_
 
-#include <linux/bitops.h>
-#include <dm.h>
-
 /*
  * Target offset base(s)
  */
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval.h b/arch/mips/mach-mscc/include/mach/serval/serval.h
index 763d18f..a78c6e5 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval.h
@@ -8,9 +8,6 @@
 #ifndef _MSCC_SERVAL_H_
 #define _MSCC_SERVAL_H_
 
-#include <linux/bitops.h>
-#include <dm.h>
-
 /*
  * Target offset base(s)
  */
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt.h b/arch/mips/mach-mscc/include/mach/servalt/servalt.h
index 9015bc7..4d7d088 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt.h
@@ -8,9 +8,6 @@
 #ifndef _MSCC_SERVALT_H_
 #define _MSCC_SERVALT_H_
 
-#include <linux/bitops.h>
-#include <dm.h>
-
 /*
  * Target offset base(s)
  */
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 99bc480..dd6b875 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <init.h>
diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c
index c41706c..eee5c35 100644
--- a/board/atmel/common/board.c
+++ b/board/atmel/common/board.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <env.h>
 #include <w1.h>
 #include <w1-eeprom.h>
diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c
index ada7cf5..5f44714 100644
--- a/board/liebherr/display5/display5.c
+++ b/board/liebherr/display5/display5.c
@@ -27,7 +27,6 @@
 #include <i2c.h>
 #include <linux/delay.h>
 
-#include <dm.h>
 #include <dm/platform_data/serial_mxc.h>
 #include <dm/platdata.h>
 
diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c
index d0e6016..879f5de 100644
--- a/board/mscc/servalt/servalt.c
+++ b/board/mscc/servalt/servalt.c
@@ -9,6 +9,8 @@
 #include <asm/io.h>
 #include <led.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 enum {
 	BOARD_TYPE_PCB116 = 0xAABBCE00,
 };
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 0cda919..38eb0f2 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <blk.h>
+#include <dm.h>
 #include <dfu.h>
 #include <env.h>
 #include <memalign.h>
diff --git a/cmd/demo.c b/cmd/demo.c
index 9da06f5..f923533 100644
--- a/cmd/demo.c
+++ b/cmd/demo.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <dm.h>
 #include <dm-demo.h>
 #include <mapmem.h>
 #include <asm/io.h>
diff --git a/cmd/mdio.c b/cmd/mdio.c
index c48bb51..cfa45ad 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <dm.h>
 #include <miiphy.h>
 #include <phy.h>
 
diff --git a/cmd/mii.c b/cmd/mii.c
index b52a55d..fe8602e 100644
--- a/cmd/mii.c
+++ b/cmd/mii.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <dm.h>
 #include <miiphy.h>
 
 typedef struct _MII_field_desc_t {
diff --git a/cmd/w1.c b/cmd/w1.c
index 92be1f2..459094b 100644
--- a/cmd/w1.c
+++ b/cmd/w1.c
@@ -6,6 +6,7 @@
  */
 #include <common.h>
 #include <command.h>
+#include <dm.h>
 #include <w1.h>
 #include <w1-eeprom.h>
 #include <dm/device-internal.h>
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 72c7165..10605f1 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1529,6 +1529,16 @@
 	  Enable support for using SPI flash in TPL. See SPL_SPI_FLASH_SUPPORT
 	  for details.
 
+config TPL_SPI_FLASH_TINY
+	bool "Enable low footprint TPL SPI Flash support"
+	depends on TPL_SPI_FLASH_SUPPORT && !SPI_FLASH_BAR
+	default y if SPI_FLASH
+	help
+	 Enable lightweight TPL SPI Flash support that supports just reading
+	 data/images from flash. No support to write/erase flash. Enable
+	 this if you have TPL size limitations and don't need full-fledged
+	 SPI flash support.
+
 config TPL_SPI_LOAD
 	bool "Support loading from SPI flash"
 	depends on TPL_SPI_FLASH_SUPPORT
diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index d810b1e..f8d27b0 100644
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -1,9 +1,9 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0xffffffff80000000
 CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=2
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0x8001180000000800
 CONFIG_DEBUG_UART_CLOCK=1200000000
 CONFIG_ARCH_OCTEON=y
@@ -12,6 +12,8 @@
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MTD=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_DHCP=y
@@ -29,10 +31,18 @@
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_NETDEVICES is not set
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
 CONFIG_DEBUG_UART_SHIFT=3
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_OCTEON_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_OCTEON=y
 CONFIG_HEXDUMP=y
diff --git a/doc/board/emulation/qemu-mips.rst b/doc/board/emulation/qemu-mips.rst
index f206039..d359251 100644
--- a/doc/board/emulation/qemu-mips.rst
+++ b/doc/board/emulation/qemu-mips.rst
@@ -29,28 +29,28 @@
 
 .. code-block:: bash
 
-   make qemu_mips
+   make qemu_mips_defconfig
    qemu-system-mips -M mips -bios u-boot.bin -nographic
 
 32 bit, little endian
 
 .. code-block:: bash
 
-   make qemu_mipsel
+   make qemu_mipsel_defconfig
    qemu-system-mipsel -M mips -bios u-boot.bin -nographic
 
 64 bit, big endian
 
 .. code-block:: bash
 
-   make qemu_mips64
+   make qemu_mips64_defconfig
    qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
 
 64 bit, little endian
 
 .. code-block:: bash
 
-   make qemu_mips64el
+   make qemu_mips64el_defconfig
    qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
 
 or using u-boot.bin from emulated flash:
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
index 31bbb6f..f20c46f 100644
--- a/drivers/adc/stm32-adc-core.c
+++ b/drivers/adc/stm32-adc-core.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
diff --git a/drivers/adc/stm32-adc-core.h b/drivers/adc/stm32-adc-core.h
index ba0e10e..05968db 100644
--- a/drivers/adc/stm32-adc-core.h
+++ b/drivers/adc/stm32-adc-core.h
@@ -26,9 +26,9 @@
 #define STM32_ADC_MAX_ADCS		3
 #define STM32_ADCX_COMN_OFFSET		0x300
 
-#include <common.h>
 #include <clk.h>
-#include <dm.h>
+
+struct udevice;
 
 /**
  * struct stm32_adc_common - stm32 ADC driver common data (for all instances)
diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
index b12f894..3f0ed48 100644
--- a/drivers/adc/stm32-adc.c
+++ b/drivers/adc/stm32-adc.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <adc.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 82cb187..6003e14 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -83,6 +83,13 @@
 	  set up by U-Boot itself but only statically. Thus the driver does not
 	  support changing clock rates, only querying them.
 
+config CLK_OCTEON
+	bool "Clock controller driver for Marvell MIPS Octeon"
+	depends on CLK && ARCH_OCTEON
+	default y
+	help
+	  Enable this to support the clocks on Octeon MIPS platforms.
+
 config CLK_STM32F
 	bool "Enable clock driver support for STM32F family"
 	depends on CLK && (STM32F7 || STM32F4)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d911954..cda4b4b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -29,6 +29,7 @@
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
 obj-$(CONFIG_CLK_K210) += kendryte/
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
+obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_CLK_SIFIVE) += sifive/
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 15656f5..934cd57 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -25,6 +25,11 @@
 	return (const struct clk_ops *)dev->driver->ops;
 }
 
+struct clk *dev_get_clk_ptr(struct udevice *dev)
+{
+	return (struct clk *)dev_get_uclass_priv(dev);
+}
+
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(OF_PLATDATA)
 int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
diff --git a/drivers/clk/clk_octeon.c b/drivers/clk/clk_octeon.c
new file mode 100644
index 0000000..fd559e0
--- /dev/null
+++ b/drivers/clk/clk_octeon.c
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dt-bindings/clock/octeon-clock.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct octeon_clk_priv {
+	u64 core_clk;
+	u64 io_clk;
+};
+
+static int octeon_clk_enable(struct clk *clk)
+{
+	/* Nothing to do on Octeon */
+	return 0;
+}
+
+static ulong octeon_clk_get_rate(struct clk *clk)
+{
+	struct octeon_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case OCTEON_CLK_CORE:
+		return priv->core_clk;
+
+	case OCTEON_CLK_IO:
+		return priv->io_clk;
+
+	default:
+		return 0;
+	}
+
+	return 0;
+}
+
+static struct clk_ops octeon_clk_ops = {
+	.enable = octeon_clk_enable,
+	.get_rate = octeon_clk_get_rate,
+};
+
+static const struct udevice_id octeon_clk_ids[] = {
+	{ .compatible = "mrvl,octeon-clk" },
+	{ /* sentinel */ }
+};
+
+static int octeon_clk_probe(struct udevice *dev)
+{
+	struct octeon_clk_priv *priv = dev_get_priv(dev);
+
+	/*
+	 * The clock values are already read into GD, lets just store them
+	 * in priv data
+	 */
+	priv->core_clk = gd->cpu_clk;
+	priv->io_clk = gd->bus_clk;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(clk_octeon) = {
+	.name = "clk_octeon",
+	.id = UCLASS_CLK,
+	.of_match = octeon_clk_ids,
+	.ops = &octeon_clk_ops,
+	.probe = octeon_clk_probe,
+	.priv_auto_alloc_size = sizeof(struct octeon_clk_priv),
+};
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
index d1fd281..5f1986f 100644
--- a/drivers/clk/kendryte/bypass.c
+++ b/drivers/clk/kendryte/bypass.c
@@ -4,12 +4,15 @@
  */
 
 #define LOG_CATEGORY UCLASS_CLK
-#include <kendryte/bypass.h>
 
+#include <common.h>
+#include <clk.h>
 #include <clk-uclass.h>
+#include <dm.h>
+#include <log.h>
+#include <kendryte/bypass.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
-#include <log.h>
 
 #define CLK_K210_BYPASS "k210_clk_bypass"
 
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c
index 19e3588..ab6d75d 100644
--- a/drivers/clk/kendryte/pll.c
+++ b/drivers/clk/kendryte/pll.c
@@ -3,18 +3,20 @@
  * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  */
 #define LOG_CATEGORY UCLASS_CLK
-#include <kendryte/pll.h>
 
-#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
 /* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
 #include <div64.h>
+#include <log.h>
+#include <serial.h>
+#include <asm/io.h>
 #include <dt-bindings/clock/k210-sysctl.h>
+#include <kendryte/pll.h>
 #include <linux/bitfield.h>
 #include <linux/clk-provider.h>
 #include <linux/delay.h>
 #include <linux/err.h>
-#include <log.h>
-#include <serial.h>
 
 #define CLK_K210_PLL "k210_clk_pll"
 
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index dfd3cbb..44e1ac5 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -13,6 +13,7 @@
 #include <altera.h>
 #include <asm/arch/pinmux.h>
 #include <common.h>
+#include <dm.h>
 #include <dm/ofnode.h>
 #include <errno.h>
 #include <fs_loader.h>
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ff5cd7e..11e9a17 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -346,6 +346,16 @@
 	help
 	  Say yes here to support Microchip PIC32 GPIOs.
 
+config OCTEON_GPIO
+	bool "Octeon II/III/TX/TX2 GPIO driver"
+	depends on DM_GPIO && DM_PCI &&	(ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
+	default y
+	help
+	  Add support for the Marvell Octeon GPIO driver. This is used with
+	  various Octeon parts such as Octeon II/III and OcteonTX/TX2.
+	  Octeon II/III has 32 GPIOs (count defined via DT) and OcteonTX/TX2
+	  has 64 GPIOs (count defined via internal register).
+
 config STM32_GPIO
 	bool "ST STM32 GPIO driver"
 	depends on DM_GPIO && (ARCH_STM32 || ARCH_STM32MP)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index e769509..d3d0d3c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -59,6 +59,7 @@
 obj-$(CONFIG_HSDK_CREG_GPIO)	+= hsdk-creg-gpio.o
 obj-$(CONFIG_IMX_RGPIO2P)	+= imx_rgpio2p.o
 obj-$(CONFIG_PIC32_GPIO)	+= pic32_gpio.o
+obj-$(CONFIG_OCTEON_GPIO)	+= octeon_gpio.o
 obj-$(CONFIG_MVEBU_GPIO)	+= mvebu_gpio.o
 obj-$(CONFIG_MSM_GPIO)		+= msm_gpio.o
 obj-$(CONFIG_$(SPL_)PCF8575_GPIO)	+= pcf8575_gpio.o
diff --git a/drivers/gpio/octeon_gpio.c b/drivers/gpio/octeon_gpio.c
new file mode 100644
index 0000000..45acaad
--- /dev/null
+++ b/drivers/gpio/octeon_gpio.c
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier:    GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ *
+ * (C) Copyright 2011
+ * eInfochips Ltd. <www.einfochips.com>
+ * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor <www.marvell.com>
+ */
+
+#include <dm.h>
+#include <pci.h>
+#include <pci_ids.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/compat.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/* Returns the bit value to write or read based on the offset */
+#define GPIO_BIT(x)		BIT_ULL((x) & 0x3f)
+
+#define GPIO_RX_DAT		0x00
+#define GPIO_TX_SET		0x08
+#define GPIO_TX_CLR		0x10
+#define GPIO_CONST		0x90	/* OcteonTX only */
+
+/* Offset to register-set for 2nd GPIOs (> 63), OcteonTX only */
+#define GPIO1_OFFSET		0x1400
+
+/* GPIO_CONST register bits */
+#define GPIO_CONST_GPIOS_MASK	GENMASK_ULL(7, 0)
+
+/* GPIO_BIT_CFG register bits */
+#define GPIO_BIT_CFG_TX_OE	BIT_ULL(0)
+#define GPIO_BIT_CFG_PIN_XOR	BIT_ULL(1)
+#define GPIO_BIT_CFG_INT_EN	BIT_ULL(2)
+#define GPIO_BIT_CFG_PIN_SEL_MASK GENMASK_ULL(26, 16)
+
+enum {
+	PROBE_PCI = 0,		/* PCI based probing */
+	PROBE_DT,		/* DT based probing */
+};
+
+struct octeon_gpio_data {
+	int probe;
+	u32 reg_offs;
+	u32 gpio_bit_cfg_offs;
+};
+
+struct octeon_gpio {
+	void __iomem *base;
+	const struct octeon_gpio_data *data;
+};
+
+/* Returns the offset to the output register based on the offset and value */
+static u32 gpio_tx_reg(int offset, int value)
+{
+	u32 ret;
+
+	ret = value ? GPIO_TX_SET : GPIO_TX_CLR;
+	if (offset > 63)
+		ret += GPIO1_OFFSET;
+
+	return ret;
+}
+
+/* Returns the offset to the input data register based on the offset */
+static u32 gpio_rx_dat_reg(int offset)
+{
+	u32 ret;
+
+	ret = GPIO_RX_DAT;
+	if (offset > 63)
+		ret += GPIO1_OFFSET;
+
+	return ret;
+}
+
+static int octeon_gpio_dir_input(struct udevice *dev, unsigned int offset)
+{
+	struct octeon_gpio *gpio = dev_get_priv(dev);
+
+	debug("%s(%s, %u)\n", __func__, dev->name, offset);
+	clrbits_64(gpio->base + gpio->data->gpio_bit_cfg_offs + 8 * offset,
+		   GPIO_BIT_CFG_TX_OE | GPIO_BIT_CFG_PIN_XOR |
+		   GPIO_BIT_CFG_INT_EN | GPIO_BIT_CFG_PIN_SEL_MASK);
+
+	return 0;
+}
+
+static int octeon_gpio_dir_output(struct udevice *dev, unsigned int offset,
+				  int value)
+{
+	struct octeon_gpio *gpio = dev_get_priv(dev);
+
+	debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value);
+	writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs +
+	       gpio_tx_reg(offset, value));
+
+	clrsetbits_64(gpio->base + gpio->data->gpio_bit_cfg_offs + 8 * offset,
+		      GPIO_BIT_CFG_PIN_SEL_MASK | GPIO_BIT_CFG_INT_EN,
+		      GPIO_BIT_CFG_TX_OE);
+
+	return 0;
+}
+
+static int octeon_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+	struct octeon_gpio *gpio = dev_get_priv(dev);
+	u64 reg = readq(gpio->base + gpio->data->reg_offs +
+			gpio_rx_dat_reg(offset));
+
+	debug("%s(%s, %u): value: %d\n", __func__, dev->name, offset,
+	      !!(reg & GPIO_BIT(offset)));
+
+	return !!(reg & GPIO_BIT(offset));
+}
+
+static int octeon_gpio_set_value(struct udevice *dev,
+				 unsigned int offset, int value)
+{
+	struct octeon_gpio *gpio = dev_get_priv(dev);
+
+	debug("%s(%s, %u, %d)\n", __func__, dev->name, offset, value);
+	writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs +
+	       gpio_tx_reg(offset, value));
+
+	return 0;
+}
+
+static int octeon_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+	struct octeon_gpio *gpio = dev_get_priv(dev);
+	u64 val = readq(gpio->base + gpio->data->gpio_bit_cfg_offs +
+			8 * offset);
+	int pin_sel;
+
+	debug("%s(%s, %u): GPIO_BIT_CFG: 0x%llx\n", __func__, dev->name,
+	      offset, val);
+	pin_sel = FIELD_GET(GPIO_BIT_CFG_PIN_SEL_MASK, val);
+	if (pin_sel)
+		return GPIOF_FUNC;
+	else if (val & GPIO_BIT_CFG_TX_OE)
+		return GPIOF_OUTPUT;
+	else
+		return GPIOF_INPUT;
+}
+
+static int octeon_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+			     struct ofnode_phandle_args *args)
+{
+	if (args->args_count < 1)
+		return -EINVAL;
+
+	desc->offset = args->args[0];
+	desc->flags = 0;
+	if (args->args_count > 1) {
+		if (args->args[1] & GPIO_ACTIVE_LOW)
+			desc->flags |= GPIOD_ACTIVE_LOW;
+		/* In the future add tri-state flag support */
+	}
+	return 0;
+}
+
+static const struct dm_gpio_ops octeon_gpio_ops = {
+	.direction_input	= octeon_gpio_dir_input,
+	.direction_output	= octeon_gpio_dir_output,
+	.get_value		= octeon_gpio_get_value,
+	.set_value		= octeon_gpio_set_value,
+	.get_function		= octeon_gpio_get_function,
+	.xlate			= octeon_gpio_xlate,
+};
+
+static int octeon_gpio_probe(struct udevice *dev)
+{
+	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct octeon_gpio *priv = dev_get_priv(dev);
+	char *end;
+
+	priv->data = (const struct octeon_gpio_data *)dev_get_driver_data(dev);
+
+	if (priv->data->probe == PROBE_PCI) {
+		priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
+					    PCI_REGION_MEM);
+		uc_priv->gpio_count = readq(priv->base +
+					    priv->data->reg_offs + GPIO_CONST) &
+			GPIO_CONST_GPIOS_MASK;
+	} else {
+		priv->base = dev_remap_addr(dev);
+		uc_priv->gpio_count = ofnode_read_u32_default(dev->node,
+							      "nr-gpios", 32);
+	}
+
+	if (!priv->base) {
+		debug("%s(%s): Could not get base address\n",
+		      __func__, dev->name);
+		return -ENODEV;
+	}
+
+	uc_priv->bank_name  = strdup(dev->name);
+	end = strchr(uc_priv->bank_name, '@');
+	end[0] = 'A' + dev->seq;
+	end[1] = '\0';
+
+	debug("%s(%s): base address: %p, pin count: %d\n",
+	      __func__, dev->name, priv->base, uc_priv->gpio_count);
+
+	return 0;
+}
+
+static const struct octeon_gpio_data gpio_octeon_data = {
+	.probe = PROBE_DT,
+	.reg_offs = 0x80,
+	.gpio_bit_cfg_offs = 0x100,
+};
+
+static const struct octeon_gpio_data gpio_octeontx_data = {
+	.probe = PROBE_PCI,
+	.reg_offs = 0x00,
+	.gpio_bit_cfg_offs = 0x400,
+};
+
+static const struct udevice_id octeon_gpio_ids[] = {
+	{ .compatible = "cavium,thunder-8890-gpio",
+	  .data = (ulong)&gpio_octeontx_data },
+	{ .compatible = "cavium,octeon-7890-gpio",
+	  .data = (ulong)&gpio_octeon_data },
+	{ }
+};
+
+U_BOOT_DRIVER(octeon_gpio) = {
+	.name	= "octeon_gpio",
+	.id	= UCLASS_GPIO,
+	.of_match = of_match_ptr(octeon_gpio_ids),
+	.probe = octeon_gpio_probe,
+	.priv_auto_alloc_size = sizeof(struct octeon_gpio),
+	.ops	= &octeon_gpio_ops,
+	.flags	= DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index f4eb655..ff871f8 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -15,7 +15,6 @@
 #include <malloc.h>
 #include <mmc.h>
 #include <sdhci.h>
-#include <dm.h>
 #include <asm/cache.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
index c586798..a6acf55 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 
 #include <common.h>
+#include <dm.h>
 #include <malloc.h>
 #include <dm/devres.h>
 #include "brcmnand_compat.h"
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
index 6f9bec7..52711d4 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h
@@ -3,8 +3,8 @@
 #ifndef __BRCMNAND_COMPAT_H
 #define __BRCMNAND_COMPAT_H
 
-#include <clk.h>
-#include <dm.h>
+struct clk;
+struct udevice;
 
 char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...);
 
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 952fd1e..99cc418 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -8,7 +8,7 @@
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_SPI_BOOT)	+= fsl_espi_spl.o
-ifeq ($(CONFIG_SPL_SPI_FLASH_TINY),y)
+ifeq ($(CONFIG_$(SPL_TPL_)SPI_FLASH_TINY),y)
 spi-nor-y += spi-nor-tiny.o
 else
 spi-nor-y += spi-nor-core.o
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 475f6c3..b959e34 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -119,7 +119,7 @@
 	struct erase_info instr;
 
 	if (offset % mtd->erasesize || len % mtd->erasesize) {
-		printf("SF: Erase offset/length not multiple of erase size\n");
+		debug("SF: Erase offset/length not multiple of erase size\n");
 		return -EINVAL;
 	}
 
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index fdcd830..0113e70 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2470,7 +2470,7 @@
 		 * designer) that this is bad.
 		 */
 		if (nor->flags & SNOR_F_BROKEN_RESET)
-			printf("enabling reset hack; may not recover from unexpected reboots\n");
+			debug("enabling reset hack; may not recover from unexpected reboots\n");
 		set_4byte(nor, nor->info, 1);
 	}
 
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index 9f676c6..fa26ea3 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -377,7 +377,7 @@
 	}
 	dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
 		id[0], id[1], id[2]);
-	return ERR_PTR(-ENODEV);
+	return ERR_PTR(-EMEDIUMTYPE);
 }
 
 static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
@@ -733,7 +733,7 @@
 
 	info = spi_nor_read_id(nor);
 	if (IS_ERR_OR_NULL(info))
-		return -ENOENT;
+		return PTR_ERR(info);
 	/* Parse the Serial Flash Discoverable Parameters table. */
 	ret = spi_nor_init_params(nor, info, &params);
 	if (ret)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 5595608..ad5ac66 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -10,7 +10,6 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <log.h>
-#include <dm.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <net.h>
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 593798e..0124e8e 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -8,7 +8,7 @@
 #ifndef _PCIE_LAYERSCAPE_H_
 #define _PCIE_LAYERSCAPE_H_
 #include <pci.h>
-#include <dm.h>
+
 #include <linux/sizes.h>
 
 #ifndef CONFIG_SYS_PCI_MEMORY_BUS
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 94de4ed..8315b0b 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <init.h>
 #include <log.h>
 #include <pci.h>
diff --git a/drivers/pci/pcie_layerscape_gen4.h b/drivers/pci/pcie_layerscape_gen4.h
index d298a2b..483eb53 100644
--- a/drivers/pci/pcie_layerscape_gen4.h
+++ b/drivers/pci/pcie_layerscape_gen4.h
@@ -9,7 +9,6 @@
 #ifndef _PCIE_LAYERSCAPE_GEN4_H_
 #define _PCIE_LAYERSCAPE_GEN4_H_
 #include <pci.h>
-#include <dm.h>
 #include <linux/bitops.h>
 
 #ifndef CONFIG_SYS_PCI_MEMORY_SIZE
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 375ce45..148b5d1 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <log.h>
 #include <pci.h>
 #include <asm/arch/fsl_serdes.h>
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index b5f7aec..2fa6c7e 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -5,7 +5,6 @@
  *  Przemyslaw Marczak <p.marczak@samsung.com>
  */
 
-#include "regulator_common.h"
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
@@ -13,6 +12,8 @@
 #include <power/pmic.h>
 #include <power/regulator.h>
 
+#include "regulator_common.h"
+
 static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index cf3fbae..947f812 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -4,7 +4,6 @@
  * Keerthy <j-keerthy@ti.com>
  */
 
-#include "regulator_common.h"
 #include <common.h>
 #include <fdtdec.h>
 #include <errno.h>
@@ -15,6 +14,8 @@
 #include <power/pmic.h>
 #include <power/regulator.h>
 
+#include "regulator_common.h"
+
 #define GPIO_REGULATOR_MAX_STATES	2
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
index 4cfcc31..13906b9 100644
--- a/drivers/power/regulator/regulator_common.c
+++ b/drivers/power/regulator/regulator_common.c
@@ -4,12 +4,14 @@
  * Sven Schwermer <sven.svenschwermer@disruptive-technologies.com>
  */
 
-#include "regulator_common.h"
 #include <common.h>
+#include <dm.h>
 #include <log.h>
 #include <linux/delay.h>
 #include <power/regulator.h>
 
+#include "regulator_common.h"
+
 int regulator_common_ofdata_to_platdata(struct udevice *dev,
 	struct regulator_common_platdata *dev_pdata, const char *enable_gpio_name)
 {
diff --git a/drivers/power/regulator/regulator_common.h b/drivers/power/regulator/regulator_common.h
index 18a5258..bf80439 100644
--- a/drivers/power/regulator/regulator_common.h
+++ b/drivers/power/regulator/regulator_common.h
@@ -7,9 +7,7 @@
 #ifndef _REGULATOR_COMMON_H
 #define _REGULATOR_COMMON_H
 
-#include <common.h>
 #include <asm/gpio.h>
-#include <dm.h>
 
 struct regulator_common_platdata {
 	struct gpio_desc gpio; /* GPIO for regulator enable control */
diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c
index 8bbd8cf..21e5a65 100644
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -13,7 +13,6 @@
 #include <ram.h>
 #include <asm/io.h>
 #include <power-domain.h>
-#include <dm.h>
 #include <asm/arch/sys_proto.h>
 #include <dm/device_compat.h>
 #include <power/regulator.h>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 30d808d..3fc2d06 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -240,6 +240,14 @@
 	  Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
 	  access the SPI NOR flash on platforms embedding this NXP IP core.
 
+config OCTEON_SPI
+	bool "Octeon SPI driver"
+	depends on DM_PCI && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
+	help
+	  Enable the Octeon SPI driver. This driver can be used to
+	  access the SPI NOR flash on Octeon II/III and OcteonTX/TX2
+	  SoC platforms.
+
 config OMAP3_SPI
 	bool "McSPI driver for OMAP"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 4e74617..b5c9ff1 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -43,6 +43,7 @@
 obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o
 obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o
+obj-$(CONFIG_OCTEON_SPI) += octeon_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_PL022_SPI) += pl022_spi.o
diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c
index 0454410..e77447b 100644
--- a/drivers/spi/mscc_bb_spi.c
+++ b/drivers/spi/mscc_bb_spi.c
@@ -11,7 +11,6 @@
 #include <log.h>
 #include <malloc.h>
 #include <spi.h>
-#include <dm.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c
new file mode 100644
index 0000000..83fe633
--- /dev/null
+++ b/drivers/spi/octeon_spi.c
@@ -0,0 +1,613 @@
+// SPDX-License-Identifier:    GPL-2.0
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <malloc.h>
+#include <spi.h>
+#include <spi-mem.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <asm/unaligned.h>
+#include <linux/bitfield.h>
+#include <linux/compat.h>
+#include <linux/delay.h>
+
+#define OCTEON_SPI_MAX_BYTES	9
+#define OCTEON_SPI_MAX_CLOCK_HZ	50000000
+
+#define OCTEON_SPI_NUM_CS	4
+
+#define OCTEON_SPI_CS_VALID(cs)	((cs) < OCTEON_SPI_NUM_CS)
+
+#define MPI_CFG			0x0000
+#define MPI_STS			0x0008
+#define MPI_TX			0x0010
+#define MPI_XMIT		0x0018
+#define MPI_WIDE_DAT		0x0040
+#define MPI_IO_CTL		0x0048
+#define MPI_DAT(X)		(0x0080 + ((X) << 3))
+#define MPI_WIDE_BUF(X)		(0x0800 + ((X) << 3))
+#define MPI_CYA_CFG		0x1000
+#define MPI_CLKEN		0x1080
+
+#define MPI_CFG_ENABLE		BIT_ULL(0)
+#define MPI_CFG_IDLELO		BIT_ULL(1)
+#define MPI_CFG_CLK_CONT	BIT_ULL(2)
+#define MPI_CFG_WIREOR		BIT_ULL(3)
+#define MPI_CFG_LSBFIRST	BIT_ULL(4)
+#define MPI_CFG_CS_STICKY	BIT_ULL(5)
+#define MPI_CFG_CSHI		BIT_ULL(7)
+#define MPI_CFG_IDLECLKS	GENMASK_ULL(9, 8)
+#define MPI_CFG_TRITX		BIT_ULL(10)
+#define MPI_CFG_CSLATE		BIT_ULL(11)
+#define MPI_CFG_CSENA0		BIT_ULL(12)
+#define MPI_CFG_CSENA1		BIT_ULL(13)
+#define MPI_CFG_CSENA2		BIT_ULL(14)
+#define MPI_CFG_CSENA3		BIT_ULL(15)
+#define MPI_CFG_CLKDIV		GENMASK_ULL(28, 16)
+#define MPI_CFG_LEGACY_DIS	BIT_ULL(31)
+#define MPI_CFG_IOMODE		GENMASK_ULL(35, 34)
+#define MPI_CFG_TB100_EN	BIT_ULL(49)
+
+#define MPI_DAT_DATA		GENMASK_ULL(7, 0)
+
+#define MPI_STS_BUSY		BIT_ULL(0)
+#define MPI_STS_MPI_INTR	BIT_ULL(1)
+#define MPI_STS_RXNUM		GENMASK_ULL(12, 8)
+
+#define MPI_TX_TOTNUM		GENMASK_ULL(4, 0)
+#define MPI_TX_TXNUM		GENMASK_ULL(12, 8)
+#define MPI_TX_LEAVECS		BIT_ULL(16)
+#define MPI_TX_CSID		GENMASK_ULL(21, 20)
+
+#define MPI_XMIT_TOTNUM		GENMASK_ULL(10, 0)
+#define MPI_XMIT_TXNUM		GENMASK_ULL(30, 20)
+#define MPI_XMIT_BUF_SEL	BIT_ULL(59)
+#define MPI_XMIT_LEAVECS	BIT_ULL(60)
+#define MPI_XMIT_CSID		GENMASK_ULL(62, 61)
+
+/* Used on Octeon TX2 */
+void board_acquire_flash_arb(bool acquire);
+
+/* Local driver data structure */
+struct octeon_spi {
+	void __iomem *base;	/* Register base address */
+	struct clk clk;
+	u32 clkdiv;		/* Clock divisor for device speed */
+};
+
+static u64 octeon_spi_set_mpicfg(struct udevice *dev)
+{
+	struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev);
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	u64 mpi_cfg;
+	uint max_speed = slave->max_hz;
+	bool cpha, cpol;
+
+	if (!max_speed)
+		max_speed = 12500000;
+	if (max_speed > OCTEON_SPI_MAX_CLOCK_HZ)
+		max_speed = OCTEON_SPI_MAX_CLOCK_HZ;
+
+	debug("\n slave params %d %d %d\n", slave->cs,
+	      slave->max_hz, slave->mode);
+	cpha = !!(slave->mode & SPI_CPHA);
+	cpol = !!(slave->mode & SPI_CPOL);
+
+	mpi_cfg = FIELD_PREP(MPI_CFG_CLKDIV, priv->clkdiv & 0x1fff) |
+		FIELD_PREP(MPI_CFG_CSHI, !!(slave->mode & SPI_CS_HIGH)) |
+		FIELD_PREP(MPI_CFG_LSBFIRST, !!(slave->mode & SPI_LSB_FIRST)) |
+		FIELD_PREP(MPI_CFG_WIREOR, !!(slave->mode & SPI_3WIRE)) |
+		FIELD_PREP(MPI_CFG_IDLELO, cpha != cpol) |
+		FIELD_PREP(MPI_CFG_CSLATE, cpha) |
+		MPI_CFG_CSENA0 | MPI_CFG_CSENA1 |
+		MPI_CFG_CSENA2 | MPI_CFG_CSENA1 |
+		MPI_CFG_ENABLE;
+
+	debug("\n mpi_cfg %llx\n", mpi_cfg);
+	return mpi_cfg;
+}
+
+/**
+ * Wait until the SPI bus is ready
+ *
+ * @param	dev	SPI device to wait for
+ */
+static void octeon_spi_wait_ready(struct udevice *dev)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	void *base = priv->base;
+	u64 mpi_sts;
+
+	do {
+		mpi_sts = readq(base + MPI_STS);
+		WATCHDOG_RESET();
+	} while (mpi_sts & MPI_STS_BUSY);
+
+	debug("%s(%s)\n", __func__, dev->name);
+}
+
+/**
+ * Claim the bus for a slave device
+ *
+ * @param	dev	SPI bus
+ *
+ * @return	0 for success, -EINVAL if chip select is invalid
+ */
+static int octeon_spi_claim_bus(struct udevice *dev)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	void *base = priv->base;
+	u64 mpi_cfg;
+
+	debug("\n\n%s(%s)\n", __func__, dev->name);
+	if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev)))
+		return -EINVAL;
+
+	if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2))
+		board_acquire_flash_arb(true);
+
+	mpi_cfg = readq(base + MPI_CFG);
+	mpi_cfg &= ~MPI_CFG_TRITX;
+	mpi_cfg |= MPI_CFG_ENABLE;
+	writeq(mpi_cfg, base + MPI_CFG);
+	mpi_cfg = readq(base + MPI_CFG);
+	udelay(5);	/** Wait for bus to settle */
+
+	return 0;
+}
+
+/**
+ * Release the bus to a slave device
+ *
+ * @param	dev	SPI bus
+ *
+ * @return	0 for success, -EINVAL if chip select is invalid
+ */
+static int octeon_spi_release_bus(struct udevice *dev)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	void *base = priv->base;
+	u64 mpi_cfg;
+
+	debug("%s(%s)\n\n", __func__, dev->name);
+	if (!OCTEON_SPI_CS_VALID(spi_chip_select(dev)))
+		return -EINVAL;
+
+	if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2))
+		board_acquire_flash_arb(false);
+
+	mpi_cfg = readq(base + MPI_CFG);
+	mpi_cfg &= ~MPI_CFG_ENABLE;
+	writeq(mpi_cfg, base + MPI_CFG);
+	mpi_cfg = readq(base + MPI_CFG);
+	udelay(1);
+
+	return 0;
+}
+
+static int octeon_spi_xfer(struct udevice *dev, unsigned int bitlen,
+			   const void *dout, void *din, unsigned long flags)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	void *base = priv->base;
+	u64 mpi_tx;
+	u64 mpi_cfg;
+	u64 wide_dat = 0;
+	int len = bitlen / 8;
+	int i;
+	const u8 *tx_data = dout;
+	u8 *rx_data = din;
+	int cs = spi_chip_select(dev);
+
+	if (!OCTEON_SPI_CS_VALID(cs))
+		return -EINVAL;
+
+	debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n",
+	      __func__, dev->name, bitlen, dout, din, flags, cs);
+
+	mpi_cfg = octeon_spi_set_mpicfg(dev);
+	if (mpi_cfg != readq(base + MPI_CFG)) {
+		writeq(mpi_cfg, base + MPI_CFG);
+		mpi_cfg = readq(base + MPI_CFG);
+		udelay(10);
+	}
+
+	debug("\n mpi_cfg upd %llx\n", mpi_cfg);
+
+	/*
+	 * Start by writing and reading 8 bytes at a time. While we can support
+	 * up to 10, it's easier to just use 8 with the MPI_WIDE_DAT register.
+	 */
+	while (len > 8) {
+		if (tx_data) {
+			wide_dat = get_unaligned((u64 *)tx_data);
+			debug("  tx: %016llx \t", (unsigned long long)wide_dat);
+			tx_data += 8;
+			writeq(wide_dat, base + MPI_WIDE_DAT);
+		}
+
+		mpi_tx = FIELD_PREP(MPI_TX_CSID, cs) |
+			FIELD_PREP(MPI_TX_LEAVECS, 1) |
+			FIELD_PREP(MPI_TX_TXNUM, tx_data ? 8 : 0) |
+			FIELD_PREP(MPI_TX_TOTNUM, 8);
+		writeq(mpi_tx, base + MPI_TX);
+
+		octeon_spi_wait_ready(dev);
+
+		debug("\n ");
+
+		if (rx_data) {
+			wide_dat = readq(base + MPI_WIDE_DAT);
+			debug("  rx: %016llx\t", (unsigned long long)wide_dat);
+			*(u64 *)rx_data = wide_dat;
+			rx_data += 8;
+		}
+		len -= 8;
+	}
+
+	debug("\n ");
+
+	/* Write and read the rest of the data */
+	if (tx_data) {
+		for (i = 0; i < len; i++) {
+			debug("  tx: %02x\n", *tx_data);
+			writeq(*tx_data++, base + MPI_DAT(i));
+		}
+	}
+
+	mpi_tx = FIELD_PREP(MPI_TX_CSID, cs) |
+		FIELD_PREP(MPI_TX_LEAVECS, !(flags & SPI_XFER_END)) |
+		FIELD_PREP(MPI_TX_TXNUM, tx_data ? len : 0) |
+		FIELD_PREP(MPI_TX_TOTNUM, len);
+	writeq(mpi_tx, base + MPI_TX);
+
+	octeon_spi_wait_ready(dev);
+
+	debug("\n ");
+
+	if (rx_data) {
+		for (i = 0; i < len; i++) {
+			*rx_data = readq(base + MPI_DAT(i)) & 0xff;
+			debug("  rx: %02x\n", *rx_data);
+			rx_data++;
+		}
+	}
+
+	return 0;
+}
+
+static int octeontx2_spi_xfer(struct udevice *dev, unsigned int bitlen,
+			      const void *dout, void *din, unsigned long flags)
+{
+	struct udevice *bus = dev_get_parent(dev);
+	struct octeon_spi *priv = dev_get_priv(bus);
+	void *base = priv->base;
+	u64 mpi_xmit;
+	u64 mpi_cfg;
+	u64 wide_dat = 0;
+	int len = bitlen / 8;
+	int rem;
+	int i;
+	const u8 *tx_data = dout;
+	u8 *rx_data = din;
+	int cs = spi_chip_select(dev);
+
+	if (!OCTEON_SPI_CS_VALID(cs))
+		return -EINVAL;
+
+	debug("\n %s(%s, %u, %p, %p, 0x%lx), cs: %d\n",
+	      __func__, dev->name, bitlen, dout, din, flags, cs);
+
+	mpi_cfg = octeon_spi_set_mpicfg(dev);
+
+	mpi_cfg |= MPI_CFG_TRITX | MPI_CFG_LEGACY_DIS | MPI_CFG_CS_STICKY |
+		MPI_CFG_TB100_EN;
+
+	mpi_cfg &= ~MPI_CFG_IOMODE;
+	if (flags & (SPI_TX_DUAL | SPI_RX_DUAL))
+		mpi_cfg |= FIELD_PREP(MPI_CFG_IOMODE, 2);
+	if (flags & (SPI_TX_QUAD | SPI_RX_QUAD))
+		mpi_cfg |= FIELD_PREP(MPI_CFG_IOMODE, 3);
+
+	if (mpi_cfg != readq(base + MPI_CFG)) {
+		writeq(mpi_cfg, base + MPI_CFG);
+		mpi_cfg = readq(base + MPI_CFG);
+		udelay(10);
+	}
+
+	debug("\n mpi_cfg upd %llx\n\n", mpi_cfg);
+
+	/* Start by writing or reading 1024 bytes at a time. */
+	while (len > 1024) {
+		if (tx_data) {
+			/* 8 bytes per iteration */
+			for (i = 0; i < 128; i++) {
+				wide_dat = get_unaligned((u64 *)tx_data);
+				debug("  tx: %016llx \t",
+				      (unsigned long long)wide_dat);
+				if ((i % 4) == 3)
+					debug("\n");
+				tx_data += 8;
+				writeq(wide_dat, base + MPI_WIDE_BUF(i));
+			}
+		}
+
+		mpi_xmit = FIELD_PREP(MPI_XMIT_CSID, cs) | MPI_XMIT_LEAVECS |
+			FIELD_PREP(MPI_XMIT_TXNUM, tx_data ? 1024 : 0) |
+			FIELD_PREP(MPI_XMIT_TOTNUM, 1024);
+		writeq(mpi_xmit, base + MPI_XMIT);
+
+		octeon_spi_wait_ready(dev);
+
+		debug("\n ");
+
+		if (rx_data) {
+			/* 8 bytes per iteration */
+			for (i = 0; i < 128; i++) {
+				wide_dat = readq(base + MPI_WIDE_BUF(i));
+				debug("  rx: %016llx\t",
+				      (unsigned long long)wide_dat);
+				if ((i % 4) == 3)
+					debug("\n");
+				*(u64 *)rx_data = wide_dat;
+				rx_data += 8;
+			}
+		}
+		len -= 1024;
+	}
+
+	if (tx_data) {
+		rem = len % 8;
+		/* 8 bytes per iteration */
+		for (i = 0; i < len / 8; i++) {
+			wide_dat = get_unaligned((u64 *)tx_data);
+			debug("  tx: %016llx \t",
+			      (unsigned long long)wide_dat);
+			if ((i % 4) == 3)
+				debug("\n");
+			tx_data += 8;
+			writeq(wide_dat, base + MPI_WIDE_BUF(i));
+		}
+		if (rem) {
+			memcpy(&wide_dat, tx_data, rem);
+			debug("  rtx: %016llx\t", wide_dat);
+			writeq(wide_dat, base + MPI_WIDE_BUF(i));
+		}
+	}
+
+	mpi_xmit = FIELD_PREP(MPI_XMIT_CSID, cs) |
+		FIELD_PREP(MPI_XMIT_LEAVECS, !(flags & SPI_XFER_END)) |
+		FIELD_PREP(MPI_XMIT_TXNUM, tx_data ? len : 0) |
+		FIELD_PREP(MPI_XMIT_TOTNUM, len);
+	writeq(mpi_xmit, base + MPI_XMIT);
+
+	octeon_spi_wait_ready(dev);
+
+	debug("\n ");
+
+	if (rx_data) {
+		rem = len % 8;
+		/* 8 bytes per iteration */
+		for (i = 0; i < len / 8; i++) {
+			wide_dat = readq(base + MPI_WIDE_BUF(i));
+			debug("  rx: %016llx\t",
+			      (unsigned long long)wide_dat);
+			if ((i % 4) == 3)
+				debug("\n");
+			*(u64 *)rx_data = wide_dat;
+			rx_data += 8;
+		}
+		if (rem) {
+			wide_dat = readq(base + MPI_WIDE_BUF(i));
+			debug("  rrx: %016llx\t",
+			      (unsigned long long)wide_dat);
+			memcpy(rx_data, &wide_dat, rem);
+			rx_data += rem;
+		}
+	}
+
+	return 0;
+}
+
+static bool octeon_spi_supports_op(struct spi_slave *slave,
+				   const struct spi_mem_op *op)
+{
+	/* For now, support only below combinations
+	 * 1-1-1
+	 * 1-1-2 1-2-2
+	 * 1-1-4 1-4-4
+	 */
+	if (op->cmd.buswidth != 1)
+		return false;
+	return true;
+}
+
+static int octeon_spi_exec_op(struct spi_slave *slave,
+			      const struct spi_mem_op *op)
+{
+	unsigned long flags = SPI_XFER_BEGIN;
+	const void *tx;
+	void *rx;
+	u8 opcode, *buf;
+	u8 *addr;
+	int i, temp, ret;
+
+	if (op->cmd.buswidth != 1)
+		return -ENOTSUPP;
+
+	/* Send CMD */
+	i = 0;
+	opcode = op->cmd.opcode;
+
+	if (!op->data.nbytes && !op->addr.nbytes && !op->dummy.nbytes)
+		flags |= SPI_XFER_END;
+
+	ret = octeontx2_spi_xfer(slave->dev, 8, (void *)&opcode, NULL, flags);
+	if (ret < 0)
+		return ret;
+
+	/* Send Address and dummy */
+	if (op->addr.nbytes) {
+		/* Alloc buffer for address+dummy */
+		buf = (u8 *)calloc(1, op->addr.nbytes + op->dummy.nbytes);
+		if (!buf) {
+			printf("%s Out of memory\n", __func__);
+			return -ENOMEM;
+		}
+		addr = (u8 *)&op->addr.val;
+		for (temp = 0; temp < op->addr.nbytes; temp++)
+			buf[i++] = *(u8 *)(addr + op->addr.nbytes - 1 - temp);
+		for (temp = 0; temp < op->dummy.nbytes; temp++)
+			buf[i++] = 0xff;
+		if (op->addr.buswidth == 2)
+			flags |= SPI_RX_DUAL;
+		if (op->addr.buswidth == 4)
+			flags |= SPI_RX_QUAD;
+
+		if (!op->data.nbytes)
+			flags |= SPI_XFER_END;
+		ret = octeontx2_spi_xfer(slave->dev, i * 8, (void *)buf, NULL,
+					 flags);
+		free(buf);
+		if (ret < 0)
+			return ret;
+	}
+	if (!op->data.nbytes)
+		return 0;
+
+	/* Send/Receive Data */
+	flags |= SPI_XFER_END;
+	if (op->data.buswidth == 2)
+		flags |= SPI_RX_DUAL;
+	if (op->data.buswidth == 4)
+		flags |= SPI_RX_QUAD;
+
+	rx = (op->data.dir == SPI_MEM_DATA_IN) ? op->data.buf.in : NULL;
+	tx = (op->data.dir == SPI_MEM_DATA_OUT) ? op->data.buf.out : NULL;
+
+	ret = octeontx2_spi_xfer(slave->dev, (op->data.nbytes * 8), tx, rx,
+				 flags);
+	return ret;
+}
+
+static const struct spi_controller_mem_ops octeontx2_spi_mem_ops = {
+	.supports_op = octeon_spi_supports_op,
+	.exec_op = octeon_spi_exec_op,
+};
+
+/**
+ * Set the speed of the SPI bus
+ *
+ * @param	bus	bus to set
+ * @param	max_hz	maximum speed supported
+ */
+static int octeon_spi_set_speed(struct udevice *bus, uint max_hz)
+{
+	struct octeon_spi *priv = dev_get_priv(bus);
+	ulong clk_rate;
+	u32 calc_hz;
+
+	if (max_hz > OCTEON_SPI_MAX_CLOCK_HZ)
+		max_hz = OCTEON_SPI_MAX_CLOCK_HZ;
+
+	clk_rate = clk_get_rate(&priv->clk);
+	if (IS_ERR_VALUE(clk_rate))
+		return -EINVAL;
+
+	debug("%s(%s, %u, %lu)\n", __func__, bus->name, max_hz, clk_rate);
+
+	priv->clkdiv = clk_rate / (2 * max_hz);
+	while (1) {
+		calc_hz = clk_rate / (2 * priv->clkdiv);
+		if (calc_hz <= max_hz)
+			break;
+		priv->clkdiv += 1;
+	}
+
+	if (priv->clkdiv > 8191)
+		return -EINVAL;
+
+	debug("%s: clkdiv=%d\n", __func__, priv->clkdiv);
+
+	return 0;
+}
+
+static int octeon_spi_set_mode(struct udevice *bus, uint mode)
+{
+	/* We don't set it here */
+	return 0;
+}
+
+static struct dm_spi_ops octeon_spi_ops = {
+	.claim_bus	= octeon_spi_claim_bus,
+	.release_bus	= octeon_spi_release_bus,
+	.set_speed	= octeon_spi_set_speed,
+	.set_mode	= octeon_spi_set_mode,
+	.xfer		= octeon_spi_xfer,
+};
+
+static int octeon_spi_probe(struct udevice *dev)
+{
+	struct octeon_spi *priv = dev_get_priv(dev);
+	int ret;
+
+	/* Octeon TX & TX2 use PCI based probing */
+	if (device_is_compatible(dev, "cavium,thunder-8190-spi")) {
+		pci_dev_t bdf = dm_pci_get_bdf(dev);
+
+		debug("SPI PCI device: %x\n", bdf);
+		priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
+					    PCI_REGION_MEM);
+		/* Add base offset */
+		priv->base += 0x1000;
+
+		/*
+		 * Octeon TX2 needs a different xfer function and supports
+		 * mem_ops
+		 */
+		if (device_is_compatible(dev, "cavium,thunderx-spi")) {
+			octeon_spi_ops.xfer = octeontx2_spi_xfer;
+			octeon_spi_ops.mem_ops = &octeontx2_spi_mem_ops;
+		}
+	} else {
+		priv->base = dev_remap_addr(dev);
+	}
+
+	ret = clk_get_by_index(dev, 0, &priv->clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_enable(&priv->clk);
+	if (ret)
+		return ret;
+
+	debug("SPI bus %s %d at %p\n", dev->name, dev->seq, priv->base);
+
+	return 0;
+}
+
+static const struct udevice_id octeon_spi_ids[] = {
+	/* MIPS Octeon */
+	{ .compatible = "cavium,octeon-3010-spi" },
+	/* ARM Octeon TX / TX2 */
+	{ .compatible = "cavium,thunder-8190-spi" },
+	{ }
+};
+
+U_BOOT_DRIVER(octeon_spi) = {
+	.name			= "spi_octeon",
+	.id			= UCLASS_SPI,
+	.of_match		= octeon_spi_ids,
+	.probe			= octeon_spi_probe,
+	.priv_auto_alloc_size	= sizeof(struct octeon_spi),
+	.ops			= &octeon_spi_ops,
+};
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index d344701..c095ae9 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -13,9 +13,14 @@
 #include <linux/pm_runtime.h>
 #include "internals.h"
 #else
-#include <dm/device_compat.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <malloc.h>
+#include <spi.h>
 #include <spi.h>
 #include <spi-mem.h>
+#include <dm/device_compat.h>
 #endif
 
 #ifndef __UBOOT__
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index 0e0ce25..c7345d9 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dm/device_compat.h>
 #include <malloc.h>
+#include <spi.h>
 #include <spi-mem.h>
 #include <wait_bit.h>
 #include <asm/io.h>
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 001f070..a53b941 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -9,8 +9,10 @@
 
 #include <common.h>
 #include <clk.h>
+#include <dm.h>
 #include <log.h>
 #include <reset.h>
+#include <spi.h>
 #include <spi-mem.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 1a7bb7b..bad1bf7 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ufs.h>
+#include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <linux/err.h>
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 87b4e5f..92b7e9f 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -19,9 +19,10 @@
 #include <malloc.h>
 #include <hexdump.h>
 #include <scsi.h>
+#include <asm/io.h>
+#include <asm/dma-mapping.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
-
 #include <linux/dma-mapping.h>
 
 #include "ufs.h"
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index e0bde93..069888f 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -2,11 +2,10 @@
 #ifndef __UFS_H
 #define __UFS_H
 
-#include <asm/io.h>
-#include <dm.h>
-
 #include "unipro.h"
 
+struct udevice;
+
 #define UFS_CDB_SIZE	16
 #define UPIU_TRANSACTION_UIC_CMD 0x1F
 #define UIC_CMD_SIZE (sizeof(u32) * 4)
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 988071a..8ac2f0a 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -1,5 +1,6 @@
 #include <common.h>
 #include <console.h>
+#include <dm.h>
 #include <malloc.h>
 #include <watchdog.h>
 #include <linux/delay.h>
@@ -452,3 +453,39 @@
 
 	return *musbp;
 }
+
+#if CONFIG_IS_ENABLED(DM_USB)
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+	struct udevice *parent = udev->dev->parent;
+
+	/*
+	 * When called from usb-uclass.c: usb_scan_device() udev->dev points
+	 * to the parent udevice, not the actual udevice belonging to the
+	 * udev as the device is not instantiated yet.
+	 *
+	 * If dev is an usb-bus, then we are called from usb_scan_device() for
+	 * an usb-device plugged directly into the root port, return NULL.
+	 */
+	if (device_get_uclass_id(udev->dev) == UCLASS_USB)
+		return NULL;
+
+	/*
+	 * If these 2 are not the same we are being called from
+	 * usb_scan_device() and udev itself is the parent.
+	 */
+	if (dev_get_parent_priv(udev->dev) != udev)
+		return udev;
+
+	/* We are being called normally, use the parent pointer */
+	if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
+		return dev_get_parent_priv(parent);
+
+	return NULL;
+}
+#else
+struct usb_device *usb_dev_get_parent(struct usb_device *udev)
+{
+	return udev->parent;
+}
+#endif
diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c
index 74a841a..2fbe9be 100644
--- a/drivers/usb/musb-new/pic32.c
+++ b/drivers/usb/musb-new/pic32.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
diff --git a/drivers/usb/musb-new/usb-compat.h b/drivers/usb/musb-new/usb-compat.h
index f2c18ad..1c66c4f 100644
--- a/drivers/usb/musb-new/usb-compat.h
+++ b/drivers/usb/musb-new/usb-compat.h
@@ -1,9 +1,10 @@
 #ifndef __USB_COMPAT_H__
 #define __USB_COMPAT_H__
 
-#include <dm.h>
 #include "usb.h"
 
+struct udevice;
+
 struct usb_hcd {
 	void *hcd_priv;
 };
@@ -67,40 +68,12 @@
 	return 0;
 }
 
-#if CONFIG_IS_ENABLED(DM_USB)
-static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
-{
-	struct udevice *parent = udev->dev->parent;
-
-	/*
-	 * When called from usb-uclass.c: usb_scan_device() udev->dev points
-	 * to the parent udevice, not the actual udevice belonging to the
-	 * udev as the device is not instantiated yet.
-	 *
-	 * If dev is an usb-bus, then we are called from usb_scan_device() for
-	 * an usb-device plugged directly into the root port, return NULL.
-	 */
-	if (device_get_uclass_id(udev->dev) == UCLASS_USB)
-		return NULL;
-
-	/*
-	 * If these 2 are not the same we are being called from
-	 * usb_scan_device() and udev itself is the parent.
-	 */
-	if (dev_get_parent_priv(udev->dev) != udev)
-		return udev;
-
-	/* We are being called normally, use the parent pointer */
-	if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
-		return dev_get_parent_priv(parent);
-
-	return NULL;
-}
-#else
-static inline struct usb_device *usb_dev_get_parent(struct usb_device *dev)
-{
-	return dev->parent;
-}
-#endif
+/**
+ * usb_dev_get_parent() - Get the parent of a USB device
+ *
+ * @udev: USB struct containing information about the device
+ * @return associated device for which udev == dev_get_parent_priv(dev)
+ */
+struct usb_device *usb_dev_get_parent(struct usb_device *udev);
 
 #endif /* __USB_COMPAT_H__ */
diff --git a/include/dm-demo.h b/include/dm-demo.h
index c9a82c7..7b6d0d8 100644
--- a/include/dm-demo.h
+++ b/include/dm-demo.h
@@ -6,8 +6,6 @@
 #ifndef __DM_DEMO_H
 #define __DM_DEMO_H
 
-#include <dm.h>
-
 /**
  * struct dm_demo_pdata - configuration data for demo instance
  *
diff --git a/include/dm.h b/include/dm.h
index 2e1afda..a1b8416 100644
--- a/include/dm.h
+++ b/include/dm.h
@@ -3,6 +3,10 @@
  * Copyright (c) 2013 Google, Inc
  */
 
+#ifdef _DM_H_
+#warning "Suspect dm.h is included from a header file - please fix"
+#endif
+
 #ifndef _DM_H_
 #define _DM_H_
 
diff --git a/include/dm/read.h b/include/dm/read.h
index b1a6108..487ec9e 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -11,6 +11,7 @@
 
 #include <linux/errno.h>
 
+#include <dm/device.h>
 #include <dm/fdtaddr.h>
 #include <dm/ofnode.h>
 #include <dm/uclass.h>
diff --git a/include/dm/test.h b/include/dm/test.h
index d39686c..2c92d41 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -6,9 +6,6 @@
 #ifndef __DM_TEST_H
 #define __DM_TEST_H
 
-#include <dm.h>
-#include <test/test.h>
-
 /**
  * struct dm_test_cdata - configuration data for test instance
  *
diff --git a/include/dt-bindings/clock/octeon-clock.h b/include/dt-bindings/clock/octeon-clock.h
new file mode 100644
index 0000000..34e6a3b
--- /dev/null
+++ b/include/dt-bindings/clock/octeon-clock.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Stefan Roese <sr@denx.de>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H
+#define __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H
+
+#define OCTEON_CLK_CORE		0
+#define OCTEON_CLK_IO		1
+
+#endif /* __DT_BINDINGS_CLOCK_OCTEON_CLOCK_H */
diff --git a/include/efi_driver.h b/include/efi_driver.h
index 840483a..2b62219 100644
--- a/include/efi_driver.h
+++ b/include/efi_driver.h
@@ -8,8 +8,6 @@
 #ifndef _EFI_DRIVER_H
 #define _EFI_DRIVER_H 1
 
-#include <common.h>
-#include <dm.h>
 #include <efi_loader.h>
 
 /*
diff --git a/include/eth_phy.h b/include/eth_phy.h
index 19c4965..be6c881 100644
--- a/include/eth_phy.h
+++ b/include/eth_phy.h
@@ -6,9 +6,10 @@
 #ifndef _eth_phy_h_
 #define _eth_phy_h_
 
-#include <dm.h>
 #include <phy.h>
 
+struct udevice;
+
 int eth_phy_binds_nodes(struct udevice *eth_dev);
 int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus);
 struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev);
diff --git a/include/fs_loader.h b/include/fs_loader.h
index b728c06..1b3c580 100644
--- a/include/fs_loader.h
+++ b/include/fs_loader.h
@@ -6,7 +6,7 @@
 #ifndef _FS_LOADER_H_
 #define _FS_LOADER_H_
 
-#include <dm.h>
+struct udevice;
 
 /**
  * struct phandle_part - A place for storing phandle of node and its partition
diff --git a/include/kendryte/bypass.h b/include/kendryte/bypass.h
index a081cbd..ab85bbc 100644
--- a/include/kendryte/bypass.h
+++ b/include/kendryte/bypass.h
@@ -5,7 +5,7 @@
 #ifndef K210_BYPASS_H
 #define K210_BYPASS_H
 
-#include <clk.h>
+struct clk;
 
 struct k210_bypass {
 	struct clk clk;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8a20743..79dce8f 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -9,12 +9,13 @@
 #ifndef __LINUX_CLK_PROVIDER_H
 #define __LINUX_CLK_PROVIDER_H
 
-#include <dm.h>
 #include <linux/bitops.h>
 #include <linux/err.h>
 #include <clk-uclass.h>
 #include <linux/err.h>
 
+struct udevice;
+
 static inline void clk_dm(ulong id, struct clk *clk)
 {
 	if (!IS_ERR(clk))
@@ -188,8 +189,5 @@
 const char *clk_hw_get_name(const struct clk *hw);
 ulong clk_generic_get_rate(struct clk *clk);
 
-static inline struct clk *dev_get_clk_ptr(struct udevice *dev)
-{
-	return (struct clk *)dev_get_uclass_priv(dev);
-}
+struct clk *dev_get_clk_ptr(struct udevice *dev);
 #endif /* __LINUX_CLK_PROVIDER_H */
diff --git a/include/phy.h b/include/phy.h
index fedd146..1dbbf65 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -9,14 +9,17 @@
 #ifndef _PHY_H
 #define _PHY_H
 
-#include <dm.h>
+#include <log.h>
+#include <phy_interface.h>
+#include <dm/ofnode.h>
+#include <dm/read.h>
 #include <linux/errno.h>
 #include <linux/list.h>
 #include <linux/mii.h>
 #include <linux/ethtool.h>
 #include <linux/mdio.h>
-#include <log.h>
-#include <phy_interface.h>
+
+struct udevice;
 
 #define PHY_FIXED_ID		0xa5a55a5a
 #define PHY_NCSI_ID            0xbeefcafe
diff --git a/include/phy_interface.h b/include/phy_interface.h
index 882e4af..841ade3 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -10,6 +10,8 @@
 #ifndef _PHY_INTERFACE_H
 #define _PHY_INTERFACE_H
 
+#include <string.h>
+
 typedef enum {
 	PHY_INTERFACE_MODE_MII,
 	PHY_INTERFACE_MODE_GMII,
diff --git a/include/spi-mem.h b/include/spi-mem.h
index 893f7bd..ca0f55c 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -11,10 +11,7 @@
 #ifndef __UBOOT_SPI_MEM_H
 #define __UBOOT_SPI_MEM_H
 
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <spi.h>
+struct udevice;
 
 #define SPI_MEM_OP_CMD(__opcode, __buswidth)			\
 	{							\
diff --git a/include/spi.h b/include/spi.h
index 98ba9e7..ef8c1f6 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -146,8 +146,6 @@
 #define SPI_XFER_BEGIN		BIT(0)	/* Assert CS before transfer */
 #define SPI_XFER_END		BIT(1)	/* Deassert CS after transfer */
 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
-#define SPI_XFER_MMAP		BIT(2)	/* Memory Mapped start */
-#define SPI_XFER_MMAP_END	BIT(3)	/* Memory Mapped End */
 };
 
 /**
diff --git a/include/spi_flash.h b/include/spi_flash.h
index b336619..85cae32 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -9,10 +9,11 @@
 #ifndef _SPI_FLASH_H_
 #define _SPI_FLASH_H_
 
-#include <dm.h>	/* Because we dereference struct udevice here */
 #include <linux/types.h>
 #include <linux/mtd/spi-nor.h>
 
+struct udevice;
+
 /* by default ENV use the same parameters than SF command */
 #ifndef CONFIG_ENV_SPI_BUS
 # define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
diff --git a/include/test/ut.h b/include/test/ut.h
index 99bbb12..6ab2f88 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -11,6 +11,7 @@
 #include <command.h>
 #include <hexdump.h>
 #include <linux/err.h>
+#include <test/test.h>
 
 struct unit_test_state;
 
diff --git a/include/thermal.h b/include/thermal.h
index 11d7525..52a3317 100644
--- a/include/thermal.h
+++ b/include/thermal.h
@@ -7,7 +7,7 @@
 #ifndef _THERMAL_H_
 #define _THERMAL_H_
 
-#include <dm.h>
+struct udevice;
 
 int thermal_get_temp(struct udevice *dev, int *temp);
 
diff --git a/include/w1.h b/include/w1.h
index b958b1c..77f439e 100644
--- a/include/w1.h
+++ b/include/w1.h
@@ -8,7 +8,7 @@
 #ifndef __W1_H
 #define __W1_H
 
-#include <dm.h>
+struct udevice;
 
 #define W1_FAMILY_DS24B33	0x23
 #define W1_FAMILY_DS2431	0x2d
diff --git a/include/wdt.h b/include/wdt.h
index d2ccfbc..bc242c2 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -6,9 +6,7 @@
 #ifndef _WDT_H_
 #define _WDT_H_
 
-#include <dm.h>
-#include <log.h>
-#include <dm/read.h>
+struct udevice;
 
 /*
  * Implement a simple watchdog uclass. Watchdog is basically a timer that
diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c
index e7d8745..0e72a68 100644
--- a/lib/efi_driver/efi_block_device.c
+++ b/lib/efi_driver/efi_block_device.c
@@ -30,6 +30,7 @@
 
 #include <common.h>
 #include <blk.h>
+#include <dm.h>
 #include <efi_driver.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index 04e4e45..0cf74b0 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -17,6 +17,8 @@
  * controllers.
  */
 
+#include <common.h>
+#include <dm.h>
 #include <efi_driver.h>
 #include <log.h>
 #include <malloc.h>
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index 340469b..992d188 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <bootstage.h>
 #include <command.h>
+#include <dm.h>
 #include <env.h>
 #include <log.h>
 #include <net.h>
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 238f12c..3932362 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2322,7 +2322,7 @@
 
 # Checks specific to U-Boot
 sub u_boot_line {
-	my ($realfile, $line,  $herecurr) = @_;
+	my ($realfile, $line, $rawline, $herecurr) = @_;
 
 	# ask for a test if a new uclass ID is added
 	if ($realfile =~ /uclass-id.h/ && $line =~ /^\+/) {
@@ -2353,6 +2353,12 @@
 		ERROR("DEFINE_CONFIG_CMD",
 		      "All commands are managed by Kconfig\n" . $herecurr);
 	}
+
+	# Don't put common.h and dm.h in header files
+	if ($realfile =~ /\.h$/ && $rawline =~ /^\+#include\s*<(common|dm)\.h>*/) {
+		ERROR("BARRED_INCLUDE_IN_HDR",
+		      "Avoid including common.h and dm.h in header files\n" . $herecurr);
+	}
 }
 
 sub process {
@@ -3296,7 +3302,7 @@
 		}
 
 		if ($u_boot) {
-			u_boot_line($realfile, $line,  $herecurr);
+			u_boot_line($realfile, $line, $rawline, $herecurr);
 		}
 
 # check we are in a valid source file C or perl if not then ignore this hunk
diff --git a/test/dm/adc.c b/test/dm/adc.c
index da7bd4b..7fa1d48 100644
--- a/test/dm/adc.c
+++ b/test/dm/adc.c
@@ -17,6 +17,7 @@
 #include <power/regulator.h>
 #include <power/sandbox_pmic.h>
 #include <sandbox-adc.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_adc_bind(struct unit_test_state *uts)
diff --git a/test/dm/audio.c b/test/dm/audio.c
index 77c3a36..4bb86e3 100644
--- a/test/dm/audio.c
+++ b/test/dm/audio.c
@@ -8,6 +8,7 @@
 #include <audio_codec.h>
 #include <dm.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 #include <asm/test.h>
 
diff --git a/test/dm/axi.c b/test/dm/axi.c
index e1155a5..5b1bbab 100644
--- a/test/dm/axi.c
+++ b/test/dm/axi.c
@@ -8,9 +8,10 @@
 #include <axi.h>
 #include <dm.h>
 #include <log.h>
-#include <dm/test.h>
-#include <test/ut.h>
 #include <asm/axi.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 /* Test that sandbox AXI works correctly */
 static int dm_test_axi_base(struct unit_test_state *uts)
diff --git a/test/dm/blk.c b/test/dm/blk.c
index 94b2855..80d671e 100644
--- a/test/dm/blk.c
+++ b/test/dm/blk.c
@@ -9,6 +9,7 @@
 #include <usb.h>
 #include <asm/state.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/board.c b/test/dm/board.c
index 5472c65..ff50d6c 100644
--- a/test/dm/board.c
+++ b/test/dm/board.c
@@ -9,6 +9,7 @@
 #include <log.h>
 #include <dm/test.h>
 #include <board.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 #include "../../drivers/board/sandbox.h"
diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c
index be0c278..9fd3751 100644
--- a/test/dm/bootcount.c
+++ b/test/dm/bootcount.c
@@ -9,6 +9,7 @@
 #include <log.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_bootcount(struct unit_test_state *uts)
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 73eb3ae..0707267 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -14,6 +14,7 @@
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
 #include <dm/util.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 48fc3dd..7a39760 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -12,6 +12,7 @@
 #include <dm/test.h>
 #include <dm/device-internal.h>
 #include <linux/err.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of the clk uclass */
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index ae3a4d8..da2292a 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -11,6 +11,7 @@
 #include <dm/test.h>
 #include <dm/uclass.h>
 #include <linux/err.h>
+#include <test/test.h>
 #include <test/ut.h>
 #include <sandbox-clk.h>
 
diff --git a/test/dm/core.c b/test/dm/core.c
index d20c484..9b73ec3 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -16,6 +16,7 @@
 #include <dm/util.h>
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index 46683d8..0a75c91 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -10,6 +10,7 @@
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
 #include <cpu.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_cpu(struct unit_test_state *uts)
diff --git a/test/dm/dma.c b/test/dm/dma.c
index 317ed4f..1cdc813 100644
--- a/test/dm/dma.c
+++ b/test/dm/dma.c
@@ -11,6 +11,7 @@
 #include <malloc.h>
 #include <dm/test.h>
 #include <dma.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_dma_m2m(struct unit_test_state *uts)
diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c
index 59fcd55..97917a1 100644
--- a/test/dm/dsi_host.c
+++ b/test/dm/dsi_host.c
@@ -10,6 +10,7 @@
 #include <asm/state.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_dsi_host_phy_init(void *priv_data)
diff --git a/test/dm/eth.c b/test/dm/eth.c
index b58c964..1a3eb18 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -13,10 +13,11 @@
 #include <log.h>
 #include <malloc.h>
 #include <net.h>
+#include <asm/eth.h>
 #include <dm/test.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
-#include <asm/eth.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 #define DM_TEST_ETH_NUM		4
diff --git a/test/dm/firmware.c b/test/dm/firmware.c
index 60fdcbb..2b4f49a 100644
--- a/test/dm/firmware.c
+++ b/test/dm/firmware.c
@@ -8,6 +8,7 @@
 #include <syscon.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of firmware probe */
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index b7ee8fc..f3c467e 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -9,10 +9,11 @@
 #include <log.h>
 #include <malloc.h>
 #include <acpi/acpi_device.h>
+#include <asm/gpio.h>
 #include <dm/root.h>
 #include <dm/test.h>
 #include <dm/util.h>
-#include <asm/gpio.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that sandbox GPIOs work correctly */
diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c
index 09ec38b..49c52bc 100644
--- a/test/dm/hwspinlock.c
+++ b/test/dm/hwspinlock.c
@@ -9,6 +9,7 @@
 #include <asm/state.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that hwspinlock driver functions are called */
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index 2025c42..25b2c7c 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -16,6 +16,7 @@
 #include <dm/uclass-internal.h>
 #include <dm/util.h>
 #include <hexdump.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static const int busnum;
diff --git a/test/dm/i2s.c b/test/dm/i2s.c
index 49ebc35..7a017be 100644
--- a/test/dm/i2s.c
+++ b/test/dm/i2s.c
@@ -7,9 +7,10 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
-#include <dm/test.h>
-#include <test/ut.h>
 #include <asm/test.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 /* Basic test of the i2s codec uclass */
 static int dm_test_i2s(struct unit_test_state *uts)
diff --git a/test/dm/led.c b/test/dm/led.c
index 00de7b3..3d5ad93 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -8,6 +8,7 @@
 #include <led.h>
 #include <asm/gpio.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of the led uclass */
diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c
index e6c521b..e9c8ab1 100644
--- a/test/dm/mailbox.c
+++ b/test/dm/mailbox.c
@@ -8,6 +8,7 @@
 #include <malloc.h>
 #include <dm/test.h>
 #include <asm/mbox.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_mailbox(struct unit_test_state *uts)
diff --git a/test/dm/mdio.c b/test/dm/mdio.c
index ba1b54f..758bbb2 100644
--- a/test/dm/mdio.c
+++ b/test/dm/mdio.c
@@ -7,10 +7,11 @@
 #include <common.h>
 #include <dm.h>
 #include <log.h>
-#include <dm/test.h>
-#include <misc.h>
-#include <test/ut.h>
 #include <miiphy.h>
+#include <misc.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 /* macros copied over from mdio_sandbox.c */
 #define SANDBOX_PHY_ADDR	5
diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c
index f962e09..0b3f85a 100644
--- a/test/dm/mdio_mux.c
+++ b/test/dm/mdio_mux.c
@@ -6,10 +6,11 @@
 
 #include <common.h>
 #include <dm.h>
-#include <dm/test.h>
-#include <misc.h>
-#include <test/ut.h>
 #include <miiphy.h>
+#include <misc.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 /* macros copied over from mdio_sandbox.c */
 #define SANDBOX_PHY_ADDR	5
diff --git a/test/dm/misc.c b/test/dm/misc.c
index 26fd6ac..6410709 100644
--- a/test/dm/misc.c
+++ b/test/dm/misc.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <dm/test.h>
 #include <misc.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_misc(struct unit_test_state *uts)
diff --git a/test/dm/mmc.c b/test/dm/mmc.c
index 49402b9..8e1fd3f 100644
--- a/test/dm/mmc.c
+++ b/test/dm/mmc.c
@@ -8,6 +8,7 @@
 #include <mmc.h>
 #include <part.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /*
diff --git a/test/dm/nop.c b/test/dm/nop.c
index 2df29f3..8b3b646 100644
--- a/test/dm/nop.c
+++ b/test/dm/nop.c
@@ -13,6 +13,7 @@
 #include <dm/device.h>
 #include <dm/test.h>
 #include <misc.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int noptest_bind(struct udevice *parent)
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 1114f34..e01acc4 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -5,6 +5,7 @@
 #include <log.h>
 #include <dm/of_extra.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_ofnode_compatible(struct unit_test_state *uts)
diff --git a/test/dm/osd.c b/test/dm/osd.c
index 5739dfa..8784867 100644
--- a/test/dm/osd.c
+++ b/test/dm/osd.c
@@ -7,10 +7,11 @@
 #include <common.h>
 #include <display_options.h>
 #include <dm.h>
-#include <dm/test.h>
-#include <test/ut.h>
 #include <video_osd.h>
 #include <asm/test.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 #include "../../drivers/video/sandbox_osd.h"
 
diff --git a/test/dm/panel.c b/test/dm/panel.c
index 7e4ebd6..410e8f3 100644
--- a/test/dm/panel.c
+++ b/test/dm/panel.c
@@ -14,8 +14,9 @@
 #include <asm/gpio.h>
 #include <asm/test.h>
 #include <dm/test.h>
-#include <test/ut.h>
 #include <power/regulator.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 /* Basic test of the panel uclass */
 static int dm_test_panel(struct unit_test_state *uts)
diff --git a/test/dm/pch.c b/test/dm/pch.c
index 54e33d1..bf17a31 100644
--- a/test/dm/pch.c
+++ b/test/dm/pch.c
@@ -8,6 +8,7 @@
 #include <pch.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that sandbox PCH works correctly */
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 39e82b3..a492fc0 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that sandbox PCI works correctly */
diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c
index 101f861..a29d00e 100644
--- a/test/dm/pci_ep.c
+++ b/test/dm/pci_ep.c
@@ -5,12 +5,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <hexdump.h>
+#include <pci_ep.h>
 #include <asm/io.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
-#include <hexdump.h>
-#include <pci_ep.h>
 
 /* Test that sandbox PCI EP works correctly */
 static int dm_test_pci_ep_base(struct unit_test_state *uts)
diff --git a/test/dm/phy.c b/test/dm/phy.c
index 99f0119..1a59899 100644
--- a/test/dm/phy.c
+++ b/test/dm/phy.c
@@ -9,6 +9,7 @@
 #include <generic-phy.h>
 #include <log.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of the phy uclass */
diff --git a/test/dm/pmic.c b/test/dm/pmic.c
index b582329..8c2766a 100644
--- a/test/dm/pmic.c
+++ b/test/dm/pmic.c
@@ -10,16 +10,17 @@
 #include <errno.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <fsl_pmic.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/root.h>
-#include <dm/util.h>
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
+#include <dm/util.h>
 #include <power/pmic.h>
 #include <power/sandbox_pmic.h>
+#include <test/test.h>
 #include <test/ut.h>
-#include <fsl_pmic.h>
 
 /* Test PMIC get method */
 
diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c
index 8baf5d0..52f88c5 100644
--- a/test/dm/power-domain.c
+++ b/test/dm/power-domain.c
@@ -8,6 +8,7 @@
 #include <malloc.h>
 #include <dm/test.h>
 #include <asm/power-domain.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* This must match the specifier for power-domains in the DT node */
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
index b52ee21..8cc911e 100644
--- a/test/dm/pwm.c
+++ b/test/dm/pwm.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <pwm.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Basic test of the pwm uclass */
diff --git a/test/dm/ram.c b/test/dm/ram.c
index 3efdb6b..2456466 100644
--- a/test/dm/ram.c
+++ b/test/dm/ram.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <ram.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 809494d..42cc4cb 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -12,6 +12,7 @@
 #include <asm/test.h>
 #include <dm/test.h>
 #include <linux/err.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of register maps */
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index ca916ee..f412ec2 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -20,6 +20,7 @@
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/sandbox_pmic.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 enum {
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
index 9511c7d..c6bf2c4 100644
--- a/test/dm/remoteproc.c
+++ b/test/dm/remoteproc.c
@@ -10,7 +10,9 @@
 #include <remoteproc.h>
 #include <asm/io.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
+
 /**
  * dm_test_remoteproc_base() - test the operations after initializations
  * @uts:	unit test state
diff --git a/test/dm/reset.c b/test/dm/reset.c
index 871d640..8232807 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -10,6 +10,7 @@
 #include <reset.h>
 #include <dm/test.h>
 #include <asm/reset.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* This must match the specifier for mbox-names="test" in the DT node */
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
index dd037a6..42a9195 100644
--- a/test/dm/rtc.c
+++ b/test/dm/rtc.c
@@ -14,6 +14,7 @@
 #include <asm/rtc.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Simple RTC sanity check */
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 6237693..a1b122e 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -8,6 +8,7 @@
 #include <serial.h>
 #include <dm.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int dm_test_serial(struct unit_test_state *uts)
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 9e7dead..0f2808f 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -15,6 +15,7 @@
 #include <asm/test.h>
 #include <dm/test.h>
 #include <dm/util.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Simple test of sandbox SPI flash */
diff --git a/test/dm/smem.c b/test/dm/smem.c
index 4099a5f..21dd96e 100644
--- a/test/dm/smem.c
+++ b/test/dm/smem.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <smem.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Basic test of the smem uclass */
diff --git a/test/dm/sound.c b/test/dm/sound.c
index aa5368f..9cb9961 100644
--- a/test/dm/sound.c
+++ b/test/dm/sound.c
@@ -9,6 +9,7 @@
 #include <sound.h>
 #include <dm/test.h>
 #include <test/ut.h>
+#include <test/test.h>
 #include <asm/test.h>
 
 /* Basic test of the sound codec uclass */
diff --git a/test/dm/spi.c b/test/dm/spi.c
index ff2cddd..10b89e7 100644
--- a/test/dm/spi.c
+++ b/test/dm/spi.c
@@ -13,6 +13,7 @@
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
 #include <dm/util.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that we can find buses and chip-selects */
diff --git a/test/dm/spmi.c b/test/dm/spmi.c
index 668b7e1..4aae1f1 100644
--- a/test/dm/spmi.c
+++ b/test/dm/spmi.c
@@ -14,6 +14,7 @@
 #include <power/pmic.h>
 #include <spmi/spmi.h>
 #include <asm/gpio.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test if bus childs got probed propperly*/
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index 06a1c69..b2d0ade 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -11,6 +11,7 @@
 #include <asm/test.h>
 #include <dm/test.h>
 #include <linux/err.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Base test of system controllers */
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index 5b2358e..e5cd18c 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -9,6 +9,7 @@
 #include <asm/state.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that we can use particular sysreset devices */
diff --git a/test/dm/tee.c b/test/dm/tee.c
index 632e996..fec9551 100644
--- a/test/dm/tee.c
+++ b/test/dm/tee.c
@@ -10,6 +10,7 @@
 #include <dm/test.h>
 #include <sandboxtee.h>
 #include <tee.h>
+#include <test/test.h>
 #include <test/ut.h>
 #include <tee/optee_ta_avb.h>
 
diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c
index ba85fa3..08bdf01 100644
--- a/test/dm/test-driver.c
+++ b/test/dm/test-driver.c
@@ -11,9 +11,10 @@
 #include <errno.h>
 #include <log.h>
 #include <malloc.h>
-#include <dm/test.h>
-#include <test/ut.h>
 #include <asm/io.h>
+#include <dm/test.h>
+#include <test/test.h>
+#include <test/ut.h>
 
 int dm_testdrv_op_count[DM_TEST_OP_COUNT];
 static struct unit_test_state *uts = &global_dm_test_state;
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 8ef7c7a..c64ac40 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -18,6 +18,7 @@
 #include <dm/util.h>
 #include <dm/lists.h>
 #include <dm/of_access.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 53e5ca3..6d197d0 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -14,6 +14,8 @@
 #include <dm/test.h>
 #include <dm/root.h>
 #include <dm/uclass-internal.h>
+#include <test/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c
index b6d629a..760731b 100644
--- a/test/dm/test-uclass.c
+++ b/test/dm/test-uclass.c
@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <dm/test.h>
 #include <linux/list.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static struct unit_test_state *uts = &global_dm_test_state;
diff --git a/test/dm/timer.c b/test/dm/timer.c
index 9367dab..4aa5eea 100644
--- a/test/dm/timer.c
+++ b/test/dm/timer.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <timer.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /*
diff --git a/test/dm/usb.c b/test/dm/usb.c
index b273a51..6cbb66c 100644
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -14,6 +14,7 @@
 #include <dm/device-internal.h>
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 struct keyboard_test_data {
diff --git a/test/dm/video.c b/test/dm/video.c
index 19f78b6..9523a01 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -15,6 +15,7 @@
 #include <video_console.h>
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /*
diff --git a/test/dm/virtio.c b/test/dm/virtio.c
index 4a0c0b2..6361cd5 100644
--- a/test/dm/virtio.c
+++ b/test/dm/virtio.c
@@ -9,9 +9,10 @@
 #include <virtio.h>
 #include <virtio_ring.h>
 #include <dm/device-internal.h>
-#include <dm/uclass-internal.h>
 #include <dm/root.h>
 #include <dm/test.h>
+#include <dm/uclass-internal.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Basic test of the virtio uclass */
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
index 1d31ec5..c704098 100644
--- a/test/dm/wdt.c
+++ b/test/dm/wdt.c
@@ -9,6 +9,7 @@
 #include <asm/state.h>
 #include <asm/test.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 /* Test that watchdog driver functions are called */
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index a0fe0f6..a344987 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -4,10 +4,12 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <lmb.h>
 #include <log.h>
 #include <malloc.h>
 #include <dm/test.h>
+#include <test/test.h>
 #include <test/ut.h>
 
 static int check_lmb(struct unit_test_state *uts, struct lmb *lmb,
diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py
index c9580ad..792196e 100644
--- a/tools/patman/test_checkpatch.py
+++ b/tools/patman/test_checkpatch.py
@@ -373,19 +373,19 @@
         self.checkSingleMessage(pm, 'NEW_UCLASS')
 
     def testLivetree(self):
-        """Test for Use the livetree API"""
+        """Test for using the livetree API"""
         pm = PatchMaker()
         pm.add_line('common/main.c', 'fdtdec_do_something()')
         self.checkSingleMessage(pm, 'LIVETREE')
 
     def testNewCommand(self):
-        """Test for Use the livetree API"""
+        """Test for adding a new command"""
         pm = PatchMaker()
         pm.add_line('common/main.c', 'do_wibble(struct cmd_tbl *cmd_tbl)')
         self.checkSingleMessage(pm, 'CMD_TEST')
 
-    def testNewCommand(self):
-        """Test for Use the livetree API"""
+    def testPreferIf(self):
+        """Test for using #ifdef"""
         pm = PatchMaker()
         pm.add_line('common/main.c', '#ifdef CONFIG_YELLOW')
         pm.add_line('common/init.h', '#ifdef CONFIG_YELLOW')
@@ -393,11 +393,18 @@
         self.checkSingleMessage(pm, "PREFER_IF")
 
     def testCommandUseDefconfig(self):
-        """Test for Use the livetree API"""
+        """Test for enabling/disabling commands using preprocesor"""
         pm = PatchMaker()
         pm.add_line('common/main.c', '#undef CONFIG_CMD_WHICH')
         self.checkSingleMessage(pm, 'DEFINE_CONFIG_CMD', 'error')
 
+    def testBarredIncludeInHdr(self):
+        """Test for using a barred include in a header file"""
+        pm = PatchMaker()
+        #pm.add_line('include/myfile.h', '#include <common.h>')
+        pm.add_line('include/myfile.h', '#include <dm.h>')
+        self.checkSingleMessage(pm, 'BARRED_INCLUDE_IN_HDR', 'error')
+
 
 if __name__ == "__main__":
     unittest.main()