x86: gpio: add pinctrl support from the device tree
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 7103bc5..bd21bfb 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include <dt-bindings/gpio/x86-gpio.h>
+
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
@@ -22,6 +24,27 @@
silent_console = <0>;
};
+ pch_pinctrl {
+ compatible = "intel,x86-pinctrl";
+ io-base = <0x4c>;
+
+ pin_usb_host_en0@0 {
+ gpio-offset = <0x80 8>;
+ pad-offset = <0x260>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+ };
+
+ pin_usb_host_en1@0 {
+ gpio-offset = <0x80 9>;
+ pad-offset = <0x258>;
+ mode-gpio;
+ output-value = <1>;
+ direction = <PIN_OUTPUT>;
+ };
+ };
+
gpioa {
compatible = "intel,ich6-gpio";
u-boot,dm-pre-reloc;
diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h
index 1099427..ed85b08 100644
--- a/arch/x86/include/asm/gpio.h
+++ b/arch/x86/include/asm/gpio.h
@@ -147,6 +147,7 @@
} set3;
};
+int gpio_ich6_pinctrl_init(void);
void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio);
void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);