| commit | 2007a730eef83421cc6ca3c1875fa0e0b4d4712e | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marex@denx.de> | Wed Nov 20 22:40:19 2019 +0100 |
| committer | Marek Vasut <marex@denx.de> | Mon Nov 25 13:12:56 2019 +0100 |
| tree | 177ad898feb73bd25877e4c979c0509e222d5ad8 | |
| parent | 97a72bc28613733572b9632a51ab9c8680d45406 [diff] |
ARM: socfpga: Add ArriaV ST/SX ID Add new FPGA ID for ArriaV ST/D3 or SX/B3 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>