| # SPDX-License-Identifier: GPL-2.0 |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/watchdog/allwinner,sun4i-a10-wdt.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner A10 Watchdog |
| |
| allOf: |
| - $ref: watchdog.yaml# |
| |
| maintainers: |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| properties: |
| compatible: |
| oneOf: |
| - const: allwinner,sun4i-a10-wdt |
| - const: allwinner,sun6i-a31-wdt |
| - items: |
| - enum: |
| - allwinner,sun50i-a64-wdt |
| - allwinner,sun50i-a100-wdt |
| - allwinner,sun50i-h6-wdt |
| - allwinner,sun50i-h616-wdt |
| - allwinner,sun50i-r329-wdt |
| - allwinner,sun50i-r329-wdt-reset |
| - allwinner,suniv-f1c100s-wdt |
| - const: allwinner,sun6i-a31-wdt |
| - const: allwinner,sun20i-d1-wdt |
| - items: |
| - const: allwinner,sun20i-d1-wdt-reset |
| - const: allwinner,sun20i-d1-wdt |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| minItems: 1 |
| items: |
| - description: 32 KHz input clock |
| - description: secondary clock source |
| |
| interrupts: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - interrupts |
| |
| if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - allwinner,sun20i-d1-wdt |
| - allwinner,sun20i-d1-wdt-reset |
| - allwinner,sun50i-r329-wdt |
| - allwinner,sun50i-r329-wdt-reset |
| |
| then: |
| properties: |
| clocks: |
| items: |
| - description: High-frequency oscillator input, divided internally |
| - description: Low-frequency oscillator input |
| |
| clock-names: |
| items: |
| - const: hosc |
| - const: losc |
| |
| required: |
| - clock-names |
| |
| else: |
| properties: |
| clocks: |
| maxItems: 1 |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| wdt: watchdog@1c20c90 { |
| compatible = "allwinner,sun4i-a10-wdt"; |
| reg = <0x01c20c90 0x10>; |
| interrupts = <24>; |
| clocks = <&osc24M>; |
| timeout-sec = <10>; |
| }; |
| |
| ... |