arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.
More information is avaialble here [1] and here [2].
The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.
It sports a rich set of I/O including
* DW USB OTG
* DW MobileStorage (used for micro SD-card)
* GPIO
* multiple serial interface including DW APB UART
* ADC, PWM and eFlash, SRAM and SPI Flash memory
* Real-Time Clock (RTC)
* Bluetooth module with worldwide regulatory compliance
(FCC, IC, CE, ETSI, TELEC)
* On-board 9-axis sensor (gyro, accelerometer and compass)
Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.
One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!
[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
diff --git a/board/synopsys/iot_devkit/u-boot.lds b/board/synopsys/iot_devkit/u-boot.lds
new file mode 100644
index 0000000..d083168
--- /dev/null
+++ b/board/synopsys/iot_devkit/u-boot.lds
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+
+MEMORY {
+ ROM : ORIGIN = ROM_BASE, LENGTH = ROM_SIZE
+ RAM : ORIGIN = RAM_DATA_BASE, LENGTH = RAM_DATA_SIZE
+}
+
+OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc")
+OUTPUT_ARCH(arc)
+ENTRY(_start)
+SECTIONS
+{
+ . = CONFIG_SYS_MONITOR_BASE;
+ __image_copy_start = .;
+ .ivt :
+ {
+ __ivt_start = .;
+ KEEP(*(.ivt));
+ __ivt_end = .;
+ } > ROM
+
+ . = ALIGN(1024);
+ .text : {
+ __text_start = .;
+ arch/arc/lib/start.o (.text*)
+ *(.text*)
+ __text_end = .;
+ } > ROM
+
+ . = ALIGN(4);
+ .rodata : {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ } > ROM
+
+ . = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+
+ /* Mark RAM's LMA */
+ . = ALIGN(4);
+ __rom_end = .;
+ } > ROM
+
+ .data : {
+ /* Mark RAM's VMA */
+ . = ALIGN(4);
+
+ /*
+ * Everything between __ram_start and __ram_start will be
+ * copied from ROM to RAM in board_early_init_f().
+ */
+ __ram_start = .;
+
+ *(.data*)
+
+ __ram_end = .;
+ } > RAM AT > ROM
+
+ .bss : {
+ . = ALIGN(1024);
+ __bss_start = .;
+ *(.bss*)
+ __bss_end = .;
+ } > RAM
+
+ /* Keep relocation-related symbols to make linker happy */
+ __rel_dyn_start = .;
+ __rel_dyn_end = .;
+ __image_copy_end = .;
+ __init_end = .;
+}