| commit | 554d33f3db3cdbb02f440ab3b667ff2bc3cfa2b1 | [log] [tgz] |
|---|---|---|
| author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | Wed Jan 17 16:13:06 2018 +0530 |
| committer | York Sun <york.sun@nxp.com> | Tue Jan 23 11:20:03 2018 -0800 |
| tree | 32f7d0ba67574dbb9c660935008e0abcf9743f7b | |
| parent | 23a12cb3d05ee2caa860bee7b6f0ebcb40afacce [diff] |
ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs Sets DDR configuration parameter cdr1 before all other settings to support case 0.9v VDD is enabled for some SoCs Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>