MIPS: Malta: Enable CM & L2 support
Enable support for the MIPS Coherence Manager & L2 caches on the MIPS
Malta board, removing the need for us to attempt to bypass the L2 during
boot (which would fail with recent CPUs that expose L2 config via the CM
anyway).
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7671437..f113b91 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -26,6 +26,8 @@
select DM
select DM_SERIAL
select DYNAMIC_IO_PORT_BASE
+ select MIPS_CM
+ select MIPS_L2_CACHE
select OF_CONTROL
select OF_ISA_BUS
select SUPPORTS_BIG_ENDIAN