83xx, uec: split enet_interface in two variables
There's no sensible reason to unite speed and interface type into
one variable. So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.
Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index db95ada..27dc500 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -323,9 +323,10 @@
return 0;
}
-static int uec_set_mac_if_mode(uec_private_t *uec, enet_interface_e if_mode)
+static int uec_set_mac_if_mode(uec_private_t *uec,
+ enet_interface_type_e if_mode, int speed)
{
- enet_interface_e enet_if_mode;
+ enet_interface_type_e enet_if_mode;
uec_info_t *uec_info;
uec_t *uec_regs;
u32 upsmr;
@@ -346,52 +347,68 @@
upsmr = in_be32(&uec->uccf->uf_regs->upsmr);
upsmr &= ~(UPSMR_RPM | UPSMR_TBIM | UPSMR_R10M | UPSMR_RMM);
- switch (enet_if_mode) {
- case ENET_100_MII:
- case ENET_10_MII:
+ switch (speed) {
+ case 10:
maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
+ switch (enet_if_mode) {
+ case MII:
+ break;
+ case RGMII:
+ upsmr |= (UPSMR_RPM | UPSMR_R10M);
+ break;
+ case RMII:
+ upsmr |= (UPSMR_R10M | UPSMR_RMM);
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
break;
- case ENET_1000_GMII:
- maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
- break;
- case ENET_1000_TBI:
- maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
- upsmr |= UPSMR_TBIM;
- break;
- case ENET_1000_RTBI:
- maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
- upsmr |= (UPSMR_RPM | UPSMR_TBIM);
- break;
- case ENET_1000_RGMII_RXID:
- case ENET_1000_RGMII_ID:
- case ENET_1000_RGMII:
- maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
- upsmr |= UPSMR_RPM;
- break;
- case ENET_100_RGMII:
+ case 100:
maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
- upsmr |= UPSMR_RPM;
+ switch (enet_if_mode) {
+ case MII:
+ break;
+ case RGMII:
+ upsmr |= UPSMR_RPM;
+ break;
+ case RMII:
+ upsmr |= UPSMR_RMM;
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
break;
- case ENET_10_RGMII:
- maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
- upsmr |= (UPSMR_RPM | UPSMR_R10M);
- break;
- case ENET_100_RMII:
- maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
- upsmr |= UPSMR_RMM;
- break;
- case ENET_10_RMII:
- maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;
- upsmr |= (UPSMR_R10M | UPSMR_RMM);
- break;
- case ENET_1000_SGMII:
+ case 1000:
maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;
- upsmr |= UPSMR_SGMM;
+ switch (enet_if_mode) {
+ case GMII:
+ break;
+ case TBI:
+ upsmr |= UPSMR_TBIM;
+ break;
+ case RTBI:
+ upsmr |= (UPSMR_RPM | UPSMR_TBIM);
+ break;
+ case RGMII_RXID:
+ case RGMII_ID:
+ case RGMII:
+ upsmr |= UPSMR_RPM;
+ break;
+ case SGMII:
+ upsmr |= UPSMR_SGMM;
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
break;
default:
return -EINVAL;
break;
}
+
out_be32(&uec_regs->maccfg2, maccfg2);
out_be32(&uec->uccf->uf_regs->upsmr, upsmr);
@@ -504,7 +521,7 @@
struct uec_mii_info *mii_info = uec->mii_info;
extern void change_phy_interface_mode(struct eth_device *dev,
- enet_interface_e mode);
+ enet_interface_type_e mode, int speed);
uec_regs = uec->uec_regs;
if (mii_info->link) {
@@ -522,25 +539,19 @@
}
if (mii_info->speed != uec->oldspeed) {
+ enet_interface_type_e mode = \
+ uec->uec_info->enet_interface_type;
if (uec->uec_info->uf_info.eth_type == GIGA_ETH) {
switch (mii_info->speed) {
case 1000:
break;
case 100:
printf ("switching to rgmii 100\n");
- /* change phy to rgmii 100 */
- change_phy_interface_mode(dev,
- ENET_100_RGMII);
- /* change the MAC interface mode */
- uec_set_mac_if_mode(uec,ENET_100_RGMII);
+ mode = RGMII;
break;
case 10:
printf ("switching to rgmii 10\n");
- /* change phy to rgmii 10 */
- change_phy_interface_mode(dev,
- ENET_10_RGMII);
- /* change the MAC interface mode */
- uec_set_mac_if_mode(uec,ENET_10_RGMII);
+ mode = RGMII;
break;
default:
printf("%s: Ack,Speed(%d)is illegal\n",
@@ -549,6 +560,11 @@
}
}
+ /* change phy */
+ change_phy_interface_mode(dev, mode, mii_info->speed);
+ /* change the MAC interface mode */
+ uec_set_mac_if_mode(uec, mode, mii_info->speed);
+
printf("%s: Speed %dBT\n", dev->name, mii_info->speed);
uec->oldspeed = mii_info->speed;
}
@@ -980,7 +996,6 @@
int num_threads_tx;
int num_threads_rx;
u32 utbipar;
- enet_interface_e enet_interface;
u32 length;
u32 align;
qe_bd_t *bd;
@@ -1060,7 +1075,7 @@
out_be32(&uec_regs->maccfg2, MACCFG2_INIT_VALUE);
/* Setup MAC interface mode */
- uec_set_mac_if_mode(uec, uec_info->enet_interface);
+ uec_set_mac_if_mode(uec, uec_info->enet_interface_type, uec_info->speed);
/* Setup MII management base */
#ifndef CONFIG_eTSEC_MDIO_BUS
@@ -1075,7 +1090,6 @@
/* Setup UTBIPAR */
utbipar = in_be32(&uec_regs->utbipar);
utbipar &= ~UTBIPAR_PHY_ADDRESS_MASK;
- enet_interface = uec->uec_info->enet_interface;
/* Initialize UTBIPAR address to CONFIG_UTBIPAR_INIT_TBIPA for ALL UEC.
* This frees up the remaining SMI addresses for use.
@@ -1084,7 +1098,8 @@
out_be32(&uec_regs->utbipar, utbipar);
/* Configure the TBI for SGMII operation */
- if (uec->uec_info->enet_interface == ENET_1000_SGMII) {
+ if ((uec->uec_info->enet_interface_type == SGMII) &&
+ (uec->uec_info->speed == 1000)) {
uec_write_phy_reg(uec->dev, uec_regs->utbipar,
ENET_TBI_MII_ANA, TBIANA_SETTINGS);
@@ -1215,6 +1230,7 @@
if (err || i <= 0)
printf("warning: %s: timeout on PHY link\n", dev->name);
+ adjust_link(dev);
uec->the_first_run = 1;
}