| commit | 0d3972cfcd6dff18d110d2ee01ad99e3623bfd45 | [log] [tgz] |
|---|---|---|
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | Wed Jan 06 11:26:51 2016 +0800 |
| committer | York Sun <york.sun@nxp.com> | Mon Jan 25 08:24:14 2016 -0800 |
| tree | cf44538dad352ebcedef94d99a03c432f6d736e8 | |
| parent | 12f229ea8f6c8e20f8fd07906eafc853c4c354a9 [diff] |
fsl/ddr: Add workaround for ERRATUM_A009942 During the receive data training, the DDRC may complete on a non-optimal setting that could lead to data corruption or initialization failure. Workaround: before setting MEM_EN, set DEBUG_29 register with specific value for different data rates. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>