ARM: uniphier: add uniphier_cache_inv_way() to support way invalidation
This invalidates entries in specified ways of the outer cache.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
index da9488e..f1a36ed 100644
--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c
+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
@@ -72,7 +72,8 @@
#define UNIPHIER_SSCOQAD_IS_NEEDED(op) \
((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
#define UNIPHIER_SSCOQWM_IS_NEEDED(op) \
- ((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY)
+ (((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_WAY) || \
+ ((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY))
/* uniphier_cache_sync - perform a sync point for a particular cache level */
static void uniphier_cache_sync(void)
@@ -184,6 +185,13 @@
UNIPHIER_SSCOQM_CM_TOUCH_ZERO);
}
+void uniphier_cache_inv_way(u32 ways)
+{
+ uniphier_cache_maint_common(0, 0, ways,
+ UNIPHIER_SSCOQM_S_WAY |
+ UNIPHIER_SSCOQM_CM_INV);
+}
+
static void uniphier_cache_endisable(int enable)
{
u32 tmp;