| commit | 598a06dcb47db8101a19d26c0d65572fbe8e71f6 | [log] [tgz] |
|---|---|---|
| author | Sean Anderson <seanga2@gmail.com> | Thu Apr 08 22:13:05 2021 -0400 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Fri May 14 16:20:47 2021 +0800 |
| tree | e2349affcf48fe8f903f7703506551963ea7de9a | |
| parent | d0686a02b98ee264532c25108edc3ba44acc1145 [diff] |
clk: k210: Fix PLL enable always getting taken This conditional always evaluated as false, regardless of the value of reg. Fix it so that it properly tests the bits in the PLL register. Also test PLL_EN, now that we set it. Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com> Signed-off-by: Sean Anderson <seanga2@gmail.com>