commit 5ab12a9eeb7c8c1ca331685d1babca6081c7718f
author Aneesh V <aneesh@ti.com> Thu Jul 21 09:29:23 2011 -0400
committer U-Boot <uboot@aari01-12.(none)> Wed Aug 03 12:49:20 2011 +0200
tree fd11367f2ddd52657ce597fbc4c48e9400915d24
parent 3decb14abe76d244ba98fd158ef95f89e7e37d70

omap4: add omap4460 revision detection

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

arch/arm/include/asm/arch-omap4/omap4.h

diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h
index 563544f..7ff46d7 100644
--- a/arch/arm/include/asm/arch-omap4/omap4.h
+++ b/arch/arm/include/asm/arch-omap4/omap4.h
@@ -143,6 +143,7 @@
 #define OMAP4430_ES2_1	0x44300210
 #define OMAP4430_ES2_2	0x44300220
 #define OMAP4430_ES2_3	0x44300230
+#define OMAP4460_ES1_0	0x44600100
 
 /* ROM code defines */
 /* Boot device */

arch/arm/include/asm/armv7.h

diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index b5784d8..9adc563 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -29,6 +29,7 @@
 #define MIDR_CORTEX_A9_R0P1	0x410FC091
 #define MIDR_CORTEX_A9_R1P2	0x411FC092
 #define MIDR_CORTEX_A9_R1P3	0x411FC093
+#define MIDR_CORTEX_A9_R2P10	0x412FC09A
 
 /* CCSIDR */
 #define CCSIDR_LINE_SIZE_OFFSET		0