ARM: dts: ast2600: Add PWM to device tree
Add the PWM node and enable it for AST2600 EVB
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index c17988e..0d65054 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -37,6 +37,26 @@
};
};
+&pwm {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default
+ &pinctrl_pwm7_default
+ &pinctrl_pwm8g1_default
+ &pinctrl_pwm9g1_default
+ &pinctrl_pwm10g1_default
+ &pinctrl_pwm11g1_default
+ &pinctrl_pwm12g1_default
+ &pinctrl_pwm13g1_default
+ &pinctrl_pwm14g1_default>;
+};
+
&uart5 {
u-boot,dm-pre-reloc;
status = "okay";
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index ce006a3..6407430 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -113,6 +113,21 @@
reg = < 0x1e600000 0x100>;
};
+ pwm_tach: pwm_tach@1e610000 {
+ compatible = "aspeed,ast2600-pwm-tach", "simple-mfd", "syscon";
+ reg = <0x1e610000 0x100>;
+ clocks = <&scu ASPEED_CLK_AHB>;
+ resets = <&rst ASPEED_RESET_PWM>;
+
+ pwm: pwm {
+ compatible = "aspeed,ast2600-pwm";
+ #pwm-cells = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+
fmc: flash-controller@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;