armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr
The agreed split of the top of memory is 256M for debug server and 256M
for MC. This patch implements the split.
In addition, the MC mem must be 512MB aligned, so the amount of memory
to hide must be 512MB to achieve that alignment.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/README b/README
index 53fc28e..b564640 100644
--- a/README
+++ b/README
@@ -5063,6 +5063,21 @@
normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
virtual address in NOR flash.
+Freescale Layerscape Debug Server Support:
+-------------------------------------------
+The Freescale Layerscape Debug Server Support supports the loading of
+"Debug Server firmware" and triggering SP boot-rom.
+This firmware often needs to be loaded during U-Boot booting.
+
+- CONFIG_FSL_DEBUG_SERVER
+ Enable the Debug Server for Layerscape SoCs.
+
+- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
+ Define minimum DDR size required for debug server image
+
+- CONFIG_SYS_MEM_TOP_HIDE_MIN
+ Define minimum DDR size to be hided from top of the DDR memory
+
Building the Software:
======================