| commit | db0cd2d3bcd513d8413a8fa0d721c0dc457a9359 | [log] [tgz] |
|---|---|---|
| author | Antonio Borneo <antonio.borneo@st.com> | Tue Jan 28 10:11:01 2020 +0100 |
| committer | Patrick Delaunay <patrick.delaunay@st.com> | Thu Feb 13 17:26:22 2020 +0100 |
| tree | 56c1bcba748767d7d29b60b5f82d481abf9d6730 | |
| parent | d35a5af321f33e6bd5b643e1b0356fc2bfa0ba0b [diff] |
ARM: dts: stm32mp1: move FDCAN to PLL4_R LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead cache the value at probe and pretend to use it later. Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>