ppc4xx: Adapt DLVision 10G to new FPGA firmware
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c
index d7b4fb2..0388541 100644
--- a/board/gdsys/405ep/dlvision-10g.c
+++ b/board/gdsys/405ep/dlvision-10g.c
@@ -34,6 +34,8 @@
#define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
#define LATCH2_MC2_PRESENT_N 0x0080
+#define LATCH3_BASE (CONFIG_SYS_LATCH_BASE + 0x300)
+
enum {
UNITTYPE_VIDEO_USER = 0,
UNITTYPE_MAIN_USER = 1,
@@ -63,6 +65,20 @@
RAM_DDR2_64 = 2,
};
+static unsigned int get_hwver(void)
+{
+ u16 latch3 = in_le16((void *)LATCH3_BASE);
+
+ return latch3 & 0x0003;
+}
+
+static unsigned int get_mc2_present(void)
+{
+ u16 latch2 = in_le16((void *)LATCH2_BASE);
+
+ return !(latch2 & LATCH2_MC2_PRESENT_N);
+}
+
static void print_fpga_info(unsigned dev)
{
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev);
@@ -210,7 +226,6 @@
int checkboard(void)
{
char *s = getenv("serial#");
- u16 latch2 = in_le16((void *)LATCH2_BASE);
printf("Board: ");
@@ -224,7 +239,7 @@
puts("\n");
print_fpga_info(0);
- if (!(latch2 & LATCH2_MC2_PRESENT_N))
+ if (get_mc2_present())
print_fpga_info(1);
return 0;
@@ -234,15 +249,15 @@
{
ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
u16 versions = in_le16(&fpga->versions);
- u16 latch2 = in_le16((void *)LATCH2_BASE);
if (((versions >> 4) & 0x000f) != UNITTYPE_MAIN_USER)
return 0;
- if (!get_fpga_state(0))
+ if (!get_fpga_state(0) || (get_hwver() == HWVER_101))
osd_probe(0);
- if (!(latch2 & LATCH2_MC2_PRESENT_N) && !get_fpga_state(1))
+ if (get_mc2_present() &&
+ (!get_fpga_state(1) || (get_hwver() == HWVER_101)))
osd_probe(1);
return 0;