clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HW
The generic mux clock code for CCF requires reading the clock multiplexer
value from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.
The new field in the mux structure (accessible only when sandbox is run)
has been introduced for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 14b9f2b..3c075aa 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -64,7 +64,12 @@
struct clk_mux *mux = to_clk_mux(clk);
u32 val;
- val = readl(mux->reg) >> mux->shift;
+#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+ val = mux->io_mux_val;
+#else
+ val = readl(mux->reg);
+#endif
+ val >>= mux->shift;
val &= mux->mask;
return clk_mux_val_to_index(clk, mux->table, mux->flags, val);
@@ -108,6 +113,9 @@
mux->mask = mask;
mux->flags = clk_mux_flags;
mux->table = table;
+#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
+ mux->io_mux_val = *(u32 *)reg;
+#endif
clk = &mux->clk;