| commit | 62f739fe465c41a2c5be0a46b3330c12b213dc07 | [log] [tgz] |
|---|---|---|
| author | York Sun <yorksun@freescale.com> | Fri Aug 17 08:22:42 2012 +0000 |
| committer | Andy Fleming <afleming@freescale.com> | Thu Aug 23 12:16:56 2012 -0500 |
| tree | 84d1764a5c706e3618b10b999781eab6e3b02142 | |
| parent | 7e4db27ffd11f3eea7e4dfc33354fd087f9257d8 [diff] |
powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only Only the first DIMM of first controller should fall back to raw timing parameters if SPD is missing or corrupted. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>