commit 637833c2d669f9a370706e275e7103454c3c83ec
author Prafulla Wadaskar <prafulla@marvell.com> Wed Mar 03 15:27:37 2010 +0530
committer Tom Rix <Tom.Rix@windriver.com> Sun Mar 07 12:36:36 2010 -0600
tree 6fe9c2c17feb1f11020ca058d46a8b06ffdb66de
parent e4d34492017c95e4041ea0c581e1ab8d1d49381b

arm: kirkwood: suen3: fixed build warning

This patch fixes following build warning

Invalid Kwbimage command Type - valid names are: BOOT_FROM, NAND_ECC_MODE, NAND_PAGE_SIZE, SATA_PIO_MODE, DDR_INIT_DELAY, DATA, , spi, nand, sata, pex, uart

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

board/keymile/km_arm/kwbimage.cfg

diff --git a/board/keymile/km_arm/kwbimage.cfg b/board/keymile/km_arm/kwbimage.cfg
index d6edd27..26d6aa0 100644
--- a/board/keymile/km_arm/kwbimage.cfg
+++ b/board/keymile/km_arm/kwbimage.cfg
@@ -64,7 +64,6 @@
 # bit31-30: 01
 
 DATA 0xFFD01404 0x36343000	# DDR Controller Control Low
-		0x38543000
 # bit 3-0:  0 reserved
 # bit 4:    0=addr/cmd in smame cycle
 # bit 5:    0=clk is driven during self refresh, we don't care for APX
@@ -170,7 +169,7 @@
 # bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
 
 DATA 0xFFD01480 0x00000001	# DDR Initialization Control
-#bit0=1, enable DDR init upon this register write
+# bit0=1, enable DDR init upon this register write
 
 # End of Header extension
 DATA 0x0 0x0