x86: Clean up lapic codes

This commit cleans up the lapic codes:
- Delete arch/x86/include/asm/lapic_def.h, and move register and bit
  defines into arch/x86/include/asm/lapic.h
- Use MSR defines from msr-index.h in enable_lapic() and disable_lapic()
- Remove unnecessary stuff like NEED_LAPIC, X86_GOOD_APIC and
  CONFIG_AP_IN_SIPI_WAIT
- Move struct x86_cpu_priv defines to asm/arch-ivybridge/bd82x6x.h, as
  it is not apic related and only used by ivybridge
- Fix coding convention issues

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index 4690603..6769ae5 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -8,50 +8,46 @@
  */
 
 #include <common.h>
-#include <asm/msr.h>
-#include <asm/io.h>
 #include <asm/lapic.h>
 #include <asm/post.h>
 
 void lapic_setup(void)
 {
-#if NEED_LAPIC == 1
+#ifdef CONFIG_SMP
 	/* Only Pentium Pro and later have those MSR stuff */
 	debug("Setting up local apic: ");
 
 	/* Enable the local apic */
 	enable_lapic();
 
-	/*
-	 * Set Task Priority to 'accept all'.
-	 */
+	/* Set Task Priority to 'accept all' */
 	lapic_write_around(LAPIC_TASKPRI,
 			   lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
 
 	/* Put the local apic in virtual wire mode */
 	lapic_write_around(LAPIC_SPIV, (lapic_read_around(LAPIC_SPIV) &
-				~(LAPIC_VECTOR_MASK)) | LAPIC_SPIV_ENABLE);
+			   ~(LAPIC_VECTOR_MASK)) | LAPIC_SPIV_ENABLE);
 	lapic_write_around(LAPIC_LVT0, (lapic_read_around(LAPIC_LVT0) &
-			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
-			  LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
-			  LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
-			  LAPIC_DELIVERY_MODE_MASK)) |
-			(LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
-			 LAPIC_DELIVERY_MODE_EXTINT));
+			   ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+			   LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
+			   LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
+			   LAPIC_DELIVERY_MODE_MASK)) |
+			   (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
+			   LAPIC_DELIVERY_MODE_EXTINT));
 	lapic_write_around(LAPIC_LVT1, (lapic_read_around(LAPIC_LVT1) &
-			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
-			  LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
-			  LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
-			  LAPIC_DELIVERY_MODE_MASK)) |
-		(LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
-			LAPIC_DELIVERY_MODE_NMI));
+			   ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+			   LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
+			   LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
+			   LAPIC_DELIVERY_MODE_MASK)) |
+			   (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
+			   LAPIC_DELIVERY_MODE_NMI));
 
 	debug("apic_id: 0x%02lx, ", lapicid());
-#else /* !NEED_LLAPIC */
+#else /* !CONFIG_SMP */
 	/* Only Pentium Pro and later have those MSR stuff */
 	debug("Disabling local apic: ");
 	disable_lapic();
-#endif /* !NEED_LAPIC */
+#endif /* CONFIG_SMP */
 	debug("done.\n");
 	post_code(POST_LAPIC);
 }