PCIe, USB: Replace 'end point' references with 'endpoint'
When referring to PCIe and USB 'endpoint' is the standard naming
convention.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 67a0167..8c65cfb 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -609,7 +609,7 @@
/*
* For the given slot, set endpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the
- * clock. In end point mode reset bit is read only.
+ * clock. In endpoint mode reset bit is read only.
*/
void board_pcie_setup_port(int port, int rootpoint)
{
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index da6cf47..c11a5c3 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -219,7 +219,7 @@
pcie1_hose.region_count = 1;
#endif
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index f8292cf..81a56b5 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -226,7 +226,7 @@
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -246,7 +246,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
@@ -266,7 +266,7 @@
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 35a8063..b35e02f 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -144,7 +144,7 @@
pcie3_hose.region_count = 1;
#endif
printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -179,7 +179,7 @@
pcie1_hose.region_count = 1;
#endif
printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
@@ -210,7 +210,7 @@
pcie2_hose.region_count = 1;
#endif
printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 38cbc8b..aa3f32b 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -343,7 +343,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 60e22de..4ec13a9 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -408,7 +408,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 56854ca..1c76b84 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -552,7 +552,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 64e164b..74085c3 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -194,7 +194,7 @@
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -226,7 +226,7 @@
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
@@ -246,7 +246,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 2d4b9ad..784a2ed 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -249,7 +249,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
@@ -270,7 +270,7 @@
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
index 6fd6963..aa2f64c 100644
--- a/board/freescale/p1_p2_rdb/pci.c
+++ b/board/freescale/p1_p2_rdb/pci.c
@@ -66,7 +66,7 @@
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
@@ -85,7 +85,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 599caa2..f6eae55 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -222,7 +222,7 @@
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
@@ -262,7 +262,7 @@
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -281,7 +281,7 @@
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "End Point" : "Root Complex",
+ pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index aa7827e..8c9d586 100644
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -636,7 +636,7 @@
if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("PCIe: %s, base address %x",
- pcie_ep ? "End point" : "Root complex", (uint)pci);
+ pcie_ep ? "Endpoint" : "Root complex", (uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0xffffffff;
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index a615820..3a81827 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -256,7 +256,7 @@
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
printf("\n PCIE1 connected as %s (x%d)",
- host ? "Root Complex" : "End Point", width);
+ host ? "Root Complex" : "Endpoint", width);
if (in_be32(&pci->pme_msg_det)) {
out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",
@@ -305,7 +305,7 @@
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
printf("\n PCIE2 connected as %s (x%d)",
- host ? "Root Complex" : "End Point", width);
+ host ? "Root Complex" : "Endpoint", width);
if (in_be32(&pci->pme_msg_det)) {
out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",
@@ -354,7 +354,7 @@
if (width && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
printf("\n PCIE3 connected as %s (x%d)",
- host ? "Root Complex" : "End Point", width);
+ host ? "Root Complex" : "Endpoint", width);
if (in_be32(&pci->pme_msg_det)) {
out_be32(&pci->pme_msg_det, 0xffffffff);
debug(" with errors. Clearing. Now 0x%08x",