commit 667dbcd01d35a69a0a01ecd09b9f18d9aa0efe72
author Masahiro Yamada <yamada.masahiro@socionext.com> Tue May 24 21:14:01 2016 +0900
committer Masahiro Yamada <yamada.masahiro@socionext.com> Thu May 26 00:37:13 2016 +0900
tree 4cf4bbe11b662cbc8e7625fede4c2a5d0bb2c2e0
parent 7381db86a90bb36d6e615da835ae6964af68f260

ARM: uniphier: add PH1-LD11 SoC support

This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

include/configs/uniphier.h

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 18cb963..10fd8c2 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -104,7 +104,11 @@
 #define COUNTER_FREQUENCY			50000000
 #define CONFIG_GICV3
 #define GICD_BASE				0x5fe00000
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+#define GICR_BASE				0x5fe40000
+#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 #define GICR_BASE				0x5fe80000
+#endif
 #else
 /* Time clock 1MHz */
 #define CONFIG_SYS_TIMER_RATE			1000000
@@ -270,7 +274,9 @@
 #define CONFIG_SPL_TEXT_BASE		0x00100000
 #endif
 
-#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+#define CONFIG_SPL_STACK		(0x30014c00)
+#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 #define CONFIG_SPL_STACK		(0x3001c000)
 #else
 #define CONFIG_SPL_STACK		(0x00100000)
@@ -301,7 +307,11 @@
 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
 #define CONFIG_SPL_MAX_SIZE			0x10000
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+#define CONFIG_SPL_BSS_START_ADDR		0x30012000
+#elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
+#endif
 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
 
 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */