arc: Add support for HS Development Kit board
ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
* 4Gb of DDR (we use only lowest 1Gb out of it now)
* Lots of DesigWare peripherals
* Different connectivity modules:
- Synopsys HAPS HT3
- Arduino-compatible connector
- MikroBUS
This initial commit supports the following peripherals:
* UART (DW 8250)
* Ethernet (DW GMAC)
* SD/MMC (DW Mobile Storage)
* USB 1.1 & 2.0
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 6e4b1d0..e3f9db7 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -132,10 +132,14 @@
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
+config TARGET_HSDK
+ bool "Support Synpsys HS DevelopmentKit board"
+
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs10x/Kconfig"
+source "board/synopsys/hsdk/Kconfig"
endmenu
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile
index 218a647..63a6694 100644
--- a/arch/arc/dts/Makefile
+++ b/arch/arc/dts/Makefile
@@ -6,6 +6,7 @@
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
+dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
targets += $(dtb-y)
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
new file mode 100644
index 0000000..a7b276c
--- /dev/null
+++ b/arch/arc/dts/hsdk.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ console = &uart0;
+ };
+
+ cpu_card {
+ core_clk: core_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <1000000000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ uart0: serial0@f0005000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0xf0005000 0x1000>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ ethernet@f0008000 {
+ #interrupt-cells = <1>;
+ compatible = "altr,socfpga-stmmac";
+ reg = <0xf0008000 0x2000>;
+ phy-mode = "gmii";
+ };
+
+ ehci@0xf0040000 {
+ compatible = "generic-ehci";
+ reg = <0xf0040000 0x100>;
+ };
+
+ ohci@0xf0060000 {
+ compatible = "generic-ohci";
+ reg = <0xf0060000 0x100>;
+ };
+};