ARMV7: Fix udelay for OMAP4
The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't
acceptable for udelay. This patch changes from gptimer1 to gptimer2,
which uses sys_clk at 38.4 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c
index 69e285f..6b8cf7b 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -41,12 +41,8 @@
/*
* Nothing really to do with interrupts, just starts up a counter.
- * We run the counter with 13MHz, divided by 8, resulting in timer
- * frequency of 1.625MHz. With 32bit counter register, counter
- * overflows in ~44min
*/
-/* 13MHz / 8 = 1.625MHz */
#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
#define TIMER_LOAD_VAL 0xffffffff
@@ -84,11 +80,6 @@
/* delay x useconds */
void __udelay(unsigned long usec)
{
-#if defined(CONFIG_OMAP44XX)
- /* TODO temporary hack until OMAP4 clock setup routines are present */
- if (usec > 1000)
- usec = usec/1000;
-#endif
long tmo = usec * (TIMER_CLOCK / 1000) / 1000;
unsigned long now, last = readl(&timer_base->tcrr);
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 0c5ef7b..0fb1ad3 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -196,7 +196,7 @@
#define CONFIG_SYS_LOAD_ADDR 0x80000000
/* Use General purpose timer 1 */
-#define CONFIG_SYS_TIMERBASE GPT1_BASE
+#define CONFIG_SYS_TIMERBASE GPT2_BASE
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index ede7691..ef5272b 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -197,7 +197,7 @@
#define CONFIG_SYS_LOAD_ADDR 0x80000000
/* Use General purpose timer 1 */
-#define CONFIG_SYS_TIMERBASE GPT1_BASE
+#define CONFIG_SYS_TIMERBASE GPT2_BASE
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ 1000