ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1
- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
+ patch from stm32-dt-for-v5.19-fixes-2
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
diff --git a/arch/arm/dts/stm32mp157c-dk2-scmi.dts b/arch/arm/dts/stm32mp157c-dk2-scmi.dts
new file mode 100644
index 0000000..97e4f94
--- /dev/null
+++ b/arch/arm/dts/stm32mp157c-dk2-scmi.dts
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp157c-dk2.dts"
+#include "stm32mp15-scmi.dtsi"
+
+/ {
+ model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
+ compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157";
+
+ reserved-memory {
+ optee@de000000 {
+ reg = <0xde000000 0x2000000>;
+ no-map;
+ };
+ };
+};
+
+&cpu0 {
+ clocks = <&scmi_clk CK_SCMI_MPU>;
+};
+
+&cpu1 {
+ clocks = <&scmi_clk CK_SCMI_MPU>;
+};
+
+&cryp1 {
+ clocks = <&scmi_clk CK_SCMI_CRYP1>;
+ resets = <&scmi_reset RST_SCMI_CRYP1>;
+};
+
+&dsi {
+ phy-dsi-supply = <&scmi_reg18>;
+ clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
+};
+
+&gpioz {
+ clocks = <&scmi_clk CK_SCMI_GPIOZ>;
+};
+
+&hash1 {
+ clocks = <&scmi_clk CK_SCMI_HASH1>;
+ resets = <&scmi_reset RST_SCMI_HASH1>;
+};
+
+&i2c4 {
+ clocks = <&scmi_clk CK_SCMI_I2C4>;
+ resets = <&scmi_reset RST_SCMI_I2C4>;
+};
+
+&iwdg2 {
+ clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
+};
+
+&mdma1 {
+ resets = <&scmi_reset RST_SCMI_MDMA>;
+};
+
+&mlahb {
+ resets = <&scmi_reset RST_SCMI_MCU>;
+};
+
+&rcc {
+ compatible = "st,stm32mp1-rcc-secure", "syscon";
+ clock-names = "hse", "hsi", "csi", "lse", "lsi";
+ clocks = <&scmi_clk CK_SCMI_HSE>,
+ <&scmi_clk CK_SCMI_HSI>,
+ <&scmi_clk CK_SCMI_CSI>,
+ <&scmi_clk CK_SCMI_LSE>,
+ <&scmi_clk CK_SCMI_LSI>;
+};
+
+&rng1 {
+ clocks = <&scmi_clk CK_SCMI_RNG1>;
+ resets = <&scmi_reset RST_SCMI_RNG1>;
+};
+
+&rtc {
+ clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
+};