83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed.
This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
included the mpc8308_p1m board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index a42b230..288d99f 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -133,7 +133,7 @@
* If fewer than three regions are requested, then the region
* list is terminated with a region of size 0.
*/
-void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg)
{
volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
int i;
@@ -150,9 +150,9 @@
/*
* Release PCI RST Output signal.
* Power on to RST high must be at least 100 ms as per PCI spec.
- * On warm boots only 1 ms is required.
+ * On warm boots only 1 ms is required, but we play it safe.
*/
- udelay(warmboot ? 1000 : 100000);
+ udelay(100000);
for (i = 0; i < num_buses; i++)
immr->pci_ctrl[i].gcr = 1;
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 09912be..1771c48 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -308,16 +308,16 @@
* The caller must have already set SCCR, SERDES and the PCIE_LAW BARs
* must have been set to cover all of the requested regions.
*/
-void mpc83xx_pcie_init(int num_buses, struct pci_region **reg, int warmboot)
+void mpc83xx_pcie_init(int num_buses, struct pci_region **reg)
{
int i;
/*
* Release PCI RST Output signal.
* Power on to RST high must be at least 100 ms as per PCI spec.
- * On warm boots only 1 ms is required.
+ * On warm boots only 1 ms is required, but we play it safe.
*/
- udelay(warmboot ? 1000 : 100000);
+ udelay(100000);
if (num_buses > ARRAY_SIZE(mpc83xx_pcie_cfg_space)) {
printf("Second PCIE host contoller not configured!\n");