Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into next
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 0e75794..2218508 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -48,21 +48,23 @@
  *-------------------------------------------------------------------------------
  */
 
-/*  U-Boot - Startup Code for AMCC 4xx PowerPC based Embedded Boards
+/*
+ * Startup code for IBM/AMCC PowerPC 4xx (PPC4xx) based boards
  *
+ * The following description only applies to the NOR flash style booting.
+ * NAND booting is different. For more details about NAND booting on 4xx
+ * take a look at doc/README.nand-boot-ppc440.
  *
- *  The processor starts at 0xfffffffc and the code is executed
- *  from flash/rom.
- *  in memory, but as long we don't jump around before relocating.
- *  board_init lies at a quite high address and when the cpu has
- *  jumped there, everything is ok.
- *  This works because the cpu gives the FLASH (CS0) the whole
- *  address space at startup, and board_init lies as a echo of
- *  the flash somewhere up there in the memorymap.
- *
- *  board_init will change CS0 to be positioned at the correct
- *  address and (s)dram will be positioned at address 0
+ * The CPU starts at address 0xfffffffc (last word in the address space).
+ * The U-Boot image therefore has to be located in the "upper" area of the
+ * flash (e.g. 512MiB - 0xfff80000 ... 0xffffffff). The default value for
+ * the boot chip-select (CS0) is quite big and covers this area. On the
+ * 405EX this is for example 0xffe00000 ... 0xffffffff. U-Boot will
+ * reconfigure this CS0 (and other chip-selects as well when configured
+ * this way) in the boot process to the "correct" values matching the
+ * board layout.
  */
+
 #include <asm-offsets.h>
 #include <config.h>
 #include <asm/ppc4xx.h>
@@ -265,7 +267,7 @@
 	/* NOTREACHED - board_init_f() does not return */
 #endif
 
-#if defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_BOOT_FROM_XMD)
 	/*
 	 * 4xx RAM-booting U-Boot image is started from offset 0
 	 */
diff --git a/arch/powerpc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds
index dac0e5b..842ff5f 100644
--- a/arch/powerpc/cpu/ppc4xx/u-boot.lds
+++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds
@@ -23,8 +23,12 @@
 #include "config.h"	/* CONFIG_BOARDDIR */
 
 #ifndef RESET_VECTOR_ADDRESS
+#ifdef CONFIG_RESET_VECTOR_ADDRESS
+#define RESET_VECTOR_ADDRESS	CONFIG_RESET_VECTOR_ADDRESS
+#else
 #define RESET_VECTOR_ADDRESS	0xfffffffc
 #endif
+#endif
 
 OUTPUT_ARCH(powerpc)
 
@@ -100,7 +104,11 @@
      * start.o, since the first shadow TLB only covers 4k
      * of address space.
      */
+#ifdef CONFIG_INIT_TLB
+    CONFIG_INIT_TLB (.bootpg)
+#else
     CONFIG_BOARDDIR/init.o	(.bootpg)
+#endif
   } :text = 0xffff
 #endif
 
diff --git a/board/lwmon5/sdram.c b/board/lwmon5/sdram.c
index f90efeb..b64b35a 100644
--- a/board/lwmon5/sdram.c
+++ b/board/lwmon5/sdram.c
@@ -45,10 +45,10 @@
  * memory.
  *
  * If at some time this restriction doesn't apply anymore, just define
- * CONFIG_SYS_ENABLE_SDRAM_CACHE in the board config file and this code should setup
+ * CONFIG_4xx_DCACHE in the board config file and this code should setup
  * everything correctly.
  */
-#ifdef CONFIG_SYS_ENABLE_SDRAM_CACHE
+#ifdef CONFIG_4xx_DCACHE
 #define MY_TLB_WORD2_I_ENABLE	0			/* enable caching on SDRAM */
 #else
 #define MY_TLB_WORD2_I_ENABLE	TLB_WORD2_I_ENABLE	/* disable caching on SDRAM */
@@ -220,18 +220,32 @@
 	program_tlb(0, CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MBYTES_SDRAM << 20,
 		    MY_TLB_WORD2_I_ENABLE);
 
+#if defined(CONFIG_DDR_ECC)
+#if defined(CONFIG_4xx_DCACHE)
+	/*
+	 * If ECC is enabled, initialize the parity bits.
+	 */
+	program_ecc(0, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
+#else /* CONFIG_4xx_DCACHE */
 	/*
 	 * Setup 2nd TLB with same physical address but different virtual address
 	 * with cache enabled. This is done for fast ECC generation.
 	 */
 	program_tlb(0, CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
 
-#ifdef CONFIG_DDR_ECC
 	/*
 	 * If ECC is enabled, initialize the parity bits.
 	 */
 	program_ecc(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20, 0);
-#endif
+
+	/*
+	 * Now after initialization (auto-calibration and ECC generation)
+	 * remove the TLB entries with caches enabled and program again with
+	 * desired cache functionality
+	 */
+	remove_tlb(CONFIG_SYS_DDR_CACHED_ADDR, CONFIG_SYS_MBYTES_SDRAM << 20);
+#endif /* CONFIG_4xx_DCACHE */
+#endif /* CONFIG_DDR_ECC */
 
 	/*
 	 * Clear possible errors resulting from data-eye-search.
diff --git a/board/t3corp/t3corp.c b/board/t3corp/t3corp.c
index 04d6a2e..f2853e4 100644
--- a/board/t3corp/t3corp.c
+++ b/board/t3corp/t3corp.c
@@ -23,6 +23,7 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <mtd/cfi_flash.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/mmu.h>
@@ -191,3 +192,40 @@
 {
 	return board_scan_options;
 }
+
+/*
+ * Accessor functions replacing the "weak" functions in
+ * drivers/mtd/cfi_flash.c
+ *
+ * The NOR flash devices "behind" the FPGA's (Xilinx DS617)
+ * can only be read correctly in 16bit mode. We need to emulate
+ * 8bit and 32bit reads here in the board specific code.
+ */
+u8 flash_read8(void *addr)
+{
+	u16 val = __raw_readw((void *)((u32)addr & ~1));
+
+	if ((u32)addr & 1)
+		return val;
+
+	return val >> 8;
+}
+
+u32 flash_read32(void *addr)
+{
+	return (__raw_readw(addr) << 16) | __raw_readw((void *)((u32)addr + 2));
+}
+
+void flash_cmd_reset(flash_info_t *info)
+{
+	/*
+	 * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and
+	 * needs the Spansion type reset commands. The other flash chip
+	 * is located behind a FPGA (Xilinx DS617) and needs the Intel type
+	 * reset command.
+	 */
+	if (info->start[0] == CONFIG_SYS_FLASH_BASE)
+		flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+	else
+		flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+}
diff --git a/board/xilinx/ppc405-generic/Makefile b/board/xilinx/ppc405-generic/Makefile
index 4b8e4f4..717ffc9 100644
--- a/board/xilinx/ppc405-generic/Makefile
+++ b/board/xilinx/ppc405-generic/Makefile
@@ -41,7 +41,9 @@
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
-$(LIB):	$(OBJS) $(SOBJS)
+all: $(LIB) $(SOBJS)
+
+$(LIB):	$(OBJS)
 	$(call cmd_link_o_target, $^)
 
 clean:
diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds
deleted file mode 100644
index a7539fd..0000000
--- a/board/xilinx/ppc405-generic/u-boot-ram.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-
-  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
-
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds
deleted file mode 100644
index 074f3c2..0000000
--- a/board/xilinx/ppc405-generic/u-boot-rom.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-
-SECTIONS
-{
-  .resetvec 0xFFFFFFFC :
-  {
-    *(.resetvec)
-  } = 0xffff
-
-  .bootpg 0xFFFFF000 :
-  {
-    arch/powerpc/cpu/ppc4xx/start.o	(.bootpg)
-  } = 0xffff
-
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-
-  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
-
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/xilinx/ppc440-generic/Makefile b/board/xilinx/ppc440-generic/Makefile
index d84cf69..1760e4e 100644
--- a/board/xilinx/ppc440-generic/Makefile
+++ b/board/xilinx/ppc440-generic/Makefile
@@ -43,7 +43,9 @@
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
-$(LIB):	$(OBJS) $(SOBJS)
+all: $(LIB) $(SOBJS)
+
+$(LIB):	$(OBJS)
 	$(call cmd_link_o_target, $^)
 
 clean:
diff --git a/board/xilinx/ppc440-generic/u-boot-ram.lds b/board/xilinx/ppc440-generic/u-boot-ram.lds
deleted file mode 100644
index 203f062..0000000
--- a/board/xilinx/ppc440-generic/u-boot-ram.lds
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start_440)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-
-  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
-
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds
deleted file mode 100644
index b67617d..0000000
--- a/board/xilinx/ppc440-generic/u-boot-rom.lds
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start_440)
-
-SECTIONS
-{
-  .resetvec 0xFFFFFFFC :
-  {
-    *(.resetvec)
-  } = 0xffff
-
-  .bootpg 0xFFFFF000 :
-  {
-    arch/powerpc/cpu/ppc4xx/start.o	(.bootpg)
-  } = 0xffff
-
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-
-  ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
-
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/boards.cfg b/boards.cfg
index 6cebc27..94b8745 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -675,10 +675,10 @@
 yosemite                     powerpc     ppc4xx      yosemite            amcc           -           yosemite:YOSEMITE
 yucca                        powerpc     ppc4xx      -                   amcc
 AP1000                       powerpc     ppc4xx      ap1000              amirix
-fx12mm                       powerpc     ppc4xx      fx12mm              avnet          -           fx12mm:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds
-fx12mm_flash                 powerpc     ppc4xx      fx12mm              avnet          -           fx12mm:SYS_TEXT_BASE=0xFFCB0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds
-v5fx30teval                  powerpc     ppc4xx      v5fx30teval         avnet          -           v5fx30teval:SYS_TEXT_BASE=0x03000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
-v5fx30teval_flash            powerpc     ppc4xx      v5fx30teval         avnet          -           v5fx30teval:SYS_TEXT_BASE=0xFF1C0000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
+fx12mm                       powerpc     ppc4xx      fx12mm              avnet          -           fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
+fx12mm_flash                 powerpc     ppc4xx      fx12mm              avnet          -           fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
+v5fx30teval                  powerpc     ppc4xx      v5fx30teval         avnet          -           v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
+v5fx30teval_flash            powerpc     ppc4xx      v5fx30teval         avnet          -           v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
 CRAYL1                       powerpc     ppc4xx      L1                  cray
 CATcenter                    powerpc     ppc4xx      PPChameleonEVB      dave           -           CATcenter:PPCHAMELEON_MODULE_MODEL=1
 CATcenter_25                 powerpc     ppc4xx      PPChameleonEVB      dave           -           CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25
@@ -736,12 +736,12 @@
 KAREF                        powerpc     ppc4xx      karef               sandburst
 METROBOX                     powerpc     ppc4xx      metrobox            sandburst
 xpedite1000                  powerpc     ppc4xx      -                   xes
-ml507                        powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
-ml507_flash                  powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
-xilinx-ppc405-generic        powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-ram.lds
-xilinx-ppc405-generic_flash  powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc405-generic/u-boot-rom.lds
-xilinx-ppc440-generic        powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-ram.lds
-xilinx-ppc440-generic_flash  powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0xFE360000,SYS_LDSCRIPT=$(SRCTREE)/board/xilinx/ppc440-generic/u-boot-rom.lds
+ml507                        powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
+ml507_flash                  powerpc     ppc4xx      ml507               xilinx         -           ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
+xilinx-ppc405-generic        powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC
+xilinx-ppc405-generic_flash  powerpc     ppc4xx      ppc405-generic      xilinx         -           xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
+xilinx-ppc440-generic        powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x03FFFFFC,BOOT_FROM_XMD=1
+xilinx-ppc440-generic_flash  powerpc     ppc4xx      ppc440-generic      xilinx         -           xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
 rsk7203                      sh          sh2         rsk7203             renesas        -
 mpr2                         sh          sh3         mpr2                -              -
 ms7720se                     sh          sh3         ms7720se            -              -
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 3d607c0..57112af 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -27,6 +27,7 @@
 
 COBJS-$(CONFIG_SPI_FLASH)	+= spi_flash.o
 COBJS-$(CONFIG_SPI_FLASH_ATMEL)	+= atmel.o
+COBJS-$(CONFIG_SPI_FLASH_EON)	+= eon.o
 COBJS-$(CONFIG_SPI_FLASH_MACRONIX)	+= macronix.o
 COBJS-$(CONFIG_SPI_FLASH_SPANSION)	+= spansion.o
 COBJS-$(CONFIG_SPI_FLASH_SST)	+= sst.o
diff --git a/drivers/mtd/spi/eon.c b/drivers/mtd/spi/eon.c
new file mode 100644
index 0000000..02c3bb9
--- /dev/null
+++ b/drivers/mtd/spi/eon.c
@@ -0,0 +1,275 @@
+/*
+ * (C) Copyright 2010, ucRobotics Inc.
+ * Author: Chong Huang <chuang@ucrobotics.com>
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spi_flash.h>
+
+#include "spi_flash_internal.h"
+
+/* EN25Q128-specific commands */
+#define CMD_EN25Q128_WREN	0x06    /* Write Enable */
+#define CMD_EN25Q128_WRDI	0x04    /* Write Disable */
+#define CMD_EN25Q128_RDSR	0x05    /* Read Status Register */
+#define CMD_EN25Q128_WRSR	0x01    /* Write Status Register */
+#define CMD_EN25Q128_READ	0x03    /* Read Data Bytes */
+#define CMD_EN25Q128_FAST_READ	0x0b    /* Read Data Bytes at Higher Speed */
+#define CMD_EN25Q128_PP		0x02    /* Page Program */
+#define CMD_EN25Q128_SE		0x20    /* Sector Erase */
+#define CMD_EN25Q128_BE		0xd8    /* Block Erase */
+#define CMD_EN25Q128_DP		0xb9    /* Deep Power-down */
+#define CMD_EN25Q128_RES	0xab    /* Release from DP, and Read Signature */
+
+#define EON_ID_EN25Q128		0x18
+
+#define EON_SR_WIP		(1 << 0)	/* Write-in-Progress */
+
+struct eon_spi_flash_params {
+	u8 idcode1;
+	u16 page_size;
+	u16 pages_per_sector;
+	u16 sectors_per_block;
+	u16 nr_sectors;
+	const char *name;
+};
+
+/* spi_flash needs to be first so upper layers can free() it */
+struct eon_spi_flash {
+	struct spi_flash flash;
+	const struct eon_spi_flash_params *params;
+};
+
+static inline struct eon_spi_flash *to_eon_spi_flash(struct spi_flash *flash)
+{
+	return container_of(flash, struct eon_spi_flash, flash);
+}
+
+static const struct eon_spi_flash_params eon_spi_flash_table[] = {
+	{
+		.idcode1 = EON_ID_EN25Q128,
+		.page_size = 256,
+		.pages_per_sector = 16,
+		.sectors_per_block = 16,
+		.nr_sectors = 4096,
+		.name = "EN25Q128",
+	},
+};
+
+static int eon_wait_ready(struct spi_flash *flash, unsigned long timeout)
+{
+	struct spi_slave *spi = flash->spi;
+	unsigned long timebase;
+	int ret;
+	u8 cmd = CMD_EN25Q128_RDSR;
+	u8 status;
+
+	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
+	if (ret) {
+		debug("SF: Failed to send command %02x: %d\n", cmd, ret);
+		return ret;
+	}
+
+	timebase = get_timer(0);
+	do {
+		ret = spi_xfer(spi, 8, NULL, &status, 0);
+		if (ret)
+			return -1;
+
+		if ((status & EON_SR_WIP) == 0)
+			break;
+
+	} while (get_timer(timebase) < timeout);
+
+	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
+
+	if ((status & EON_SR_WIP) == 0)
+		return 0;
+
+	/* Timed out */
+	return -1;
+}
+
+static int eon_read_fast(struct spi_flash *flash,
+			 u32 offset, size_t len, void *buf)
+{
+	struct eon_spi_flash *eon = to_eon_spi_flash(flash);
+	unsigned long page_addr;
+	unsigned long page_size;
+	u8 cmd[5];
+
+	page_size = eon->params->page_size;
+	page_addr = offset / page_size;
+
+	cmd[0] = CMD_READ_ARRAY_FAST;
+	cmd[1] = page_addr >> 8;
+	cmd[2] = page_addr;
+	cmd[3] = offset % page_size;
+	cmd[4] = 0x00;
+
+	return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len);
+}
+
+static int eon_write(struct spi_flash *flash,
+		     u32 offset, size_t len, const void *buf)
+{
+	struct eon_spi_flash *eon = to_eon_spi_flash(flash);
+	unsigned long page_addr;
+	unsigned long byte_addr;
+	unsigned long page_size;
+	size_t chunk_len;
+	size_t actual;
+	int ret;
+	u8 cmd[4];
+
+	page_size = eon->params->page_size;
+	page_addr = offset / page_size;
+	byte_addr = offset % page_size;
+
+	ret = spi_claim_bus(flash->spi);
+	if (ret) {
+		debug("SF: Unable to claim SPI bus\n");
+		return ret;
+	}
+
+	ret = 0;
+	for (actual = 0; actual < len; actual += chunk_len) {
+		chunk_len = min(len - actual, page_size - byte_addr);
+
+		cmd[0] = CMD_EN25Q128_PP;
+		cmd[1] = page_addr >> 8;
+		cmd[2] = page_addr;
+		cmd[3] = byte_addr;
+
+		debug
+		    ("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n",
+		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
+
+		ret = spi_flash_cmd(flash->spi, CMD_EN25Q128_WREN, NULL, 0);
+		if (ret < 0) {
+			debug("SF: Enabling Write failed\n");
+			break;
+		}
+
+		ret = spi_flash_cmd_write(flash->spi, cmd, 4,
+					  buf + actual, chunk_len);
+		if (ret < 0) {
+			debug("SF: EON Page Program failed\n");
+			break;
+		}
+
+		ret = eon_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+		if (ret < 0) {
+			debug("SF: EON page programming timed out\n");
+			break;
+		}
+
+		page_addr++;
+		byte_addr = 0;
+	}
+
+	debug("SF: EON: Successfully programmed %u bytes @ 0x%x\n",
+	      len, offset);
+
+	spi_release_bus(flash->spi);
+	return ret;
+}
+
+int eon_erase(struct spi_flash *flash, u32 offset, size_t len)
+{
+	/* block erase */
+	struct eon_spi_flash *eon = to_eon_spi_flash(flash);
+	unsigned long block_size;
+	size_t actual;
+	int ret;
+	u8 cmd[4];
+
+
+	block_size = eon->params->page_size * eon->params->pages_per_sector
+	       * eon->params->sectors_per_block;
+
+	if (offset % block_size || len % block_size) {
+		debug("SF: Erase offset/length not multiple of block size\n");
+		return -1;
+	}
+
+	len /= block_size;
+	cmd[0] = CMD_EN25Q128_BE;
+	cmd[2] = 0x00;
+	cmd[3] = 0x00;
+
+	ret = spi_claim_bus(flash->spi);
+	if (ret) {
+		debug("SF: Unable to claim SPI bus\n");
+		return ret;
+	}
+
+	ret = 0;
+	for (actual = 0; actual < len; actual++) {
+		cmd[1] = (offset / block_size) + actual;
+		ret = spi_flash_cmd(flash->spi, CMD_EN25Q128_WREN, NULL, 0);
+		if (ret < 0) {
+			debug("SF: Enabling Write failed\n");
+			break;
+		}
+
+		ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0);
+		if (ret < 0) {
+			debug("SF: EON page erase failed\n");
+			break;
+		}
+
+		ret = eon_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
+		if (ret < 0) {
+			debug("SF: EON page erase timed out\n");
+			break;
+		}
+	}
+
+	debug("SF: EON: Successfully erased %u bytes @ 0x%x\n",
+	      len * block_size, offset);
+
+	spi_release_bus(flash->spi);
+	return ret;
+}
+
+struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode)
+{
+	const struct eon_spi_flash_params *params;
+	struct eon_spi_flash *eon;
+	unsigned int i;
+
+	for (i = 0; i < ARRAY_SIZE(eon_spi_flash_table); ++i) {
+		params = &eon_spi_flash_table[i];
+		if (params->idcode1 == idcode[2])
+			break;
+	}
+
+	if (i == ARRAY_SIZE(eon_spi_flash_table)) {
+		debug("SF: Unsupported EON ID %02x\n", idcode[1]);
+		return NULL;
+	}
+
+	eon = malloc(sizeof(*eon));
+	if (!eon) {
+		debug("SF: Failed to allocate memory\n");
+		return NULL;
+	}
+
+	eon->params = params;
+	eon->flash.spi = spi;
+	eon->flash.name = params->name;
+
+	eon->flash.write = eon_write;
+	eon->flash.erase = eon_erase;
+	eon->flash.read = eon_read_fast;
+	eon->flash.size = params->page_size * params->pages_per_sector
+	    * params->nr_sectors;
+
+	debug("SF: Detected %s with page size %u, total %u bytes\n",
+	      params->name, params->page_size, eon->flash.size);
+
+	return &eon->flash;
+}
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index ab02ef3..b61d219 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -131,6 +131,9 @@
 #ifdef CONFIG_SPI_FLASH_ATMEL
 	{ 0, 0x1f, spi_flash_probe_atmel, },
 #endif
+#ifdef CONFIG_SPI_FLASH_EON
+	{ 0, 0x1c, spi_flash_probe_eon, },
+#endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 	{ 0, 0xc2, spi_flash_probe_macronix, },
 #endif
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
index 9bc43dd..68dcffb 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -46,6 +46,7 @@
 /* Manufacturer-specific probe functions */
 struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode);
 struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode);
+struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
 struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
 struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
 struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index de3aeb8..4452355 100644
--- a/drivers/mtd/spi/winbond.c
+++ b/drivers/mtd/spi/winbond.c
@@ -24,11 +24,6 @@
 #define CMD_W25_DP		0xb9	/* Deep Power-down */
 #define CMD_W25_RES		0xab	/* Release from DP, and Read Signature */
 
-#define WINBOND_ID_W25X16		0x3015
-#define WINBOND_ID_W25X32		0x3016
-#define WINBOND_ID_W25X64		0x3017
-#define WINBOND_ID_W25Q64		0x4017
-
 #define WINBOND_SR_WIP		(1 << 0)	/* Write-in-Progress */
 
 struct winbond_spi_flash_params {
@@ -37,7 +32,7 @@
 	uint8_t		l2_page_size;
 	uint16_t	pages_per_sector;
 	uint16_t	sectors_per_block;
-	uint8_t		nr_blocks;
+	uint16_t	nr_blocks;
 	const char	*name;
 };
 
@@ -55,7 +50,7 @@
 
 static const struct winbond_spi_flash_params winbond_spi_flash_table[] = {
 	{
-		.id			= WINBOND_ID_W25X16,
+		.id			= 0x3015,
 		.l2_page_size		= 8,
 		.pages_per_sector	= 16,
 		.sectors_per_block	= 16,
@@ -63,7 +58,7 @@
 		.name			= "W25X16",
 	},
 	{
-		.id			= WINBOND_ID_W25X32,
+		.id			= 0x3016,
 		.l2_page_size		= 8,
 		.pages_per_sector	= 16,
 		.sectors_per_block	= 16,
@@ -71,7 +66,7 @@
 		.name			= "W25X32",
 	},
 	{
-		.id			= WINBOND_ID_W25X64,
+		.id			= 0x3017,
 		.l2_page_size		= 8,
 		.pages_per_sector	= 16,
 		.sectors_per_block	= 16,
@@ -79,13 +74,37 @@
 		.name			= "W25X64",
 	},
 	{
-		.id			= WINBOND_ID_W25Q64,
+		.id			= 0x4015,
+		.l2_page_size		= 8,
+		.pages_per_sector	= 16,
+		.sectors_per_block	= 16,
+		.nr_blocks		= 32,
+		.name			= "W25Q16",
+	},
+	{
+		.id			= 0x4016,
+		.l2_page_size		= 8,
+		.pages_per_sector	= 16,
+		.sectors_per_block	= 16,
+		.nr_blocks		= 64,
+		.name			= "W25Q32",
+	},
+	{
+		.id			= 0x4017,
 		.l2_page_size		= 8,
 		.pages_per_sector	= 16,
 		.sectors_per_block	= 16,
 		.nr_blocks		= 128,
 		.name			= "W25Q64",
 	},
+	{
+		.id			= 0x4018,
+		.l2_page_size		= 8,
+		.pages_per_sector	= 16,
+		.sectors_per_block	= 16,
+		.nr_blocks		= 256,
+		.name			= "W25Q128",
+	},
 };
 
 static int winbond_wait_ready(struct spi_flash *flash, unsigned long timeout)
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 4c9744c..aedf495 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -43,6 +43,8 @@
 
 #define CONFIG_SYS_CLK_FREQ	33300000	/* external freq to pll	*/
 
+#define CONFIG_4xx_DCACHE		/* enable cache in SDRAM	*/
+
 #define CONFIG_BOARD_EARLY_INIT_F	/* Call board_early_init_f	*/
 #define CONFIG_BOARD_EARLY_INIT_R	/* Call board_early_init_r	*/
 #define CONFIG_BOARD_POSTCLK_INIT	/* Call board_postclk_init	*/
@@ -321,6 +323,8 @@
 /* Update size in "reg" property of NOR FLASH device tree nodes */
 #define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
 
+#define CONFIG_FIT			/* enable FIT image support	*/
+
 #define	CONFIG_POST_KEY_MAGIC	"3C+3E"	/* press F3 + F5 keys to force POST */
 
 #define	CONFIG_PREBOOT		"setenv bootdelay 15"
@@ -393,16 +397,18 @@
 #define CONFIG_VIDEO_SW_CURSOR
 #define CONFIG_SPLASH_SCREEN
 
-/* USB */
-#ifdef CONFIG_440EPX
-#define CONFIG_USB_OHCI
+/*
+ * USB/EHCI
+ */
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support	*/
+#define CONFIG_USB_EHCI_PPC4XX		/* on PPC4xx platform		*/
+#define CONFIG_SYS_PPC4XX_USB_ADDR	0xe0000300
+#define CONFIG_EHCI_DCACHE		/* with dcache handling support	*/
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
 #define CONFIG_USB_STORAGE
 
-/* Comment this out to enable USB 1.1 device */
-#define USB_2_0_DEVICE
-
-#endif /* CONFIG_440EPX */
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
diff --git a/include/configs/t3corp.h b/include/configs/t3corp.h
index 6115a5f..2a731a6 100644
--- a/include/configs/t3corp.h
+++ b/include/configs/t3corp.h
@@ -120,11 +120,16 @@
  */
 #define CONFIG_SYS_FLASH_CFI		/* The flash is CFI compatible	*/
 #define CONFIG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
-#define CONFIG_SYS_FLASH_CFI_AMD_RESET	1	/* Use AMD reset cmd */
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* use status poll method	*/
+#define CONFIG_SYS_FLASH_PROTECTION	/* use hardware flash protection */
 
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE, \
+			(CONFIG_SYS_FPGA1_BASE + 0x01000000) }
+#define CONFIG_SYS_CFI_FLASH_CONFIG_REGS { 0xffff,	/* don't set	*/ \
+			0xbddf }		/* set async read mode	*/
+#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max num of memory banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	512	/* max num of sectors p. chip*/
 
 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase/ms*/
@@ -355,6 +360,7 @@
 	"ramdisk_addr=fc200000\0"					\
 	"pciconfighost=1\0"						\
 	"pcie_mode=RP:RP\0"						\
+	"unlock=yes\0"							\
 	""
 
 /*
@@ -423,7 +429,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
@@ -440,7 +446,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
@@ -457,7 +463,7 @@
 				 EBC_BXAP_WBN_ENCODE(0)		|	\
 				 EBC_BXAP_WBF_ENCODE(0)		|	\
 				 EBC_BXAP_TH_ENCODE(1)		|	\
-				 EBC_BXAP_RE_DISABLED		|	\
+				 EBC_BXAP_RE_ENABLED		|	\
 				 EBC_BXAP_SOR_DELAYED		|	\
 				 EBC_BXAP_BEM_RW		|	\
 				 EBC_BXAP_PEN_DISABLED)
diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h
index 2422c0b..bd7bac0 100644
--- a/include/configs/xilinx-ppc.h
+++ b/include/configs/xilinx-ppc.h
@@ -50,6 +50,7 @@
 #undef CONFIG_CMD_DHCP
 #undef CONFIG_CMD_EEPROM
 #undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_NFS
 
 /*Misc*/
 #define CONFIG_BOOTDELAY		5/* autoboot after 5 seconds     */
diff --git a/post/cpu/ppc4xx/ether.c b/post/cpu/ppc4xx/ether.c
index 7f44f38..c508670 100644
--- a/post/cpu/ppc4xx/ether.c
+++ b/post/cpu/ppc4xx/ether.c
@@ -34,7 +34,10 @@
  * are transmitted. The configurable test parameters are:
  *   MIN_PACKET_LENGTH - minimum size of packet to transmit
  *   MAX_PACKET_LENGTH - maximum size of packet to transmit
- *   TEST_NUM - number of tests
+ *   CONFIG_SYS_POST_ETH_LOOPS - Number of test loops. Each loop
+ *     is tested with a different frame length. Starting with
+ *     MAX_PACKET_LENGTH and going down to MIN_PACKET_LENGTH.
+ *     Defaults to 10 and can be overriden in the board config header.
  */
 
 #include <post.h>
@@ -77,8 +80,12 @@
 #endif
 
 #define MIN_PACKET_LENGTH	64
-#define MAX_PACKET_LENGTH	256
-#define TEST_NUM		1
+#define MAX_PACKET_LENGTH	1514
+#ifndef CONFIG_SYS_POST_ETH_LOOPS
+#define CONFIG_SYS_POST_ETH_LOOPS	10
+#endif
+#define PACKET_INCR	((MAX_PACKET_LENGTH - MIN_PACKET_LENGTH) / \
+			 CONFIG_SYS_POST_ETH_LOOPS)
 
 static volatile mal_desc_t tx __cacheline_aligned;
 static volatile mal_desc_t rx __cacheline_aligned;
@@ -361,29 +368,27 @@
 	return 0;
 }
 
+	char packet_send[MAX_PACKET_LENGTH];
+	char packet_recv[MAX_PACKET_LENGTH];
 static int test_ctlr (int devnum, int hw_addr)
 {
 	int res = -1;
-	char packet_send[MAX_PACKET_LENGTH];
-	char packet_recv[MAX_PACKET_LENGTH];
 	int length;
-	int i;
 	int l;
 
 	ether_post_init (devnum, hw_addr);
 
-	for (i = 0; i < TEST_NUM; i++) {
-		for (l = MIN_PACKET_LENGTH; l <= MAX_PACKET_LENGTH; l++) {
-			packet_fill (packet_send, l);
+	for (l = MAX_PACKET_LENGTH; l >= MIN_PACKET_LENGTH;
+	     l -= PACKET_INCR) {
+		packet_fill (packet_send, l);
 
-			ether_post_send (devnum, hw_addr, packet_send, l);
+		ether_post_send (devnum, hw_addr, packet_send, l);
 
-			length = ether_post_recv (devnum, hw_addr, packet_recv,
-						  sizeof (packet_recv));
+		length = ether_post_recv (devnum, hw_addr, packet_recv,
+					  sizeof (packet_recv));
 
-			if (length != l || packet_check (packet_recv, length) < 0) {
-				goto Done;
-			}
+		if (length != l || packet_check (packet_recv, length) < 0) {
+			goto Done;
 		}
 	}