commit 6bd8231a6dd58c2003e67a84e55705014d963989
author Gregory CLEMENT <gregory.clement@bootlin.com> Fri Dec 14 16:16:48 2018 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Wed Dec 19 15:23:01 2018 +0100
tree 73a1600debc1d5d272a39d2d3d8dd8ecd882ca69
parent dd1033e4e0254bd2d19debe433921d9a71bdf674

MSCC: add support for Luton SoCs

As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

arch/mips/mach-mscc/lowlevel_init.S

diff --git a/arch/mips/mach-mscc/lowlevel_init.S b/arch/mips/mach-mscc/lowlevel_init.S
index f8f14ad..dfbe067 100644
--- a/arch/mips/mach-mscc/lowlevel_init.S
+++ b/arch/mips/mach-mscc/lowlevel_init.S
@@ -8,6 +8,9 @@
 
     .set noreorder
     .extern     vcoreiii_tlb_init
+#ifdef CONFIG_SOC_LUTON
+    .extern     pll_init
+#endif
 
 LEAF(lowlevel_init)
 	/*
@@ -18,6 +21,10 @@
 
 	jal	vcoreiii_tlb_init
 	 nop
+#ifdef CONFIG_SOC_LUTON
+	jal	pll_init
+	 nop
+#endif
 	jr	s0
 	 nop
 	END(lowlevel_init)