commit 6bf238a46192bf9164da4548178d657dde4e1c96
author Ley Foon Tan <ley.foon.tan@intel.com> Mon May 06 09:56:01 2019 +0800
committer Marek Vasut <marex@denx.de> Mon May 06 12:44:17 2019 +0200
tree 0913f06b09797e4ac3bcd228004b53a89826295e
parent bc179908769637cb800ad8c111290e7cae6ead79

arm: socfpga: Move Stratix 10 SDRAM driver to DM

Convert Stratix 10 SDRAM driver to device model.

Get rid of call to socfpga_per_reset() and use reset
framework.

SPL is changed from calling function in SDRAM driver
directly to just probing UCLASS_RAM.

Move sdram_s10.h from arch to driver/ddr/altera directory.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

drivers/ddr/altera/Kconfig

diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 83c1ab5..2b1c1be 100644
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,8 +1,8 @@
 config SPL_ALTERA_SDRAM
 	bool "SoCFPGA DDR SDRAM driver in SPL"
 	depends on SPL
-	depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
-	select RAM if TARGET_SOCFPGA_GEN5
-	select SPL_RAM if TARGET_SOCFPGA_GEN5
+	depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10
+	select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10
+	select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10
 	help
 	  Enable DDR SDRAM controller for the SoCFPGA devices.