rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/board/snmc/qs850/flash.c b/board/snmc/qs850/flash.c
index d2f169b..9e276a1 100644
--- a/board/snmc/qs850/flash.c
+++ b/board/snmc/qs850/flash.c
@@ -29,7 +29,7 @@
#include <asm/u-boot.h>
#include <asm/processor.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#define FLASH_WORD_SIZE unsigned long
@@ -57,7 +57,7 @@
volatile FLASH_WORD_SIZE* flash_base;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -87,13 +87,13 @@
}
/* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
+ if (CONFIG_SYS_MAX_FLASH_BANKS == 1) {
/* Setup offsets */
flash_get_offsets ((ulong)flash_base, &flash_info[0]);
/* Monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]);
+ (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1, &flash_info[0]);
size_b1 = 0 ;
flash_info[0].size = size_b0;
return(size_b0);
@@ -125,8 +125,8 @@
flash_get_offsets (base_b0, &flash_info[0]);
/* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, &flash_info[0]);
+ (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1, &flash_info[0]);
if (size_b1) {
/* Re-do sizing to get full correct info */
@@ -134,11 +134,11 @@
flash_get_offsets (base_b1, &flash_info[1]);
/* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET, base_b1+size_b1-CFG_MONITOR_LEN,
+ (void)flash_protect(FLAG_PROTECT_SET, base_b1+size_b1-CONFIG_SYS_MONITOR_LEN,
base_b1+size_b1-1, &flash_info[1]);
/* monitor protection OFF by default (one is enough) */
- (void)flash_protect(FLAG_PROTECT_CLEAR, base_b0+size_b0-CFG_MONITOR_LEN,
+ (void)flash_protect(FLAG_PROTECT_CLEAR, base_b0+size_b0-CONFIG_SYS_MONITOR_LEN,
base_b0+size_b0-1, &flash_info[0]);
} else {
flash_info[1].flash_id = FLASH_UNKNOWN;
@@ -480,7 +480,7 @@
while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
(0x00800080&FLASH_ID_MASK) )
{
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -607,7 +607,7 @@
start = get_timer(0);
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/snmc/qs850/qs850.c b/board/snmc/qs850/qs850.c
index 2fbe8ae..cc8eaad 100644
--- a/board/snmc/qs850/qs850.c
+++ b/board/snmc/qs850/qs850.c
@@ -146,7 +146,7 @@
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size;
@@ -155,17 +155,17 @@
/*
* Prescaler for refresh
*/
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
/*
* Map controller bank 1 to the SDRAM address
*/
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
+ memctl->memc_or1 = CONFIG_SYS_OR1;
+ memctl->memc_br1 = CONFIG_SYS_BR1;
udelay(1000);
/* perform SDRAM initialization sequence */
- memctl->memc_mamr = CFG_16M_MAMR;
+ memctl->memc_mamr = CONFIG_SYS_16M_MAMR;
udelay(100);
/* Program the SDRAM's Mode Register */
@@ -192,7 +192,7 @@
/*
* Check for 32M SDRAM Memory Size
*/
- size = dram_size(CFG_32M_MAMR|MAMR_PTAE,
+ size = dram_size(CONFIG_SYS_32M_MAMR|MAMR_PTAE,
(long *)SDRAM_BASE, SDRAM_32M_MAX_SIZE);
udelay (1000);
@@ -200,7 +200,7 @@
* Check for 16M SDRAM Memory Size
*/
if (size != SDRAM_32M_MAX_SIZE) {
- size = dram_size(CFG_16M_MAMR|MAMR_PTAE,
+ size = dram_size(CONFIG_SYS_16M_MAMR|MAMR_PTAE,
(long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
udelay (1000);
}
@@ -221,7 +221,7 @@
static long int dram_size (long int mamr_value, long int *base, long int maxsize)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mamr = mamr_value;
diff --git a/board/snmc/qs860t/flash.c b/board/snmc/qs860t/flash.c
index aa2e856..2cb8dcb 100644
--- a/board/snmc/qs860t/flash.c
+++ b/board/snmc/qs860t/flash.c
@@ -29,10 +29,10 @@
#include <asm/u-boot.h>
#include <asm/processor.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-#ifdef CFG_FLASH_16BIT
+#ifdef CONFIG_SYS_FLASH_16BIT
#define FLASH_WORD_SIZE unsigned short
#define FLASH_ID_MASK 0xFFFF
#else
@@ -46,7 +46,7 @@
/* stolen from esteem192e/flash.c */
ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
static int write_word (flash_info_t *info, ulong dest, ulong data);
#else
static int write_short (flash_info_t *info, ulong dest, ushort data);
@@ -65,7 +65,7 @@
unsigned long base_b0, base_b1;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
@@ -79,20 +79,20 @@
}
/* Only one bank */
- if (CFG_MAX_FLASH_BANKS == 1) {
+ if (CONFIG_SYS_MAX_FLASH_BANKS == 1) {
/* Setup offsets */
flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[0]);
/* Monitor protection ON by default */
#if 0 /* sand: */
(void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM-CFG_MONITOR_LEN+size_b0,
+ FLASH_BASE1_PRELIM-CONFIG_SYS_MONITOR_LEN+size_b0,
FLASH_BASE1_PRELIM-1+size_b0,
&flash_info[0]);
#else
(void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1,
&flash_info[0]);
#endif
size_b1 = 0 ;
@@ -126,13 +126,13 @@
/* monitor protection ON by default */
#if 0 /* sand: */
(void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE1_PRELIM-CFG_MONITOR_LEN+size_b0,
+ FLASH_BASE1_PRELIM-CONFIG_SYS_MONITOR_LEN+size_b0,
FLASH_BASE1_PRELIM-1+size_b0,
&flash_info[0]);
#else
(void)flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1,
&flash_info[0]);
#endif
@@ -144,12 +144,12 @@
/* monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
- base_b1+size_b1-CFG_MONITOR_LEN,
+ base_b1+size_b1-CONFIG_SYS_MONITOR_LEN,
base_b1+size_b1-1,
&flash_info[1]);
/* monitor protection OFF by default (one is enough) */
(void)flash_protect(FLAG_PROTECT_CLEAR,
- base_b0+size_b0-CFG_MONITOR_LEN,
+ base_b0+size_b0-CONFIG_SYS_MONITOR_LEN,
base_b0+size_b0-1,
&flash_info[0]);
} else {
@@ -182,7 +182,7 @@
else if (info->flash_id & FLASH_BTYPE) {
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00004000;
@@ -234,7 +234,7 @@
i = info->sector_count - 1;
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
info->start[i--] = base + info->size - 0x00004000;
info->start[i--] = base + info->size - 0x00008000;
info->start[i--] = base + info->size - 0x0000C000;
@@ -393,7 +393,7 @@
/* Write auto select command: read Manufacturer ID */
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
/*
* Note: if it is an AMD flash and the word at addr[0000]
@@ -650,7 +650,7 @@
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
if (info->flash_id < FLASH_AMD_COMP) {
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
addr[0x0555] = 0x00800080;
@@ -690,7 +690,7 @@
addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
(0x00800080 & FLASH_ID_MASK)) {
- if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -711,7 +711,7 @@
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
barf = 0;
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
addr = (vu_long *) (info->start[sect]);
addr[0] = 0x00200020;
addr[0] = 0x00D000D0;
@@ -766,7 +766,7 @@
flash_info_t *info;
int i;
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
+ for (i=0, info=&flash_info[0]; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
if ((addr >= info->start[0]) &&
(addr < (info->start[0] + info->size)) ) {
return (info);
@@ -843,7 +843,7 @@
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
ulong cp, wp, data;
int l;
#else
@@ -852,7 +852,7 @@
#endif
int i, rc;
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
wp = (addr & ~3); /* get lower word aligned address */
@@ -979,7 +979,7 @@
* 1 - write timeout
* 2 - Flash not erased
*/
-#ifndef CFG_FLASH_16BIT
+#ifndef CONFIG_SYS_FLASH_16BIT
static int write_word (flash_info_t *info, ulong dest, ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
@@ -1015,13 +1015,13 @@
if(info->flash_id > FLASH_AMD_COMP) {
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
} else {
while(!(addr[0] & 0x00800080)) { /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
@@ -1081,7 +1081,7 @@
if(info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
@@ -1089,7 +1089,7 @@
} else {
/* intel stuff */
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) return (1);
}
if( addr[0] & 0x003A) { /* check for error */
@@ -1103,7 +1103,7 @@
*addr = 0x00B0;
*addr = 0x0070;
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) return (1);
}
*addr = 0x00FF;
}
diff --git a/board/snmc/qs860t/qs860t.c b/board/snmc/qs860t/qs860t.c
index 17c9356..b272d80 100644
--- a/board/snmc/qs860t/qs860t.c
+++ b/board/snmc/qs860t/qs860t.c
@@ -117,7 +117,7 @@
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size;
@@ -131,12 +131,12 @@
/*
* Map controller bank 2 to the SDRAM address
*/
- memctl->memc_or2 = CFG_OR2;
- memctl->memc_br2 = CFG_BR2;
+ memctl->memc_or2 = CONFIG_SYS_OR2;
+ memctl->memc_br2 = CONFIG_SYS_BR2;
udelay(200);
/* perform SDRAM initialization sequence */
- memctl->memc_mbmr = CFG_16M_MBMR;
+ memctl->memc_mbmr = CONFIG_SYS_16M_MBMR;
udelay(100);
memctl->memc_mar = 0x00000088;
@@ -155,7 +155,7 @@
/*
* Check for 64M SDRAM Memory Size
*/
- size = dram_size (CFG_64M_MBMR, (ulong *)SDRAM_BASE, SDRAM_64M_MAX_SIZE);
+ size = dram_size (CONFIG_SYS_64M_MBMR, (ulong *)SDRAM_BASE, SDRAM_64M_MAX_SIZE);
udelay (1000);
/*
@@ -163,7 +163,7 @@
*/
if (size != SDRAM_64M_MAX_SIZE) {
#endif
- size = dram_size (CFG_16M_MBMR, (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
+ size = dram_size (CONFIG_SYS_16M_MBMR, (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
udelay (1000);
#if 0
}
@@ -184,31 +184,31 @@
/*
* Map the 8M Intel Flash device to chip select 1
*/
- memctl->memc_or1 = CFG_OR1;
- memctl->memc_br1 = CFG_BR1;
+ memctl->memc_or1 = CONFIG_SYS_OR1;
+ memctl->memc_br1 = CONFIG_SYS_BR1;
/*
* Map 64K NVRAM, Sipex Device, NAND Ctl Reg, and LED Ctl Reg
* to chip select 3
*/
- memctl->memc_or3 = CFG_OR3;
- memctl->memc_br3 = CFG_BR3;
+ memctl->memc_or3 = CONFIG_SYS_OR3;
+ memctl->memc_br3 = CONFIG_SYS_BR3;
/*
* Map chip selects 4, 5, 6, & 7 for external expansion connector
*/
- memctl->memc_or4 = CFG_OR4;
- memctl->memc_br4 = CFG_BR4;
+ memctl->memc_or4 = CONFIG_SYS_OR4;
+ memctl->memc_br4 = CONFIG_SYS_BR4;
- memctl->memc_or5 = CFG_OR5;
- memctl->memc_br5 = CFG_BR5;
+ memctl->memc_or5 = CONFIG_SYS_OR5;
+ memctl->memc_br5 = CONFIG_SYS_BR5;
- memctl->memc_or6 = CFG_OR6;
- memctl->memc_br6 = CFG_BR6;
+ memctl->memc_or6 = CONFIG_SYS_OR6;
+ memctl->memc_br6 = CONFIG_SYS_BR6;
- memctl->memc_or7 = CFG_OR7;
- memctl->memc_br7 = CFG_BR7;
+ memctl->memc_or7 = CONFIG_SYS_OR7;
+ memctl->memc_br7 = CONFIG_SYS_BR7;
#endif
@@ -227,7 +227,7 @@
static long int dram_size (long int mbmr_value, long int *base, long int maxsize)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mbmr = mbmr_value;