commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
author Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Thu Oct 16 15:01:15 2008 +0200
committer Wolfgang Denk <wd@denx.de> Sat Oct 18 21:54:03 2008 +0200
tree ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f
parent 71edc271816ec82cf0550dd6980be2da3cc2ad9e

rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

cpu/at32ap/cpu.c

diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 1a13702..f92d3e2 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -32,12 +32,12 @@
 #include "hsmc3.h"
 
 /* Sanity checks */
-#if (CFG_CLKDIV_CPU > CFG_CLKDIV_HSB)		\
-	|| (CFG_CLKDIV_HSB > CFG_CLKDIV_PBA)	\
-	|| (CFG_CLKDIV_HSB > CFG_CLKDIV_PBB)
+#if (CONFIG_SYS_CLKDIV_CPU > CONFIG_SYS_CLKDIV_HSB)		\
+	|| (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBA)	\
+	|| (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBB)
 # error Constraint fCPU >= fHSB >= fPB{A,B} violated
 #endif
-#if defined(CONFIG_PLL) && ((CFG_PLL0_MUL < 1) || (CFG_PLL0_DIV < 1))
+#if defined(CONFIG_PLL) && ((CONFIG_SYS_PLL0_MUL < 1) || (CONFIG_SYS_PLL0_DIV < 1))
 # error Invalid PLL multiplier and/or divider
 #endif
 
@@ -47,7 +47,7 @@
 {
 	extern void _evba(void);
 
-	gd->cpu_hz = CFG_OSC0_HZ;
+	gd->cpu_hz = CONFIG_SYS_OSC0_HZ;
 
 	/* TODO: Move somewhere else, but needs to be run before we
 	 * increase the clock frequency. */